May 2018 - U-Boot

[U-Boot] [PATCH v3 00/20] Bring NAND support to Nintendo NES Classic
by Miquel Raynal 07 Jul '21

07 Jul '21

Hello, This series first adds fixes and enhancements to sunxi NAND drivers (SPL and U-Boot). Once this is done, the SPL NAND driver is converted to use PIO instead of DMA with the goal to support all SoCs with this IP without the need for DMA-related code. Finally, NAND support is added to Nintendo NES Classic through Kconfig and DT additions. Thanks, Miquèl Changes since v2: ================= - Added Boris and Maxime Acked-by tags. - Removed extra space in nand_reset_column() - Fixed the useless wait period on failure in nand_change_column(). - Changed the title "sunxi: allow NAND support to be compiled for..." (removed the "in SPL" precision which is wrong). - Enbraced the deassertion of the reset line by #if statements about the SoCs in use. Wolfgang Denk made a comment on my proposal but I could not find a better solution, so I kept it for now. - s/alwinner,[pin,functions]/[pin,functions]/ in the DT. - Change Alwinner-specific parts in the SPL to generic sentences. Changes since v1: ================= All: ---- - Enhance all commit messages. - Rebased on top of master branch (I should have done that earlier but I forgot I was on an old revision). Fix binman_sym output check --------------------------- - SPL seems to be broken for a few weeks when using raw NAND, fix it by changing the error condition. Fix strength ------------ - Add comment explaining the added line and moved the line for clarification on why it is needed. - Add forgotten Boris' Suggested-by tag. Fix second case of modulo by zero error ---------------------------------------- - Added a reference to the first occurence of this issue. Allow SPL to be compiled for sun8i platforms -------------------------------------------- - This commit is not about compiling the SPL, but the NAND support in the SPL, as corrected by Maxime. Enhancements and cleaning ------------------------- - Patch split into several logical chunks, as requested. - Removed useless udelay(1), that was added for debugging purpose. - Introduced the nand_exec_cmd() helper to mutualize code one step further. - Add an udelay(1) after changing the column to respect the minimum tCCS delay (Change Column Setup time). - Canceled moving to global scope the ecc_strength array. Use PIO instead of DMA ---------------------- - Change commit message/title. - Cancel removing NFC related definitions: they can be useful as the this IP is quite under-documented. - Merge nand_reset_column and nand_change_column (in another patch). - Moved the copy of the data after the check of the ECC status. - ECC chunks are read manually, return if the first chunk is empty only (needed for configuration research), otherwise it should not be treated as an error. Add NAND node to sun8i ---------------------- - U-Boot master branch already has this node, remove the patch. Enable NAND on NES classic -------------------------- - Change the DT cells size from 2 to 1. Add NAND support for NES classic -------------------------------- - Split in several patches, moving SPL_NAND_SUPPORT and NAND_SUNXI out of the defconfig files (NES and CHIP pro) to be automatically selected depending on NAND_SUNXI and ARCH_SUNXI. - Moved the NAND parameters to Kconfig (only for SUNXI because the tool did not work as expected, maybe due to some definitions that are not "numbers" but multiplications and sometimes use other definitions (NAND page size, 2K_SZ, etc). Miquel Raynal (20): spl: fix binman_sym output check mtd: nand: sunxi: fix ECC strength choice spl: nand: sunxi: fix second case of modulo by zero error spl: nand: sunxi: fix typo on register name spl: nand: sunxi: introduce the nand_wait_int() helper spl: nand: sunxi: introduce the nand_wait_cmd_fifo_empty() helper spl: nand: sunxi: add missing status clear spl: nand: sunxi: create an helper to handle command execution spl: nand: sunxi: ensure enough time has passed after changing the column spl: nand: sunxi: make the reset column helper more generic sunxi: spl: deassert the NAND controller reset line spl: nand: sunxi: declare the ecc_bytes array globally spl: nand: sunxi: use PIO instead of DMA sunxi: spl: remove DMA related settings of the NAND controller sunxi: allow NAND support to be compiled for sun8i platforms sunxi: dts: enable NAND on NES classic sunxi: automatically select SPL_NAND_SUPPORT in Kconfig sunxi: make NAND_SUNXI use ARCH_SUNXI as default in Kconfig sunxi: move the NAND parameters to Kconfig configs: add NAND support for NES Classic arch/arm/dts/sun8i-a23-a33.dtsi | 17 ++ .../dts/sun8i-r16-nintendo-nes-classic-edition.dts | 14 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 + board/sunxi/board.c | 7 +- common/spl/spl.c | 10 +- configs/CHIP_pro_defconfig | 6 +- configs/Nintendo_NES_Classic_Edition_defconfig | 4 + drivers/mtd/nand/Kconfig | 26 ++- drivers/mtd/nand/sunxi_nand.c | 8 +- drivers/mtd/nand/sunxi_nand_spl.c | 242 ++++++++++----------- 10 files changed, 208 insertions(+), 132 deletions(-) -- 2.14.1

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[U-Boot] [PATCH v2 00/16] Add Intel Stratix 10 SoC support
by Ley Foon Tan 11 Jun '20

11 Jun '20

This is 2nd version of patchset to adds support for Intel Stratix 10 SoC. This patchset is work on top of patchset in [1]. Changes: - update base addresses header - use reset framework for periperhals (16550 UART, MMC, EMAC) - change to use serial DM driver - move bridge command to misc common driver and reuse for other platforms - rework board_init_f() in SPL - update S10 dts and dtsi - Mailbox: - change to use register offset to access register instead of register structure - rename function with __xxx prefix - DDR: - rework DDR driver - change to use register offset to access register instead of register structure - remove union bitwise structure - use wait_for_bit to poll Patchset history: [v1]: https://patchwork.ozlabs.org/cover/900499/ [1]: https://patchwork.ozlabs.org/cover/910018/ Ley Foon Tan (16): arm: socfpga: stratix10: Add watchdog and firewall base addresses arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch arm: socfpga: misc: Move bridge command to misc common arm: socfpga: stratix10: Add misc support for Stratix10 SoC arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC arm: socfpga: stratix10: Add MMU support for Stratix10 SoC arm: socfpga: Restructure the SPL file arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC arm: socfpga: stratix10: Add timer support for Stratix10 SoC ddr: altera: stratix10: Add DDR support for Stratix10 SoC board: altera: stratix10: Add socdk board support for Stratix10 SoC arm: dts: socfpga: stratix10: update dtsi and dts arm: socfpga: stratix10: Enable Stratix10 SoC build arch/arm/Kconfig | 9 +- arch/arm/dts/socfpga_stratix10.dtsi | 22 +- arch/arm/dts/socfpga_stratix10_socdk.dts | 3 + arch/arm/mach-socfpga/Kconfig | 16 + arch/arm/mach-socfpga/Makefile | 23 +- arch/arm/mach-socfpga/clock_manager.c | 4 +- arch/arm/mach-socfpga/clock_manager_s10.c | 380 +++++++++++++++++++ arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 11 + arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 + .../mach-socfpga/include/mach/clock_manager_s10.h | 210 +++++++++++ arch/arm/mach-socfpga/include/mach/firewall_s10.h | 120 ++++++ arch/arm/mach-socfpga/include/mach/handoff_s10.h | 34 ++ arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 144 ++++++++ arch/arm/mach-socfpga/include/mach/misc.h | 2 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 2 + .../mach-socfpga/include/mach/reset_manager_s10.h | 116 ++++++ arch/arm/mach-socfpga/include/mach/sdram_s10.h | 183 +++++++++ .../arm/mach-socfpga/include/mach/system_manager.h | 5 +- .../mach-socfpga/include/mach/system_manager_s10.h | 176 +++++++++ arch/arm/mach-socfpga/mailbox_s10.c | 380 +++++++++++++++++++ arch/arm/mach-socfpga/misc.c | 34 ++ arch/arm/mach-socfpga/misc_gen5.c | 26 +-- arch/arm/mach-socfpga/misc_s10.c | 133 +++++++ arch/arm/mach-socfpga/mmu-arm64_s10.c | 71 ++++ arch/arm/mach-socfpga/reset_manager.c | 13 + arch/arm/mach-socfpga/reset_manager_s10.c | 140 +++++++ arch/arm/mach-socfpga/spl_a10.c | 105 ++++++ arch/arm/mach-socfpga/{spl.c => spl_gen5.c} | 57 +--- arch/arm/mach-socfpga/spl_s10.c | 199 ++++++++++ arch/arm/mach-socfpga/system_manager_s10.c | 91 +++++ arch/arm/mach-socfpga/timer_s10.c | 26 ++ arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 +++ arch/arm/mach-socfpga/wrap_pll_config_s10.c | 59 +++ board/altera/stratix10-socdk/MAINTAINERS | 7 + board/altera/stratix10-socdk/Makefile | 7 + board/altera/stratix10-socdk/socfpga.c | 7 + configs/socfpga_stratix10_defconfig | 58 +++ drivers/ddr/altera/Makefile | 1 + drivers/ddr/altera/sdram_s10.c | 388 ++++++++++++++++++++ include/configs/socfpga_stratix10_socdk.h | 222 +++++++++++ 40 files changed, 3459 insertions(+), 83 deletions(-) create mode 100644 arch/arm/mach-socfpga/clock_manager_s10.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/firewall_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/mailbox_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h create mode 100644 arch/arm/mach-socfpga/mailbox_s10.c create mode 100644 arch/arm/mach-socfpga/misc_s10.c create mode 100644 arch/arm/mach-socfpga/mmu-arm64_s10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_s10.c create mode 100644 arch/arm/mach-socfpga/spl_a10.c rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (82%) create mode 100644 arch/arm/mach-socfpga/spl_s10.c create mode 100644 arch/arm/mach-socfpga/system_manager_s10.c create mode 100644 arch/arm/mach-socfpga/timer_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pll_config_s10.c create mode 100644 board/altera/stratix10-socdk/MAINTAINERS create mode 100644 board/altera/stratix10-socdk/Makefile create mode 100644 board/altera/stratix10-socdk/socfpga.c create mode 100644 configs/socfpga_stratix10_defconfig create mode 100644 drivers/ddr/altera/sdram_s10.c create mode 100644 include/configs/socfpga_stratix10_socdk.h

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[U-Boot] u-boot Marvell ethernet switch development
by Dennis Jacobs 26 May '20

26 May '20

Dear U-boot mailing list, Its the first time I make use of this U-boot mailing list. I am here for a problem I am having recently with u-boot which is part of my graduation project. I am developing firmware for a Marvell Ethernet switch chip (98DX3336) on the RD-XC3-24G4XG-B (Marvell Ethernet switch). Marvell has provided me with U-boot binary files for UART, SPI etc. I managed to load the U-boot UART binary file trough the UART interface. Showing: [cid:image003.png@01D3E22C.D21A6560] Ok so that is good... now I need to set up my own u-boot environment to add some changes. So I did. I Downloaded u-boot 2013.01 and added marvell configurations. I was able to compile and load the U-boot Uart binary trough the UART interface. The terminal is showing the following: [cid:image004.png@01D3E22D.C73E7040] So ok its loads! But now... I can not perform any commands. All commands are Unknown... So what I did was checking the configurations and I found out that I have set the CMD configurations. Like CMD_NET etc etc [cid:image005.png@01D3E22E.7D8A6070] Anny one that could help me here? I would really appreciate it. I am struggling with this problem for almost 2 full days now. Actions I have been taken - Tested if help command was realy executed and no other invisible fragments where added. - Tested the compilation with 7 different armv7-marvell cross compilers Left binary is the working one the second binary is mine. It only differs 26 bytes. I noticed that a different cross compiler also changes the size. Sometime more sometimes less. All of the binarys I compiled where executing correctly but not reacting on anny commands [cid:image006.png@01D3E22F.61EE8C00] Please help me. Kind regards, Dennis Jacobs Designer [Prodrive B.V.]<http://www.prodrive-technologies.com/> Mobile +31 62 57 28 194 Phone +31 40 26 76 200 www.prodrive-technologies.com<http://www.prodrive-technologies.com> [cid:image002.png@01D3E22B.A33384D0] Disclaimer: The content of this e-mail is intended solely for the use of the Individual or entity to whom it is addressed. If you have received this communication in error, be aware that forwarding it, copying it, or in any way disclosing its content to any other person, is strictly prohibited. If you have received this communication in error, please notify the author by replying to this e-mail immediately.

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[U-Boot] Starting u-boot in USB otg mode
by rivael_il 27 Feb '20

27 Feb '20

Hello u-booters! I want to load u-boot-sunxi-with-spl.bin and make it operate the USB in otg mode. (Where the host can still be connected to the board). How can I achieve this? (I have attempted to use: "usb0:dr_mode=otg,phy_type=utmi\0" without success). Thank you, Michael

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[U-Boot] [PATCH 0/1] board: arm: Add support for Broadcom BCM7445D0
by Thomas Fitzsimmons 28 Sep '19

28 Sep '19

Hi, This patch adds support for loading U-Boot on the Broadcom 7445D0 SoC, as a third stage bootloader loaded by Broadcom's BOLT bootloader. While this is only a partial port, it does enable some of U-Boot's flexibility on this SoC, functionality beyond what BOLT provides. Specifically, it brings: - ext4 file system traversal - support for loading FIT images - advanced scripting - support for FIT-provided DTBs instead of relying on the BOLT-provided DTB My team at Cisco is using a customized version of this port in production. The same approach may work on other BCM7xxx boards, with some configuration adjustments and memory layout experimentation. Stefan Roese reviewed (off-list) some early revisions of these changes. This patch is my attempt to rebase on the current U-Boot master branch. I'm submitting it in case there is interest in including this port in upstream U-Boot. Thomas Thomas Fitzsimmons (1): board: arm: Add support for Broadcom BCM7445D0 arch/arm/Kconfig | 12 + arch/arm/cpu/armv7/Makefile | 1 + arch/arm/cpu/armv7/bcm7445d0/Makefile | 11 + arch/arm/cpu/armv7/bcm7445d0/lowlevel_init.S | 24 ++ arch/arm/lib/crt0.S | 2 + arch/arm/mach-bcm7445d0/include/mach/gpio.h | 12 + arch/arm/mach-bcm7445d0/include/mach/hardware.h | 12 + arch/arm/mach-bcm7445d0/include/mach/sdhci.h | 15 + board/broadcom/bcm7445d0/Kconfig | 132 ++++++++ board/broadcom/bcm7445d0/Makefile | 11 + board/broadcom/bcm7445d0/bcm7445d0.c | 147 ++++++++ common/fdt_support.c | 9 +- common/image-fit.c | 2 + configs/bcm7445d0_defconfig | 21 ++ drivers/mmc/Makefile | 1 + drivers/mmc/bcmstb_sdhci.c | 59 ++++ drivers/spi/Kconfig | 7 + drivers/spi/Makefile | 1 + drivers/spi/bcmstb_spi.c | 428 ++++++++++++++++++++++++ dts/Kconfig | 6 + include/configs/bcm7445d0.h | 227 +++++++++++++ include/configs/bcmstb.h | 57 ++++ lib/fdtdec.c | 8 + 23 files changed, 1204 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/bcm7445d0/Makefile create mode 100644 arch/arm/cpu/armv7/bcm7445d0/lowlevel_init.S create mode 100644 arch/arm/mach-bcm7445d0/include/mach/gpio.h create mode 100644 arch/arm/mach-bcm7445d0/include/mach/hardware.h create mode 100644 arch/arm/mach-bcm7445d0/include/mach/sdhci.h create mode 100644 board/broadcom/bcm7445d0/Kconfig create mode 100644 board/broadcom/bcm7445d0/Makefile create mode 100644 board/broadcom/bcm7445d0/bcm7445d0.c create mode 100644 configs/bcm7445d0_defconfig create mode 100644 drivers/mmc/bcmstb_sdhci.c create mode 100644 drivers/spi/bcmstb_spi.c create mode 100644 include/configs/bcm7445d0.h create mode 100644 include/configs/bcmstb.h -- 1.8.3.1

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[U-Boot] [usb dwc3] xHCI driver -- a hint needed.
by Yuri Frolov 11 Sep '19

11 Sep '19

Hi, I've been trying to bring up a dwc3 usb controller included in 32-bit MIPS chip. Usb is the one port usb2.0 host module, compliant with xHCI Revision 1.0, UTMI+ Low Pin interface (ULPI) Revision 1.1 and AMBA AXI Protocol specification. g_snpsid register reports 0x5533290a revision. It's verified, that linux kernel support is ok, usb is fully functional. axi { <...> usb@1F04D050 { compatible = "be,baikal-dwc3"; reg = <0x1f04d050 0x4>; interrupts = <0x0 0x45 0x4>; #address-cells = <0x1>; #size-cells = <0x1>; clocks = <0xf 0x0>; clock-names = "usb"; ranges; status = "okay"; dwc3@1F100000 { compatible = "snps,dwc3", "synopsys,dwc3", "generic-xhci"; reg = <0x1f100000 0x10000>; interrupts = <0x0 0x44 0x4>; dr_mode = "host"; tx-fifo-resize; maximum-speed = "high-speed"; }; }; }; whereas in u-boot 'usb start' fails on hub initialization (as I can see): Any ideas why this could happen?.. Any direction where to look at? Any suggestions will be greatly appreciated. # usb start (Re)start USB... USB0: dwc3_reg->g_snpsid: 0x5533290a Register 1000140 NbrPorts 1 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... New Device 0 set address 1 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x1F get_conf_no 0 Result 25, wLength 31 if 0, ep 0 ##EP epmaxpacketin[1] = 8 set configuration 1 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 new device strings: Mfr=1, Product=2, SerialNumber=0 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 0xFF USB device number 1 default language ID 0x409 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 length 0xFF usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 length 0xFF Manufacturer U-Boot Product XHCI Host Controller SerialNumber USB hub found usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0x4 usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0xC 1 ports detected ganged power switching standalone hub individual port over-current protection TT requires at most 8 FS bit times (666 ns) power on to power good time: 20ms hub controller current requirement: 0mA port 1 is removable usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4 get_hub_status returned status 1, change 801 local power source is lost (inactive) no over-current condition exists enabling power on all ports usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0 port 1 returns 0 devnum=1 poweron: query_delay=100 connect_timeout=1100 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 Port 1 Status 101 Change 1 devnum=1 port=1: USB dev found usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 portstatus 101, change 1, 12 Mb/s usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 0x0 usb_hub_port_reset: resetting port 1... usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 portstatus 111, change 0, 12 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 0 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 portstatus 503, change 10, 480 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 1 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 New Device 1 XHCI timeout on event type 33... cannot recover. BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()! BUG! Reset CPU by CPC Here is the drivers/usb/host/xhci-baikal.c: #include <common.h> #include <usb.h> #include <linux/errno.h> #include <linux/compat.h> #include <linux/usb/dwc3.h> #include <linux/usb/xhci-omap.h> #include "xhci.h" /* Declare global data pointer */ DECLARE_GLOBAL_DATA_PTR; struct baikal_xhci { struct xhci_hccr *hcd; struct dwc3 *dwc3_reg; }; static struct baikal_xhci baikal; int __attribute__((weak)) board_usb_init(int index, enum usb_init_type init); static int baikal_xhci_core_init(struct baikal_xhci *baikal) { int ret = 0; ret = dwc3_core_init(baikal->dwc3_reg); if (ret) { debug("%s:failed to initialize core\n", __func__); return ret; } /* We are hard-coding DWC3 core to Host Mode */ dwc3_set_mode(baikal->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); return ret; } static void baikal_xhci_core_exit(struct baikal_xhci *baikal) { } int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) { struct baikal_xhci *ctx = &baikal; int ret = 0; ctx->hcd = (struct xhci_hccr *)CONFIG_USB_XHCI_BAIKAL_BASE; ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); ret = board_usb_init(index, USB_INIT_HOST); if (ret != 0) { puts("Failed to initialize board for USB\n"); return ret; } ret = baikal_xhci_core_init(ctx); if (ret < 0) { puts("Failed to initialize xhci\n"); return ret; } *hccr = (struct xhci_hccr *)(CONFIG_USB_XHCI_BAIKAL_BASE); *hcor = (struct xhci_hcor *)((uint32_t) *hccr + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); debug("baikal-xhci: init hccr %x and hcor %x hc_length %d\n", (uint32_t)*hccr, (uint32_t)*hcor, (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); return ret; } void xhci_hcd_stop(int index) { } TIA, Yuri

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[U-Boot] [PATCH 2/2] efi_loader: set the dhcp ack received flag
by Patrick Wildt 06 Aug '19

06 Aug '19

The PXE object contains a flag that specifies whether or not a DHCP ACK has been received. This can be used by EFI Applications to find out whether or not it is worth to read the DHCP information from our object. Signed-off-by: Patrick Wildt <patrick(a)blueri.se> --- lib/efi_loader/efi_net.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index 8c5d5b492c..0b9c7b9345 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -332,8 +332,10 @@ int efi_net_register(void) netobj->net_mode.max_packet_size = PKTSIZE; netobj->pxe.mode = &netobj->pxe_mode; - if (dhcp_ack) + if (dhcp_ack) { netobj->pxe_mode.dhcp_ack = *dhcp_ack; + netobj->pxe_mode.dhcp_ack_received = 1; + } /* * Create WaitForPacket event. -- 2.14.3 (Apple Git-98)

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[U-Boot] [PATCH 0/10] x86: Add generic VESA video driver
by Simon Glass 01 Aug '19

01 Aug '19

This series introduces a generic VESA video driver and adjusts the generic PCI ROM support to support it. It also fixes up some problems which prevent this from working on PowerPC at present. It is now possible to use VESA graphics: - On PowerPC, using the x86 emulator - On x86, using either the x86 emulator or native code execution As it turns out, on the only platform I have tested (link), the x86 emulator is only slightly slower that native code execution (200ms difference). Still, we may as well leave this feature in there. VGA ROMs are a very old technology but they are still used by modern platforms, including at least link and some Atom designs. Simon Glass (10): bios_emulator: Fix an #ifdef typo in the header file x86: Correct endianness isues in pci_rom x86: Support ROMs on other archs bios_emulator: Don't display error when emulator terminates bios_emulator: Add some VESA interface debugging x86: pci: Don't stop when we get a vendor/device mismatch x86: Add a VESA video driver x86: Drop the x86_fb driver x86: Access the VGA ROM when needed RFC: Test code for glacier PCI video support arch/x86/include/asm/u-boot-x86.h | 2 + drivers/bios_emulator/atibios.c | 161 +++++++++++++++++++++++---- drivers/bios_emulator/include/x86emu/debug.h | 2 +- drivers/bios_emulator/x86emu/ops.c | 2 +- drivers/pci/pci_auto.c | 28 ++++- drivers/pci/pci_rom.c | 40 ++++--- drivers/video/Makefile | 2 +- drivers/video/vesa_fb.c | 64 +++++++++++ drivers/video/x86_fb.c | 38 ------- include/configs/canyonlands.h | 31 ++++++ include/configs/chromebook_link.h | 2 +- include/pci.h | 9 ++ include/pci_rom.h | 1 - include/vbe.h | 9 +- 14 files changed, 312 insertions(+), 79 deletions(-) create mode 100644 drivers/video/vesa_fb.c delete mode 100644 drivers/video/x86_fb.c -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [RFC] Reserve ATF memory on Marvell Armdada 3700/7K/8K
by Mark Kettenis 13 Jun '19

13 Jun '19

Currently U-Boot doesn't make any effort to reserve the memory used by ARM Trusted Firmware on these platforms. The result is that the memory is listed as available in the EFI memory map. And as soon as a loaded kernel tries to use this memory things explode. I've seen this with the OpenBSD kernel. But I totally expect a Linux kernel to suffer the same fate. I'm currently using the diff below, but it is not entirely clear to me if arch_early_init_r() is the appropriate place to do this. I'm also wondering whether the block should also be marked as reserved in the FDT using fdt_add_mem_rsv(). If the latter is required this probably needs to be done by ft_board_setup() or ft_system_setup(). The address and size of the region have been taken from Marvell's ATF fork at https://github.com/MarvellEmbeddedProcessors/atf-marvell The memory layout is defined in plat/marvell/a8k/common/include/platform_def.h where there are lots of defines and a diagram that attempt to describe the memory. It is not entirely obvious to me what part needs to be reserved. But 0x0400000-0x04200000 works. diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index 3c84043a2c..895cd2852f 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -95,5 +95,11 @@ int arch_early_init_r(void) pci_init(); #endif +#ifdef CONFIG_EFI_LOADER + /* Reserve trusted SRAM section */ + efi_add_memory_map(0x04000000, 0x00200000 >> EFI_PAGE_SHIFT, + EFI_RESERVED_MEMORY_TYPE, false); +#endif + return 0; }

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[U-Boot] [PATCH V3 01/10] disk: support host devices in dev_print()
by Stephen Warren 18 May '19

18 May '19

Add a case statement for IF_TYPE_HOST in dev_print() so that it prints the device type rather than the "device type unknown" message. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- disk/part.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/disk/part.c b/disk/part.c index 43485c9148b0..4e72257434b6 100644 --- a/disk/part.c +++ b/disk/part.c @@ -179,6 +179,9 @@ void dev_print (block_dev_desc_t *dev_desc) case IF_TYPE_DOC: puts("device type DOC\n"); return; + case IF_TYPE_HOST: + puts("host device\n"); + break; case IF_TYPE_UNKNOWN: puts("device type unknown\n"); return; -- 1.9.1

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