May 2018 - U-Boot

[U-Boot] [PATCH 2/4] board: nx25-ae250: Rename as ax25-ae350
by Andes 22 May '18

22 May '18

From: Rick Chen <rick(a)andestech.com> Rename nx25 as ax25 ae250 as ae350 nx25-ae250 as ax25-ae350 including filename, variable, string and definition. Signed-off-by: Rick Chen <rick(a)andestech.com> Signed-off-by: Rick Chen <rickchen36(a)gmail.com> Cc: Greentime Hu <green.hu(a)gmail.com> --- board/AndesTech/ax25-ae350/Kconfig | 24 +++++++++++ board/AndesTech/ax25-ae350/MAINTAINERS | 6 +++ board/AndesTech/ax25-ae350/Makefile | 8 ++++ board/AndesTech/ax25-ae350/ax25-ae350.c | 75 +++++++++++++++++++++++++++++++++ board/AndesTech/nx25-ae250/Kconfig | 24 ----------- board/AndesTech/nx25-ae250/MAINTAINERS | 6 --- board/AndesTech/nx25-ae250/Makefile | 8 ---- board/AndesTech/nx25-ae250/nx25-ae250.c | 75 --------------------------------- 8 files changed, 113 insertions(+), 113 deletions(-) create mode 100644 board/AndesTech/ax25-ae350/Kconfig create mode 100644 board/AndesTech/ax25-ae350/MAINTAINERS create mode 100644 board/AndesTech/ax25-ae350/Makefile create mode 100644 board/AndesTech/ax25-ae350/ax25-ae350.c delete mode 100644 board/AndesTech/nx25-ae250/Kconfig delete mode 100644 board/AndesTech/nx25-ae250/MAINTAINERS delete mode 100644 board/AndesTech/nx25-ae250/Makefile delete mode 100644 board/AndesTech/nx25-ae250/nx25-ae250.c diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig new file mode 100644 index 0000000..bb69ea3 --- /dev/null +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -0,0 +1,24 @@ +if TARGET_AX25_AE350 + +config SYS_CPU + default "ax25" + +config SYS_BOARD + default "ax25-ae350" + +config SYS_VENDOR + default "AndesTech" + +config SYS_SOC + default "ae350" + +config SYS_CONFIG_NAME + default "ax25-ae350" + +config ENV_SIZE + default 0x2000 if ENV_IS_IN_SPI_FLASH + +config ENV_OFFSET + default 0x140000 if ENV_IS_IN_SPI_FLASH + +endif diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ax25-ae350/MAINTAINERS new file mode 100644 index 0000000..508c6ac --- /dev/null +++ b/board/AndesTech/ax25-ae350/MAINTAINERS @@ -0,0 +1,6 @@ +AX25-AE350 BOARD +M: Rick Chen <rick(a)andestech.com> +S: Maintained +F: board/AndesTech/ax25-ae350/ +F: include/configs/ax25-ae350.h +F: configs/ax25-ae350_defconfig diff --git a/board/AndesTech/ax25-ae350/Makefile b/board/AndesTech/ax25-ae350/Makefile new file mode 100644 index 0000000..b8bd8ec --- /dev/null +++ b/board/AndesTech/ax25-ae350/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2017 Andes Technology Corporation. +# Rick Chen, Andes Technology Corporation <rick(a)andestech.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := ax25-ae350.o diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c new file mode 100644 index 0000000..d2e9bcb --- /dev/null +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/mach-types.h> +#include <common.h> +#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) +#include <netdev.h> +#endif +#include <linux/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscellaneous platform dependent initializations + */ + +int board_init(void) +{ + gd->bd->bi_arch_number = MACH_TYPE_AE350; + gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; + + return 0; +} + +int dram_init(void) +{ + unsigned long sdram_base = PHYS_SDRAM_0; + unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; + unsigned long actual_size; + + actual_size = get_ram_size((void *)sdram_base, expected_size); + gd->ram_size = actual_size; + + if (expected_size != actual_size) { + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + } + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_0; + gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; + gd->bd->bi_dram[1].start = PHYS_SDRAM_1; + gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) +int board_eth_init(bd_t *bd) +{ + return ftmac100_initialize(bd); +} +#endif + +ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) +{ + return 0; +} + +void *board_fdt_blob_setup(void) +{ + void **ptr = (void *)CONFIG_SYS_SDRAM_BASE; + if (fdt_magic(*ptr) == FDT_MAGIC) + return (void *)*ptr; + + return (void *)CONFIG_SYS_FDT_BASE; +} diff --git a/board/AndesTech/nx25-ae250/Kconfig b/board/AndesTech/nx25-ae250/Kconfig deleted file mode 100644 index 2fb3234..0000000 --- a/board/AndesTech/nx25-ae250/Kconfig +++ /dev/null @@ -1,24 +0,0 @@ -if TARGET_NX25_AE250 - -config SYS_CPU - default "nx25" - -config SYS_BOARD - default "nx25-ae250" - -config SYS_VENDOR - default "AndesTech" - -config SYS_SOC - default "ae250" - -config SYS_CONFIG_NAME - default "nx25-ae250" - -config ENV_SIZE - default 0x2000 if ENV_IS_IN_SPI_FLASH - -config ENV_OFFSET - default 0x140000 if ENV_IS_IN_SPI_FLASH - -endif diff --git a/board/AndesTech/nx25-ae250/MAINTAINERS b/board/AndesTech/nx25-ae250/MAINTAINERS deleted file mode 100644 index 1bff127..0000000 --- a/board/AndesTech/nx25-ae250/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -NX25-AE250 BOARD -M: Rick Chen <rick(a)andestech.com> -S: Maintained -F: board/AndesTech/nx25-ae250/ -F: include/configs/nx25-ae250.h -F: configs/nx25-ae250_defconfig diff --git a/board/AndesTech/nx25-ae250/Makefile b/board/AndesTech/nx25-ae250/Makefile deleted file mode 100644 index 66b6814..0000000 --- a/board/AndesTech/nx25-ae250/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# Copyright (C) 2017 Andes Technology Corporation. -# Rick Chen, Andes Technology Corporation <rick(a)andestech.com> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := nx25-ae250.o diff --git a/board/AndesTech/nx25-ae250/nx25-ae250.c b/board/AndesTech/nx25-ae250/nx25-ae250.c deleted file mode 100644 index 6e31be3..0000000 --- a/board/AndesTech/nx25-ae250/nx25-ae250.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2017 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <asm/mach-types.h> -#include <common.h> -#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) -#include <netdev.h> -#endif -#include <linux/io.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscellaneous platform dependent initializations - */ - -int board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_AE250; - gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; - - return 0; -} - -int dram_init(void) -{ - unsigned long sdram_base = PHYS_SDRAM_0; - unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; - unsigned long actual_size; - - actual_size = get_ram_size((void *)sdram_base, expected_size); - gd->ram_size = actual_size; - - if (expected_size != actual_size) { - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - } - - return 0; -} - -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_0; - gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; - gd->bd->bi_dram[1].start = PHYS_SDRAM_1; - gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - -#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) -int board_eth_init(bd_t *bd) -{ - return ftmac100_initialize(bd); -} -#endif - -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) -{ - return 0; -} - -void *board_fdt_blob_setup(void) -{ - void **ptr = (void *)CONFIG_SYS_SDRAM_BASE; - if (fdt_magic(*ptr) == FDT_MAGIC) - return (void *)*ptr; - - return (void *)CONFIG_SYS_FDT_BASE; -} -- 2.7.4

1 0

[U-Boot] [PATCH 1/4] riscv: cpu: nx25: Rename as ax25
by Andes 22 May '18

22 May '18

From: Rick Chen <rick(a)andestech.com> Andes has rearranged the product combinations. nx25 and ax25 both are RISC-V architecture cpu core. But ax25 has MMU unit inside, and nx25 is not. Cpu nx25 and platform ae250 are arranged in pairs. Cpu ax25 and platform ae350 are arranged in pairs. This patch will rename nx25 as ax25 ae250 as ae350 nx25-ae250 as ax25-ae350 including filename, variable, string and definition. Then u-boot can boot linux kernel in ae350 platform reasonably. Signed-off-by: Rick Chen <rick(a)andestech.com> Signed-off-by: Rick Chen <rickchen36(a)gmail.com> Cc: Greentime Hu <green.hu(a)gmail.com> --- arch/riscv/Kconfig | 6 +- arch/riscv/cpu/ax25/Makefile | 10 ++ arch/riscv/cpu/ax25/cpu.c | 33 ++++ arch/riscv/cpu/ax25/start.S | 293 ++++++++++++++++++++++++++++++++++++ arch/riscv/cpu/ax25/u-boot.lds | 85 +++++++++++ arch/riscv/cpu/nx25/Makefile | 10 -- arch/riscv/cpu/nx25/cpu.c | 33 ---- arch/riscv/cpu/nx25/start.S | 293 ------------------------------------ arch/riscv/cpu/nx25/u-boot.lds | 85 ----------- arch/riscv/dts/Makefile | 2 +- arch/riscv/dts/ae250.dts | 97 ------------ arch/riscv/dts/ae350.dts | 97 ++++++++++++ arch/riscv/include/asm/mach-types.h | 10 +- 13 files changed, 527 insertions(+), 527 deletions(-) create mode 100644 arch/riscv/cpu/ax25/Makefile create mode 100644 arch/riscv/cpu/ax25/cpu.c create mode 100644 arch/riscv/cpu/ax25/start.S create mode 100644 arch/riscv/cpu/ax25/u-boot.lds delete mode 100644 arch/riscv/cpu/nx25/Makefile delete mode 100644 arch/riscv/cpu/nx25/cpu.c delete mode 100644 arch/riscv/cpu/nx25/start.S delete mode 100644 arch/riscv/cpu/nx25/u-boot.lds delete mode 100644 arch/riscv/dts/ae250.dts create mode 100644 arch/riscv/dts/ae350.dts diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c50be37..20a43d8 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -8,12 +8,12 @@ choice prompt "Target select" optional -config TARGET_NX25_AE250 - bool "Support nx25-ae250" +config TARGET_AX25_AE350 + bool "Support ax25-ae350" endchoice -source "board/AndesTech/nx25-ae250/Kconfig" +source "board/AndesTech/ax25-ae350/Kconfig" choice prompt "CPU selection" diff --git a/arch/riscv/cpu/ax25/Makefile b/arch/riscv/cpu/ax25/Makefile new file mode 100644 index 0000000..5fcf100 --- /dev/null +++ b/arch/riscv/cpu/ax25/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2017 Andes Technology Corporation +# Rick Chen, Andes Technology Corporation <rick(a)andestech.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +extra-y = start.o + +obj-y := cpu.o diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c new file mode 100644 index 0000000..79bd2d2 --- /dev/null +++ b/arch/riscv/cpu/ax25/cpu.c @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* CPU specific code */ +#include <common.h> +#include <command.h> +#include <watchdog.h> +#include <asm/cache.h> + +/* + * cleanup_before_linux() is called just before we call linux + * it prepares the processor for linux + * + * we disable interrupt and caches. + */ +int cleanup_before_linux(void) +{ + disable_interrupts(); + + /* turn off I/D-cache */ + + return 0; +} + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + disable_interrupts(); + panic("ax25-ae350 wdt not support yet.\n"); +} diff --git a/arch/riscv/cpu/ax25/start.S b/arch/riscv/cpu/ax25/start.S new file mode 100644 index 0000000..cd0a663 --- /dev/null +++ b/arch/riscv/cpu/ax25/start.S @@ -0,0 +1,293 @@ +/* + * Startup Code for RISC-V Core + * + * Copyright (c) 2017 Microsemi Corporation. + * Copyright (c) 2017 Padmarao Begari <Padmarao.Begari(a)microsemi.com> + * + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <common.h> +#include <elf.h> +#include <asm/encoding.h> + +#ifdef CONFIG_32BIT +#define LREG lw +#define SREG sw +#define REGBYTES 4 +#define RELOC_TYPE R_RISCV_32 +#define SYM_INDEX 0x8 +#define SYM_SIZE 0x10 +#else +#define LREG ld +#define SREG sd +#define REGBYTES 8 +#define RELOC_TYPE R_RISCV_64 +#define SYM_INDEX 0x20 +#define SYM_SIZE 0x18 +#endif + +.section .text +.globl _start +_start: + j handle_reset + +nmi_vector: + j nmi_vector + +trap_vector: + j trap_entry + +.global trap_entry +handle_reset: + li t0, CONFIG_SYS_SDRAM_BASE + SREG a2, 0(t0) + la t0, trap_entry + csrw mtvec, t0 + csrwi mstatus, 0 + csrwi mie, 0 + +/* + * Do CPU critical regs init only at reboot, + * not when booting from ram + */ +#ifdef CONFIG_INIT_CRITICAL + jal cpu_init_crit /* Do CPU critical regs init */ +#endif + +/* + * Set stackpointer in internal/ex RAM to call board_init_f + */ +call_board_init_f: + li t0, -16 + li t1, CONFIG_SYS_INIT_SP_ADDR + and sp, t1, t0 /* force 16 byte alignment */ + +#ifdef CONFIG_DEBUG_UART + jal debug_uart_init +#endif + +call_board_init_f_0: + mv a0, sp + jal board_init_f_alloc_reserve + mv sp, a0 + jal board_init_f_init_reserve + + mv a0, zero /* a0 <-- boot_flags = 0 */ + la t5, board_init_f + jr t5 /* jump to board_init_f() */ + +/* + * void relocate_code (addr_sp, gd, addr_moni) + * + * This "function" does not return, instead it continues in RAM + * after relocating the monitor code. + * + */ +.globl relocate_code +relocate_code: + mv s2, a0 /* save addr_sp */ + mv s3, a1 /* save addr of gd */ + mv s4, a2 /* save addr of destination */ + +/* + *Set up the stack + */ +stack_setup: + mv sp, s2 + la t0, _start + sub t6, s4, t0 /* t6 <- relocation offset */ + beq t0, s4, clear_bss /* skip relocation */ + + mv t1, s4 /* t1 <- scratch for copy_loop */ + la t3, __bss_start + sub t3, t3, t0 /* t3 <- __bss_start_ofs */ + add t2, t0, t3 /* t2 <- source end address */ + +copy_loop: + LREG t5, 0(t0) + addi t0, t0, REGBYTES + SREG t5, 0(t1) + addi t1, t1, REGBYTES + blt t0, t2, copy_loop + +/* + * Update dynamic relocations after board_init_f + */ +fix_rela_dyn: + la t1, __rel_dyn_start + la t2, __rel_dyn_end + beq t1, t2, clear_bss + add t1, t1, t6 /* t1 <- rela_dyn_start in RAM */ + add t2, t2, t6 /* t2 <- rela_dyn_end in RAM */ + +/* + * skip first reserved entry: address, type, addend + */ + bne t1, t2, 7f + +6: + LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ + li t3, R_RISCV_RELATIVE /* reloc type R_RISCV_RELATIVE */ + bne t5, t3, 8f /* skip non-RISCV_RELOC entries */ + LREG t3, -(REGBYTES*3)(t1) + LREG t5, -(REGBYTES)(t1) /* t5 <-- addend */ + add t5, t5, t6 /* t5 <-- location to fix up in RAM */ + add t3, t3, t6 /* t3 <-- location to fix up in RAM */ + SREG t5, 0(t3) +7: + addi t1, t1, (REGBYTES*3) + ble t1, t2, 6b + +8: + la t4, __dyn_sym_start + add t4, t4, t6 + +9: + LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ + srli t0, t5, SYM_INDEX /* t0 <--- sym table index */ + andi t5, t5, 0xFF /* t5 <--- relocation type */ + li t3, RELOC_TYPE + bne t5, t3, 10f /* skip non-addned entries */ + + LREG t3, -(REGBYTES*3)(t1) + li t5, SYM_SIZE + mul t0, t0, t5 + add s1, t4, t0 + LREG t5, REGBYTES(s1) + add t5, t5, t6 /* t5 <-- location to fix up in RAM */ + add t3, t3, t6 /* t3 <-- location to fix up in RAM */ + SREG t5, 0(t3) +10: + addi t1, t1, (REGBYTES*3) + ble t1, t2, 9b + +/* + * trap update +*/ + la t0, trap_entry + add t0, t0, t6 + csrw mtvec, t0 + +clear_bss: + la t0, __bss_start /* t0 <- rel __bss_start in FLASH */ + add t0, t0, t6 /* t0 <- rel __bss_start in RAM */ + la t1, __bss_end /* t1 <- rel __bss_end in FLASH */ + add t1, t1, t6 /* t1 <- rel __bss_end in RAM */ + li t2, 0x00000000 /* clear */ + beq t0, t1, call_board_init_r + +clbss_l: + SREG t2, 0(t0) /* clear loop... */ + addi t0, t0, REGBYTES + bne t0, t1, clbss_l + +/* + * We are done. Do not return, instead branch to second part of board + * initialization, now running from RAM. + */ +call_board_init_r: + la t0, board_init_r + mv t4, t0 /* offset of board_init_r() */ + add t4, t4, t6 /* real address of board_init_r() */ +/* + * setup parameters for board_init_r + */ + mv a0, s3 /* gd_t */ + mv a1, s4 /* dest_addr */ + +/* + * jump to it ... + */ + jr t4 /* jump to board_init_r() */ + +/* + * trap entry + */ +trap_entry: + addi sp, sp, -32*REGBYTES + SREG x1, 1*REGBYTES(sp) + SREG x2, 2*REGBYTES(sp) + SREG x3, 3*REGBYTES(sp) + SREG x4, 4*REGBYTES(sp) + SREG x5, 5*REGBYTES(sp) + SREG x6, 6*REGBYTES(sp) + SREG x7, 7*REGBYTES(sp) + SREG x8, 8*REGBYTES(sp) + SREG x9, 9*REGBYTES(sp) + SREG x10, 10*REGBYTES(sp) + SREG x11, 11*REGBYTES(sp) + SREG x12, 12*REGBYTES(sp) + SREG x13, 13*REGBYTES(sp) + SREG x14, 14*REGBYTES(sp) + SREG x15, 15*REGBYTES(sp) + SREG x16, 16*REGBYTES(sp) + SREG x17, 17*REGBYTES(sp) + SREG x18, 18*REGBYTES(sp) + SREG x19, 19*REGBYTES(sp) + SREG x20, 20*REGBYTES(sp) + SREG x21, 21*REGBYTES(sp) + SREG x22, 22*REGBYTES(sp) + SREG x23, 23*REGBYTES(sp) + SREG x24, 24*REGBYTES(sp) + SREG x25, 25*REGBYTES(sp) + SREG x26, 26*REGBYTES(sp) + SREG x27, 27*REGBYTES(sp) + SREG x28, 28*REGBYTES(sp) + SREG x29, 29*REGBYTES(sp) + SREG x30, 30*REGBYTES(sp) + SREG x31, 31*REGBYTES(sp) + csrr a0, mcause + csrr a1, mepc + mv a2, sp + jal handle_trap + csrw mepc, a0 + +/* + * Remain in M-mode after mret + */ + li t0, MSTATUS_MPP + csrs mstatus, t0 + LREG x1, 1*REGBYTES(sp) + LREG x2, 2*REGBYTES(sp) + LREG x3, 3*REGBYTES(sp) + LREG x4, 4*REGBYTES(sp) + LREG x5, 5*REGBYTES(sp) + LREG x6, 6*REGBYTES(sp) + LREG x7, 7*REGBYTES(sp) + LREG x8, 8*REGBYTES(sp) + LREG x9, 9*REGBYTES(sp) + LREG x10, 10*REGBYTES(sp) + LREG x11, 11*REGBYTES(sp) + LREG x12, 12*REGBYTES(sp) + LREG x13, 13*REGBYTES(sp) + LREG x14, 14*REGBYTES(sp) + LREG x15, 15*REGBYTES(sp) + LREG x16, 16*REGBYTES(sp) + LREG x17, 17*REGBYTES(sp) + LREG x18, 18*REGBYTES(sp) + LREG x19, 19*REGBYTES(sp) + LREG x20, 20*REGBYTES(sp) + LREG x21, 21*REGBYTES(sp) + LREG x22, 22*REGBYTES(sp) + LREG x23, 23*REGBYTES(sp) + LREG x24, 24*REGBYTES(sp) + LREG x25, 25*REGBYTES(sp) + LREG x26, 26*REGBYTES(sp) + LREG x27, 27*REGBYTES(sp) + LREG x28, 28*REGBYTES(sp) + LREG x29, 29*REGBYTES(sp) + LREG x30, 30*REGBYTES(sp) + LREG x31, 31*REGBYTES(sp) + addi sp, sp, 32*REGBYTES + mret + +#ifdef CONFIG_INIT_CRITICAL +cpu_init_crit: + ret +#endif diff --git a/arch/riscv/cpu/ax25/u-boot.lds b/arch/riscv/cpu/ax25/u-boot.lds new file mode 100644 index 0000000..1bbddde --- /dev/null +++ b/arch/riscv/cpu/ax25/u-boot.lds @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +OUTPUT_ARCH("riscv") +ENTRY(_start) + +SECTIONS +{ + . = ALIGN(4); + .text : + { + arch/riscv/cpu/ax25/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { + __global_pointer$ = . + 0x800; + *(.data*) + } + . = ALIGN(4); + + .got : { + __got_start = .; + *(.got.plt) *(.got) + __got_end = .; + } + + . = ALIGN(4); + + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = ALIGN(4); + + .efi_runtime : { + __efi_runtime_start = .; + *(efi_runtime_text) + *(efi_runtime_data) + __efi_runtime_stop = .; + } + + .efi_runtime_rel : { + __efi_runtime_rel_start = .; + *(.relaefi_runtime_text) + *(.relaefi_runtime_data) + __efi_runtime_rel_stop = .; + } + + . = ALIGN(4); + + /DISCARD/ : { *(.rela.plt*) } + .rela.dyn : { + __rel_dyn_start = .; + *(.rela*) + __rel_dyn_end = .; + } + + . = ALIGN(4); + + .dynsym : { + __dyn_sym_start = .; + *(.dynsym) + __dyn_sym_end = .; + } + + . = ALIGN(4); + + _end = .; + + .bss : { + __bss_start = .; + *(.bss) + . = ALIGN(4); + __bss_end = .; + } + +} diff --git a/arch/riscv/cpu/nx25/Makefile b/arch/riscv/cpu/nx25/Makefile deleted file mode 100644 index 5fcf100..0000000 --- a/arch/riscv/cpu/nx25/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# Copyright (C) 2017 Andes Technology Corporation -# Rick Chen, Andes Technology Corporation <rick(a)andestech.com> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -extra-y = start.o - -obj-y := cpu.o diff --git a/arch/riscv/cpu/nx25/cpu.c b/arch/riscv/cpu/nx25/cpu.c deleted file mode 100644 index 5478f4f..0000000 --- a/arch/riscv/cpu/nx25/cpu.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2017 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* CPU specific code */ -#include <common.h> -#include <command.h> -#include <watchdog.h> -#include <asm/cache.h> - -/* - * cleanup_before_linux() is called just before we call linux - * it prepares the processor for linux - * - * we disable interrupt and caches. - */ -int cleanup_before_linux(void) -{ - disable_interrupts(); - - /* turn off I/D-cache */ - - return 0; -} - -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - disable_interrupts(); - panic("nx25-ae250 wdt not support yet.\n"); -} diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/nx25/start.S deleted file mode 100644 index cd0a663..0000000 --- a/arch/riscv/cpu/nx25/start.S +++ /dev/null @@ -1,293 +0,0 @@ -/* - * Startup Code for RISC-V Core - * - * Copyright (c) 2017 Microsemi Corporation. - * Copyright (c) 2017 Padmarao Begari <Padmarao.Begari(a)microsemi.com> - * - * Copyright (C) 2017 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <asm-offsets.h> -#include <config.h> -#include <common.h> -#include <elf.h> -#include <asm/encoding.h> - -#ifdef CONFIG_32BIT -#define LREG lw -#define SREG sw -#define REGBYTES 4 -#define RELOC_TYPE R_RISCV_32 -#define SYM_INDEX 0x8 -#define SYM_SIZE 0x10 -#else -#define LREG ld -#define SREG sd -#define REGBYTES 8 -#define RELOC_TYPE R_RISCV_64 -#define SYM_INDEX 0x20 -#define SYM_SIZE 0x18 -#endif - -.section .text -.globl _start -_start: - j handle_reset - -nmi_vector: - j nmi_vector - -trap_vector: - j trap_entry - -.global trap_entry -handle_reset: - li t0, CONFIG_SYS_SDRAM_BASE - SREG a2, 0(t0) - la t0, trap_entry - csrw mtvec, t0 - csrwi mstatus, 0 - csrwi mie, 0 - -/* - * Do CPU critical regs init only at reboot, - * not when booting from ram - */ -#ifdef CONFIG_INIT_CRITICAL - jal cpu_init_crit /* Do CPU critical regs init */ -#endif - -/* - * Set stackpointer in internal/ex RAM to call board_init_f - */ -call_board_init_f: - li t0, -16 - li t1, CONFIG_SYS_INIT_SP_ADDR - and sp, t1, t0 /* force 16 byte alignment */ - -#ifdef CONFIG_DEBUG_UART - jal debug_uart_init -#endif - -call_board_init_f_0: - mv a0, sp - jal board_init_f_alloc_reserve - mv sp, a0 - jal board_init_f_init_reserve - - mv a0, zero /* a0 <-- boot_flags = 0 */ - la t5, board_init_f - jr t5 /* jump to board_init_f() */ - -/* - * void relocate_code (addr_sp, gd, addr_moni) - * - * This "function" does not return, instead it continues in RAM - * after relocating the monitor code. - * - */ -.globl relocate_code -relocate_code: - mv s2, a0 /* save addr_sp */ - mv s3, a1 /* save addr of gd */ - mv s4, a2 /* save addr of destination */ - -/* - *Set up the stack - */ -stack_setup: - mv sp, s2 - la t0, _start - sub t6, s4, t0 /* t6 <- relocation offset */ - beq t0, s4, clear_bss /* skip relocation */ - - mv t1, s4 /* t1 <- scratch for copy_loop */ - la t3, __bss_start - sub t3, t3, t0 /* t3 <- __bss_start_ofs */ - add t2, t0, t3 /* t2 <- source end address */ - -copy_loop: - LREG t5, 0(t0) - addi t0, t0, REGBYTES - SREG t5, 0(t1) - addi t1, t1, REGBYTES - blt t0, t2, copy_loop - -/* - * Update dynamic relocations after board_init_f - */ -fix_rela_dyn: - la t1, __rel_dyn_start - la t2, __rel_dyn_end - beq t1, t2, clear_bss - add t1, t1, t6 /* t1 <- rela_dyn_start in RAM */ - add t2, t2, t6 /* t2 <- rela_dyn_end in RAM */ - -/* - * skip first reserved entry: address, type, addend - */ - bne t1, t2, 7f - -6: - LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ - li t3, R_RISCV_RELATIVE /* reloc type R_RISCV_RELATIVE */ - bne t5, t3, 8f /* skip non-RISCV_RELOC entries */ - LREG t3, -(REGBYTES*3)(t1) - LREG t5, -(REGBYTES)(t1) /* t5 <-- addend */ - add t5, t5, t6 /* t5 <-- location to fix up in RAM */ - add t3, t3, t6 /* t3 <-- location to fix up in RAM */ - SREG t5, 0(t3) -7: - addi t1, t1, (REGBYTES*3) - ble t1, t2, 6b - -8: - la t4, __dyn_sym_start - add t4, t4, t6 - -9: - LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ - srli t0, t5, SYM_INDEX /* t0 <--- sym table index */ - andi t5, t5, 0xFF /* t5 <--- relocation type */ - li t3, RELOC_TYPE - bne t5, t3, 10f /* skip non-addned entries */ - - LREG t3, -(REGBYTES*3)(t1) - li t5, SYM_SIZE - mul t0, t0, t5 - add s1, t4, t0 - LREG t5, REGBYTES(s1) - add t5, t5, t6 /* t5 <-- location to fix up in RAM */ - add t3, t3, t6 /* t3 <-- location to fix up in RAM */ - SREG t5, 0(t3) -10: - addi t1, t1, (REGBYTES*3) - ble t1, t2, 9b - -/* - * trap update -*/ - la t0, trap_entry - add t0, t0, t6 - csrw mtvec, t0 - -clear_bss: - la t0, __bss_start /* t0 <- rel __bss_start in FLASH */ - add t0, t0, t6 /* t0 <- rel __bss_start in RAM */ - la t1, __bss_end /* t1 <- rel __bss_end in FLASH */ - add t1, t1, t6 /* t1 <- rel __bss_end in RAM */ - li t2, 0x00000000 /* clear */ - beq t0, t1, call_board_init_r - -clbss_l: - SREG t2, 0(t0) /* clear loop... */ - addi t0, t0, REGBYTES - bne t0, t1, clbss_l - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ -call_board_init_r: - la t0, board_init_r - mv t4, t0 /* offset of board_init_r() */ - add t4, t4, t6 /* real address of board_init_r() */ -/* - * setup parameters for board_init_r - */ - mv a0, s3 /* gd_t */ - mv a1, s4 /* dest_addr */ - -/* - * jump to it ... - */ - jr t4 /* jump to board_init_r() */ - -/* - * trap entry - */ -trap_entry: - addi sp, sp, -32*REGBYTES - SREG x1, 1*REGBYTES(sp) - SREG x2, 2*REGBYTES(sp) - SREG x3, 3*REGBYTES(sp) - SREG x4, 4*REGBYTES(sp) - SREG x5, 5*REGBYTES(sp) - SREG x6, 6*REGBYTES(sp) - SREG x7, 7*REGBYTES(sp) - SREG x8, 8*REGBYTES(sp) - SREG x9, 9*REGBYTES(sp) - SREG x10, 10*REGBYTES(sp) - SREG x11, 11*REGBYTES(sp) - SREG x12, 12*REGBYTES(sp) - SREG x13, 13*REGBYTES(sp) - SREG x14, 14*REGBYTES(sp) - SREG x15, 15*REGBYTES(sp) - SREG x16, 16*REGBYTES(sp) - SREG x17, 17*REGBYTES(sp) - SREG x18, 18*REGBYTES(sp) - SREG x19, 19*REGBYTES(sp) - SREG x20, 20*REGBYTES(sp) - SREG x21, 21*REGBYTES(sp) - SREG x22, 22*REGBYTES(sp) - SREG x23, 23*REGBYTES(sp) - SREG x24, 24*REGBYTES(sp) - SREG x25, 25*REGBYTES(sp) - SREG x26, 26*REGBYTES(sp) - SREG x27, 27*REGBYTES(sp) - SREG x28, 28*REGBYTES(sp) - SREG x29, 29*REGBYTES(sp) - SREG x30, 30*REGBYTES(sp) - SREG x31, 31*REGBYTES(sp) - csrr a0, mcause - csrr a1, mepc - mv a2, sp - jal handle_trap - csrw mepc, a0 - -/* - * Remain in M-mode after mret - */ - li t0, MSTATUS_MPP - csrs mstatus, t0 - LREG x1, 1*REGBYTES(sp) - LREG x2, 2*REGBYTES(sp) - LREG x3, 3*REGBYTES(sp) - LREG x4, 4*REGBYTES(sp) - LREG x5, 5*REGBYTES(sp) - LREG x6, 6*REGBYTES(sp) - LREG x7, 7*REGBYTES(sp) - LREG x8, 8*REGBYTES(sp) - LREG x9, 9*REGBYTES(sp) - LREG x10, 10*REGBYTES(sp) - LREG x11, 11*REGBYTES(sp) - LREG x12, 12*REGBYTES(sp) - LREG x13, 13*REGBYTES(sp) - LREG x14, 14*REGBYTES(sp) - LREG x15, 15*REGBYTES(sp) - LREG x16, 16*REGBYTES(sp) - LREG x17, 17*REGBYTES(sp) - LREG x18, 18*REGBYTES(sp) - LREG x19, 19*REGBYTES(sp) - LREG x20, 20*REGBYTES(sp) - LREG x21, 21*REGBYTES(sp) - LREG x22, 22*REGBYTES(sp) - LREG x23, 23*REGBYTES(sp) - LREG x24, 24*REGBYTES(sp) - LREG x25, 25*REGBYTES(sp) - LREG x26, 26*REGBYTES(sp) - LREG x27, 27*REGBYTES(sp) - LREG x28, 28*REGBYTES(sp) - LREG x29, 29*REGBYTES(sp) - LREG x30, 30*REGBYTES(sp) - LREG x31, 31*REGBYTES(sp) - addi sp, sp, 32*REGBYTES - mret - -#ifdef CONFIG_INIT_CRITICAL -cpu_init_crit: - ret -#endif diff --git a/arch/riscv/cpu/nx25/u-boot.lds b/arch/riscv/cpu/nx25/u-boot.lds deleted file mode 100644 index 508fa7e..0000000 --- a/arch/riscv/cpu/nx25/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (C) 2017 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -OUTPUT_ARCH("riscv") -ENTRY(_start) - -SECTIONS -{ - . = ALIGN(4); - .text : - { - arch/riscv/cpu/nx25/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { - __global_pointer$ = . + 0x800; - *(.data*) - } - . = ALIGN(4); - - .got : { - __got_start = .; - *(.got.plt) *(.got) - __got_end = .; - } - - . = ALIGN(4); - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = ALIGN(4); - - .efi_runtime : { - __efi_runtime_start = .; - *(efi_runtime_text) - *(efi_runtime_data) - __efi_runtime_stop = .; - } - - .efi_runtime_rel : { - __efi_runtime_rel_start = .; - *(.relaefi_runtime_text) - *(.relaefi_runtime_data) - __efi_runtime_rel_stop = .; - } - - . = ALIGN(4); - - /DISCARD/ : { *(.rela.plt*) } - .rela.dyn : { - __rel_dyn_start = .; - *(.rela*) - __rel_dyn_end = .; - } - - . = ALIGN(4); - - .dynsym : { - __dyn_sym_start = .; - *(.dynsym) - __dyn_sym_end = .; - } - - . = ALIGN(4); - - _end = .; - - .bss : { - __bss_start = .; - *(.bss) - . = ALIGN(4); - __bss_end = .; - } - -} diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index 718b99f..d42ca60 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -2,7 +2,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -dtb-$(CONFIG_TARGET_NX25_AE250) += ae250.dtb +dtb-$(CONFIG_TARGET_AX25_AE350) += ae350.dtb targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/riscv/dts/ae250.dts b/arch/riscv/dts/ae250.dts deleted file mode 100644 index 9a38345..0000000 --- a/arch/riscv/dts/ae250.dts +++ /dev/null @@ -1,97 +0,0 @@ -/dts-v1/; -/ { - compatible = "riscv32 nx25"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - aliases { - uart0 = &serial0; - ethernet0 = &mac0; - spi0 = &spi; - } ; - - chosen { - bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7"; - stdout-path = "uart0:38400n8"; - tick-timer = &timer0; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x40000000>; - }; - - spiclk: virt_100mhz { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu@0 { - compatible = "andestech,n13"; - reg = <0>; - /* FIXME: to fill correct frqeuency */ - clock-frequency = <60000000>; - }; - }; - - intc: interrupt-controller { - compatible = "andestech,atnointc010"; - #interrupt-cells = <1>; - interrupt-controller; - }; - - serial0: serial@f0300000 { - compatible = "andestech,uart16550", "ns16550a"; - reg = <0xf0300000 0x1000>; - interrupts = <7 4>; - clock-frequency = <19660800>; - reg-shift = <2>; - reg-offset = <32>; - no-loopback-test = <1>; - }; - - timer0: timer@f0400000 { - compatible = "andestech,atcpit100"; - reg = <0xf0400000 0x1000>; - interrupts = <2 4>; - clock-frequency = <40000000>; - }; - - mac0: mac@e0100000 { - compatible = "andestech,atmac100"; - reg = <0xe0100000 0x1000>; - interrupts = <25 4>; - }; - - mmc0: mmc@f0e00000 { - compatible = "andestech,atsdc010"; - max-frequency = <100000000>; - fifo-depth = <0x10>; - reg = <0xf0e00000 0x1000>; - interrupts = <17 4>; - cap-sd-highspeed; - }; - - spi: spi@f0b00000 { - compatible = "andestech,atcspi200"; - reg = <0xf0b00000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <1>; - clocks = <&spiclk>; - interrupts = <3 4>; - flash@0 { - compatible = "spi-flash"; - spi-max-frequency = <50000000>; - reg = <0>; - spi-cpol; - spi-cpha; - }; - }; - -}; diff --git a/arch/riscv/dts/ae350.dts b/arch/riscv/dts/ae350.dts new file mode 100644 index 0000000..4bfb876 --- /dev/null +++ b/arch/riscv/dts/ae350.dts @@ -0,0 +1,97 @@ +/dts-v1/; +/ { + compatible = "riscv32 ax25"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + aliases { + uart0 = &serial0; + ethernet0 = &mac0; + spi0 = &spi; + } ; + + chosen { + bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7"; + stdout-path = "uart0:38400n8"; + tick-timer = &timer0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x40000000>; + }; + + spiclk: virt_100mhz { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "andestech,n13"; + reg = <0>; + /* FIXME: to fill correct frqeuency */ + clock-frequency = <60000000>; + }; + }; + + intc: interrupt-controller { + compatible = "andestech,atnointc010"; + #interrupt-cells = <1>; + interrupt-controller; + }; + + serial0: serial@f0300000 { + compatible = "andestech,uart16550", "ns16550a"; + reg = <0xf0300000 0x1000>; + interrupts = <7 4>; + clock-frequency = <19660800>; + reg-shift = <2>; + reg-offset = <32>; + no-loopback-test = <1>; + }; + + timer0: timer@f0400000 { + compatible = "andestech,atcpit100"; + reg = <0xf0400000 0x1000>; + interrupts = <2 4>; + clock-frequency = <40000000>; + }; + + mac0: mac@e0100000 { + compatible = "andestech,atmac100"; + reg = <0xe0100000 0x1000>; + interrupts = <25 4>; + }; + + mmc0: mmc@f0e00000 { + compatible = "andestech,atsdc010"; + max-frequency = <100000000>; + fifo-depth = <0x10>; + reg = <0xf0e00000 0x1000>; + interrupts = <17 4>; + cap-sd-highspeed; + }; + + spi: spi@f0b00000 { + compatible = "andestech,atcspi200"; + reg = <0xf0b00000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <1>; + clocks = <&spiclk>; + interrupts = <3 4>; + flash@0 { + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <0>; + spi-cpol; + spi-cpha; + }; + }; + +}; diff --git a/arch/riscv/include/asm/mach-types.h b/arch/riscv/include/asm/mach-types.h index f70b407..211d39a 100644 --- a/arch/riscv/include/asm/mach-types.h +++ b/arch/riscv/include/asm/mach-types.h @@ -13,18 +13,18 @@ extern unsigned int __machine_arch_type; #endif -#define MACH_TYPE_AE250 1 +#define MACH_TYPE_AE350 1 -#ifdef CONFIG_ARCH_AE250 +#ifdef CONFIG_ARCH_AE350 # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_AE250 +# define machine_arch_type MACH_TYPE_AE350 # endif -# define machine_is_ae250() (machine_arch_type == MACH_TYPE_AE250) +# define machine_is_ae350() (machine_arch_type == MACH_TYPE_AE350) #else -# define machine_is_ae250() (1) +# define machine_is_ae350() (1) #endif #endif /* __ASM_RISCV_MACH_TYPE_H */ -- 2.7.4

1 0

[U-Boot] UBI: regression since "mtd: ubi: Fix worker handling"
by Patrice CHOTARD 22 May '18

22 May '18

Hi Richard, Heiko Since f82290afc847 ("mtd: ubi: Fix worker handling"), when booting from NAND, on a fresh NAND just after being flashed (and only in this case), we got the following log: ubi0: default fastmap pool size: 200 ubi0: default fastmap WL pool size: 100 ubi0: attaching mtd2 ubi0: scanning is finished ubi0 error: ubi_update_fastmap: could not find any anchor PEB ubi0 error: ubi_update_fastmap: could not find any anchor PEB ubi0 error: ubi_wl_get_peb: Unable to get a free PEB from user WL pool ubi0 error: autoresize: cannot auto-resize volume 1 UBI error: cannot attach mtd2UBI error: cannot initialize UBI, error -28UBI init error 28 After analysis, in ubi_wl_init(), when performing schedule_erase(), thread_enabled flag is not yet set to 1, which forbids ubi_do_worker() to execute pending works. This has to effect to not populate ubi->free with free physical eraseblocks. As temporary workaround i did the following update on my side which fix this issue, but i don't consider it neither as a clean patch nor certain that it is enough : @@ -1560,15 +1560,17 @@ int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai) goto out_free; e->pnum = aeb->pnum; e->ec = aeb->ec; ubi->lookuptbl[e->pnum] = e; + ubi->thread_enabled = 1; if (schedule_erase(ubi, e, aeb->vol_id, aeb->lnum, 0)) { + ubi->thread_enabled = 0; wl_entry_destroy(ubi, e); goto out_free; } + ubi->thread_enabled = 0; found_pebs++; } list_for_each_entry(aeb, &ai->free, u.list) { Regards Patrice

3 8

[U-Boot] [PATCH] dm: usb: setup ehci gadget before usb is probed
by Ramon Fried 21 May '18

21 May '18

usb_setup_ehci_gadget() looks for a loaded USB class driver, then it unloads it and loads it again as a device instead of host. This change loads the USB class driver as device if it wasn't loaded in the first place. Signed-off-by: Ramon Fried <ramon.fried(a)gmail.com> --- drivers/usb/host/usb-uclass.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c index 611ea97a72..7ab7e8990c 100644 --- a/drivers/usb/host/usb-uclass.c +++ b/drivers/usb/host/usb-uclass.c @@ -380,17 +380,22 @@ struct usb_device *usb_get_dev_index(struct udevice *bus, int index) int usb_setup_ehci_gadget(struct ehci_ctrl **ctlrp) { + TRACE(); struct usb_platdata *plat; struct udevice *dev; int ret; /* Find the old device and remove it */ ret = uclass_find_device_by_seq(UCLASS_USB, 0, true, &dev); - if (ret) - return ret; - ret = device_remove(dev, DM_REMOVE_NORMAL); - if (ret) - return ret; + if (ret) { + ret = uclass_find_device(UCLASS_USB, 0, &dev); + if (ret) + return ret; + } else { + ret = device_remove(dev, DM_REMOVE_NORMAL); + if (ret) + return ret; + } plat = dev_get_platdata(dev); plat->init_type = USB_INIT_DEVICE; -- 2.17.0

2 3

[U-Boot] Patman - How to send patched with errors
by Duncan Hare 21 May '18

21 May '18

Hi Simon I have forgotten how to override the on errors do not sent patchesoption. tools/patman/patman -c3 -? What's the "?" Thanks Duncan Hare 714 931 7952

2 1

[U-Boot] [PATCH] pinctrl: do not set_state for device without valid ofnode
by Kever Yang 21 May '18

21 May '18

Not all the udevice have a available DT node, eg. rksdmmc(a)ff500000.blk which add by mmc_bind(), these device do not have/need set pinctrl state. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- drivers/pinctrl/pinctrl-uclass.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 6a73a06..a19c374 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -209,6 +209,12 @@ static int pinctrl_select_state_simple(struct udevice *dev) int pinctrl_select_state(struct udevice *dev, const char *statename) { /* + * Some device which is logical like mmc.blk, do not have + * a valid ofnode. + */ + if (!ofnode_valid(dev->node)) + return 0; + /* * Try full-implemented pinctrl first. * If it fails or is not implemented, try simple one. */ -- 1.9.1

2 2

[U-Boot] [PATCH v3] tools: buildman: Don't use the working dir as build dir
by Simon Glass 21 May '18

21 May '18

From: Lothar Waßmann <LW(a)KARO-electronics.de> When the U-Boot base directory happens to have the same name as the branch that buildman is directed to use via the '-b' option and no output directory is specified with '-o', buildman happily starts removing the whole U-Boot sources eventually only stopped with the error message: OSError: [Errno 20] Not a directory: '../<branch-name>/boards.cfg Add a check to avoid this and also deal with the case where '-o' points to the source directory, or any subdirectory of it. Finally, tidy up the confusing logic for removing the old tree when using -b. This is only done when building a branch. Signed-off-by: Lothar Waßmann <LW(a)KARO-electronics.de> Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v3: - Avoid splitting the error string in CheckOutputDir() Changes in v2: - Updated to check directories on start-up as per comments on v1 patch - Added a test - Expanded check to handle subdirectories tools/buildman/builderthread.py | 4 ++++ tools/buildman/control.py | 28 +++++++++++++++++++++++++--- tools/buildman/func_test.py | 9 +++++++++ 3 files changed, 38 insertions(+), 3 deletions(-) diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py index 9ac101a5a4..16a3fa452d 100644 --- a/tools/buildman/builderthread.py +++ b/tools/buildman/builderthread.py @@ -7,6 +7,7 @@ import errno import glob import os import shutil +import sys import threading import command @@ -27,6 +28,9 @@ def Mkdir(dirname, parents = False): os.mkdir(dirname) except OSError as err: if err.errno == errno.EEXIST: + if os.path.realpath('.') == os.path.realpath(dirname): + print "Cannot create the current working directory '%s'!" % dirname + sys.exit(1) pass else: raise diff --git a/tools/buildman/control.py b/tools/buildman/control.py index 3cac9f7cf6..e2037c3f61 100644 --- a/tools/buildman/control.py +++ b/tools/buildman/control.py @@ -81,6 +81,28 @@ def ShowActions(series, why_selected, boards_selected, builder, options): print ('Total boards to build for each commit: %d\n' % len(why_selected['all'])) +def CheckOutputDir(output_dir): + """Make sure that the output directory is not within the current directory + + If we try to use an output directory which is within the current directory + (which is assumed to hold the U-Boot source) we may end up deleting the + U-Boot source code. Detect this and print an error in this case. + + Args: + output_dir: Output directory path to check + """ + path = os.path.realpath(output_dir) + cwd_path = os.path.realpath('.') + while True: + if os.path.realpath(path) == cwd_path: + Print("Cannot use output directory '%s' since it is within the current directtory '%s'" % + (path, cwd_path)) + sys.exit(1) + parent = os.path.dirname(path) + if parent == path: + break + path = parent + def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, clean_dir=False): """The main control code for buildman @@ -252,9 +274,9 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, # output directory itself rather than any subdirectory. if not options.no_subdirs: output_dir = os.path.join(options.output_dir, dirname) - if (clean_dir and output_dir != options.output_dir and - os.path.exists(output_dir)): - shutil.rmtree(output_dir) + if clean_dir and os.path.exists(output_dir): + shutil.rmtree(output_dir) + CheckOutputDir(output_dir) builder = Builder(toolchains, output_dir, options.git_dir, options.threads, options.jobs, gnu_make=gnu_make, checkout=True, show_unknown=options.show_unknown, step=options.step, diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py index eec0f9bd37..4df1679842 100644 --- a/tools/buildman/func_test.py +++ b/tools/buildman/func_test.py @@ -521,3 +521,12 @@ class TestFunctional(unittest.TestCase): self._RunControl('-b', self._test_branch, clean_dir=False) self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._builder.fail, 0) + + def testBadOutputDir(self): + """Test building with an output dir the same as out current dir""" + self._test_branch = '/__dev/__testbranch' + with self.assertRaises(SystemExit): + self._RunControl('-b', self._test_branch, '-o', os.getcwd()) + with self.assertRaises(SystemExit): + self._RunControl('-b', self._test_branch, '-o', + os.path.join(os.getcwd(), 'test')) -- 2.17.0.484.g0c8726318c-goog

1 2

[U-Boot] [PATCH] rockchip: make_fit_atf: make python3 compatible
by Mian Yousaf Kaukab 21 May '18

21 May '18

Make script python3 compatible. No functional changes intended. Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab(a)suse.com> --- arch/arm/mach-rockchip/make_fit_atf.py | 89 +++++++++++++++++----------------- 1 file changed, 45 insertions(+), 44 deletions(-) diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index b88a5e1f16..d72a364ff1 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python2 +#!/usr/bin/env python """ A script to generate FIT image source for rockchip boards with ARM Trusted Firmware @@ -43,6 +43,7 @@ DT_HEADER="""// SPDX-License-Identifier: GPL-2.0+ OR X11 compression = "none"; load = <0x%08x>; }; + """ DT_IMAGES_NODE_END=""" @@ -58,18 +59,18 @@ def append_atf_node(file, atf_index, phy_addr, elf_entry): Append ATF DT node to input FIT dts file. """ data = 'bl31_0x%08x.bin' % phy_addr - print >> file, '\t\tatf@%d {' % atf_index - print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";' - print >> file, '\t\t\tdata = /incbin/("%s");' % data - print >> file, '\t\t\ttype = "firmware";' - print >> file, '\t\t\tarch = "arm64";' - print >> file, '\t\t\tos = "arm-trusted-firmware";' - print >> file, '\t\t\tcompression = "none";' - print >> file, '\t\t\tload = <0x%08x>;' % phy_addr + file.write('\t\tatf@%d {\n' % atf_index) + file.write('\t\t\tdescription = \"ARM Trusted Firmware\";\n') + file.write('\t\t\tdata = /incbin/("%s");\n' % data) + file.write('\t\t\ttype = "firmware";\n') + file.write('\t\t\tarch = "arm64";\n') + file.write('\t\t\tos = "arm-trusted-firmware";\n') + file.write('\t\t\tcompression = "none";\n') + file.write('\t\t\tload = <0x%08x>;\n' % phy_addr) if atf_index == 1: - print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry - print >> file, '\t\t};' - print >> file, '' + file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry) + file.write('\t\t};\n') + file.write('\n') def append_fdt_node(file, dtbs): """ @@ -78,43 +79,43 @@ def append_fdt_node(file, dtbs): cnt = 1 for dtb in dtbs: dtname = os.path.basename(dtb) - print >> file, '\t\tfdt@%d {' % cnt - print >> file, '\t\t\tdescription = "%s";' % dtname - print >> file, '\t\t\tdata = /incbin/("%s");' % dtb - print >> file, '\t\t\ttype = "flat_dt";' - print >> file, '\t\t\tcompression = "none";' - print >> file, '\t\t};' - print >> file, '' + file.write('\t\tfdt@%d {\n' % cnt) + file.write('\t\t\tdescription = "%s";\n' % dtname) + file.write('\t\t\tdata = /incbin/("%s");\n' % dtb) + file.write('\t\t\ttype = "flat_dt";\n') + file.write('\t\t\tcompression = "none";\n') + file.write('\t\t};\n') + file.write('\n') cnt = cnt + 1 def append_conf_section(file, cnt, dtname, atf_cnt): - print >> file, '\t\tconfig@%d {' % cnt - print >> file, '\t\t\tdescription = "%s";' % dtname - print >> file, '\t\t\tfirmware = "atf@1";' - print >> file, '\t\t\tloadables = "uboot@1",', + file.write('\t\tconfig@%d {\n' % cnt) + file.write('\t\t\tdescription = "%s";\n' % dtname) + file.write('\t\t\tfirmware = "atf@1";\n') + file.write('\t\t\tloadables = "uboot@1",') for i in range(1, atf_cnt): - print >> file, '"atf@%d"' % (i+1), + file.write('"atf@%d"' % (i+1)) if i != (atf_cnt - 1): - print >> file, ',', + file.write(',') else: - print >> file, ';' - print >> file, '\t\t\tfdt = "fdt@1";' - print >> file, '\t\t};' - print >> file, '' + file.write(';\n') + file.write('\t\t\tfdt = "fdt@1";\n') + file.write('\t\t};\n') + file.write('\n') def append_conf_node(file, dtbs, atf_cnt): """ Append configeration nodes. """ cnt = 1 - print >> file, '\tconfigurations {' - print >> file, '\t\tdefault = "config@1";' + file.write('\tconfigurations {\n') + file.write('\t\tdefault = "config@1";\n') for dtb in dtbs: dtname = os.path.basename(dtb) append_conf_section(file, cnt, dtname, atf_cnt) cnt = cnt + 1 - print >> file, '\t};' - print >> file, '' + file.write('\t};\n') + file.write('\n') def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_file_name): """ @@ -127,7 +128,7 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi num_load_seg = 0 p_paddr = 0xFFFFFFFF - with open(uboot_file_name) as uboot_file: + with open(uboot_file_name, 'rb') as uboot_file: uboot = ELFFile(uboot_file) for i in range(uboot.num_segments()): seg = uboot.get_segment(i) @@ -137,9 +138,9 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi assert (p_paddr != 0xFFFFFFFF and num_load_seg == 1) - print >> fit_file, DT_HEADER % p_paddr + fit_file.write(DT_HEADER % p_paddr) - with open(bl31_file_name) as bl31_file: + with open(bl31_file_name, 'rb') as bl31_file: bl31 = ELFFile(bl31_file) elf_entry = bl31.header['e_entry'] for i in range(bl31.num_segments()): @@ -150,15 +151,15 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi append_atf_node(fit_file, i+1, paddr, elf_entry) atf_cnt = i+1 append_fdt_node(fit_file, dtbs_file_name) - print >> fit_file, '%s' % DT_IMAGES_NODE_END + fit_file.write('%s\n' % DT_IMAGES_NODE_END) append_conf_node(fit_file, dtbs_file_name, atf_cnt) - print >> fit_file, '%s' % DT_END + fit_file.write('%s\n' % DT_END) if fit_file_name != sys.stdout: fit_file.close() def generate_atf_binary(bl31_file_name): - with open(bl31_file_name) as bl31_file: + with open(bl31_file_name, 'rb') as bl31_file: bl31 = ELFFile(bl31_file) num = bl31.num_segments() @@ -179,17 +180,17 @@ def get_bl31_segments_info(bl31_file_name): bl31 = ELFFile(bl31_file) num = bl31.num_segments() - print 'Number of Segments : %d' % bl31.num_segments() + print('Number of Segments : %d' % bl31.num_segments()) for i in range(num): - print 'Segment %d' % i + print('Segment %d' % i) seg = bl31.get_segment(i) ptype = seg[ELF_SEG_P_TYPE] poffset = seg[ELF_SEG_P_OFFSET] pmemsz = seg[ELF_SEG_P_MEMSZ] pfilesz = seg[ELF_SEG_P_FILESZ] - print 'type: %s\nfilesz: %08x\nmemsz: %08x\noffset: %08x' % (ptype, pfilesz, pmemsz, poffset) + print('type: %s\nfilesz: %08x\nmemsz: %08x\noffset: %08x' % (ptype, pfilesz, pmemsz, poffset)) paddr = seg[ELF_SEG_P_PADDR] - print 'paddr: %08x' % paddr + print('paddr: %08x' % paddr) def main(): uboot_elf="./u-boot" @@ -205,7 +206,7 @@ def main(): elif opt == "-b": bl31_elf=val elif opt == "-h": - print __doc__ + print(__doc__) sys.exit(2) dtbs = args -- 2.11.0

1 0

[U-Boot] [PATCH] arm64: zynqmp: Remove CMD_UNZIP for mini configuration
by Michal Simek 21 May '18

21 May '18

CMD_UNZIP is already disabled via Kconfig. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/xilinx_zynqmp_mini.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 947d3083dae4..96ff6c9f0215 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -32,7 +32,6 @@ /* BOOTP options */ #undef CONFIG_BOOTP_BOOTFILESIZE #undef CONFIG_BOOTP_MAY_FAIL -#undef CONFIG_CMD_UNZIP #undef CONFIG_NR_DRAM_BANKS -- 2.17.0

1 0

[U-Boot] [PATCH 1/1] logos: bitmap files should not be executable
by Heinrich Schuchardt 21 May '18

21 May '18

chmod 644 engicam.bmp Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- tools/logos/engicam.bmp | Bin 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 tools/logos/engicam.bmp diff --git a/tools/logos/engicam.bmp b/tools/logos/engicam.bmp old mode 100755 new mode 100644 -- 2.17.0

1 0