November 2018 - U-Boot

[U-Boot] Issue with relocating code to DDR
by SHEKHAR SINGH 08 Nov '18

08 Nov '18

Hi All, I am new to U-boot. Currently, I am working on developing U-boot for a new SOC. The SOC has arm926ej-s as the core and is implemented on Xilinx FPGA with SD-card as the boot device. With current setup DDR is already initialized by FPGA and SD card can be accessed using direct addressing. We have added board files and SoC related files to the Uboot directory and is able to successfully compile and get some outputs on UART (debug console). Currently, we have added only support for GPIO and UART drivers. SD Card : 0x00000000 - 0x007FFFFF SRAM : 0x90000000 - 0x90007FFF DDR : 0x40000000 - 0x43FFFFFF We are facing some issue with the uboot booting. We are able to see the initial uboot prints and debug prints when the stack pointer is in SRAM, but after we relocate the code from SD card to DDR and change the stack pointer to DDR we are getting junk prints on the console. Can anyone help me or suggest me what we are doing wrong here? Thanks in advance for your help. Please see the below UART Log: initcall: 00005cdc initcall: 00009a84 initcall: 00005ccc initcall: 00005fbc initcall: 000060c0 initcall: 00000418 initcall: 00006090 initcall: 00005fb4 malloc_simple: size=18, ptr=18, limit=400: 90000b30 malloc_simple: size=54, ptr=6c, limit=400: 90000b48 malloc_simple: size=4, ptr=70, limit=400: 90000b9c uclass_find_device_by_seq: 0 -1 uclass_find_device_by_seq: 0 0 - -1 -1 'root_driver' - not found initcall: 00006088 initcall: 000010b0 initcall: 000004a8 initcall: 0000f77c env_init: Environment nowhere init done (ret=0) initcall: 00005f88 initcall: 0000f0dc initcall: 000147c0 U-Boot 2018.09 (Nov 01 2018 - 18:33:40 +0530) initcall: 00005eac U-Boot code: 00000000 -> 00024604 BSS: -> 00030608 initcall: 00000438 CPU: SoC Version 0.01 CPU clock: 75MHz SDRAM clock: 75MHz initcall: 00006470 initcall: 00005f70 DRAM: initcall: 000010ec SDRAM Reg 000 : ffffffff EDAC Reg 004 : ffffffff SDRAM Reg 100 : ffffffff EDAC Reg 104 : ffffffff EMC Reg : 1ff initcall: 00006178 Monitor len: 00030608 Ram size: 04000000 gd->relocaddr : 44000000 Ram top: 44000000 initcall: 00005cfc initcall: 00006098 initcall: 00005d14 initcall: 000060a0 initcall: 00005e44 Reserving 193k for U-Boot at: 43fcf000 initcall: 00005e18 Reserving 1152k for malloc() at: 43eaf000 initcall: 00005f1c Reserving 80 Bytes for Board Info at: 43eaefb0 initcall: 000060a8 initcall: 00005de4 Reserving 200 Bytes for Global Data at: 43eaeee8 initcall: 00005d5c initcall: 000060b0 initcall: 000060c8 initcall: 000061f4 gd->relocaddr : 43FCF000 initcall: 00005d1c initcall: 000060dc RAM Configuration: Bank #0: 40000000 64 MiB DRAM: 64 MiB initcall: 00005d40 New Stack Pointer is: 43eaeec0 initcall: 00005ed8 initcall: 000060b8 initcall: 00005fd0 __image_copy_start : 00000000 __image_copy_end : 00024604 gd copied successfully to new gd... Relocation Offset is: 43fcf000 Relocating to Addr 43fcf000, new gd at 43eaeee8, sp at 43eaeec0 Current Stack Pointer 90000a60 rrrr ccccooooeeee4444eeeettttllll44445555ttttllll44445555ttttllll00006666eeeeaaaa 44445555))))ENABLE CACHESWARNING: Caches not enabled ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))----ooooaaaaccccuuuu 7777tttt((((BBBBnnnneeeeyyyy4444ffff----4444ffffffffmmmmoooo 44449999----44449999 ttttllll00005555eeeeaaaa 44444444))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))aaaaffff____iiiibbbbeeee0000 aaaaffff____iiiibbbbeeee0000---- ''''ttttiiii''''----ttttuuuuttttllll00001111eeeeaaaa 44440000))))IIII::::aaaaiiii ttttllll0000aaaaeeeeaaaa 44449999))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555)))) nnnn RRRR----BBBB 4444ffffttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))MMC: ttttllll00006666eeeeaaaa 44445555))))nnnneeeellllnnnnoooonnnniiiimmmm oooommmmccccNNNNooooccccaaaa ::::ooooddddhhhhoooooooooooonnnniiiiEEEE::::ooooddddhhhhoooooooooooonnnntttt hhhhbbbb 44442222bbbb====00000000aaaaHHHH llllNNNN eeeebbbb,,,,llll::::eeee BBBB mmmmeeeebbbb,,,,dddd::::eeee BBBB mmmmEEEE llll44442222 llll1111 4444ffff eeeeoooo uuuueeee BBBB mmmm""""EEEE eeeetttt 4444ffffEEEE eeeettttllll00006666eeeeaaaa 44445555))))ttttllll0000aaaaeeeeaaaa 44449999))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00008888eeeeaaaa 44447777))))In: iiii4444ffff Out: iiii4444ffff Err: iiii4444ffff tttt uuuuoooorrrr3333aaaaaaaa cccctttt uuuuoooorrrr3333aaaaaaaa cccctttt uuuuoooorrrr3333aaaaaaaa ccccttttllll0000ddddeeeeaaaa 4444ffff))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))ttttllll00006666eeeeaaaa 44445555))))Net: ttttiiiiiiiiSSSSppppNo ethernet found. ttttllll00006666eeeeaaaa 44445555))))tttt uuuuoooorrrr3333aaaaaaaa cccc nnnnoooonnnneeeebbbbddddyyyy nnnnoooobbbbcccc""""DDDDNNNN""""Uboot > Uboot > Uboot > Uboot > Uboot > Uboot > Uboot > Uboot > Regards, Shekhar S

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[U-Boot] Booting i.MX6UL via SPL?
by Martyn Welch 08 Nov '18

08 Nov '18

Hi All, I've been trying to boot a i.MX6UL based device I have here using SPL. It doesn't seem to want to work for me. I see there's a number of i.MX6UL ports in U-Boot already, some use a custom DCD to configure the board, others seem to provide both options (DCD and SPL). Interestingly the Freescale i.MX 6UltraLite Evaluation Kit port (via mx6ul_14x14_evk_defconfig) appears to be using the SPL mechanism exclusively. Can someone confirm that the above device boots using this config from SD card? I seem to be able to boot from SD card using a custom DCD (which copies U-Boot into RAM), I'm also able to get the SPL to boot via USB (which copies the SPL to OCRAM). However when I try to boot the SPL from SD card it doesn't boot. If I boot the SPL via USB, insert an SD card and reset the device, it seems to boot from the SPL previously loaded from USB (as in it's still in the OCRAM) but carries on like it's booted from the SD card (looking on the SD card rather than USB for the main U-Boot image). The reason I think it's doing this is that if I rebuild U-Boot and flash a copy with an updated build time to the SD card, when I perform a reset I still see the old build time in the U-Boot banner. It looks to me like for some reason it's unable to copy the SPL to OCRAM, but carries on thinking it has. Anyone got any pointers? Thanks in advance, Martyn

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[U-Boot] [PATCH v1] fs: ubifs: Fix UBIFS decompression on 64 bit
by Paul Davey 08 Nov '18

08 Nov '18

Add local size_t variable to crypto_comp_decompress as intermediate storage for destination length to avoid memory corruption and incorrect results on 64 bit targets. This is what linux does for the various lz compression implementations. Signed-off-by: Paul Davey <paul.davey(a)alliedtelesis.co.nz> Cc: Heiko Schocher <hs(a)denx.de> --- When attempting to use ubifs on a MIPS64 platform I found that it would fail decompression for the file I was attempting to load. Further investigation found that this was due to the pointer cast from unsigned int * to size_t * in the decompression wrapper. This will cause any big endian 64 bit platform to fail to load any ubifs file that requires decompression and at least cause little endian 64 bit platforms to silently write 0 over 4 bytes of stack memory. fs/ubifs/ubifs.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index 47fa41ad1dd..d5101d3c459 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -125,6 +125,7 @@ crypto_comp_decompress(const struct ubifs_info *c, struct crypto_comp *tfm, { struct ubifs_compressor *compr = ubifs_compressors[tfm->compressor]; int err; + size_t tmp_len = *dlen; if (compr->compr_type == UBIFS_COMPR_NONE) { memcpy(dst, src, slen); @@ -132,11 +133,12 @@ crypto_comp_decompress(const struct ubifs_info *c, struct crypto_comp *tfm, return 0; } - err = compr->decompress(src, slen, dst, (size_t *)dlen); + err = compr->decompress(src, slen, dst, &tmp_len); if (err) ubifs_err(c, "cannot decompress %d bytes, compressor %s, " "error %d", slen, compr->name, err); + *dlen = tmp_len; return err; return 0; -- 2.19.1

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[U-Boot] [PATCH v2 1/2] linux/sizes.h: sync from kernel
by Baruch Siach 07 Nov '18

07 Nov '18

The kernel added SZ_4G macro in commit f2b9ba871b (arm64/kernel: kaslr: reduce module randomization range to 4 GB). Include common.h for _AC() instead of the kernel linux/const.h header. Drop a local SZ_4G definition in tegra code. Cc: Tom Warren <twarren(a)nvidia.com> Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- v2: No change --- arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 3 +-- include/linux/sizes.h | 4 ++++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c index 5c9467bfe8be..62142821a595 100644 --- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c +++ b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c @@ -6,11 +6,10 @@ #include <common.h> #include <fdt_support.h> #include <fdtdec.h> +#include <linux/sizes.h> #include <asm/arch/tegra.h> #include <asm/armv8/mmu.h> -#define SZ_4G 0x100000000ULL - /* * Size of a region that's large enough to hold the relocated U-Boot and all * other allocations made around it (stack, heap, page tables, etc.) diff --git a/include/linux/sizes.h b/include/linux/sizes.h index ce3e8150c174..9f3c13ee459b 100644 --- a/include/linux/sizes.h +++ b/include/linux/sizes.h @@ -8,6 +8,8 @@ #ifndef __LINUX_SIZES_H__ #define __LINUX_SIZES_H__ +#include <common.h> + #define SZ_1 0x00000001 #define SZ_2 0x00000002 #define SZ_4 0x00000004 @@ -44,4 +46,6 @@ #define SZ_1G 0x40000000 #define SZ_2G 0x80000000 +#define SZ_4G _AC(0x100000000, ULL) + #endif /* __LINUX_SIZES_H__ */ -- 2.19.1

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[U-Boot] [GIT PULL] Xilinx fixes for v2018.11-rc3
by Michal Simek 07 Nov '18

07 Nov '18

Hi Tom, please pull this one patch to your tree. Thanks, Michal The following changes since commit dd610e616cceda16a81dfa6f9a134877f783548c: Merge tag 'u-boot-imx-20181106' of git://git.denx.de/u-boot-imx (2018-11-06 11:12:00 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc3 for you to fetch changes up to acb83bb3ec4fd7f52c600244daa5d8caa53a4924: arm: zynq: Setup non zero SPL FIT load address (2018-11-07 10:07:31 +0100) ---------------------------------------------------------------- Xilinx fixes for v2018.11-rc3 - Fix fit loading address for Zynq ---------------------------------------------------------------- Michal Simek (1): arm: zynq: Setup non zero SPL FIT load address include/configs/zynq-common.h | 2 ++ 1 file changed, 2 insertions(+) -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs

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[U-Boot] [PATCH v6 00/34] i.MX: Add i.MX8QXP support
by Anatolij Gustschin 07 Nov '18

07 Nov '18

This patchset is to upstream basic i.MX8QXP and MEK board support, with some drivers update to support i.MX8QXP. The information about the processor could be found under https://www.nxp.com/products/processors-and-microcontrollers/applications-p… The architecture of i.MX8QXP is different from i.MX6/7/8M, inside i.MX8QXP, there is a dedicated processor(SCU) used for power/clock/pin/ pad/resource management/thermal and etc. V6: This series was rebased on master and addresses some v5 review comments and additionally adds FEC support. Summary of the changes to v5 patches is below. Patch 08/32: - fixed error string: s/clk/iomux Patch 09/32: - minor coding style fix (dropped empty lines), added API functions for reading SCFW buildinfo and for reading MAC address from fuses Patch 18/32: - fixed typo in subject and one line over 80 chars warning Patch 19/32: - s/u-boot/U-Boot in comments Added two new patches (20/34 and 21/34) for adding uclass cpu driver and extension for reading MAC address from fuses (required for FEC driver) Extended original patch 25/32: - added support for more I2C/ENET/UART clocks, added 'clk dump' command - fixed to propagate error codes (if returned by sc_pm_* API) to the caller - fixed printf formatting in debug() - extended for clock ID range checks to differentiate between not yet supported and invalid clock IDs. Patch 28/32: - guard get_lpuart_clk_rate() by IS_ENABLED to prevent build issues Patch 30/32: - propagate error code if clk api calls fail Patch 31/32: - added FEC nodes and aliases Patch 32/32: In DTS: - added fec1 support, pca9646 switch description on i2c1 bus with i2c slaves - removed not used 'pinctrl-assert-gpios' property - s/lpi1cgrp/lpi2c1grp/ - added 'dm-pre-reloc' to cpu0 node (needed for print_cpuinfo()!) In board code: - reworked gpio init (repaced by init via properties in DTS), dropped GPIO5_9 mux init (was unused, will be added later when adding USB support) - added board_phy_config() for FEC0 support - added SCFW build info output - moved CONFIG_MXC_GPIO from board config header to defconfig - added required FEC driver options to the board config header - updated defconfig: enabled 'clk', 'cpu' and 'dm' commands, PHY, FEC, MII and MXC GPIO support V5: Addressed Lothar Waßmann's comments for patch 24 and 32. Rebased on master. V4: Add reviewed tag from Anatolij Gustschin Addressed comments from Anatolig for patch "misc: add i.MX8 misc driver" Addressed comments from Anatolig for patch "misc: imx8: add scfw api impementation" Merged the files into one Moved one error handle to patch 4 Moved patch "arm: global_data: add scu_dev for i.MX8" to patch 7 For Fabio's comments to imx-mkimage, I'll start the porting work, but needs more time, it will be not be in this patchset. V3: patch 7: use CONFIG_IMX8 patch 29: use CONFIG_IMX8 patch 32: Added README with scfw_tcm.bin link added misc: remove sc_rpc_msg_t typedef, use struct sc_rpc_msg_s in patchset. V2: In this V2 patchset, the SCFW API is replaced by uclass driver implementation, but the api name is not changed from scfw api. The related macro definitions are kept in different api.h file following SCFW API file structure. Impelemnted scu misc driver to handle the low level communication between Acore and SCU. Implemented rm/pm/pad/misc protocol code to invoke misc_call for different functionality. The dm clk/pinctrl/power and others will invokde the protocol api to communicate with SCU. The arch/arm/mach-imx/imx8/clock.c currently is only a dummy file to avoid build break for mxc_get_clock. The i2c patch and common power domain patches are removed from this patchset. The imx8 name still kept, this is because NXP marketing requires to use this name for i.MX branding. Anatolij Gustschin (2): imx8: cpu: add function for reading FEC MAC from fuse imx8: cpu: add uclass based CPU driver Peng Fan (30): dt-bindings: pinctrl: add i.MX8QXP pads definition dt-bindings: clock: dt-bindings: pinctrl: add i.MX8QXP clocks definition dt-bindings: soc: add i.MX8QXP pm and rsrc definition imx8: add scfw macro definition imx: add Kconfig entry for i.MX8QXP arm: build mach-imx for i.MX8 arm: global_data: add scu_dev for i.MX8 misc: add i.MX8 misc driver misc: imx8: add scfw api impementation imx: boot_mode: Add FLEXSPI boot entry imx8: add imx-regs header file imx8: pins: include i.MX8QXP pin header when CONFIG_IMX8QXP defined imx: add i.MX8 cpu type armv8: add cpu core helper functions imx8: add basic cpu support imx8: add boot device detection imx8: implement mmc_get_env_dev imx8: add mmu and dram related functions imx8: add arch_cpu_init arch_cpu_init_dm imx8: add iomux configuration api imx8: add dummy clock gpio: mxc_gpio: add support for i.MX8 pinctrl: Add pinctrl driver for i.MX8 power: Add power domain driver for i.MX8 clk: imx: add clk driver for i.MX8QXP serial_lpuart: Update lpuart driver to support i.MX8 serial: lpuart: support uclass clk api mmc: fsl_esdhc: add uclass clk support arm: dts: introduce dtsi for i.MX8QXP imx: add i.MX8QXP MEK board support Ye Li (2): serial: lpuart: Enable RX and TX FIFO fsl_esdhc: Update usdhc driver to support i.MX8 arch/arm/Kconfig | 8 + arch/arm/Makefile | 2 +- arch/arm/dts/Makefile | 2 + arch/arm/dts/fsl-imx8-ca35.dtsi | 66 ++ arch/arm/dts/fsl-imx8dx.dtsi | 499 ++++++++++++ arch/arm/dts/fsl-imx8dxp.dtsi | 11 + arch/arm/dts/fsl-imx8qxp-mek.dts | 246 ++++++ arch/arm/dts/fsl-imx8qxp.dtsi | 51 ++ arch/arm/include/asm/arch-imx/cpu.h | 6 + arch/arm/include/asm/arch-imx8/clock.h | 27 + arch/arm/include/asm/arch-imx8/gpio.h | 21 + arch/arm/include/asm/arch-imx8/imx-regs.h | 46 ++ arch/arm/include/asm/arch-imx8/imx8-pins.h | 15 + arch/arm/include/asm/arch-imx8/iomux.h | 40 + arch/arm/include/asm/arch-imx8/power-domain.h | 15 + arch/arm/include/asm/arch-imx8/sci/rpc.h | 158 ++++ arch/arm/include/asm/arch-imx8/sci/sci.h | 88 ++ .../include/asm/arch-imx8/sci/svc/misc/api.h | 30 + .../include/asm/arch-imx8/sci/svc/pad/api.h | 57 ++ .../include/asm/arch-imx8/sci/svc/pm/api.h | 44 + .../include/asm/arch-imx8/sci/svc/rm/api.h | 69 ++ arch/arm/include/asm/arch-imx8/sci/types.h | 220 +++++ arch/arm/include/asm/arch-imx8/sys_proto.h | 19 + arch/arm/include/asm/armv8/cpu.h | 26 + arch/arm/include/asm/global_data.h | 4 + arch/arm/include/asm/mach-imx/boot_mode.h | 1 + arch/arm/include/asm/mach-imx/sys_proto.h | 3 + arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/imx8/Kconfig | 26 + arch/arm/mach-imx/imx8/Makefile | 7 + arch/arm/mach-imx/imx8/clock.c | 21 + arch/arm/mach-imx/imx8/cpu.c | 646 +++++++++++++++ arch/arm/mach-imx/imx8/iomux.c | 43 + board/freescale/imx8qxp_mek/Kconfig | 14 + board/freescale/imx8qxp_mek/MAINTAINERS | 6 + board/freescale/imx8qxp_mek/Makefile | 7 + board/freescale/imx8qxp_mek/README | 72 ++ board/freescale/imx8qxp_mek/imx8qxp_mek.c | 170 ++++ board/freescale/mx8mq_evk/README | 81 ++ configs/imx8qxp_mek_defconfig | 51 ++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/imx/Kconfig | 6 + drivers/clk/imx/Makefile | 5 + drivers/clk/imx/clk-imx8.c | 393 +++++++++ drivers/gpio/mxc_gpio.c | 30 +- drivers/misc/Makefile | 1 + drivers/misc/imx8/Makefile | 3 + drivers/misc/imx8/scu.c | 266 ++++++ drivers/misc/imx8/scu_api.c | 367 +++++++++ drivers/mmc/fsl_esdhc.c | 34 +- drivers/pinctrl/nxp/Kconfig | 18 + drivers/pinctrl/nxp/Makefile | 2 + drivers/pinctrl/nxp/pinctrl-imx.c | 209 ++--- drivers/pinctrl/nxp/pinctrl-imx.h | 16 + drivers/pinctrl/nxp/pinctrl-imx8.c | 40 + drivers/pinctrl/nxp/pinctrl-scu.c | 66 ++ drivers/power/domain/Kconfig | 8 +- drivers/power/domain/Makefile | 1 + drivers/power/domain/imx8-power-domain.c | 315 ++++++++ drivers/serial/serial_lpuart.c | 128 ++- include/configs/imx8qxp_mek.h | 157 ++++ include/dt-bindings/clock/imx8qxp-clock.h | 583 ++++++++++++++ include/dt-bindings/pinctrl/pads-imx8qxp.h | 757 ++++++++++++++++++ include/dt-bindings/soc/imx8_pd.h | 188 +++++ include/dt-bindings/soc/imx_rsrc.h | 557 +++++++++++++ include/fsl_lpuart.h | 2 +- 67 files changed, 6931 insertions(+), 142 deletions(-) create mode 100644 arch/arm/dts/fsl-imx8-ca35.dtsi create mode 100644 arch/arm/dts/fsl-imx8dx.dtsi create mode 100644 arch/arm/dts/fsl-imx8dxp.dtsi create mode 100644 arch/arm/dts/fsl-imx8qxp-mek.dts create mode 100644 arch/arm/dts/fsl-imx8qxp.dtsi create mode 100644 arch/arm/include/asm/arch-imx8/clock.h create mode 100644 arch/arm/include/asm/arch-imx8/gpio.h create mode 100644 arch/arm/include/asm/arch-imx8/imx-regs.h create mode 100644 arch/arm/include/asm/arch-imx8/imx8-pins.h create mode 100644 arch/arm/include/asm/arch-imx8/iomux.h create mode 100644 arch/arm/include/asm/arch-imx8/power-domain.h create mode 100644 arch/arm/include/asm/arch-imx8/sci/rpc.h create mode 100644 arch/arm/include/asm/arch-imx8/sci/sci.h create mode 100644 arch/arm/include/asm/arch-imx8/sci/svc/misc/api.h create mode 100644 arch/arm/include/asm/arch-imx8/sci/svc/pad/api.h create mode 100644 arch/arm/include/asm/arch-imx8/sci/svc/pm/api.h create mode 100644 arch/arm/include/asm/arch-imx8/sci/svc/rm/api.h create mode 100644 arch/arm/include/asm/arch-imx8/sci/types.h create mode 100644 arch/arm/include/asm/arch-imx8/sys_proto.h create mode 100644 arch/arm/include/asm/armv8/cpu.h create mode 100644 arch/arm/mach-imx/imx8/Kconfig create mode 100644 arch/arm/mach-imx/imx8/Makefile create mode 100644 arch/arm/mach-imx/imx8/clock.c create mode 100644 arch/arm/mach-imx/imx8/cpu.c create mode 100644 arch/arm/mach-imx/imx8/iomux.c create mode 100644 board/freescale/imx8qxp_mek/Kconfig create mode 100644 board/freescale/imx8qxp_mek/MAINTAINERS create mode 100644 board/freescale/imx8qxp_mek/Makefile create mode 100644 board/freescale/imx8qxp_mek/README create mode 100644 board/freescale/imx8qxp_mek/imx8qxp_mek.c create mode 100644 board/freescale/mx8mq_evk/README create mode 100644 configs/imx8qxp_mek_defconfig create mode 100644 drivers/clk/imx/Kconfig create mode 100644 drivers/clk/imx/Makefile create mode 100644 drivers/clk/imx/clk-imx8.c create mode 100644 drivers/misc/imx8/Makefile create mode 100644 drivers/misc/imx8/scu.c create mode 100644 drivers/misc/imx8/scu_api.c create mode 100644 drivers/pinctrl/nxp/pinctrl-imx8.c create mode 100644 drivers/pinctrl/nxp/pinctrl-scu.c create mode 100644 drivers/power/domain/imx8-power-domain.c create mode 100644 include/configs/imx8qxp_mek.h create mode 100644 include/dt-bindings/clock/imx8qxp-clock.h create mode 100644 include/dt-bindings/pinctrl/pads-imx8qxp.h create mode 100644 include/dt-bindings/soc/imx8_pd.h create mode 100644 include/dt-bindings/soc/imx_rsrc.h -- 2.17.1

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[U-Boot] [PATCH] arm64: zynqmp: Fix logic in CG/EG/EV detection
by Michal Simek 07 Nov '18

07 Nov '18

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> The VCU disable bit(8) in IP disable register of efuse is valid only if PL powered up and hence PL powerup status has to be considered while determining the CG part also. This patch considers the PL powerup status and ignores the VCU disable bit if PL not powered up. This fixes the issue of "unknown" id for CG parts if PL not powered up and VCU bit(8) is not set. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/zynqmp/zynqmp.c | 48 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 37 insertions(+), 11 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index af91cde7c894..168cf5c14b45 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -72,6 +72,7 @@ static const struct { .id = 0x20, .ver = 0x12c, .name = "5cg", + .evexists = 1, }, { .id = 0x21, @@ -88,6 +89,7 @@ static const struct { .id = 0x21, .ver = 0x12c, .name = "4cg", + .evexists = 1, }, { .id = 0x30, @@ -104,6 +106,7 @@ static const struct { .id = 0x30, .ver = 0x12c, .name = "7cg", + .evexists = 1, }, { .id = 0x38, @@ -234,14 +237,18 @@ int chip_id(unsigned char id) #define ZYNQMP_VERSION_SIZE 9 #define ZYNQMP_PL_STATUS_BIT 9 +#define ZYNQMP_IPDIS_VCU_BIT 8 #define ZYNQMP_PL_STATUS_MASK BIT(ZYNQMP_PL_STATUS_BIT) #define ZYNQMP_CSU_VERSION_MASK ~(ZYNQMP_PL_STATUS_MASK) +#define ZYNQMP_CSU_VCUDIS_VER_MASK ZYNQMP_CSU_VERSION_MASK & \ + ~BIT(ZYNQMP_IPDIS_VCU_BIT) +#define MAX_VARIANTS_EV 3 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ !defined(CONFIG_SPL_BUILD) static char *zynqmp_get_silicon_idcode_name(void) { - u32 i, id, ver; + u32 i, id, ver, j; char *buf; static char name[ZYNQMP_VERSION_SIZE]; @@ -249,24 +256,43 @@ static char *zynqmp_get_silicon_idcode_name(void) ver = chip_id(IDCODE2); for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { - if ((zynqmp_devices[i].id == id) && - (zynqmp_devices[i].ver == (ver & - ZYNQMP_CSU_VERSION_MASK))) { - strncat(name, "zu", 2); - strncat(name, zynqmp_devices[i].name, - ZYNQMP_VERSION_SIZE - 3); - break; + if (zynqmp_devices[i].id == id) { + if (zynqmp_devices[i].evexists && + !(ver & ZYNQMP_PL_STATUS_MASK)) + break; + if (zynqmp_devices[i].ver == (ver & + ZYNQMP_CSU_VERSION_MASK)) + break; } } if (i >= ARRAY_SIZE(zynqmp_devices)) return "unknown"; - if (!zynqmp_devices[i].evexists) + strncat(name, "zu", 2); + if (!zynqmp_devices[i].evexists || + (ver & ZYNQMP_PL_STATUS_MASK)) { + strncat(name, zynqmp_devices[i].name, + ZYNQMP_VERSION_SIZE - 3); return name; + } - if (ver & ZYNQMP_PL_STATUS_MASK) - return name; + /* + * Here we are means, PL not powered up and ev variant + * exists. So, we need to ignore VCU disable bit(8) in + * version and findout if its CG or EG/EV variant. + */ + for (j = 0; j < MAX_VARIANTS_EV; j++, i++) { + if ((zynqmp_devices[i].ver & ~BIT(ZYNQMP_IPDIS_VCU_BIT)) == + (ver & ZYNQMP_CSU_VCUDIS_VER_MASK)) { + strncat(name, zynqmp_devices[i].name, + ZYNQMP_VERSION_SIZE - 3); + break; + } + } + + if (j >= MAX_VARIANTS_EV) + return "unknown"; if (strstr(name, "eg") || strstr(name, "ev")) { buf = strstr(name, "e"); -- 1.9.1

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[U-Boot] [PATCH 0/3] sunxi-mmc: enable new clock mode on A64
by Vasily Khoruzhick 07 Nov '18

07 Nov '18

A64 requires new clock mode on SD and eMMC controllers. Not using new clock mode causes stability issues of the driver - SPL may occasionally fail to load u-boot from SD for some particular SD card on some particular devices. This series depends on "sunxi: add support for automatic delay calibration" from my Pinebook series. Tested on Pinebook and Pine64-LTS. Vasily Khoruzhick (3): sunxi-mmc: introduce new MMC_SUNXI_HAS_NEW_MODE_SWITCH option sunxi-mmc: don't double clock for new mode unconditionally sunxi-mmc: use new mode on both controllers on A64 arch/arm/mach-sunxi/Kconfig | 2 ++ drivers/mmc/Kconfig | 4 ++++ drivers/mmc/sunxi_mmc.c | 19 +++++++++---------- 3 files changed, 15 insertions(+), 10 deletions(-) -- 2.19.1

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[U-Boot] Please pull u-boot-dm
by Simon Glass 07 Nov '18

07 Nov '18

Hi Tom, The following changes since commit 5ef76e59c12c79d106ebda70b710468aa6bd8b75: Merge branch 'master' of git://git.denx.de/u-boot-sh (2018-11-04 08:12:21 -0500) are available in the Git repository at: git://git.denx.de/u-boot-dm.git tags/pull-6-nov-18 for you to fetch changes up to 9413033c3d5d2bc44eefd1919c60522598cc1bd6: cpu: sandbox: Add "u-boot, dm-pre-reloc" for all cpu nodes (2018-11-06 13:56:18 -0700) ---------------------------------------------------------------- dm: DM_FLAG_PRE_RELOC fixes for release sandbox CPU fixes for release ---------------------------------------------------------------- Bin Meng (15): arm: stm32mp: Remove DM_FLAG_PRE_RELOC flag clk: Remove DM_FLAG_PRE_RELOC flag in various drivers gpio: Remove DM_FLAG_PRE_RELOC flag in various drivers i2c: omap24xx: Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check mmc: omap: Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check pinctrl: Remove DM_FLAG_PRE_RELOC flag in various drivers ram: bmips: Remove DM_FLAG_PRE_RELOC flag timer: Remove DM_FLAG_PRE_RELOC flag in various drivers serial: Remove DM_FLAG_PRE_RELOC flag in various drivers sysreset: Remove DM_FLAG_PRE_RELOC flag in various drivers video: simplefb: Remove DM_FLAG_PRE_RELOC flag watchdog: Remove DM_FLAG_PRE_RELOC flag in various drivers dm: doc: Update description of pre-relocation support cpu: Add DM_FLAG_PRE_RELOC flag to various cpu drivers cpu: sandbox: Add "u-boot, dm-pre-reloc" for all cpu nodes arch/arm/mach-stm32mp/bsec.c | 1 - arch/sandbox/dts/test.dts | 3 +++ arch/x86/cpu/baytrail/cpu.c | 1 + arch/x86/cpu/broadwell/cpu.c | 1 + arch/x86/cpu/cpu_x86.c | 1 + arch/x86/cpu/ivybridge/model_206ax.c | 1 + arch/x86/cpu/tangier/sysreset.c | 1 - doc/driver-model/README.txt | 16 ++++++++++++---- drivers/clk/altera/clk-arria10.c | 1 - drivers/clk/clk_pic32.c | 1 - drivers/clk/clk_zynq.c | 1 - drivers/clk/exynos/clk-exynos7420.c | 3 --- drivers/clk/owl/clk_s900.c | 1 - drivers/gpio/omap_gpio.c | 2 ++ drivers/gpio/stm32f7_gpio.c | 2 +- drivers/gpio/tegra186_gpio.c | 1 - drivers/gpio/tegra_gpio.c | 1 - drivers/i2c/omap24xx_i2c.c | 2 ++ drivers/mmc/omap_hsmmc.c | 2 ++ drivers/pinctrl/broadcom/pinctrl-bcm283x.c | 2 ++ drivers/pinctrl/exynos/pinctrl-exynos7420.c | 1 - drivers/pinctrl/nxp/pinctrl-imx5.c | 2 ++ drivers/pinctrl/nxp/pinctrl-imx6.c | 2 ++ drivers/pinctrl/nxp/pinctrl-imx7.c | 2 ++ drivers/pinctrl/nxp/pinctrl-imx7ulp.c | 2 ++ drivers/pinctrl/pinctrl-single.c | 1 - drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 2 ++ drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 2 ++ drivers/ram/bmips_ram.c | 1 - drivers/serial/altera_jtag_uart.c | 1 - drivers/serial/altera_uart.c | 1 - drivers/serial/arm_dcc.c | 1 - drivers/serial/atmel_usart.c | 2 ++ drivers/serial/ns16550.c | 2 ++ drivers/serial/serial_ar933x.c | 1 - drivers/serial/serial_arc.c | 1 - drivers/serial/serial_bcm283x_mu.c | 2 ++ drivers/serial/serial_bcm283x_pl011.c | 2 ++ drivers/serial/serial_bcm6345.c | 1 - drivers/serial/serial_efi.c | 1 - drivers/serial/serial_intel_mid.c | 1 - drivers/serial/serial_lpuart.c | 1 - drivers/serial/serial_meson.c | 1 - drivers/serial/serial_mvebu_a3700.c | 1 - drivers/serial/serial_mxc.c | 2 ++ drivers/serial/serial_omap.c | 2 ++ drivers/serial/serial_owl.c | 1 - drivers/serial/serial_pic32.c | 1 - drivers/serial/serial_pl01x.c | 2 ++ drivers/serial/serial_s5p.c | 1 - drivers/serial/serial_sh.c | 2 ++ drivers/serial/serial_sti_asc.c | 1 - drivers/serial/serial_stm32.c | 2 ++ drivers/serial/serial_xuartlite.c | 1 - drivers/serial/serial_zynq.c | 1 - drivers/sysreset/sysreset_x86.c | 1 - drivers/timer/ag101p_timer.c | 1 - drivers/timer/altera_timer.c | 1 - drivers/timer/arc_timer.c | 1 - drivers/timer/ast_timer.c | 1 - drivers/timer/atcpit100_timer.c | 1 - drivers/timer/atmel_pit_timer.c | 1 - drivers/timer/cadence-ttc.c | 1 - drivers/timer/dw-apb-timer.c | 1 - drivers/timer/mpc83xx_timer.c | 1 - drivers/timer/omap-timer.c | 1 - drivers/timer/rockchip_timer.c | 1 - drivers/timer/sti-timer.c | 1 - drivers/timer/stm32_timer.c | 1 - drivers/timer/tsc_timer.c | 1 - drivers/video/simplefb.c | 1 - drivers/watchdog/ast_wdt.c | 1 - lib/efi/efi_app.c | 1 - 73 files changed, 58 insertions(+), 54 deletions(-) Regards, Simon

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[U-Boot] [PULL] Please pull u-boot-imx: u-boot-imx-20181106
by Stefano Babic 06 Nov '18

06 Nov '18

Hi Tom, this solves issue reported by coverity for i.MX8: The following changes since commit 5ef76e59c12c79d106ebda70b710468aa6bd8b75: Merge branch 'master' of git://git.denx.de/u-boot-sh (2018-11-04 08:12:21 -0500) are available in the Git repository at: git://www.denx.de/git/u-boot-imx.git tags/u-boot-imx-20181106 for you to fetch changes up to 0ea82ba2b082475090e11872ec11409a9fc8d486: MAINTAINERS: add NXP linux team maillist as i.MX reviewer (2018-11-06 11:26:21 +0100) ---------------------------------------------------------------- Fix coverity issues for i.MX8 ---------------------------------------------------------------- Fabio Estevam (2): mx8mq_evk: README: Delete file introduced by mistake ARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus" Peng Fan (5): tools: imx8image: check lseek return value tools: imx8image: fix coverity CID 184234 tools: imx8image: fix coverity CID 184233 tools: imx8image: flatten container header only when creating container MAINTAINERS: add NXP linux team maillist as i.MX reviewer MAINTAINERS | 1 + arch/arm/dts/fsl-imx8qxp-mek.dts | 20 ++++++++------------ board/freescale/mx8mq_evk/README | 81 --------------------------------------------------------------------------------- tools/imx8image.c | 59 +++++++++++++++++++++++++++++++++++++++++++++-------------- 4 files changed, 54 insertions(+), 107 deletions(-) delete mode 100644 board/freescale/mx8mq_evk/README Best regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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