October 2018 - U-Boot

[U-Boot] [PATCH] ARM: dts: rmobile: Add eMMC DS pinmux
by Marek Vasut 31 Oct '18

31 Oct '18

Add pinmux entry for the eMMC DS line, as it is connected on these boards. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- arch/arm/dts/salvator-common.dtsi | 4 ++-- arch/arm/dts/ulcb.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi index 514c57b2c8..826a02c333 100644 --- a/arch/arm/dts/salvator-common.dtsi +++ b/arch/arm/dts/salvator-common.dtsi @@ -480,13 +480,13 @@ }; sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; function = "sdhi2"; power-source = <1800>; }; sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; function = "sdhi2"; power-source = <1800>; }; diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi index 4b00db8970..b61e2656d5 100644 --- a/arch/arm/dts/ulcb.dtsi +++ b/arch/arm/dts/ulcb.dtsi @@ -308,13 +308,13 @@ }; sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; function = "sdhi2"; power-source = <1800>; }; sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; + groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; function = "sdhi2"; power-source = <1800>; }; -- 2.18.0

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[U-Boot] [PATCH] ARM: rmobile: Generate fitting mem_map on Gen3
by Marek Vasut 31 Oct '18

31 Oct '18

Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire 64bit DRAM space as cachable. On CortexA57, this might result in odd side effects, where the CPU tries to prefetch from those areas and if there is no DRAM backing them, CPU bus hang can happen. This patch fixes it by generating the mem_map structure based on the actual memory layout obtained from the DT, thus not marking areas without any DRAM behind them as cachable. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Fixes: c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3") Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- arch/arm/mach-rmobile/cpu_info.c | 3 + arch/arm/mach-rmobile/memmap-gen3.c | 89 ++++++++++++++++++++++++++++- 2 files changed, 91 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index e110737471..c9ebc9f40e 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -6,6 +6,8 @@ #include <common.h> #include <asm/io.h> +/* R-Car Gen3 caches are enabled in memmap-gen3.c */ +#ifndef CONFIG_RCAR_GEN3 #ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) { @@ -20,6 +22,7 @@ void enable_caches(void) dcache_enable(); } #endif +#endif #ifdef CONFIG_DISPLAY_CPUINFO static u32 __rmobile_get_cpu_type(void) diff --git a/arch/arm/mach-rmobile/memmap-gen3.c b/arch/arm/mach-rmobile/memmap-gen3.c index 92c8f2e80d..7e29ccc351 100644 --- a/arch/arm/mach-rmobile/memmap-gen3.c +++ b/arch/arm/mach-rmobile/memmap-gen3.c @@ -8,7 +8,9 @@ #include <common.h> #include <asm/armv8/mmu.h> -static struct mm_region gen3_mem_map[] = { +#define GEN3_NR_REGIONS 16 + +static struct mm_region gen3_mem_map[GEN3_NR_REGIONS] = { { .virt = 0x0UL, .phys = 0x0UL, @@ -42,3 +44,88 @@ static struct mm_region gen3_mem_map[] = { }; struct mm_region *mem_map = gen3_mem_map; + +DECLARE_GLOBAL_DATA_PTR; + +void enable_caches(void) +{ + u64 start, size; + int bank, i = 0; + + /* Create map for RPC access */ + gen3_mem_map[i].virt = 0x0ULL; + gen3_mem_map[i].phys = 0x0ULL; + gen3_mem_map[i].size = 0x40000000ULL; + gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN; + i++; + + /* Generate entires for DRAM in 32bit address space */ + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + start = gd->bd->bi_dram[bank].start; + size = gd->bd->bi_dram[bank].size; + + /* Skip empty DRAM banks */ + if (!size) + continue; + + /* Skip DRAM above 4 GiB */ + if (start >> 32ULL) + continue; + + /* Mark memory reserved by ATF as cacheable too. */ + if (start == 0x48000000) { + start = 0x40000000ULL; + size += 0x08000000ULL; + } + + gen3_mem_map[i].virt = start; + gen3_mem_map[i].phys = start; + gen3_mem_map[i].size = size; + gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + i++; + } + + /* Create map for register access */ + gen3_mem_map[i].virt = 0xc0000000ULL; + gen3_mem_map[i].phys = 0xc0000000ULL; + gen3_mem_map[i].size = 0x40000000ULL; + gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN; + i++; + + /* Generate entires for DRAM in 64bit address space */ + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + start = gd->bd->bi_dram[bank].start; + size = gd->bd->bi_dram[bank].size; + + /* Skip empty DRAM banks */ + if (!size) + continue; + + /* Skip DRAM below 4 GiB */ + if (!(start >> 32ULL)) + continue; + + gen3_mem_map[i].virt = start; + gen3_mem_map[i].phys = start; + gen3_mem_map[i].size = size; + gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + i++; + } + + /* Zero out the remaining regions. */ + for (; i < GEN3_NR_REGIONS; i++) { + gen3_mem_map[i].virt = 0; + gen3_mem_map[i].phys = 0; + gen3_mem_map[i].size = 0; + gen3_mem_map[i].attrs = 0; + } + + icache_enable(); + dcache_enable(); +} -- 2.18.0

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[U-Boot] [PATCH] clk: renesas: Allow reconfiguring SDHI clock on Gen3
by Marek Vasut 31 Oct '18

31 Oct '18

The SDHI clock must be configured differently for HS200/HS400/SDR104 modes. Add support for reconfiguring the SDHI clock settings into the clock driver. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/clk/renesas/clk-rcar-gen3.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index 99698b1f46..0529fc8763 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -107,7 +107,7 @@ static int gen3_clk_get_parent(struct gen3_clk_priv *priv, struct clk *clk, return renesas_clk_get_parent(clk, info, parent); } -static int gen3_clk_setup_sdif_div(struct clk *clk) +static int gen3_clk_setup_sdif_div(struct clk *clk, ulong rate) { struct gen3_clk_priv *priv = dev_get_priv(clk->dev); struct cpg_mssr_info *info = priv->info; @@ -133,7 +133,7 @@ static int gen3_clk_setup_sdif_div(struct clk *clk) debug("%s[%i] SDIF offset=%x\n", __func__, __LINE__, core->offset); - writel(1, priv->base + core->offset); + writel((rate == 400000000) ? 0x4 : 0x1, priv->base + core->offset); return 0; } @@ -141,10 +141,6 @@ static int gen3_clk_setup_sdif_div(struct clk *clk) static int gen3_clk_enable(struct clk *clk) { struct gen3_clk_priv *priv = dev_get_priv(clk->dev); - int ret = gen3_clk_setup_sdif_div(clk); - - if (ret) - return ret; return renesas_clk_endisable(clk, priv->base, true); } @@ -328,7 +324,7 @@ static ulong gen3_clk_get_rate(struct clk *clk) static ulong gen3_clk_set_rate(struct clk *clk, ulong rate) { /* Force correct SD-IF divider configuration if applicable */ - gen3_clk_setup_sdif_div(clk); + gen3_clk_setup_sdif_div(clk, rate); return gen3_clk_get_rate64(clk); } -- 2.18.0

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[U-Boot] [PATCH] pinctrl: renesas: Fix DRV register offset
by Marek Vasut 31 Oct '18

31 Oct '18

Use fixed 4bit size for generating the DRV register element mask, not the size of the value, which can be smaller. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/pinctrl/renesas/pfc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c index 90011537a8..b3a4ff9049 100644 --- a/drivers/pinctrl/renesas/pfc.c +++ b/drivers/pinctrl/renesas/pfc.c @@ -591,7 +591,7 @@ static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc, strength = strength / step - 1; val = sh_pfc_read_raw_reg(reg, 32); - val &= ~GENMASK(offset + size - 1, offset); + val &= ~GENMASK(offset + 4 - 1, offset); val |= strength << offset; if (unlock_reg) -- 2.18.0

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[U-Boot] [PATCH] iot_dk: Add README
by Alexey Brodkin 31 Oct '18

31 Oct '18

Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- board/synopsys/iot_devkit/README | 145 +++++++++++++++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 board/synopsys/iot_devkit/README diff --git a/board/synopsys/iot_devkit/README b/board/synopsys/iot_devkit/README new file mode 100644 index 000000000000..20c140d93cd3 --- /dev/null +++ b/board/synopsys/iot_devkit/README @@ -0,0 +1,145 @@ +================================================================================ +Useful notes on bulding and using of U-Boot on +ARC IoT Development Kit (AKA IoTDK) +================================================================================ + + BOARD OVERVIEW + + The DesignWare ARC IoT Development Kit is a versatile platform that includes + the necessary hardware and software to accelerate software development and + debugging of sensor fusion, voice recognition and face detection designs. + + The ARC IoT Development Kit includes a silicon implementation of the + ARC Data Fusion IP Subsystem running at 144 MHz on SMIC's + 55-nm ultra-low power process, and a rich set of peripherals commonly used + in IoT designs such as USB, UART, SPI, I2C, PWM, SDIO and ADCs. + + The board is shipped with pre-installed U-Boot in non-volatile memory + (eFlash) so on power-on user sees U-Boot start header and command line + prompt which might be used for U-Boot environment fine-tuning, manual + loading and execution of user application binaries etc. + + The board has the following features useful for U-Boot: + * On-board 2-channel FTDI TTL-to-USB converter + - The first channel is used for serial debug port (which makes it possible + to use a serial connection on pretty much any host machine be it + Windows, Linux or Mac). + On Linux machine typucally FTDI serial port would be /dev/ttyUSB0. + There's no HW flow-control and baud-rate is 115200. + + - The second channel is used for built-in Digilent USB JTAG probe. + That means no extra hardware is required to access ARC core from a + debugger on development host. Both proprietary MetaWare debugger and + open source OpenOCD + GDB client are supported. + + - Also with help of this FTDI chip it is possible to reset entire + board with help of a special `rff-ftdi-reset` utility, see: + https://github.com/foss-for-synopsys-dwc-arc-processors/rff-ftdi-reset + + * Micro SD-card slot + - U-Boot expects to see the very first partition on the card formatted as + FAT file-system and uses it for keeping its environment in `uboot.env` + file. Note uboot.env is not just a text file but it is auto-generated + file created by U-Boot on invocation of `saveenv` command. + It contains a checksum which makes this saved environment invalid in + case of maual modification. + + - There might be more useful files on that first FAT partition like + user applications, data files etc. + + * USB OTG connector + - U-Boot may access USB mass-storage devices attached to this connector. + Note only FAT file-system is supported. It might be used for storing + user application binaries as well as micro SD-card mentioned above. + + * The following memories are avaialble on the board: + - eFlash: 256 KiB @ 0x0000_0000 + A non-volatile memory from which ARC core may execute code directly. + Still is is not direcly writable, thus this is not an ordinary RAM. + + - ICCM: 256 KiB @ 0x2000_0000 + Instruction Closely Coupled Memory - fast on-chip memory primary used + for code being executed, still data could be placed in this memory too. + In that sense it's just a general purpose RAM. + + - SRAM: 128 KiB @ 0x3000_0000 + On-chip SRAM. From user perspective is the same as ICCM above. + + - DCCM: 128 KiB @ 0x8000_0000 + Data Closely Coupled Memory is similar to ICCM with a major difference - + ARC core cannot execute code from DCCM. So this is very special RAM + only suitable for data. + + BUILDING U-BOOT + + 1. Configure U-Boot: + ------------------------->8---------------------- + make iot_devkit_defconfig + ------------------------->8---------------------- + + 2. To build Elf file (for example to be used with host debugger via JTAG + connection to the target board): + ------------------------->8---------------------- + make mdbtrick + ------------------------->8---------------------- + + This will produce `u-boot` Elf file. + + 3. To build binary image to be put in "ROM": + ------------------------->8---------------------- + make u-boot.bin + ------------------------->8---------------------- + + + EXECUTING U-BOOT + + 1. The IoTDK board is supposed to auto-start U-Boot image stored in eFlash on + power-on. Note it's possible to update that image - follow instructions in + user's manual. + + 2. Though it is possible to load and start U-Boot as a simple Elf file + via JTAG right in ICCM. For that it's required to re-configure U-Boot + so it gets linked to ICCM address 0x2000_0000 (remember eFlash is not + direcly writable). + Run U-Boot's configuration utility with "make menuconfig", go to + "Boot images" and change "Text Base" from default 0x00000000 to + 0x20000000. Exit & save new configuration. Now run "make mdbtrick" to + build new Elf. + + 2.1. In case of proprietary MetaWare debugger run: + ------------------------->8---------------------- + mdb -digilent u-boot + ------------------------->8---------------------- + + USING U-BOOT + + Note due to limited memory size it's supposed that user will run binary + images of their applications instead of loading Elf files. + + 1. To load and start application binary from micro SD-card execute + the following commands in U-Boot's shell: + ------------------------->8---------------------- + fatload mmc 0 0x20000000 yourapp.bin + go 0x20000000 + ------------------------->8---------------------- + + 2. To load and start application binary from USB mass-storage device execute + the following commands in U-Boot's shell: + ------------------------->8---------------------- + usb start + fatload usb 0x20000000 yourapp.bin + go 0x20000000 + ------------------------->8---------------------- + + 3. To have a sequence of commands executed on U-Boot start put those + commands in "bootcmd" with semicolon between them. + For example to get (1) done automatically: + ------------------------->8---------------------- + setenv bootcmd fatload mmc 0 0x20000000 yourapp.bin\; go 0x20000000 + saveenv + ------------------------->8---------------------- + + 4. To reboot the board just run: + ------------------------->8---------------------- + reset + ------------------------->8---------------------- -- 2.17.2

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[U-Boot] Please pull u-boot-mpc85xx master
by York Sun 31 Oct '18

31 Oct '18

Tom, The following changes since commit 454cf76184c65426b68033a23da086e73663f2fc: Prepare v2018.11-rc3 (2018-10-29 16:04:26 -0400) are available in the Git repository at: git://git.denx.de/u-boot-mpc85xx.git tags/mpc85xx-for-v2018.11 for you to fetch changes up to db148f2a6938b47cf26c5fd11481e7462a6a793a: powerpc: t1040: Correct RCW EC2 settings (2018-10-29 13:19:43 -0700) Travis build log is https://travis-ci.org/yorksun/u-boot/builds/448003795 ---------------------------------------------------------------- Workaround and bug fix for Freescale PowerPC Add workaround for Freescale USB erratum A005275. Correct RCW macros for T1080. ---------------------------------------------------------------- Bin Meng (2): powerpc: t1040: Correct RCW MAC2_GMII_SEL value powerpc: t1040: Correct RCW EC2 settings Chris Packham (1): fsl/usb: Workaround for USB erratum-A005275 arch/powerpc/cpu/mpc85xx/Kconfig | 8 ++++++++ arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 ++++ arch/powerpc/include/asm/immap_85xx.h | 5 ++--- drivers/net/fm/t1040.c | 3 --- drivers/usb/common/fsl-errata.c | 28 ++++++++++++++++++++++++++++ drivers/usb/host/ehci-fsl.c | 7 +++++++ drivers/usb/host/ehci-hcd.c | 12 +++++++++++- drivers/usb/host/ehci.h | 4 ++++ include/fsl_usb.h | 1 + 9 files changed, 65 insertions(+), 7 deletions(-) Thanks. York

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[U-Boot] MTD combine/merge flash bank like linux : MPC83xx / u-boot v2016.03
by asebt69 31 Oct '18

31 Oct '18

Dear, I've got a flash split into 2 bank of 32 Mb. From linux view there is only one flash with a size of 64 Mb (define in the DTS). My goal, do the same thing with u-boot to read a ubi file with a size > 32 Mb which contains my uImage, but mtdparts still to see 2 flash device and i can"t open the ubi file. Linux MTD partitions are : 4 cmdlinepart partitions found on MTD device fc000000.flash Creating 4 MTD partitions on "fc000000.flash": 0x000000000000-0x000000100000 : "Primary" 0x000000100000-0x000000180000 : " uboot" 0x000000180000-0x0000001a0000 : "uboot_var" *0x0000001a0000-0x000004000000* : "rfs" u-boot config : MTD : #define MTDIDS_DEFAULT "nor0=fc000000.flash,nor1=fe000000.flash" #define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:0x100000(Primary)ro,0x080000(uboot )ro,0x020000( uboot_var),-(RFS)" CFI config : #define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE 0xFC000000 #define CONFIG_SYS_FLASH_SIZE 64 #define CONFIG_SYS_FLASH_PROTECTION 1 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE+ ((CONFIG_SYS_FLASH_SIZE*1024*1024)/2)} #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_64MB) #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ u-boot log : mtdparts device nor0 <fc000000.flash>, # parts = 4 #: name size offset mask_flags 0: Primary 0x00100000 0x00000000 1 1: uboot 0x00080000 0x00100000 1 2: uboot_var 0x00020000 0x00180000 0 3: rfs *0x01e60000* 0x001a0000 0 => Expected to have 0x3CC0000 active partition: nor0,0 - ( Primary ) 0x00100000 @ 0x00000000 defaults: mtdids : nor0=fc000000.flash,nor1=fe000000.flash mtdparts: mtdparts=fc000000.flash:0x100000( Primary )ro,0x080000( uboot )ro,0x020000( uboot_var ),-(rfs) Only the CONFIG_SYS_LBLAWAR0_PRELIM is used to realized this feature ? Sébastien.

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[U-Boot] [PATCH] syscon: update syscon_node_to_regmap to use the DM functions
by Patrick Delaunay 31 Oct '18

31 Oct '18

+ Update the function syscon_node_to_regmap() to force bound on syscon uclass and directly use the list of device from DM. + Remove the static list syscon_list. This patch avoid issue (crash) when syscon_node_to_regmap() is called before and after reallocation (list content is invalid). Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- Hi This patch is a modified (after Simon Glass review) and rebased version on v2018.11-rc3 for [U-Boot] syscon: reset node list syscon_list after relocation http://patchwork.ozlabs.org/patch/983139/ This patch correct a crash see on v2018.11-rc1 with my board stm32mp1 for the command "reset", reproduced on v2018.11-rc3. The crash is a side effect of 2 patches 1f6ca3f42f6edf143473159297f4c515b1cf36f6 sysreset: syscon: update regmap access to syscon 23471aed5c33e104d6fa64575932577618543bec board_f: Add reset status printing With the first patch the syscon_node_to_regmap() is called each time that the class sysreset_syscon is probed. => in v2018.09 probe is done only when reset is requested NB: for stm32mp1, the node rcc_reboot in tagged pre-relocated to support reset in pre-reloc phases (allow panic). With the second patch, U-Boot probes all the sysreset uclass in preloc phase to allow to print the reset status, and the list is initialized in board_f / pre-reloc: -> print_resetinfo --> uclass_first_device_err(UCLASS_SYSRESET, &dev); ---> syscon_reboot_probe() ----> syscon_node_to_regmap(node) -----> of_syscon_register() -------> list_add_tail(&syscon->list, &syscon_list); During relocation, the content of syscon_list (static) is updated but the list use pointers allocated by malloc in pre-reloc phasis And when I execute the reset command -> do_reset() --> reset_cpu() ---> sysreset_walk_halt(SYSRESET_COLD); ----> loop on device UCLASS_SYSRESET -----> syscon_reboot_probe() ------> syscon_node_to_regmap(node) -------> list_for_each_entry(entry, &syscon_list, list) I have a crash here because the pointer syscon_list.next is invalid. This patch solves the issue by using DM list for syscon uclass. Tested on my board, the initial issue is solved and I check the behavior with dm_dump_all(): the RCC driver is not binded/probed as syscon uclass by default (checked with dm tree) and correctly bounded and probed when it is necessary (before relocation: print_resetinfo() or after relocation for command reset). Regards Patrick drivers/core/syscon-uclass.c | 55 ++++++++++++++------------------------------ 1 file changed, 17 insertions(+), 38 deletions(-) diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index 303e166..aeb3583 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -123,52 +123,31 @@ U_BOOT_DRIVER(generic_syscon) = { * The syscon node can be bound to another driver, but still works * as a syscon provider. */ -static LIST_HEAD(syscon_list); - -struct syscon { - ofnode node; - struct regmap *regmap; - struct list_head list; -}; - -static struct syscon *of_syscon_register(ofnode node) +struct regmap *syscon_node_to_regmap(ofnode node) { - struct syscon *syscon; + struct udevice *dev, *parent; + ofnode ofnode = node; int ret; + if (!uclass_get_device_by_ofnode(UCLASS_SYSCON, node, &dev)) + return syscon_get_regmap(dev); + if (!ofnode_device_is_compatible(node, "syscon")) return ERR_PTR(-EINVAL); - syscon = malloc(sizeof(*syscon)); - if (!syscon) - return ERR_PTR(-ENOMEM); + if (device_find_global_by_ofnode(ofnode, &parent)) + parent = dm_root(); - ret = regmap_init_mem(node, &syscon->regmap); - if (ret) { - free(syscon); + /* force bound to syscon class */ + ret = device_bind_driver_to_node(parent, "syscon", + ofnode_get_name(node), + node, &dev); + if (ret) return ERR_PTR(ret); - } - - list_add_tail(&syscon->list, &syscon_list); - - return syscon; -} -struct regmap *syscon_node_to_regmap(ofnode node) -{ - struct syscon *entry, *syscon = NULL; - - list_for_each_entry(entry, &syscon_list, list) - if (ofnode_equal(entry->node, node)) { - syscon = entry; - break; - } - - if (!syscon) - syscon = of_syscon_register(node); - - if (IS_ERR(syscon)) - return ERR_CAST(syscon); + ret = device_probe(dev); + if (ret) + return ERR_PTR(ret); - return syscon->regmap; + return syscon_get_regmap(dev); } -- 2.7.4

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[U-Boot] [PATCH 0/3] Read SFDP parameters and access flash above 16MB
by Rajat Srivastava 31 Oct '18

31 Oct '18

Add functionality to read and parse SFDP parameters to auto-detect flash size, page size and address width of flash. This enables flash access above 16MB using 4-byte addressing mode. Add driver support to get SFDP information of flash and use it to access flash above 16MB. Enable reading and parsing of SFDP parameters for Spansion's s25fs512 flash to auto-detect its size, its page size and the addressing mode it supports. Rajat Srivastava (3): mtd/spi: Add JEDEC SFDP support in SPI framework fsl_qspi: Access flash above 16MB using SFDP spi_flash_ids: Enable SFDP parsing for s25fs512 flash drivers/mtd/spi/sf_internal.h | 4 + drivers/mtd/spi/spi_flash.c | 297 +++++++++++++++++++++++++++++++++++++--- drivers/mtd/spi/spi_flash_ids.c | 3 +- drivers/spi/fsl_qspi.c | 103 +++++++++++++- include/spi.h | 2 + include/spi_flash.h | 120 ++++++++++++++++ 6 files changed, 501 insertions(+), 28 deletions(-) -- 2.14.1

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[U-Boot] Question about booting Linux from efi_loader
by Masahiro Yamada 31 Oct '18

31 Oct '18

Hi Alex, Could you teach me a little bit about efi_loader? I guess I am seriously missing something, but how to pass initramdisk address when you use bootefi (like when you use 'booti') ? What I did: > tftpboot 90000000 Image > tftpboot 98000000 uniphier-ld11-global.dtb > bootefi 90000000 98000000 The kernel will start booting, but fail to mount initramdisk, obviously because I am not passing initramdisk. -- Best Regards Masahiro Yamada

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