October 2018 - U-Boot

[U-Boot] [PATCH] armv8: ls1012afrwy: update of env board variables
by Pramod Kumar 02 Nov '18

02 Nov '18

ls1012afrwy and ls1012afrdm both boards are variant of ls1012a based SoC, by default board and board_name uboot env variables are set as ls1012afrdm. whenever board is detected as ls1012afrwy, uboot env variables are updated to ls1012afrwy if it set as other than ls1012afrwy Signed-off-by: Pramod Kumar <pramod.kumar_1(a)nxp.com> --- Changes in v2: - fix subject and commit message board/freescale/ls1012afrdm/ls1012afrdm.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c index 5db1027717..d149d489d5 100644 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c @@ -42,6 +42,7 @@ int checkboard(void) puts("Board: LS1012AFRDM "); #else int rev; + const char *b_name, *board; rev = get_board_version(); @@ -60,6 +61,14 @@ int checkboard(void) puts(": unknown"); break; } + + board = env_get("board"); + if (strncmp(board, "ls1012afrwy", strlen("ls1012afrwy")) != 0) + env_set("board", "ls1012afrwy"); + + b_name = env_get("board_name"); + if (strncmp(b_name, "ls1012afrwy", strlen("ls1012afrwy")) != 0) + env_set("board_name", "ls1012afrwy"); #endif return 0; -- 2.17.1

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[U-Boot] [PATCH 01/13] mmc: tmio: Simplify pinmux handling
by Marek Vasut 02 Nov '18

02 Nov '18

The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400 modes all use 1.8V signaling, while all the legacy modes use 3.3V signaling. While there are extra modes which use 1.2V signaling, the existing hardware does not support those. Simplify the pinmux such that 3.3V signaling implies legacy mode pinmux and the rest implies UHS mode pinmux. This prevents the massive case statement from growing further. Moreover, it fixes an edge case where during SD 1.8V switch, the bus mode is still set to default while the signaling is already set to 1.8V, which results in an attempt to communicate with a 1.8V card using pins in 3.3V mode and thus communication failure. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mmc/tmio-common.c | 22 +++------------------- 1 file changed, 3 insertions(+), 19 deletions(-) diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index 138de59470..5f927c6150 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -622,26 +622,10 @@ static void tmio_sd_set_pins(struct udevice *dev) #endif #ifdef CONFIG_PINCTRL - switch (mmc->selected_mode) { - case MMC_LEGACY: - case SD_LEGACY: - case MMC_HS: - case SD_HS: - case MMC_HS_52: - case MMC_DDR_52: - pinctrl_select_state(dev, "default"); - break; - case UHS_SDR12: - case UHS_SDR25: - case UHS_SDR50: - case UHS_DDR50: - case UHS_SDR104: - case MMC_HS_200: + if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) pinctrl_select_state(dev, "state_uhs"); - break; - default: - break; - } + else + pinctrl_select_state(dev, "default"); #endif } -- 2.18.0

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[U-Boot] [PATCH] drivers: serial: probe all serial devices
by Vabhav Sharma 02 Nov '18

02 Nov '18

Serial subsystem search and probe only one first serial device and unable to use remaining available UART devices This patch changes the logic to probe all available serial devices using platform data or device tree in DM model in order to use all UART devices Signed-off-by: Vabhav Sharma <vabhav.sharma(a)nxp.com> --- drivers/serial/Kconfig | 12 ++++++++++++ drivers/serial/serial-uclass.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 597db4b..d6451b1 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -133,6 +133,18 @@ config SERIAL_SEARCH_ALL If unsure, say N. +config SERIAL_PROBE_ALL + bool "Probe all available serial devices" + depends on DM_SERIAL + help + The serial subsystem only probe for single serial device, but does + not probe for remaining available devices. + With this option set,we make probing for all available devices + mandatory. + + If probing is not required for all remaining available + devices other than default current console device, say N. + config SPL_DM_SERIAL bool "Enable Driver Model for serial drivers in SPL" depends on DM_SERIAL && SPL_DM diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index e50f0aa..405e60e 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -82,6 +82,13 @@ static void serial_find_console_or_panic(void) uclass_first_device(UCLASS_SERIAL, &dev); if (dev) { gd->cur_serial_dev = dev; +#ifdef CONFIG_SERIAL_PROBE_ALL + /* Scanning uclass to probe all devices */ + for (; + dev; + uclass_next_device(&dev)) + ; +#endif return; } } else if (CONFIG_IS_ENABLED(OF_CONTROL) && blob) { @@ -92,11 +99,25 @@ static void serial_find_console_or_panic(void) if (np && !uclass_get_device_by_ofnode(UCLASS_SERIAL, np_to_ofnode(np), &dev)) { gd->cur_serial_dev = dev; +#ifdef CONFIG_SERIAL_PROBE_ALL + /* Scanning uclass to probe all devices */ + for (; + dev; + uclass_next_device(&dev)) + ; +#endif return; } } else { if (!serial_check_stdout(blob, &dev)) { gd->cur_serial_dev = dev; +#ifdef CONFIG_SERIAL_PROBE_ALL + /* Scanning uclass to probe all devices */ + for (; + dev; + uclass_next_device(&dev)) + ; +#endif return; } } @@ -121,6 +142,13 @@ static void serial_find_console_or_panic(void) !uclass_get_device(UCLASS_SERIAL, INDEX, &dev)) { if (dev->flags & DM_FLAG_ACTIVATED) { gd->cur_serial_dev = dev; +#ifdef CONFIG_SERIAL_PROBE_ALL + /* Scanning uclass to probe all devices */ + for (; + dev; + uclass_next_device(&dev)) + ; +#endif return; } } @@ -132,6 +160,13 @@ static void serial_find_console_or_panic(void) if (!ret) { /* Device did succeed probing */ gd->cur_serial_dev = dev; +#ifdef CONFIG_SERIAL_PROBE_ALL + /* Scanning uclass to probe all devices */ + for (; + dev; + uclass_next_device(&dev)) + ; +#endif return; } } @@ -140,6 +175,13 @@ static void serial_find_console_or_panic(void) !uclass_get_device(UCLASS_SERIAL, INDEX, &dev) || (!uclass_first_device(UCLASS_SERIAL, &dev) && dev)) { gd->cur_serial_dev = dev; +#ifdef CONFIG_SERIAL_PROBE_ALL + /* Scanning uclass to probe all devices */ + for (; + dev; + uclass_next_device(&dev)) + ; +#endif return; } #endif -- 2.7.4

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[U-Boot] [PATCH v3 00/10] arm: am654: Add r5 support for am654-evm
by Lokesh Vutla 02 Nov '18

02 Nov '18

This series adds r5 build support for booting am654 evm. There is still 1 step(loading system firmware) missing to complete the full boot. This will be posted as a separate series. Series depends on the following 2 pathces: - https://patchwork.ozlabs.org/patch/985201/ - https://patchwork.ozlabs.org/patch/988704/ Changes since v2: - Enabled CONFIG_SPL_DM_REGULATOR_GPIO in PATCH 9 - Remove the quotes in string CONFIG_SYS_K3_KEY when using - Add dependency on $(KEY) for generating u-boot-spl-cert.bin Changes since v1: - Fixed SPDX headers in patch 1/10 - Updated Linux tag from which dts got synced. - Updated Reviewed-by tags Lokesh Vutla (10): ram: Introduce K3 AM654 DDR Sub System driver armv7R: K3: am654: Enable MPU regions armv7R: K3: am654: Add support for generating build targets armv7R: K3: am654: Add support to start ATF from R5 SPL armv7R: K3: am654: Add support for triggering ddr init from SPL board: ti: am654: r5: Add initial support for am654 arm: dts: k3: Sync dts from Linux armv7r: dts: am654: Add initial support configs: am65x_evm_r5: Add initial support board: ti: am65x: Update README to add R5 build support arch/arm/dts/Makefile | 2 +- arch/arm/dts/k3-am65-main.dtsi | 51 +- arch/arm/dts/k3-am65-mcu.dtsi | 18 + arch/arm/dts/k3-am65-wakeup.dtsi | 46 + arch/arm/dts/k3-am65.dtsi | 54 +- .../dts/k3-am654-base-board-ddr4-1333MHz.dtsi | 195 +++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 94 +- arch/arm/dts/k3-am654-ddr.dtsi | 241 ++++ arch/arm/dts/k3-am654-r5-base-board.dts | 139 ++ arch/arm/mach-k3/Kconfig | 18 + arch/arm/mach-k3/Makefile | 2 + arch/arm/mach-k3/am6_init.c | 18 + arch/arm/mach-k3/common.c | 52 + arch/arm/mach-k3/common.h | 11 + arch/arm/mach-k3/config.mk | 59 + arch/arm/mach-k3/include/mach/sys_proto.h | 14 + arch/arm/mach-k3/r5_mpu.c | 47 + board/ti/am65x/Kconfig | 24 + board/ti/am65x/MAINTAINERS | 1 + board/ti/am65x/README | 114 +- configs/am65x_evm_r5_defconfig | 87 ++ .../ram/k3-am654-ddrss.txt | 46 + drivers/ram/Kconfig | 11 + drivers/ram/Makefile | 2 + drivers/ram/k3-am654-ddrss.c | 776 +++++++++++ drivers/ram/k3-am654-ddrss.h | 1227 +++++++++++++++++ include/configs/am65x_evm.h | 6 + include/configs/ti_armv7_common.h | 2 + tools/k3_x509template.txt | 48 + 29 files changed, 3290 insertions(+), 115 deletions(-) create mode 100644 arch/arm/dts/k3-am65-mcu.dtsi create mode 100644 arch/arm/dts/k3-am65-wakeup.dtsi create mode 100644 arch/arm/dts/k3-am654-base-board-ddr4-1333MHz.dtsi create mode 100644 arch/arm/dts/k3-am654-ddr.dtsi create mode 100644 arch/arm/dts/k3-am654-r5-base-board.dts create mode 100644 arch/arm/mach-k3/common.c create mode 100644 arch/arm/mach-k3/common.h create mode 100644 arch/arm/mach-k3/include/mach/sys_proto.h create mode 100644 arch/arm/mach-k3/r5_mpu.c create mode 100644 configs/am65x_evm_r5_defconfig create mode 100644 doc/device-tree-bindings/ram/k3-am654-ddrss.txt create mode 100644 drivers/ram/k3-am654-ddrss.c create mode 100644 drivers/ram/k3-am654-ddrss.h create mode 100644 tools/k3_x509template.txt -- 2.19.1

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[U-Boot] [PULL] u-boot-socfpga/master
by Marek Vasut 01 Nov '18

01 Nov '18

The following changes since commit 454cf76184c65426b68033a23da086e73663f2fc: Prepare v2018.11-rc3 (2018-10-29 16:04:26 -0400) are available in the Git repository at: git://git.denx.de/u-boot-socfpga.git master for you to fetch changes up to f48db4ede07b52290477e188de714e327e4954de: arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION (2018-10-31 01:41:10 +0100) ---------------------------------------------------------------- Simon Goldschmidt (2): arm: socfpga: fpga: fix type of local variable arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION Stefan Roese (1): arm: socfpga: Fix bootcounter located at the end of internal SRAM arch/arm/Kconfig | 2 +- drivers/fpga/socfpga_arria10.c | 2 +- drivers/fpga/socfpga_gen5.c | 2 +- include/configs/socfpga_common.h | 13 +++++++++++++ 4 files changed, 16 insertions(+), 3 deletions(-)

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[U-Boot] [PATCH] ARM: dts: rmobile: Enable SDR modes on E3 Ebisu
by Marek Vasut 31 Oct '18

31 Oct '18

Add regulators and pinmuxes for SDHI0 and SDHI1 SD and microSD slots on E3 Ebisu and mark them as capable of up to SDR104 mode of operation. With the SDHI fixes in place, it is now possible to use SDR104. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- arch/arm/dts/r8a77990-ebisu.dts | 101 ++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts index f9ccccf949..6fcf0013b9 100644 --- a/arch/arm/dts/r8a77990-ebisu.dts +++ b/arch/arm/dts/r8a77990-ebisu.dts @@ -46,6 +46,54 @@ regulator-boot-on; regulator-always-on; }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi1: regulator-vcc-sdhi1 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI1 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi1: regulator-vccq-sdhi1 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI1 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &avb { @@ -94,6 +142,30 @@ function = "scif_clk"; }; + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; + + sdhi1_pins: sd1 { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <3300>; + }; + + sdhi1_pins_uhs: sd1_uhs { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <1800>; + }; + sdhi3_pins: sd2 { groups = "sdhi3_data8", "sdhi3_ctrl"; function = "sdhi3"; @@ -120,11 +192,40 @@ }; &sdhi0 { + /* full size SD */ + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; + max-frequency = <208000000>; }; &sdhi1 { + /* microSD */ + pinctrl-0 = <&sdhi1_pins>; + pinctrl-1 = <&sdhi1_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi1>; + vqmmc-supply = <&vccq_sdhi1>; + cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; + bus-width = <4>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; + max-frequency = <208000000>; }; &sdhi3 { -- 2.18.0

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[U-Boot] [PATCH] pinctrl: renesas: Add POCCTRL handling to r8a77990
by Marek Vasut 31 Oct '18

31 Oct '18

Add definition of the POCCTRL register and bits therein to R8A77990 E3 pincontrol driver. This allows the pincontrol driver to configure SDHI pin voltage according to power-source DT property. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/pinctrl/renesas/pfc-r8a77990.c | 34 ++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c index a99fd770f2..78bf3193d5 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77990.c +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -26,12 +26,12 @@ PORT_GP_18(0, fn, sfx), \ PORT_GP_23(1, fn, sfx), \ PORT_GP_26(2, fn, sfx), \ - PORT_GP_12(3, fn, sfx), \ + PORT_GP_CFG_12(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_1(3, 12, fn, sfx), \ PORT_GP_1(3, 13, fn, sfx), \ PORT_GP_1(3, 14, fn, sfx), \ PORT_GP_1(3, 15, fn, sfx), \ - PORT_GP_11(4, fn, sfx), \ + PORT_GP_CFG_11(4, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_20(5, fn, sfx), \ PORT_GP_18(6, fn, sfx) /* @@ -5151,8 +5151,37 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; +enum ioctrl_regs { + POCCTRL, +}; + +static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { + [POCCTRL] = { 0xe6060380, }, + { /* sentinel */ }, +}; + +static int r8a77990_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) +{ + int bit = -EINVAL; + + *pocctrl = pinmux_ioctrl_regs[POCCTRL].reg; + + if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11)) + bit = pin & 0x1f; + + if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 10)) + bit = (pin & 0x1f) + 19; + + return bit; +} + +static const struct sh_pfc_soc_operations r8a77990_pinmux_ops = { + .pin_to_pocctrl = r8a77990_pin_to_pocctrl, +}; + const struct sh_pfc_soc_info r8a77990_pinmux_info = { .name = "r8a77990_pfc", + .ops = &r8a77990_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, @@ -5165,6 +5194,7 @@ const struct sh_pfc_soc_info r8a77990_pinmux_info = { .nr_functions = ARRAY_SIZE(pinmux_functions), .cfg_regs = pinmux_config_regs, + .ioctrl_regs = pinmux_ioctrl_regs, .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), -- 2.18.0

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[U-Boot] [PATCH v2 1/1] dm: video: correctly set the cursor position
by Heinrich Schuchardt 31 Oct '18

31 Oct '18

The terminal escape sequence ESC [ <x> ; <y> H is used to set the cursor position. According to the ECMA 48 standard the upper left corner in the escape sequences is [1, 1]. The video uclass uses [0, 0] as upper left corner. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- v2 remove trailing whitespace --- drivers/video/vidconsole-uclass.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index 1874887f2f3..5564cfe9930 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -271,6 +271,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch) s = parsenum(s, &row); s++; /* ; */ s = parsenum(s, &col); + + /* + * Video origin is [0, 0], terminal origin is [1, 1]. + */ + if (row) + --row; + if (col) + --col; set_cursor_position(priv, row, col); -- 2.19.1

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[U-Boot] [PATCH 0/7] driver: net: ti: clean up and code optimization
by Grygorii Strashko 31 Oct '18

31 Oct '18

This series contains set of code clean up and optimizations for TI networking drivers. Patch 1 - Adds drivers/net/ti/ folder and moves all TI's networking code in this folder. Patches 2,3 - keystone2 clean up Patch 5 - introduces common TI MDIO support library as existing TI SoCs network HW IPs have similar MDIO implementation. Patches 6-7 - conversation of TI CPSW and keystone_net drivers to use common TI MDIO support library tested dhcp and kernel boot on: - k2e/g/hk/l evms - am437x-gpevm and AM5748 IDK TODO: TODO: As per code and documentation davinci_emac.c seems also can be re-worked to use common TI MDIO support library and network PHYs framework. Unfortunately, I have no HW to work with. Grygorii Strashko (7): driver: net: consolidate ti's code in separate folder configs: net: convert DRIVER_TI_KEYSTONE_NET kconfig drivers: net: keystone_net: drop non dm code driver: net: ti: cpsw: update to use SPDX identifier driver: net: ti: introduce common mdio support library driver: net: ti: cpsw: switch to use common mdio lib driver: net: ti: keystone_net: switch to use common mdio lib arch/arm/include/asm/ti-common/keystone_net.h | 27 -- arch/arm/mach-davinci/dp83848.c | 2 +- arch/arm/mach-davinci/et1011c.c | 2 +- arch/arm/mach-davinci/ksz8873.c | 2 +- arch/arm/mach-davinci/lxt972.c | 2 +- board/ti/ks2_evm/board.c | 53 ---- board/ti/ks2_evm/board.h | 3 - board/ti/ks2_evm/board_k2e.c | 74 ----- board/ti/ks2_evm/board_k2g.c | 18 -- board/ti/ks2_evm/board_k2hk.c | 42 --- board/ti/ks2_evm/board_k2l.c | 42 --- configs/k2e_evm_defconfig | 1 + configs/k2e_hs_evm_defconfig | 1 + configs/k2g_evm_defconfig | 1 + configs/k2g_hs_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2hk_hs_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + configs/k2l_hs_evm_defconfig | 1 + drivers/net/Kconfig | 13 +- drivers/net/Makefile | 4 +- drivers/net/ti/Kconfig | 20 ++ drivers/net/ti/Makefile | 7 + drivers/net/{ => ti}/cpsw-common.c | 0 drivers/net/{ => ti}/cpsw.c | 146 +--------- drivers/net/ti/cpsw_mdio.c | 205 +++++++++++++ drivers/net/ti/cpsw_mdio.h | 18 ++ drivers/net/{ => ti}/davinci_emac.c | 0 drivers/net/{ => ti}/davinci_emac.h | 0 drivers/net/{ => ti}/keystone_net.c | 401 +------------------------- include/configs/ti_armv7_keystone2.h | 1 - 31 files changed, 288 insertions(+), 802 deletions(-) create mode 100644 drivers/net/ti/Kconfig create mode 100644 drivers/net/ti/Makefile rename drivers/net/{ => ti}/cpsw-common.c (100%) rename drivers/net/{ => ti}/cpsw.c (90%) create mode 100644 drivers/net/ti/cpsw_mdio.c create mode 100644 drivers/net/ti/cpsw_mdio.h rename drivers/net/{ => ti}/davinci_emac.c (100%) rename drivers/net/{ => ti}/davinci_emac.h (100%) rename drivers/net/{ => ti}/keystone_net.c (68%) -- 2.10.5

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[U-Boot] [PATCH] ARM: dts: rmobile: Enable SDR104 on Salvator-X and ULCB
by Marek Vasut 31 Oct '18

31 Oct '18

Enable SDR104 modes on M3W and H3 boards. With the SDHI fixes in place, it is now possible to use SDR104. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- arch/arm/dts/salvator-common.dtsi | 10 ++++++++++ arch/arm/dts/ulcb.dtsi | 5 +++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi index 826a02c333..d2d667bb01 100644 --- a/arch/arm/dts/salvator-common.dtsi +++ b/arch/arm/dts/salvator-common.dtsi @@ -623,8 +623,13 @@ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; bus-width = <4>; + sd-uhs-sdr12; + sd-uhs-sdr25; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; + + max-frequency = <208000000>; }; &sdhi2 { @@ -640,6 +645,7 @@ non-removable; fixed-emmc-driver-type = <1>; status = "okay"; + max-frequency = <200000000>; }; &sdhi3 { @@ -652,8 +658,12 @@ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; bus-width = <4>; + sd-uhs-sdr12; + sd-uhs-sdr25; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; + max-frequency = <208000000>; }; &ssi1 { diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi index b61e2656d5..44dd84179f 100644 --- a/arch/arm/dts/ulcb.dtsi +++ b/arch/arm/dts/ulcb.dtsi @@ -401,8 +401,12 @@ vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; bus-width = <4>; + sd-uhs-sdr12; + sd-uhs-sdr25; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; + max-frequency = <208000000>; }; &sdhi2 { @@ -417,6 +421,7 @@ mmc-hs200-1_8v; non-removable; status = "okay"; + max-frequency = <200000000>; }; &ssi1 { -- 2.18.0

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