September 2017 - U-Boot

[U-Boot] [GIT PULL] u-boot-sunxi/master
by Maxime Ripard 27 Sep '17

27 Sep '17

Hi Tom, Here is a pull request for the sunxi related changes for the next U-Boot version. The diffstat is a bit scary, but mostly because of the Kconfig migration of the USB ethernet related options, which were enabled by a big number of boards. The fastboot options simplification is also one of the offenders. This is my first pull request ever, so I might have done something wrong, let me know if it's the case. Thanks! Maxime The following changes since commit 9241265f29f3670e380a9859a343ddc14873c46f: Merge git://www.denx.de/git/u-boot-cfi-flash (2017-09-26 19:38:04 -0400) are available in the git repository at: git://git.denx.de/u-boot-sunxi master for you to fetch changes up to ab922c5e83e9ed780aeaef9dd9da0224f9356245: sunxi: Enable EMAC on the Bananapi M3 (2017-09-27 12:17:05 +0200) ---------------------------------------------------------------- Chen-Yu Tsai (4): sunxi: rename Bananapi M3 dts file name sunxi: Enable eMMC on Cubietruck Plus sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3 Icenowy Zheng (1): sunxi: defaultly enable SPL for Lichee Pi Zero Jagan Teki (1): sun7i: a20: Add Bananapi M1 Plus support Maxime Ripard (21): usb: gadget: Move USBNET_DEVADDR option out of g_dnl usb: gadget: Document USBNET_DEVADDR usb: gadget: Move USBNET_HOST_ADDR to Kconfig usb: gadget: Convert USB_ETHER to Kconfig usb: gadget: usb_ether: Move the interfaces to Kconfig usb: gadget: Make g_dnl USB settings common usb: gadget: usb_ether: Move settings to common sunxi: provide default USB gadget setup sunxi: imply USB_GADGET cmd: fastboot: Rework fastboot dependency musb: sunxi: switch to the device model sunxi: Register usb_ether sunxi: Imply USB_ETHER sunxi: sina33: Sync the device tree with the kernel cmd: Move CONFIG_RANDOM_UUID to Kconfig sunxi: Enable CMD_GPT by default arm: sunxi: Move spl_boot_device in a separate function sunxi: Use sunxi_get_boot_device sunxi: Remove the MMC index hack sunxi: Fix USB_GADGET implication sunxi: usb_phy: invert the USB phy_ctl condition Stefan Mavrodiev (1): sunxi: Add support for A20-OLinuXino-MICRO-eMMC arch/arm/Kconfig | 5 +- arch/arm/dts/Makefile | 4 +- arch/arm/dts/axp223.dtsi | 58 +++ arch/arm/dts/axp22x.dtsi | 10 + arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 91 +++- arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts | 70 +++ arch/arm/dts/sun8i-a23-a33.dtsi | 446 +++++++++---------- arch/arm/dts/sun8i-a33-sinlinx-sina33.dts | 43 ++ arch/arm/dts/sun8i-a33.dtsi | 477 +++++++++++++++++---- arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi | 41 ++ ...ovoip-bpi-m3.dts => sun8i-a83t-bananapi-m3.dts} | 0 .../arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi | 39 ++ arch/arm/include/asm/arch-sunxi/spl.h | 2 + arch/arm/include/asm/arch-sunxi/usb_phy.h | 7 - arch/arm/mach-sunxi/board.c | 11 +- arch/arm/mach-sunxi/usb_phy.c | 14 +- board/samsung/common/gadget.c | 4 +- board/siemens/common/factoryset.c | 4 +- board/sunxi/MAINTAINERS | 5 + board/sunxi/board.c | 29 +- cmd/Kconfig | 7 + cmd/fastboot/Kconfig | 6 + configs/A13-OLinuXino_defconfig | 5 - configs/A20-OLinuXino-Lime2-eMMC_defconfig | 6 - configs/A20-OLinuXino-Lime2_defconfig | 5 - configs/A20-OLinuXino_MICRO-eMMC_defconfig | 27 ++ configs/CHIP_defconfig | 5 - configs/CHIP_pro_defconfig | 5 - configs/Cubietruck_defconfig | 5 - configs/Cubietruck_plus_defconfig | 2 + configs/LicheePi_Zero_defconfig | 4 + configs/Nintendo_NES_Classic_Edition_defconfig | 5 - configs/Sinlinx_SinA33_defconfig | 6 - configs/Sinovoip_BPI_M3_defconfig | 3 +- configs/am335x_baltos_defconfig | 8 +- configs/am335x_boneblack_defconfig | 10 +- configs/am335x_boneblack_vboot_defconfig | 9 +- configs/am335x_evm_defconfig | 9 +- configs/am335x_evm_nor_defconfig | 9 +- configs/am335x_evm_norboot_defconfig | 10 +- configs/am335x_evm_spiboot_defconfig | 9 +- configs/am335x_evm_usbspl_defconfig | 9 +- configs/am335x_hs_evm_defconfig | 7 +- configs/am43xx_evm_defconfig | 6 +- configs/am43xx_evm_ethboot_defconfig | 6 +- configs/am43xx_evm_qspiboot_defconfig | 6 +- configs/am43xx_evm_usbhost_boot_defconfig | 6 +- configs/am43xx_hs_evm_defconfig | 6 +- configs/am57xx_evm_defconfig | 8 +- configs/am57xx_evm_nodt_defconfig | 9 +- configs/am57xx_hs_evm_defconfig | 8 +- configs/apalis-tk1_defconfig | 6 +- configs/apalis_imx6_defconfig | 6 +- configs/apalis_imx6_nospl_com_defconfig | 6 +- configs/apalis_imx6_nospl_it_defconfig | 6 +- configs/apalis_t30_defconfig | 6 +- configs/bananapi_m1_plus_defconfig | 24 ++ configs/bcm11130_defconfig | 6 +- configs/bcm11130_nand_defconfig | 6 +- configs/bcm23550_w1d_defconfig | 9 +- configs/bcm28155_ap_defconfig | 9 +- configs/bcm28155_w1d_defconfig | 6 +- configs/beaver_defconfig | 6 +- configs/birdland_bav335a_defconfig | 9 +- configs/birdland_bav335b_defconfig | 9 +- configs/cei-tk1-som_defconfig | 6 +- configs/cgtqmx6eval_defconfig | 9 +- configs/chromebit_mickey_defconfig | 7 +- configs/chromebook_jerry_defconfig | 7 +- configs/chromebook_minnie_defconfig | 7 +- configs/colibri_imx6_defconfig | 6 +- configs/colibri_imx6_nospl_defconfig | 6 +- configs/colibri_imx7_defconfig | 6 +- configs/colibri_t20_defconfig | 6 +- configs/colibri_t30_defconfig | 6 +- configs/colibri_vf_defconfig | 6 +- configs/corvus_defconfig | 6 +- configs/dalmore_defconfig | 6 +- configs/dms-ba16-1g_defconfig | 6 +- configs/dms-ba16_defconfig | 6 +- configs/dra7xx_evm_defconfig | 8 +- configs/dra7xx_hs_evm_defconfig | 8 +- configs/draco_defconfig | 7 +- configs/e2220-1170_defconfig | 6 +- configs/edison_defconfig | 6 +- configs/etamin_defconfig | 7 +- configs/evb-rk3036_defconfig | 7 +- configs/evb-rk3229_defconfig | 7 +- configs/evb-rk3288_defconfig | 7 +- configs/evb-rk3328_defconfig | 6 +- configs/evb-rv1108_defconfig | 1 + configs/fennec-rk3288_defconfig | 7 +- configs/firefly-rk3288_defconfig | 7 +- configs/gwventana_emmc_defconfig | 8 +- configs/gwventana_gw5904_defconfig | 8 +- configs/gwventana_nand_defconfig | 8 +- configs/jetson-tk1_defconfig | 6 +- configs/kc1_defconfig | 9 +- configs/kylin-rk3036_defconfig | 7 +- configs/ma5d4evk_defconfig | 7 +- configs/miqi-rk3288_defconfig | 7 +- configs/mx6qsabrelite_defconfig | 11 +- configs/mx6sabreauto_defconfig | 6 +- configs/mx6sabresd_defconfig | 6 +- configs/mx7dsabresd_defconfig | 6 +- configs/mx7dsabresd_secure_defconfig | 6 +- configs/nitrogen6dl2g_defconfig | 11 +- configs/nitrogen6dl_defconfig | 11 +- configs/nitrogen6q2g_defconfig | 11 +- configs/nitrogen6q_defconfig | 11 +- configs/nitrogen6s1g_defconfig | 11 +- configs/nitrogen6s_defconfig | 11 +- configs/novena_defconfig | 2 + configs/nyan-big_defconfig | 6 +- configs/odroid-xu3_defconfig | 6 +- configs/odroid_defconfig | 6 +- configs/omap3_beagle_defconfig | 10 +- configs/omap3_evm_defconfig | 7 +- configs/omap3_logic_defconfig | 9 +- configs/omap5_uevm_defconfig | 6 +- configs/opos6uldev_defconfig | 6 +- configs/origen_defconfig | 6 +- configs/p2371-0000_defconfig | 6 +- configs/p2371-2180_defconfig | 6 +- configs/p2571_defconfig | 6 +- configs/parrot_r16_defconfig | 6 - configs/pcm051_rev1_defconfig | 1 + configs/pcm051_rev3_defconfig | 1 + configs/phycore-rk3288_defconfig | 7 +- configs/pico-imx6ul_defconfig | 6 +- configs/pico-imx7d_defconfig | 6 +- configs/popmetal-rk3288_defconfig | 7 +- configs/pxm2_defconfig | 8 +- configs/rastaban_defconfig | 8 +- configs/rock2_defconfig | 7 +- configs/rock_defconfig | 1 + configs/rut_defconfig | 7 +- configs/s5p_goni_defconfig | 6 +- configs/s5pc210_universal_defconfig | 6 +- configs/sama5d2_ptc_nandflash_defconfig | 2 + configs/sama5d2_ptc_spiflash_defconfig | 2 + configs/sansa_fuze_plus_defconfig | 2 + configs/smartweb_defconfig | 6 +- configs/sniper_defconfig | 9 +- configs/socfpga_arria5_defconfig | 6 +- configs/socfpga_cyclone5_defconfig | 6 +- configs/socfpga_de0_nano_soc_defconfig | 6 +- configs/socfpga_de10_nano_defconfig | 6 +- configs/socfpga_mcvevk_defconfig | 6 +- configs/socfpga_sockit_defconfig | 6 +- configs/socfpga_socrates_defconfig | 6 +- configs/socfpga_vining_fpga_defconfig | 6 +- configs/taurus_defconfig | 6 +- configs/tbs2910_defconfig | 6 +- configs/thuban_defconfig | 7 +- configs/tinker-rk3288_defconfig | 7 +- configs/topic_miami_defconfig | 6 +- configs/topic_miamilite_defconfig | 6 +- configs/topic_miamiplus_defconfig | 6 +- configs/trats2_defconfig | 6 +- configs/trats_defconfig | 6 +- configs/venice2_defconfig | 6 +- configs/vinco_defconfig | 2 + configs/warp7_defconfig | 9 +- configs/warp7_secure_defconfig | 9 +- configs/warp_defconfig | 6 +- configs/xfi3_defconfig | 2 + configs/xilinx_zynqmp_ep_defconfig | 6 +- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 6 +- configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 6 +- configs/xilinx_zynqmp_zcu102_revA_defconfig | 6 +- configs/xilinx_zynqmp_zcu102_revB_defconfig | 6 +- configs/zynq_microzed_defconfig | 6 +- configs/zynq_picozed_defconfig | 6 +- configs/zynq_z_turn_defconfig | 6 +- configs/zynq_zc702_defconfig | 6 +- configs/zynq_zc706_defconfig | 6 +- configs/zynq_zed_defconfig | 6 +- configs/zynq_zybo_defconfig | 6 +- doc/README.android-fastboot | 8 +- drivers/usb/gadget/Kconfig | 78 +++- drivers/usb/gadget/ether.c | 16 +- drivers/usb/gadget/g_dnl.c | 12 +- drivers/usb/musb-new/sunxi.c | 56 ++- include/configs/am335x_evm.h | 6 - include/configs/am3517_evm.h | 5 - include/configs/am43xx_evm.h | 6 +- include/configs/am57xx_evm.h | 1 - include/configs/baltos.h | 6 - include/configs/dra7xx_evm.h | 1 - include/configs/edison.h | 1 - include/configs/gw_ventana.h | 2 - include/configs/h2200.h | 2 - include/configs/ma5d4evk.h | 3 - include/configs/nitrogen6x.h | 2 - include/configs/novena.h | 2 - include/configs/odroid.h | 1 - include/configs/odroid_xu3.h | 2 +- include/configs/omap3_beagle.h | 1 - include/configs/omap3_evm.h | 1 - include/configs/omap3_logic.h | 1 - include/configs/pcm051.h | 5 - include/configs/rockchip-common.h | 2 - include/configs/sama5d2_ptc.h | 3 - include/configs/sansa_fuze_plus.h | 2 - include/configs/siemens-am33x-common.h | 6 - include/configs/sunxi-common.h | 30 +- include/configs/tao3530.h | 2 - include/configs/trats.h | 1 - include/configs/trats2.h | 1 - include/configs/vinco.h | 4 - include/configs/warp7.h | 4 - include/configs/xfi3.h | 2 - include/configs/xilinx_zynqmp.h | 1 - include/dt-bindings/clock/sun8i-a23-a33-ccu.h | 127 ++++++ include/dt-bindings/reset/sun8i-a23-a33-ccu.h | 87 ++++ scripts/config_whitelist.txt | 6 - 217 files changed, 1860 insertions(+), 1067 deletions(-) create mode 100644 arch/arm/dts/axp223.dtsi create mode 100644 arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts create mode 100644 arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi rename arch/arm/dts/{sun8i-a83t-sinovoip-bpi-m3.dts => sun8i-a83t-bananapi-m3.dts} (100%) create mode 100644 arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi create mode 100644 configs/A20-OLinuXino_MICRO-eMMC_defconfig create mode 100644 configs/bananapi_m1_plus_defconfig create mode 100644 include/dt-bindings/clock/sun8i-a23-a33-ccu.h create mode 100644 include/dt-bindings/reset/sun8i-a23-a33-ccu.h -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com

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[U-Boot] ClearFog base USB keyboard
by Влад Мао 27 Sep '17

27 Sep '17

I have a ClearfogBase board with armada A388 processor (6828), and trying to setup USB keyboard in U-boot. SOM have 3 USB controllers, described in armada-38x.dtsi: usb@58000 { compatible = "marvell,orion-ehci"; reg = <0x58000 0x500>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gateclk 18>; status = "disabled"; }; usb3@f0000 { compatible = "marvell,armada-380-xhci"; reg = <0xf0000 0x4000>,<0xf4000 0x4000>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gateclk 9>; status = "disabled"; }; usb3@f8000 { compatible = "marvell,armada-380-xhci"; reg = <0xf8000 0x4000>,<0xfc000 0x4000>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gateclk 10>; status = "disabled"; }; in armada-388-clearfog.dts: usb@58000 { status = "okay"; }; usb3@f0000 { status = "okay"; }; usb3@f8000 { status = "okay"; }; In U-Boot menuconfig i enabled: CONFIG_CMD_USB=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_HOST=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_MVEBU=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_MARVELL=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y When i load the U-boot, and type usb start, i see only USB Hub on usb@58000, which have no connector on board. I tried find out what's wrong and why my keyboard does not work, load linux and find out - USB connector on board (U2) works with usb3@f8000 (i commented out status = "disabled" usb@58000 and usb3@f0000, and in linux keyboard still works), dmesg from linux system: [ 3.163750] usbcore: registered new interface driver asix [ 3.169178] usbcore: registered new interface driver ax88179_178a [ 3.175314] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 3.181871] ehci-pci: EHCI PCI platform driver [ 3.186343] ehci-orion: EHCI orion driver [ 3.190584] xhci-hcd f10f8000.usb3: xHCI Host Controller [ 3.195924] xhci-hcd f10f8000.usb3: new USB bus registered, assigned bus number 1 [ 3.203492] xhci-hcd f10f8000.usb3: hcc params 0x0a000990 hci version 0x100 quirks 0x00010010 [ 3.212063] xhci-hcd f10f8000.usb3: irq 48, io mem 0xf10f8000 [ 3.218169] hub 1-0:1.0: USB hub found [ 3.221991] hub 1-0:1.0: 1 port detected [ 3.226072] xhci-hcd f10f8000.usb3: xHCI Host Controller [ 3.231399] xhci-hcd f10f8000.usb3: new USB bus registered, assigned bus number 2 [ 3.238978] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 3.247420] hub 2-0:1.0: USB hub found [ 3.251190] hub 2-0:1.0: 1 port detected [ 3.255350] usbcore: registered new interface driver usb-storage In linux with this settings keyboard work perfectry, but in U-boot i see: => usb start starting USB... scan end No controllers found How to fix it and get the keyboard working in U-boot?

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[U-Boot] [PATCH v4 0/2] rockchip: rk3229: add sdram and sd support
by Kever Yang 27 Sep '17

27 Sep '17

Add sdram driver for rk3229 and other fix like pinctrl and sd node. Changes in v4: - rebase on u-boot-rockchip master with patchset "move rockchip sdram driver to driver/ram" Changes in v3: - move rk332x sdram driver to driver/ram - do the ram init in TPL instad of SPL Kever Yang (2): rockchip: rk322x: add sdram driver rockchip: dts: rk3229: remove dram channel info arch/arm/dts/rk3229-evb.dts | 1 - arch/arm/include/asm/arch-rockchip/sdram_rk322x.h | 581 +++++++++++++++ drivers/ram/rockchip/Makefile | 1 + drivers/ram/rockchip/sdram_rk322x.c | 855 ++++++++++++++++++++++ 4 files changed, 1437 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk322x.h create mode 100644 drivers/ram/rockchip/sdram_rk322x.c -- 1.9.1

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[U-Boot] [PATCH v2 0/4] move rockchip sdram driver to driver/ram
by Kever Yang 27 Sep '17

27 Sep '17

move all the Rockchip sdram driver which support CONFIG_RAM into driver/ram folder Series 2 is a rebase based on u-boot-rockchip master branch. Kever Yang (4): rockchip: rk3399: move sdram driver to driver/ram rockchip: rk3188: move sdram driver to driver/ram rockchip: rk3288: move sdram driver to driver/ram rockchip: rk3328: move sdram driver to driver/ram arch/arm/mach-rockchip/rk3188/Makefile | 1 - arch/arm/mach-rockchip/rk3288/Makefile | 1 - arch/arm/mach-rockchip/rk3328/Makefile | 1 - arch/arm/mach-rockchip/rk3399/Makefile | 1 - drivers/ram/rockchip/Makefile | 4 ++++ .../arm/mach-rockchip/rk3188 => drivers/ram/rockchip}/sdram_rk3188.c | 0 .../arm/mach-rockchip/rk3288 => drivers/ram/rockchip}/sdram_rk3288.c | 0 .../arm/mach-rockchip/rk3328 => drivers/ram/rockchip}/sdram_rk3328.c | 0 .../arm/mach-rockchip/rk3399 => drivers/ram/rockchip}/sdram_rk3399.c | 0 9 files changed, 4 insertions(+), 4 deletions(-) rename {arch/arm/mach-rockchip/rk3188 => drivers/ram/rockchip}/sdram_rk3188.c (100%) rename {arch/arm/mach-rockchip/rk3288 => drivers/ram/rockchip}/sdram_rk3288.c (100%) rename {arch/arm/mach-rockchip/rk3328 => drivers/ram/rockchip}/sdram_rk3328.c (100%) rename {arch/arm/mach-rockchip/rk3399 => drivers/ram/rockchip}/sdram_rk3399.c (100%) -- 1.9.1

2 8

[U-Boot] [PATCH] rockchip: rk3188: ram: add support for 16bit row address
by Kever Yang 27 Sep '17

27 Sep '17

RK3188 using the same ddr_conf for both 15 bit and 16 bit row address. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- drivers/ram/rockchip/sdram_rk3188.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 9d8b225..2b9992f 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -684,9 +684,16 @@ static int sdram_get_niu_config(struct rk3188_sdram_params *sdram_params) { int i, tmp, size, ret = 0; + row = sdram_params->ch[0].cs0_row; + /* + * RK3188 share the rank and row bit15, we use same ddr config for 15bit + * and 16bit row + */ + if (row == 16) + row = 15; tmp = sdram_params->ch[0].col - 9; tmp -= (sdram_params->ch[0].bw == 2) ? 0 : 1; - tmp |= ((sdram_params->ch[0].cs0_row - 13) << 4); + tmp |= ((row - 13) << 4); size = sizeof(ddrconf_table)/sizeof(ddrconf_table[0]); for (i = 0; i < size; i++) if (tmp == ddrconf_table[i]) -- 1.9.1

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[U-Boot] [PATCH] x86: theadorable-x86-common: Add further pci hotplug cmdline parameters
by Stefan Roese 27 Sep '17

27 Sep '17

This is needed for the PCIe hotplug to work correctly on some boards. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Bin Meng <bmeng.cn(a)gmail.com> --- include/configs/theadorable-x86-common.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index 238056a65f..7621385fa2 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -58,7 +58,8 @@ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ "addmisc=setenv bootargs ${bootargs} " \ "intel-spi.writeable=1 vmalloc=300M " \ - "pci=realloc=on,hpmemsize=0x12000000\0" \ + "pci=realloc=on,hpmemsize=0x12000000," \ + "hpmemprefsize=0,hpiosize=0\0" \ "bootcmd=if env exists recovery_status;" \ "then run swupdate;" \ "else run yocto_boot;run swupdate;" \ -- 2.14.1

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[U-Boot] u-boot Boot issue about rk3188
by Andy Yan 27 Sep '17

27 Sep '17

Hi Heiko: I try to boot the upstream u-boot-rockchip branch on my rk3188 board with(rock_defconfig) But I got this error: early_init() nit_and_scan() returned error -22 early_init() failed: -22 ERROR ### Please RESET the board ### the current commit head is: 782088d("rockchip: imply ADC and SARADC_ROCKCHIP on supported SoCs") Do you ever meet something like this? -- 2.7.4

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[U-Boot] [PATCH v2] sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operation
by Lukasz Majewski 27 Sep '17

27 Sep '17

The content of Bank Address Register (BAR) is volatile. It is cleared after power cycle or reset command (RESET F0h). Some memories (like e.g. s25fl256s) use it to access memory larger than 0x1000000 (16 MiB). The problem shows up when one: 1. Reads/writes/erases memory > 16 MiB 2. Calls "reset" u-boot command (which is not causing BAR to be cleared) In the above scenario, the SoC ROM sends 0x000000 address to read SPL. Unfortunately, the BA24 bit is still set and hence it receives content from 0x1000000 (16 MiB) memory address. As a result the SoC aborts and we hang. Only power cycle can take the SoC out of this state. How to reproduce/test: sf probe; sf erase 0x1200000 0x800000; reset sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset sf probe; sf read 0x11000000 0x1200000 0x800000; reset Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- Changes in v2: - Rename cleanup_bar() to clean_bar() - Rewrite in-code comments --- drivers/mtd/spi/spi_flash.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 34f6888..5b3c974 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -113,6 +113,27 @@ static int write_cr(struct spi_flash *flash, u8 wc) #endif #ifdef CONFIG_SPI_FLASH_BAR +/* + * This "cleanup" is necessary in a situation when one was accessing + * spi flash memory > 16 MiB by using Bank Address Register's BA24 bit. + * + * After it the BA24 bit shall be cleared to allow access to correct + * memory region after SW reset (by calling "reset" command). + * + * Otherwise, the BA24 bit may be left set and then after reset, the + * ROM would read/write/erase SPL from 16 MiB * bank_sel address. + */ +static int clean_bar(struct spi_flash *flash) +{ + u8 cmd, bank_sel = 0; + + if (flash->bank_curr == 0) + return 0; + cmd = flash->bank_write_cmd; + + return spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1); +} + static int write_bar(struct spi_flash *flash, u32 offset) { u8 cmd, bank_sel; @@ -339,6 +360,10 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) len -= erase_size; } +#ifdef CONFIG_SPI_FLASH_BAR + ret = clean_bar(flash); +#endif + return ret; } @@ -397,6 +422,10 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, offset += chunk_len; } +#ifdef CONFIG_SPI_FLASH_BAR + ret = clean_bar(flash); +#endif + return ret; } @@ -500,6 +529,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, data += read_len; } +#ifdef CONFIG_SPI_FLASH_BAR + ret = clean_bar(flash); +#endif + free(cmd); return ret; } -- 2.1.4

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[U-Boot] [PATCH] rockchip: clk: rk3368: always run rkclk_init when driver probe
by Andy Yan 27 Sep '17

27 Sep '17

commit 4bebf94e8544("rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROM") limits the pll can only be setup in SPL stage, but there are still some rk3368 based boards have not use SPL yet, so they need run rkclk_init to setup the pll in full u-boot stage, otherwise the clk_set_rate function will run into wrong logic, because it assume that all the pll have been set to the desired frequency. Signed-off-by: Andy Yan <andy.yan(a)rock-chips.com> --- drivers/clk/rockchip/clk_rk3368.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index 2be1f57..ee754f0 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -47,14 +47,12 @@ struct pll_div { (_nr * _no) == hz, #hz "Hz cannot be hit with PLL " \ "divisors on line " __stringify(__LINE__)); -#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD) static const struct pll_div apll_l_init_cfg = PLL_DIVISORS(APLL_L_HZ, 12, 2); static const struct pll_div apll_b_init_cfg = PLL_DIVISORS(APLL_B_HZ, 1, 2); #if !defined(CONFIG_TPL_BUILD) static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 2); static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6); #endif -#endif static ulong rk3368_clk_get_rate(struct clk *clk); @@ -85,7 +83,6 @@ static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru, } } -#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD) static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id, const struct pll_div *div) { @@ -125,9 +122,7 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id, return 0; } -#endif -#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD) static void rkclk_init(struct rk3368_cru *cru) { u32 apllb, aplll, dpll, cpll, gpll; @@ -152,7 +147,7 @@ static void rkclk_init(struct rk3368_cru *cru) debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n", __func__, apllb, aplll, dpll, cpll, gpll); } -#endif + #if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT) static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id) @@ -473,9 +468,8 @@ static int rk3368_clk_probe(struct udevice *dev) priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]); #endif -#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD) + rkclk_init(priv->cru); -#endif return 0; } -- 2.7.4

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[U-Boot] [PATCH] SPL: SPI: sunxi: add SPL FIT image support
by Andre Przywara 27 Sep '17

27 Sep '17

The sunxi-specific SPI load routine only knows how to load a legacy U-Boot image. Teach it how to handle FIT images as well, simply by providing the existing SPL FIT loader with the right loader routine to access the SPI NOR flash. Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> Reported-by: Peter Kosa <kope(a)madnet.sk> --- Hi, this patch was actually part of an early version of the SPL FIT series, but I somehow managed to drop it during some rebase. This is needed to enable SPI boot when using a FIT image, so this fixes SPI booting on 64-bit Allwinner boards, like the OrangePi PC2 and the Pine64 SoPine. I would be grateful if it could make it into v2017.11. Cheers, Andre. drivers/mtd/spi/sunxi_spi_spl.c | 39 ++++++++++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c index 852abd41de..35835c2798 100644 --- a/drivers/mtd/spi/sunxi_spi_spl.c +++ b/drivers/mtd/spi/sunxi_spi_spl.c @@ -8,6 +8,7 @@ #include <spl.h> #include <asm/gpio.h> #include <asm/io.h> +#include <libfdt.h> #ifdef CONFIG_SPL_OS_BOOT #error CONFIG_SPL_OS_BOOT is not supported yet @@ -261,27 +262,51 @@ static void spi0_read_data(void *buf, u32 addr, u32 len) } } +static ulong spi_load_read(struct spl_load_info *load, ulong sector, + ulong count, void *buf) +{ + spi0_read_data(buf, sector, count); + + return count; +} + /*****************************************************************************/ static int spl_spi_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { - int err; + int ret = 0; struct image_header *header; header = (struct image_header *)(CONFIG_SYS_TEXT_BASE); spi0_init(); spi0_read_data((void *)header, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40); - err = spl_parse_image_header(spl_image, header); - if (err) - return err; - spi0_read_data((void *)spl_image->load_addr, CONFIG_SYS_SPI_U_BOOT_OFFS, - spl_image->size); + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + + debug("Found FIT image\n"); + load.dev = NULL; + load.priv = NULL; + load.filename = NULL; + load.bl_len = 1; + load.read = spi_load_read; + ret = spl_load_simple_fit(spl_image, &load, + CONFIG_SYS_SPI_U_BOOT_OFFS, header); + } else { + ret = spl_parse_image_header(spl_image, header); + if (ret) + return ret; + + spi0_read_data((void *)spl_image->load_addr, + CONFIG_SYS_SPI_U_BOOT_OFFS, spl_image->size); + } spi0_deinit(); - return 0; + + return ret; } /* Use priorty 0 to override the default if it happens to be linked in */ SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image); -- 2.14.1

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