September 2017 - U-Boot

[U-Boot] [PATCH] Revert "sunxi: imply USB_GADGET"
by Icenowy Zheng 29 Sep '17

29 Sep '17

This reverts commit 061221ae61440eb05fd5b94ca77c7731315cbddd. The implying of USB_GADGET makes the boards without USB_MUSB_GADGET enabled not able to be built in the U-Boot, and the number of the boards broken is much more than the boards benefited from this commit. So it's reverted. Signed-off-by: Icenowy Zheng <icenowy(a)aosc.io> --- arch/arm/Kconfig | 1 - configs/A13-OLinuXino_defconfig | 2 ++ configs/A20-OLinuXino-Lime2-eMMC_defconfig | 2 ++ configs/A20-OLinuXino-Lime2_defconfig | 2 ++ configs/CHIP_defconfig | 2 ++ configs/CHIP_pro_defconfig | 2 ++ configs/Cubietruck_defconfig | 2 ++ configs/Nintendo_NES_Classic_Edition_defconfig | 2 ++ configs/Sinlinx_SinA33_defconfig | 2 ++ configs/parrot_r16_defconfig | 2 ++ 10 files changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 28b30ce0c3..e78a43a519 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -704,7 +704,6 @@ config ARCH_SUNXI imply SPL_MMC_SUPPORT if MMC imply SPL_POWER_SUPPORT imply SPL_SERIAL_SUPPORT - imply USB_GADGET config TARGET_TS4600 bool "Support TS4600" diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index ed8349000e..ae790164df 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -31,3 +31,5 @@ CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index b89c505efa..5df2c8b9d9 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -32,3 +32,5 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index f9388a005b..ebb435f309 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -32,3 +32,5 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 5acce42a60..7d50d0533d 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -22,4 +22,6 @@ CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 2303135449..76daf477ec 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -27,4 +27,6 @@ CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 3dff02f342..1b2989d364 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -32,3 +32,5 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index 26fcffa02f..5986764a14 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -22,3 +22,5 @@ CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_ELDO2_VOLT=1800 CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 32c887210d..d1129636dd 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -26,3 +26,5 @@ CONFIG_DFU_RAM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index d6bc89c29e..65be4a7fbf 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -22,3 +22,5 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y -- 2.13.5

2 1

Re: [U-Boot] Ethernet problem with u-boot for APF27
by Vincent Paratte 29 Sep '17

29 Sep '17

Hello, Thank you for your answers. I found a solution. The problem came from the environment variables. I just used the wrong argument with the command "setenv". Know I have "eth0:on" everywhere and I reach to do all the run update again. Vincent > Hi Vincent, > > Which U-Boot version do you use? > Do you have any boot message related to the ethernet FEC device? > > You could check your environment variables and validate them with a ping. > If you suspect your environment variables are corrupted you can reset them with the command: > > env default -f -a; saveenv > > then set them again manually and try to ping a device on the network. > > A ping 127.0.0.1 should also work to test the local loop. > > Regards, > Eric

1 0

[U-Boot] Debugging SPL
by Goldschmidt Simon 29 Sep '17

29 Sep '17

Hi, When trying to debug SPL on the socfpga platform with CONFIG_OF_EMBED, I get an error message "SPL image too big" when linking SPL. It seems this is because the U-Boot DTB (~16 Kbyte) is not stripped for SPL when building this way. Is this a known issue? Is there a workaround other than manually creating a dedicated DTB for debugging SPL in the OF_EMBED mode? Regards, Simon

1 0

Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
by Goldschmidt Simon 29 Sep '17

29 Sep '17

On 09/27/2017 06:54 AM, Hannes Schmelzer wrote: > On 09/22/2017 02:20 PM, Clément Péron wrote: >> Sorry these are my local commits you can find them here : >> >> https://patchwork.ozlabs.org/patch/765992/ >> https://patchwork.ozlabs.org/patch/765996/ >> https://patchwork.ozlabs.org/patch/765997/ >> https://patchwork.ozlabs.org/patch/765998/ > Hi, > just tested this on my cyclone5 board, but unfortunately without success. > > --- > U-Boot SPL 2017.09-00354-g824def8 (Sep 27 2017 - 06:47:19) > (....) > Hit any key to stop autoboot: 0 > => sf probe > SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total > 64 MiB > ### ERROR ### Please RESET the board ### > ---- > > same behavior as before. Have you compared your dts to the other socfpga_cyclone5_*.dts files? I have tested this on the socrates board and it would also give me the above error until I change the "compatible" string of the flash chip from "n25q00" to "spi-flash". Without that, the sf code seems to try to use the first child node as flash chip which results in a divide-by-zero error because it passes a frequency of 0 Hz to the set_speed callback of the qspi driver, which it is not prepared to handle: If cadence_qspi_apb_config_baudrate_div is called with sclk_hz == 0, the DIV_ROUND_UP macro fails to check the denominator for zero. I wonder where this should be fixed: in the core sf code or in this driver... Regards, Simon

3 2

[U-Boot] Patman - Submitting to mailing list
by Duncan Hare 29 Sep '17

29 Sep '17

Get the following message from running tools/patman/pathan.py git: 'send-email' is not a git command. See 'git --help'. What do I need to do? Duncan Hare 714 931 7952

3 2

Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
by Goldschmidt Simon 29 Sep '17

29 Sep '17

On 09/22/2017 02:20 PM, Clément Péron wrote: > Sorry these are my local commits you can find them here : > > https://patchwork.ozlabs.org/patch/765992/ > https://patchwork.ozlabs.org/patch/765996/ > https://patchwork.ozlabs.org/patch/765997/ > https://patchwork.ozlabs.org/patch/765998/ Tested on socfpga_cyclone5_socrates by applying these 4 patches to 2017.09. Works as expected. I had to disable the data cache to actually get the data from qspi to ram, but that's a totally different issue. Tested-by: Simon Goldschmidt <sgoldschmidt(a)de.pepperl-fuchs.com> As I'm rather new to this list and project, when can we expect to have this patch committed? Regards, Simon

1 0

[U-Boot] [PATCH] mmc: sdhci-cadence: set timing mode register depending on frequency
by Masahiro Yamada 29 Sep '17

29 Sep '17

The MMC framework in U-Boot does not support a systematic API for timing switch like mmc_set_timing() in Linux. U-Boot just provides a hook to change the clock frequency via mmc_set_clock(). It is up to drivers if additional register settings are needed. This driver needs to set a correct timing mode into a register when it migrates to a different speed mode. Only increasing clock frequency could result in setup/hold timing violation. The timing mode should be decided by checking MMC_TIMING_* like drivers/mmc/host/sdhci-cadence.c in Linux, but "timing" is not supported by U-Boot for now. Just use mmc->clock to decide the timing mode. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- This is a repost. I sent the same one before http://patchwork.ozlabs.org/patch/764647/ I retracted it because I saw amazing framework improvements for MMC. 4 months have passed since then, but nothing happened. I do not wait any more. I am reposting it. drivers/mmc/sdhci-cadence.c | 51 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c index f83c1d7..72d1c64 100644 --- a/drivers/mmc/sdhci-cadence.c +++ b/drivers/mmc/sdhci-cadence.c @@ -23,6 +23,18 @@ #define SDHCI_CDNS_HRS04_WDATA_SHIFT 8 #define SDHCI_CDNS_HRS04_ADDR_SHIFT 0 +#define SDHCI_CDNS_HRS06 0x18 /* eMMC control */ +#define SDHCI_CDNS_HRS06_TUNE_UP BIT(15) +#define SDHCI_CDNS_HRS06_TUNE_SHIFT 8 +#define SDHCI_CDNS_HRS06_TUNE_MASK 0x3f +#define SDHCI_CDNS_HRS06_MODE_MASK 0x7 +#define SDHCI_CDNS_HRS06_MODE_SD 0x0 +#define SDHCI_CDNS_HRS06_MODE_MMC_SDR 0x2 +#define SDHCI_CDNS_HRS06_MODE_MMC_DDR 0x3 +#define SDHCI_CDNS_HRS06_MODE_MMC_HS200 0x4 +#define SDHCI_CDNS_HRS06_MODE_MMC_HS400 0x5 +#define SDHCI_CDNS_HRS06_MODE_MMC_HS400ES 0x6 + /* SRS - Slot Register Set (SDHCI-compatible) */ #define SDHCI_CDNS_SRS_BASE 0x200 @@ -111,6 +123,44 @@ static int sdhci_cdns_phy_init(struct sdhci_cdns_plat *plat, return 0; } +static void sdhci_cdns_set_control_reg(struct sdhci_host *host) +{ + struct mmc *mmc = host->mmc; + struct sdhci_cdns_plat *plat = dev_get_platdata(mmc->dev); + unsigned int clock = mmc->clock; + u32 mode, tmp; + + /* + * REVISIT: + * The mode should be decided by MMC_TIMING_* like Linux, but + * U-Boot does not support timing. Use the clock frequency instead. + */ + if (clock <= 26000000) + mode = SDHCI_CDNS_HRS06_MODE_SD; /* use this for Legacy */ + else if (clock <= 52000000) { + if (mmc->ddr_mode) + mode = SDHCI_CDNS_HRS06_MODE_MMC_DDR; + else + mode = SDHCI_CDNS_HRS06_MODE_MMC_SDR; + } else { + /* + * REVISIT: + * The IP supports HS200/HS400, revisit once U-Boot support it + */ + printf("unsupported frequency %d\n", clock); + return; + } + + tmp = readl(plat->hrs_addr + SDHCI_CDNS_HRS06); + tmp &= ~SDHCI_CDNS_HRS06_MODE_MASK; + tmp |= mode; + writel(tmp, plat->hrs_addr + SDHCI_CDNS_HRS06); +} + +static const struct sdhci_ops sdhci_cdns_ops = { + .set_control_reg = sdhci_cdns_set_control_reg, +}; + static int sdhci_cdns_bind(struct udevice *dev) { struct sdhci_cdns_plat *plat = dev_get_platdata(dev); @@ -137,6 +187,7 @@ static int sdhci_cdns_probe(struct udevice *dev) host->name = dev->name; host->ioaddr = plat->hrs_addr + SDHCI_CDNS_SRS_BASE; + host->ops = &sdhci_cdns_ops; host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD; ret = sdhci_cdns_phy_init(plat, gd->fdt_blob, dev_of_offset(dev)); -- 2.7.4

2 1

[U-Boot] [PATCH] spl: spl_mmc: add __maybe_unused to mmc_load_image_raw_sector()
by Seung-Woo Kim 29 Sep '17

29 Sep '17

If there are no CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR and CONFIG_SPL_OS_BOOT, there is unused-function build warning. Add __maybe_unused macro to remove the warning. Signed-off-by: Seung-Woo Kim <sw0312.kim(a)samsung.com> --- common/spl/spl_mmc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index b2cccc6..b57e0b0 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -52,8 +52,9 @@ static ulong h_spl_load_read(struct spl_load_info *load, ulong sector, return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf); } -static int mmc_load_image_raw_sector(struct spl_image_info *spl_image, - struct mmc *mmc, unsigned long sector) +static __maybe_unused +int mmc_load_image_raw_sector(struct spl_image_info *spl_image, + struct mmc *mmc, unsigned long sector) { unsigned long count; struct image_header *header; -- 1.7.9.5

2 1

[U-Boot] [PATCH] mmc: uniphier-sd: Add vqmmc regulator support
by Marek Vasut 29 Sep '17

29 Sep '17

Add initial support for setting the vqmmc regulator. Since we do not support 1V8 modes, set the regulator to 3V3 and enable it. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> --- drivers/mmc/uniphier-sd.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 3c52161067..0d1203cb76 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -14,6 +14,7 @@ #include <linux/dma-direction.h> #include <linux/io.h> #include <linux/sizes.h> +#include <power/regulator.h> #include <asm/unaligned.h> DECLARE_GLOBAL_DATA_PTR; @@ -756,6 +757,9 @@ static int uniphier_sd_probe(struct udevice *dev) fdt_addr_t base; struct clk clk; int ret; +#ifdef CONFIG_DM_REGULATOR + struct udevice *vqmmc_dev; +#endif base = devfdt_get_addr(dev); if (base == FDT_ADDR_T_NONE) @@ -765,6 +769,15 @@ static int uniphier_sd_probe(struct udevice *dev) if (!priv->regbase) return -ENOMEM; +#ifdef CONFIG_DM_REGULATOR + ret = device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_dev); + if (!ret) { + /* Set the regulator to 3.3V until we support 1.8V modes */ + regulator_set_value(vqmmc_dev, 3300000); + regulator_set_enable(vqmmc_dev, true); + } +#endif + ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) { dev_err(dev, "failed to get host clock\n"); -- 2.11.0

3 7

[U-Boot] [PATCH] mmc: uniphier-sd: Update the file to match V3 patchset
by Marek Vasut 29 Sep '17

29 Sep '17

Old version of the uniphier-sd 64bit IO support patchset V1 was applied by the maintainer, update the uniphier-sd.c with the changes from the V3 of the patchset. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> --- drivers/mmc/uniphier-sd.c | 83 ++++++++++++++++++++++++----------------------- 1 file changed, 42 insertions(+), 41 deletions(-) diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 0786ad0d5f..3c52161067 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -135,7 +135,7 @@ struct uniphier_sd_priv { #define UNIPHIER_SD_CAP_64BIT BIT(3) /* Controller is 64bit */ }; -static u64 uniphier_sd_readq(struct uniphier_sd_priv *priv, const u32 reg) +static u64 uniphier_sd_readq(struct uniphier_sd_priv *priv, unsigned int reg) { if (priv->caps & UNIPHIER_SD_CAP_64BIT) return readq(priv->regbase + (reg << 1)); @@ -144,7 +144,7 @@ static u64 uniphier_sd_readq(struct uniphier_sd_priv *priv, const u32 reg) } static void uniphier_sd_writeq(struct uniphier_sd_priv *priv, - const u64 val, const u32 reg) + u64 val, unsigned int reg) { if (priv->caps & UNIPHIER_SD_CAP_64BIT) writeq(val, priv->regbase + (reg << 1)); @@ -152,7 +152,7 @@ static void uniphier_sd_writeq(struct uniphier_sd_priv *priv, writeq(val, priv->regbase + reg); } -static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, const u32 reg) +static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, unsigned int reg) { if (priv->caps & UNIPHIER_SD_CAP_64BIT) return readl(priv->regbase + (reg << 1)); @@ -161,7 +161,7 @@ static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, const u32 reg) } static void uniphier_sd_writel(struct uniphier_sd_priv *priv, - const u32 val, const u32 reg) + u32 val, unsigned int reg) { if (priv->caps & UNIPHIER_SD_CAP_64BIT) writel(val, priv->regbase + (reg << 1)); @@ -246,7 +246,7 @@ static int uniphier_sd_wait_for_irq(struct udevice *dev, unsigned int reg, return 0; } -static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf, +static int uniphier_sd_pio_read_one_block(struct udevice *dev, char *pbuf, uint blocksize) { struct uniphier_sd_priv *priv = dev_get_priv(dev); @@ -264,36 +264,33 @@ static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf, */ uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); - if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) { - if (priv->caps & UNIPHIER_SD_CAP_64BIT) { + if (priv->caps & UNIPHIER_SD_CAP_64BIT) { + u64 *buf = (u64 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 8))) { for (i = 0; i < blocksize / 8; i++) { - u64 data; - data = uniphier_sd_readq(priv, - UNIPHIER_SD_BUF); - *(*pbuf)++ = data; - *(*pbuf)++ = data >> 32; + *buf++ = uniphier_sd_readq(priv, + UNIPHIER_SD_BUF); } } else { - for (i = 0; i < blocksize / 4; i++) { - u32 data; - data = uniphier_sd_readl(priv, UNIPHIER_SD_BUF); - *(*pbuf)++ = data; - } - } - } else { - if (priv->caps & UNIPHIER_SD_CAP_64BIT) { for (i = 0; i < blocksize / 8; i++) { u64 data; data = uniphier_sd_readq(priv, UNIPHIER_SD_BUF); - put_unaligned(data, (*pbuf)++); - put_unaligned(data >> 32, (*pbuf)++); + put_unaligned(data, buf++); + } + } + } else { + u32 *buf = (u32 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 4))) { + for (i = 0; i < blocksize / 4; i++) { + *buf++ = uniphier_sd_readl(priv, + UNIPHIER_SD_BUF); } } else { for (i = 0; i < blocksize / 4; i++) { u32 data; data = uniphier_sd_readl(priv, UNIPHIER_SD_BUF); - put_unaligned(data, (*pbuf)++); + put_unaligned(data, buf++); } } } @@ -302,7 +299,7 @@ static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf, } static int uniphier_sd_pio_write_one_block(struct udevice *dev, - const u32 **pbuf, uint blocksize) + const char *pbuf, uint blocksize) { struct uniphier_sd_priv *priv = dev_get_priv(dev); int i, ret; @@ -315,31 +312,30 @@ static int uniphier_sd_pio_write_one_block(struct udevice *dev, uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); - if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) { - if (priv->caps & UNIPHIER_SD_CAP_64BIT) { + if (priv->caps & UNIPHIER_SD_CAP_64BIT) { + const u64 *buf = (const u64 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 8))) { for (i = 0; i < blocksize / 8; i++) { - u64 data = *(*pbuf)++; - data |= (u64)*(*pbuf)++ << 32; - uniphier_sd_writeq(priv, data, + uniphier_sd_writeq(priv, *buf++, UNIPHIER_SD_BUF); } } else { - for (i = 0; i < blocksize / 4; i++) { - uniphier_sd_writel(priv, *(*pbuf)++, + for (i = 0; i < blocksize / 8; i++) { + u64 data = get_unaligned(buf++); + uniphier_sd_writeq(priv, data, UNIPHIER_SD_BUF); } } } else { - if (priv->caps & UNIPHIER_SD_CAP_64BIT) { - for (i = 0; i < blocksize / 8; i++) { - u64 data = get_unaligned((*pbuf)++); - data |= (u64)get_unaligned((*pbuf)++) << 32; - uniphier_sd_writeq(priv, data, + const u32 *buf = (const u32 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 4))) { + for (i = 0; i < blocksize / 4; i++) { + uniphier_sd_writel(priv, *buf++, UNIPHIER_SD_BUF); } } else { for (i = 0; i < blocksize / 4; i++) { - u32 data = get_unaligned((*pbuf)++); + u32 data = get_unaligned(buf++); uniphier_sd_writel(priv, data, UNIPHIER_SD_BUF); } @@ -351,19 +347,24 @@ static int uniphier_sd_pio_write_one_block(struct udevice *dev, static int uniphier_sd_pio_xfer(struct udevice *dev, struct mmc_data *data) { - u32 *dest = (u32 *)data->dest; - const u32 *src = (const u32 *)data->src; + const char *src = data->src; + char *dest = data->dest; int i, ret; for (i = 0; i < data->blocks; i++) { if (data->flags & MMC_DATA_READ) - ret = uniphier_sd_pio_read_one_block(dev, &dest, + ret = uniphier_sd_pio_read_one_block(dev, dest, data->blocksize); else - ret = uniphier_sd_pio_write_one_block(dev, &src, + ret = uniphier_sd_pio_write_one_block(dev, src, data->blocksize); if (ret) return ret; + + if (data->flags & MMC_DATA_READ) + dest += data->blocksize; + else + src += data->blocksize; } return 0; -- 2.11.0

3 3