January 2017 - U-Boot

Re: [U-Boot] [linux-sunxi] Re: [PATCH 1/2] sunxi: power: add AXP803 support
by Icenowy Zheng 09 Jan '17

09 Jan '17

2017年1月6日 05:59于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > > On Fri, Dec 23, 2016 at 04:31:32PM +0800, Icenowy Zheng wrote: > > The A64 uses the AXP803 as its PMIC. > > > > Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> > > --- > > arch/arm/mach-sunxi/Makefile | 3 + > > arch/arm/mach-sunxi/pmic_bus.c | 6 +- > > arch/arm/mach-sunxi/rsb.c | 2 +- > > board/sunxi/board.c | 31 ++--- > > drivers/power/Kconfig | 87 ++++++++------ > > drivers/power/Makefile | 1 + > > drivers/power/axp803.c | 255 +++++++++++++++++++++++++++++++++++++++++ > > drivers/power/axp818.c | 2 +- > > include/axp803.h | 73 ++++++++++++ > > include/axp_pmic.h | 3 + > > 10 files changed, 413 insertions(+), 50 deletions(-) > > create mode 100644 drivers/power/axp803.c > > create mode 100644 include/axp803.h > > > > diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile > > index 128091e4e6..dcf2b5245d 100644 > > --- a/arch/arm/mach-sunxi/Makefile > > +++ b/arch/arm/mach-sunxi/Makefile > > @@ -19,9 +19,11 @@ endif > > obj-$(CONFIG_MACH_SUN6I) += prcm.o > > obj-$(CONFIG_MACH_SUN8I) += prcm.o > > obj-$(CONFIG_MACH_SUN9I) += prcm.o > > +obj-$(CONFIG_MACH_SUN50I) += prcm.o > > Introducing a PRCM config option that would be selected by the various > MACH_* seems like a better option. > > > obj-$(CONFIG_MACH_SUN6I) += p2wi.o > > obj-$(CONFIG_MACH_SUN8I) += rsb.o > > obj-$(CONFIG_MACH_SUN9I) += rsb.o > > +obj-$(CONFIG_MACH_SUN50I) += rsb.o > > Ditto. > > > obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o > > obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o > > obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o > > @@ -37,6 +39,7 @@ obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o gtbus_sun9i.o > > obj-$(CONFIG_AXP152_POWER) += pmic_bus.o > > obj-$(CONFIG_AXP209_POWER) += pmic_bus.o > > obj-$(CONFIG_AXP221_POWER) += pmic_bus.o > > +obj-$(CONFIG_AXP803_POWER) += pmic_bus.o > > obj-$(CONFIG_AXP809_POWER) += pmic_bus.o > > obj-$(CONFIG_AXP818_POWER) += pmic_bus.o > > > > diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c > > index 7c57f02792..0ac64a97cf 100644 > > --- a/arch/arm/mach-sunxi/pmic_bus.c > > +++ b/arch/arm/mach-sunxi/pmic_bus.c > > @@ -36,7 +36,7 @@ int pmic_bus_init(void) > > if (!needs_init) > > return 0; > > > > -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > And you need to wrap your line here. > > > # ifdef CONFIG_MACH_SUN6I > > p2wi_init(); > > ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, > > @@ -62,7 +62,7 @@ int pmic_bus_read(u8 reg, u8 *data) > > return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1); > > #elif defined CONFIG_AXP209_POWER > > return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1); > > -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > Ditto > > > # ifdef CONFIG_MACH_SUN6I > > return p2wi_read(reg, data); > > # else > > @@ -77,7 +77,7 @@ int pmic_bus_write(u8 reg, u8 data) > > return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1); > > #elif defined CONFIG_AXP209_POWER > > return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1); > > -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > Ditto > > > # ifdef CONFIG_MACH_SUN6I > > return p2wi_write(reg, data); > > # else > > diff --git a/arch/arm/mach-sunxi/rsb.c b/arch/arm/mach-sunxi/rsb.c > > index 6fd11f1529..28d05e962a 100644 > > --- a/arch/arm/mach-sunxi/rsb.c > > +++ b/arch/arm/mach-sunxi/rsb.c > > @@ -20,7 +20,7 @@ static int rsb_set_device_mode(void); > > > > static void rsb_cfg_io(void) > > { > > -#ifdef CONFIG_MACH_SUN8I > > +#if defined CONFIG_MACH_SUN8I || defined CONFIG_MACH_SUN50I > > sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB); > > sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB); > > sunxi_gpio_set_pull(SUNXI_GPL(0), 1); > > diff --git a/board/sunxi/board.c b/board/sunxi/board.c > > index 53656383d5..3435b80c14 100644 > > --- a/board/sunxi/board.c > > +++ b/board/sunxi/board.c > > @@ -487,26 +487,27 @@ void sunxi_board_init(void) > > #endif > > > > #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ > > - defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ > > - defined CONFIG_AXP818_POWER > > + defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ > > + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > power_failed = axp_init(); > > > > -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ > > - defined CONFIG_AXP818_POWER > > +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ > > + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > power_failed |= axp_set_dcdc1(CONFIG_AXP_DCDC1_VOLT); > > #endif > > power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT); > > power_failed |= axp_set_dcdc3(CONFIG_AXP_DCDC3_VOLT); > > -#if !defined(CONFIG_AXP209_POWER) && !defined(CONFIG_AXP818_POWER) > > +#if !defined(CONFIG_AXP209_POWER) && !defined(CONFIG_AXP803_POWER) && \ > > + !defined(CONFIG_AXP818_POWER) > > power_failed |= axp_set_dcdc4(CONFIG_AXP_DCDC4_VOLT); > > #endif > > -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ > > - defined CONFIG_AXP818_POWER > > +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ > > + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT); > > #endif > > > > -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ > > - defined CONFIG_AXP818_POWER > > +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ > > + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT); > > #endif > > power_failed |= axp_set_aldo2(CONFIG_AXP_ALDO2_VOLT); > > @@ -517,8 +518,8 @@ void sunxi_board_init(void) > > power_failed |= axp_set_aldo4(CONFIG_AXP_ALDO4_VOLT); > > #endif > > > > -#if defined(CONFIG_AXP221_POWER) || defined(CONFIG_AXP809_POWER) || \ > > - defined(CONFIG_AXP818_POWER) > > +#if defined(CONFIG_AXP221_POWER) || defined(CONFIG_AXP803_POWER) || \ > > + defined(CONFIG_AXP809_POWER) || defined(CONFIG_AXP818_POWER) > > power_failed |= axp_set_dldo(1, CONFIG_AXP_DLDO1_VOLT); > > power_failed |= axp_set_dldo(2, CONFIG_AXP_DLDO2_VOLT); > > #if !defined CONFIG_AXP809_POWER > > @@ -530,13 +531,17 @@ void sunxi_board_init(void) > > power_failed |= axp_set_eldo(3, CONFIG_AXP_ELDO3_VOLT); > > #endif > > > > -#ifdef CONFIG_AXP818_POWER > > +#if defined CONFIG_AXP803_POWER || defined CONFIG_AXP818_POWER > > power_failed |= axp_set_fldo(1, CONFIG_AXP_FLDO1_VOLT); > > power_failed |= axp_set_fldo(2, CONFIG_AXP_FLDO2_VOLT); > > +#endif > > + > > +#ifdef CONFIG_AXP818_POWER > > power_failed |= axp_set_fldo(3, CONFIG_AXP_FLDO3_VOLT); > > #endif > > > > -#if defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > > +#if defined CONFIG_AXP803_POWER || defined CONFIG_AXP809_POWER || \ > > + defined CONFIG_AXP818_POWER > > power_failed |= axp_set_sw(IS_ENABLED(CONFIG_AXP_SW_ON)); > > #endif > > #endif > > diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig > > index f2c5629be2..e6f5903a17 100644 > > --- a/drivers/power/Kconfig > > +++ b/drivers/power/Kconfig > > @@ -11,8 +11,9 @@ choice > > depends on ARCH_SUNXI > > default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I > > default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 > > + default AXP803_POWER if MACH_SUN50I > > default AXP818_POWER if MACH_SUN8I_A83T > > - default SUNXI_NO_PMIC if MACH_SUN8I_H3 || MACH_SUN50I > > + default SUNXI_NO_PMIC if MACH_SUN8I_H3 > > > > config SUNXI_NO_PMIC > > bool "board without a pmic" > > @@ -43,6 +44,13 @@ config AXP221_POWER > > Select this to enable support for the axp221/axp223 pmic found on most > > A23 and A31 boards. > > > > +config AXP803_POWER > > + bool "axp803 pmic support" > > + depends on MACH_SUN50I > > + select CMD_POWEROFF > > + ---help--- > > + Say y here to enable support for the axp803 pmic found on A64 boards. > > + > > config AXP809_POWER > > bool "axp809 pmic support" > > depends on MACH_SUN9I > > @@ -69,25 +77,25 @@ endchoice > > > > config AXP_DCDC1_VOLT > > int "axp pmic dcdc1 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > - default 3300 if AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > + default 3300 if AXP818_POWER || MACH_SUN50I > > default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I > > ---help--- > > Set the voltage (mV) to program the axp pmic dcdc1 at, set to 0 to > > disable dcdc1. On A23 / A31 / A33 (axp221) boards dcdc1 is used for > > generic 3.3V IO voltage for external devices like the lcd-panal and > > sdcard interfaces, etc. On most boards dcdc1 is undervolted to 3.0V to > > - save battery. On A31 devices dcdc1 is also used for VCC-IO. On A83T > > - dcdc1 is used for VCC-IO, nand, usb0, sd , etc. On A80 dcdc1 normally > > - powers some of the pingroups, NAND/eMMC, SD/MMC, and USB OTG. > > + save battery. On A31 devices dcdc1 is also used for VCC-IO. On A83T and > > + A64 dcdc1 is used for VCC-IO, nand, usb0, sd , etc. On A80 dcdc1 > > + normally powers some of the pingroups, NAND/eMMC, SD/MMC, and USB OTG. > > > > config AXP_DCDC2_VOLT > > int "axp pmic dcdc2 voltage" > > - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 900 if AXP818_POWER > > default 1400 if AXP152_POWER || AXP209_POWER > > default 1200 if MACH_SUN6I > > - default 1100 if MACH_SUN8I > > + default 1100 if MACH_SUN8I || MACH_SUN50I > > default 0 if MACH_SUN9I > > ---help--- > > Set the voltage (mV) to program the axp pmic dcdc2 at, set to 0 to > > @@ -97,15 +105,17 @@ config AXP_DCDC2_VOLT > > On A23/A33 boards dcdc2 is used for VDD-SYS and should be 1.1V. > > On A80 boards dcdc2 powers the GPU and can be left off. > > On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V. > > + On A64 boards dcdc2 is used with dcdc3 for VDD-CPU and should be 1.1V. > > > > config AXP_DCDC3_VOLT > > int "axp pmic dcdc3 voltage" > > - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 900 if AXP809_POWER || AXP818_POWER > > default 1500 if AXP152_POWER > > default 1250 if AXP209_POWER > > default 1200 if MACH_SUN6I || MACH_SUN8I > > - ---help--- > > + default 1100 if MACH_SUN50I > > +---help--- > > Why is that change needed? > > > Set the voltage (mV) to program the axp pmic dcdc3 at, set to 0 to > > disable dcdc3. > > On A10(s) / A13 / A20 boards with an axp209 dcdc3 is VDD-INT-DLL and > > @@ -114,39 +124,42 @@ config AXP_DCDC3_VOLT > > On A23 / A31 / A33 boards dcdc3 is VDD-CPU and should be 1.2V. > > On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V. > > On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V. > > + On A64 boards dcdc3 is used with dcdc2 for VDD-CPU and should be 1.1V. > > > > config AXP_DCDC4_VOLT > > int "axp pmic dcdc4 voltage" > > - depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP152_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 1250 if AXP152_POWER > > default 1200 if MACH_SUN6I > > default 0 if MACH_SUN8I > > default 900 if MACH_SUN9I > > + default 0 if MACH_SUN50I > > ---help--- > > Set the voltage (mV) to program the axp pmic dcdc4 at, set to 0 to > > disable dcdc4. > > On A10s boards with an axp152 dcdc4 is VDD-INT-DLL and should be 1.25V. > > On A31 boards dcdc4 is used for VDD-SYS and should be 1.2V. > > - On A23 / A33 boards dcdc4 is unused and should be disabled. > > + On A23 / A33 / A64 boards dcdc4 is unused and should be disabled. > > On A80 boards dcdc4 powers VDD-SYS, HDMI, USB OTG and should be 0.9V. > > On A83T boards dcdc4 is used for VDD-GPU. > > > > config AXP_DCDC5_VOLT > > int "axp pmic dcdc5 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > - default 1500 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > + default 1500 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I || MACH_SUN50I > > ---help--- > > Set the voltage (mV) to program the axp pmic dcdc5 at, set to 0 to > > disable dcdc5. > > - On A23 / A31 / A33 / A80 / A83T boards dcdc5 is VCC-DRAM and > > + On A23 / A31 / A33 / A64 / A80 / A83T boards dcdc5 is VCC-DRAM and > > should be 1.5V, 1.35V if DDR3L is used. > > > > config AXP_ALDO1_VOLT > > int "axp pmic (a)ldo1 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 0 if MACH_SUN6I > > default 1800 if MACH_SUN8I_A83T > > default 3000 if MACH_SUN8I || MACH_SUN9I > > + default 2800 if MACH_SUN50I > > ---help--- > > Set the voltage (mV) to program the axp pmic aldo1 at, set to 0 to > > disable aldo1. > > @@ -155,14 +168,16 @@ config AXP_ALDO1_VOLT > > On A80 boards aldo1 powers the USB hosts and should be 3.0V. > > On A83T / H8 boards aldo1 is used for MIPI CSI, DSI, HDMI, EFUSE, and > > should be 1.8V. > > + On A64 boards aldo1 powers PE pingroup and CSI and should be 2.8V. > > That depends on the usage of these pins, and there's no such > requirements from the SoC, this is a board design choice. > > > > > config AXP_ALDO2_VOLT > > int "axp pmic (a)ldo2 voltage" > > - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 3000 if AXP152_POWER || AXP209_POWER > > default 0 if MACH_SUN6I || MACH_SUN9I > > default 1800 if MACH_SUN8I_A83T > > default 2500 if MACH_SUN8I > > + default 1800 if MACH_SUN50I > > ---help--- > > Set the voltage (mV) to program the axp pmic aldo2 at, set to 0 to > > disable aldo2. > > @@ -173,17 +188,19 @@ config AXP_ALDO2_VOLT > > On A80 boards aldo2 powers PB pingroup and camera IO and can be left off. > > On A83T / H8 boards aldo2 powers VDD-DLL, VCC18-PLL, CPVDD, VDD18-ADC, > > LPDDR2, and the codec. It should be 1.8V. > > + On A64 boards aldo2 powers PL pingroup and should be 1.8V. > > > > config AXP_ALDO3_VOLT > > int "axp pmic (a)ldo3 voltage" > > - depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 0 if AXP209_POWER || MACH_SUN9I > > - default 3000 if MACH_SUN6I || MACH_SUN8I > > + default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN50I > > ---help--- > > Set the voltage (mV) to program the axp pmic aldo3 at, set to 0 to > > disable aldo3. > > On A10(s) / A13 / A20 boards aldo3 should be 2.8V. > > - On A23 / A31 / A33 boards aldo3 is VCC-PLL and AVCC and should be 3.0V. > > + On A23 / A31 / A33 / A64 boards aldo3 is VCC-PLL and AVCC > > + and should be 3.0V. > > On A80 boards aldo3 is normally not used. > > On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be > > 3.0V. > > @@ -199,17 +216,19 @@ config AXP_ALDO4_VOLT > > > > config AXP_DLDO1_VOLT > > int "axp pmic dldo1 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > + default 3300 if MACH_SUN50I > > default 0 > > ---help--- > > Set the voltage (mV) to program the axp pmic dldo1 at, set to 0 to > > disable dldo1. On sun6i (A31) boards with ethernet dldo1 is often used > > to power the ethernet phy. On A23, A33 and A80 boards this is often > > - used to power the wifi. > > + used to power the wifi. On A64 boards this is often used to power the > > + HDMI. > > > > config AXP_DLDO2_VOLT > > int "axp pmic dldo2 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 3000 if MACH_SUN9I > > default 0 > > ---help--- > > @@ -219,7 +238,7 @@ config AXP_DLDO2_VOLT > > > > config AXP_DLDO3_VOLT > > int "axp pmic dldo3 voltage" > > - depends on AXP221_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP818_POWER > > default 0 > > ---help--- > > Set the voltage (mV) to program the axp pmic dldo3 at, set to 0 to > > @@ -227,7 +246,7 @@ config AXP_DLDO3_VOLT > > > > config AXP_DLDO4_VOLT > > int "axp pmic dldo4 voltage" > > - depends on AXP221_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP818_POWER > > default 0 > > ---help--- > > Set the voltage (mV) to program the axp pmic dldo4 at, set to 0 to > > @@ -235,15 +254,17 @@ config AXP_DLDO4_VOLT > > > > config AXP_ELDO1_VOLT > > int "axp pmic eldo1 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > + default 1800 if MACH_SUN50I > > default 0 > > ---help--- > > Set the voltage (mV) to program the axp pmic eldo1 at, set to 0 to > > disable eldo1. > > + On A64 boards it's used for the codec and should be 1.8V. > > Again, there's no particular reason to make that comment. > > > > > config AXP_ELDO2_VOLT > > int "axp pmic eldo2 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 0 > > ---help--- > > Set the voltage (mV) to program the axp pmic eldo2 at, set to 0 to > > @@ -251,7 +272,7 @@ config AXP_ELDO2_VOLT > > > > config AXP_ELDO3_VOLT > > int "axp pmic eldo3 voltage" > > - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER > > + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER > > default 3000 if MACH_SUN9I > > default 0 > > ---help--- > > @@ -263,8 +284,8 @@ config AXP_ELDO3_VOLT > > > > config AXP_FLDO1_VOLT > > int "axp pmic fldo1 voltage" > > - depends on AXP818_POWER > > - default 0 if MACH_SUN8I_A83T > > + depends on AXP803_POWER || AXP818_POWER > > + default 0 > > ---help--- > > Set the voltage (mV) to program the axp pmic fldo1 at, set to 0 to > > disable fldo1. > > @@ -273,11 +294,13 @@ config AXP_FLDO1_VOLT > > > > config AXP_FLDO2_VOLT > > int "axp pmic fldo2 voltage" > > - depends on AXP818_POWER > > + depends on AXP803_POWER || AXP818_POWER > > + default 1100 if MACH_SUN50I > > default 900 if MACH_SUN8I_A83T > > ---help--- > > Set the voltage (mV) to program the axp pmic fldo2 at, set to 0 to > > disable fldo2. > > + On A64 boards fldo2 is VCC-CPUS and should be 1.1V. > > On A83T / H8 boards fldo2 is VCC-CPUS and should be 0.9V. > > > > config AXP_FLDO3_VOLT > > @@ -290,7 +313,7 @@ config AXP_FLDO3_VOLT > > > > config AXP_SW_ON > > bool "axp pmic sw on" > > - depends on AXP809_POWER || AXP818_POWER > > + depends on AXP803_POWER || AXP809_POWER || AXP818_POWER > > default n > > ---help--- > > Enable to turn on axp pmic sw. > > diff --git a/drivers/power/Makefile b/drivers/power/Makefile > > index b43523e628..1449e875ce 100644 > > --- a/drivers/power/Makefile > > +++ b/drivers/power/Makefile > > @@ -9,6 +9,7 @@ obj-$(CONFIG_AS3722_POWER) += as3722.o > > obj-$(CONFIG_AXP152_POWER) += axp152.o > > obj-$(CONFIG_AXP209_POWER) += axp209.o > > obj-$(CONFIG_AXP221_POWER) += axp221.o > > +obj-$(CONFIG_AXP803_POWER) += axp803.o > > obj-$(CONFIG_AXP809_POWER) += axp809.o > > obj-$(CONFIG_AXP818_POWER) += axp818.o > > obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o > > diff --git a/drivers/power/axp803.c b/drivers/power/axp803.c > > new file mode 100644 > > index 0000000000..ac65a5c7ec > > --- /dev/null > > +++ b/drivers/power/axp803.c > > @@ -0,0 +1,255 @@ > > +/* > > + * AXP803 driver based on AXP818 driver > > + * > > + * Based on axp818.c > > + * (C) Copyright 2015 Vishnu Patekar <vishnuptekar0510(a)gmail.com> > > + * > > + * Based on axp221.c > > + * (C) Copyright 2014 Hans de Goede <hdegoede(a)redhat.com> > > + * (C) Copyright 2013 Oliver Schinagl <oliver(a)schinagl.nl> > > + * > > + * SPDX-License-Identifier: GPL-2.0+ > > + */ > > + > > +#include <common.h> > > +#include <errno.h> > > +#include <asm/arch/gpio.h> > > +#include <asm/arch/pmic_bus.h> > > +#include <axp_pmic.h> > > + > > +static u8 axp803_mvolt_to_cfg(int mvolt, int min, int max, int div) > > +{ > > + if (mvolt < min) > > + mvolt = min; > > + else if (mvolt > max) > > + mvolt = max; > > + > > + return (mvolt - min) / div; > > +} > > + > > +int axp_set_dcdc1(unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg = axp803_mvolt_to_cfg(mvolt, 1600, 3400, 100); > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC1_EN); > > + > > + ret = pmic_bus_write(AXP803_DCDC1_CTRL, cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC1_EN); > > +} > > + > > +int axp_set_dcdc2(unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg; > > + > > + if (mvolt >= 1220) > > + cfg = 70 + axp803_mvolt_to_cfg(mvolt, 1220, 1300, 20); > > + else > > + cfg = axp803_mvolt_to_cfg(mvolt, 500, 1200, 10); > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC2_EN); > > + > > + ret = pmic_bus_write(AXP803_DCDC2_CTRL, cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC2_EN); > > +} > > + > > +int axp_set_dcdc3(unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg; > > + > > + if (mvolt >= 1220) > > + cfg = 70 + axp803_mvolt_to_cfg(mvolt, 1220, 1300, 20); > > + else > > + cfg = axp803_mvolt_to_cfg(mvolt, 500, 1200, 10); > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC3_EN); > > + > > + ret = pmic_bus_write(AXP803_DCDC3_CTRL, cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC3_EN); > > +} > > + > > +int axp_set_dcdc5(unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg; > > + > > + if (mvolt >= 1140) > > + cfg = 32 + axp803_mvolt_to_cfg(mvolt, 1140, 1840, 20); > > + else > > + cfg = axp803_mvolt_to_cfg(mvolt, 800, 1120, 10); > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC5_EN); > > + > > + ret = pmic_bus_write(AXP803_DCDC5_CTRL, cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, > > + AXP803_OUTPUT_CTRL1_DCDC5_EN); > > +} > > + > > +int axp_set_aldo(int aldo_num, unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg; > > + > > + if (aldo_num < 1 || aldo_num > 3) > > + return -EINVAL; > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL3, > > + AXP803_OUTPUT_CTRL3_ALDO1_EN << (aldo_num - 1)); > > + > > + cfg = axp803_mvolt_to_cfg(mvolt, 700, 3300, 100); > > + ret = pmic_bus_write(AXP803_ALDO1_CTRL + (aldo_num - 1), cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL3, > > + AXP803_OUTPUT_CTRL3_ALDO1_EN << (aldo_num - 1)); > > +} > > + > > +/* TODO: re-work other AXP drivers to consolidate ALDO functions. */ > > +int axp_set_aldo1(unsigned int mvolt) > > +{ > > + return axp_set_aldo(1, mvolt); > > +} > > + > > +int axp_set_aldo2(unsigned int mvolt) > > +{ > > + return axp_set_aldo(2, mvolt); > > +} > > + > > +int axp_set_aldo3(unsigned int mvolt) > > +{ > > + return axp_set_aldo(3, mvolt); > > +} > > + > > +int axp_set_dldo(int dldo_num, unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg; > > + > > + if (dldo_num < 1 || dldo_num > 4) > > + return -EINVAL; > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL2, > > + AXP803_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); > > + > > + cfg = axp803_mvolt_to_cfg(mvolt, 700, 3300, 100); > > + if (dldo_num == 2 && mvolt > 3300) > > + cfg += 1 + axp803_mvolt_to_cfg(mvolt, 3400, 4200, 200); > > + ret = pmic_bus_write(AXP803_DLDO1_CTRL + (dldo_num - 1), cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL2, > > + AXP803_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); > > +} > > + > > +int axp_set_eldo(int eldo_num, unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg; > > + > > + if (eldo_num < 1 || eldo_num > 3) > > + return -EINVAL; > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL2, > > + AXP803_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); > > + > > + cfg = axp803_mvolt_to_cfg(mvolt, 700, 1900, 50); > > + ret = pmic_bus_write(AXP803_ELDO1_CTRL + (eldo_num - 1), cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL2, > > + AXP803_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); > > +} > > + > > +int axp_set_fldo(int fldo_num, unsigned int mvolt) > > +{ > > + int ret; > > + u8 cfg; > > + > > + if (fldo_num < 1 || fldo_num > 2) > > + return -EINVAL; > > + > > + if (mvolt == 0) > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL3, > > + AXP803_OUTPUT_CTRL3_FLDO1_EN << (fldo_num - 1)); > > + > > + cfg = axp803_mvolt_to_cfg(mvolt, 700, 1450, 50); > > + ret = pmic_bus_write(AXP803_FLDO1_CTRL + (fldo_num - 1), cfg); > > + if (ret) > > + return ret; > > + > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL3, > > + AXP803_OUTPUT_CTRL3_FLDO1_EN << (fldo_num - 1)); > > +} > > + > > +int axp_set_sw(bool on) > > +{ > > + if (on) > > + return pmic_bus_setbits(AXP803_OUTPUT_CTRL2, > > + AXP803_OUTPUT_CTRL2_SW_EN); > > + > > + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL2, > > + AXP803_OUTPUT_CTRL2_SW_EN); > > +} > > + > > +int axp_init(void) > > +{ > > + u8 axp_chip_id; > > + int ret; > > + > > + ret = pmic_bus_init(); > > + if (ret) > > + return ret; > > + > > + ret = pmic_bus_read(AXP803_CHIP_ID, &axp_chip_id); > > + if (ret) > > + return ret; > > + > > + if (!(axp_chip_id == 0x51)) > > + return -ENODEV; > > + else > > + return ret; > > + > > + return 0; > > +} > > + > > +int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) > > +{ > > + pmic_bus_write(AXP803_SHUTDOWN, AXP803_SHUTDOWN_POWEROFF); > > + > > + /* infinite loop during shutdown */ > > + while (1) {} > > + > > + /* not reached */ > > + return 0; > > +} > > Is there any difference with the AXP818 driver? FLDO3 is missing. > > > diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c > > index af4d7a6903..ad0c330ca5 100644 > > --- a/drivers/power/axp818.c > > +++ b/drivers/power/axp818.c > > @@ -162,7 +162,7 @@ int axp_set_dldo(int dldo_num, unsigned int mvolt) > > cfg = axp818_mvolt_to_cfg(mvolt, 700, 3300, 100); > > if (dldo_num == 2 && mvolt > 3300) > > cfg += 1 + axp818_mvolt_to_cfg(mvolt, 3400, 4200, 200); > > - ret = pmic_bus_write(AXP818_ELDO1_CTRL + (dldo_num - 1), cfg); > > + ret = pmic_bus_write(AXP818_DLDO1_CTRL + (dldo_num - 1), cfg); > > Why is that change necesary? Oops... It should be another bugfix... > > Overall there is need to split this patch into several chunks, to > enable the RSB, PRCM, to add the new driver, and then enable it. > > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe(a)googlegroups.com. > For more options, visit https://groups.google.com/d/optout.

2 1

[U-Boot] Please update scripts/config_whitelist.txt
by Masahiro Yamada 09 Jan '17

09 Jan '17

Hi Tom. Could you run "scripts/build-whitelist.sh" before or after the v2017.01 release, please? This will sync scripts/config_whitelist.txt, so we will see the progress of Kconfig moves. -- Best Regards Masahiro Yamada

2 1

[U-Boot] [PATCH v1 1/1] gitignore: Append *.so and *.efi
by Andy Shevchenko 08 Jan '17

08 Jan '17

EFI loader generates two types of binaries that usually are not a part of source tree. Ignore them globally based on extension. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitignore b/.gitignore index 7fac5b3c74..b9fa0354dd 100644 --- a/.gitignore +++ b/.gitignore @@ -7,6 +7,7 @@ # .* *.o +*.so *.o.* *.a *.s @@ -15,6 +16,7 @@ *.i *.lst *.order +*.efi *.elf *.swp *.bin -- 2.11.0

1 0

[U-Boot] Baremetal && Qemu vexpress && U-boot
by Mark L. 08 Jan '17

08 Jan '17

Hi, I have a problem with a baremetal program I would like U-boot to launch inside a QEMU. Versions: Qemu: 2.2.1. Machine vexpress-a9 U-boot: fetched "latest" from ftp (dated as 11/07/2016) U-boot machine: vexpress_ca9x4_config I followed the instructions in this link: https://balau82.wordpress.com/2010/03/10/u-boot-for-arm-on-qemu/ I end up with: "Wrong Image Format for bootm command ERROR: can’t get kernel image!" When executing iminfo, I get: "## Checking Image at 80008000 ... Unknown image format!" Even modifying the test.ld with a start address of 80008000 instead of 10000, and the same for mkimage won't give any result. I provide a raw binary (just like the tuto) for my app with no headers. I think the "cat u-boot test.uimg > flash.bin" has become more than useless now. After u-boot compilation, I can't use the binary version: no prompt will show and a crash is waiting to happen. One has to use the u-boot image. How can I plug my baremetal application in this case? I tried hard with "md" to find my code (in U-boot) but the code is so scattered that I lost myself in the process. Any help would be very appreciated Thanks -- Mark

1 0

[U-Boot] Usind dhcp command
by dh＠synoia.com 08 Jan '17

08 Jan '17

Here's the definition of the dhcp command: dhcp [loadAddress] [[hostIPaddr:]bootfilename]How do the fields "hostIPaddr" and "bootfilename" get established when the host ip address and bootfilename are returned in the dhcp message response? Duncan Hare 714 931 7952

1 0

[U-Boot] [PATCH 0/9] imx6ul: Add Engicam Is.IoT MX6UL support
by Jagan Teki 07 Jan '17

07 Jan '17

From: Jagan Teki <jagan(a)amarulasolutions.com> This patch set support Engicam Is.IoT MX6UL board support. Jagan Teki (9): configs: imx6: Don't define USDHC2_BASE_ADDR arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support arm: dts: imx6ul-isiot: Add I2C nodes imx6: isiotmx6ul: Add I2C support arm: dts: imx6ul-isiot: Add FEC node imx6: isiotmx6ul: Add FEC support imx6: isiotmx6ul: Add NAND support imx6: isiotmx6ul: Add nandboot env support imx6ul: isiotmx6ul: Enable I2C support arch/arm/cpu/armv7/mx6/Kconfig | 12 ++ arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx6ul-isiot.dts | 145 ++++++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 ++ board/engicam/isiotmx6ul/MAINTAINERS | 7 + board/engicam/isiotmx6ul/Makefile | 6 + board/engicam/isiotmx6ul/README | 28 +++ board/engicam/isiotmx6ul/isiotmx6ul.c | 316 ++++++++++++++++++++++++++++++++++ configs/imx6ul_isiot_mmc_defconfig | 41 +++++ configs/imx6ul_isiot_nand_defconfig | 42 +++++ include/configs/imx6qdl_icore.h | 2 +- include/configs/imx6ul_geam.h | 2 +- include/configs/imx6ul_isiot.h | 205 ++++++++++++++++++++++ 13 files changed, 818 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/imx6ul-isiot.dts create mode 100644 board/engicam/isiotmx6ul/Kconfig create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS create mode 100644 board/engicam/isiotmx6ul/Makefile create mode 100644 board/engicam/isiotmx6ul/README create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c create mode 100644 configs/imx6ul_isiot_mmc_defconfig create mode 100644 configs/imx6ul_isiot_nand_defconfig create mode 100644 include/configs/imx6ul_isiot.h -- 1.9.1

1 9

[U-Boot] [PATCH v2 1/6] sunxi: makes an invisible option for H3-like DRAM controllers
by Icenowy Zheng 07 Jan '17

07 Jan '17

Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free DRAM initialization code, but can use modified dram_sun8i_h3.c. Add a invisible option for easier DRAM initialization code reuse. Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> --- Changes since v1: - rename the option to SUNXI_DW_DRAM. arch/arm/include/asm/arch-sunxi/dram.h | 2 +- arch/arm/mach-sunxi/Makefile | 2 +- board/sunxi/Kconfig | 8 ++++++++ 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index e0be744dba..1475a80196 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -24,7 +24,7 @@ #include <asm/arch/dram_sun8i_a33.h> #elif defined(CONFIG_MACH_SUN8I_A83T) #include <asm/arch/dram_sun8i_a83t.h> -#elif defined(CONFIG_MACH_SUN8I_H3) +#elif defined(CONFIG_SUNXI_DW_DRAM) #include <asm/arch/dram_sun8i_h3.h> #elif defined(CONFIG_MACH_SUN9I) #include <asm/arch/dram_sun9i.h> diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index e73114ee64..c9f3a12b62 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -48,6 +48,6 @@ obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o -obj-$(CONFIG_MACH_SUN8I_H3) += dram_sun8i_h3.o +obj-$(CONFIG_SUNXI_DW_DRAM) += dram_sun8i_h3.o obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o endif diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index e1d4ab148f..ab318a76ca 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -42,6 +42,13 @@ config SUNXI_GEN_SUN6I separate ahb reset control registers, custom pmic bus, new style watchdog, etc. +config SUNXI_DW_DRAM + bool + ---help--- + Select this for sunxi SoCs which uses a DRAM controller like the + DesignWare controller used in H3, mainly SoCs after H3, which do + not have official open-source DRAM initialization code, but can + use modified H3 DRAM initialization code. choice prompt "Sunxi SoC Variant" @@ -113,6 +120,7 @@ config MACH_SUN8I_H3 select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN6I select SUPPORT_SPL + select SUNXI_DW_DRAM select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT config MACH_SUN9I -- 2.11.0

1 5

[U-Boot] [PATCH v2 1/4] i2c: i2c-cdns: Detect unsupported sequences for rev 1.0
by Moritz Fischer 06 Jan '17

06 Jan '17

Revision 1.0 of this IP has a couple of issues, such as not supporting repeated start conditions for read transfers. So scan through the list of i2c messages for these conditions and report an error if they are attempted. This has been fixed for revision 1.4 of the IP, so only report the error when the IP can really not do it. Signed-off-by: Moritz Fischer <moritz.fischer(a)ettus.com> Cc: Heiko Schocher <hs(a)denx.de> Cc: Michal Simek <michal.simek(a)xilinx.com> Cc: u-boot(a)lists.denx.de --- Changes from v1: - Removed additional blank lines - No longer modify printout paths - Rebased on top of prior patches for r1p14 support --- drivers/i2c/i2c-cdns.c | 66 +++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 52 insertions(+), 14 deletions(-) diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index ef85a70..c1d6427 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -67,6 +67,7 @@ struct cdns_i2c_regs { #define CDNS_I2C_FIFO_DEPTH 16 #define CDNS_I2C_TRANSFER_SIZE_MAX 255 /* Controller transfer limit */ +#define CDNS_I2C_BROKEN_HOLD_BIT BIT(0) #ifdef DEBUG static void cdns_i2c_debug_status(struct cdns_i2c_regs *cdns_i2c) @@ -114,6 +115,13 @@ struct i2c_cdns_bus { int id; unsigned int input_freq; struct cdns_i2c_regs __iomem *regs; /* register base */ + + int hold_flag; + u32 quirks; +}; + +struct cdns_i2c_platform_data { + u32 quirks; }; /* Wait for an interrupt */ @@ -236,18 +244,14 @@ static int cdns_i2c_probe_chip(struct udevice *bus, uint chip_addr, } static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, - u32 len, bool next_is_read) + u32 len) { u8 *cur_data = data; struct cdns_i2c_regs *regs = i2c_bus->regs; - setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO | - CDNS_I2C_CONTROL_HOLD); + setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO); - /* if next is a read, we need to clear HOLD, doesn't work */ - if (next_is_read) - clrbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); clrbits_le32(&regs->control, CDNS_I2C_CONTROL_RW); @@ -267,7 +271,9 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, } /* All done... release the bus */ - clrbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); + if (!i2c_bus->hold_flag) + clrbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); + /* Wait for the address and data to be sent */ if (!cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP)) return -ETIMEDOUT; @@ -285,7 +291,7 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, struct cdns_i2c_regs *regs = i2c_bus->regs; /* Check the hardware can handle the requested bytes */ - if ((len < 0) || (len > CDNS_I2C_TRANSFER_SIZE_MAX)) + if ((len < 0)) return -EINVAL; setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO | @@ -310,7 +316,8 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, *(cur_data++) = readl(&regs->data); } while (readl(&regs->transfer_size) != 0); /* All done... release the bus */ - clrbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); + if (!i2c_bus->hold_flag) + clrbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); #ifdef DEBUG cdns_i2c_debug_status(regs); @@ -322,19 +329,41 @@ static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) { struct i2c_cdns_bus *i2c_bus = dev_get_priv(dev); - int ret; + int ret, count; + bool hold_quirk; + + hold_quirk = !!(i2c_bus->quirks & CDNS_I2C_BROKEN_HOLD_BIT); + + if (nmsgs > 1) { + /* + * This controller does not give completion interrupt after a + * master receive message if HOLD bit is set (repeated start), + * resulting in SW timeout. Hence, if a receive message is + * followed by any other message, an error is returned + * indicating that this sequence is not supported. + */ + for (count = 0; (count < nmsgs - 1) && hold_quirk; count++) { + if (msg[count].flags & I2C_M_RD) { + printf("Can't do repeated start after a receive message\n"); + return -EOPNOTSUPP; + } + } + + i2c_bus->hold_flag = 1; + setbits_le32(&i2c_bus->regs->control, CDNS_I2C_CONTROL_HOLD); + } else { + i2c_bus->hold_flag = 0; + } debug("i2c_xfer: %d messages\n", nmsgs); for (; nmsgs > 0; nmsgs--, msg++) { - bool next_is_read = nmsgs > 1 && (msg[1].flags & I2C_M_RD); - debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); if (msg->flags & I2C_M_RD) { ret = cdns_i2c_read_data(i2c_bus, msg->addr, msg->buf, msg->len); } else { ret = cdns_i2c_write_data(i2c_bus, msg->addr, msg->buf, - msg->len, next_is_read); + msg->len); } if (ret) { debug("i2c_write: error sending\n"); @@ -348,11 +377,16 @@ static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, static int cdns_i2c_ofdata_to_platdata(struct udevice *dev) { struct i2c_cdns_bus *i2c_bus = dev_get_priv(dev); + struct cdns_i2c_platform_data *pdata = + (struct cdns_i2c_platform_data *)dev_get_driver_data(dev); i2c_bus->regs = (struct cdns_i2c_regs *)dev_get_addr(dev); if (!i2c_bus->regs) return -ENOMEM; + if (pdata) + i2c_bus->quirks = pdata->quirks; + i2c_bus->input_freq = 100000000; /* TODO hardcode input freq for now */ return 0; @@ -364,8 +398,12 @@ static const struct dm_i2c_ops cdns_i2c_ops = { .set_bus_speed = cdns_i2c_set_bus_speed, }; +static const struct cdns_i2c_platform_data r1p10_i2c_def = { + .quirks = CDNS_I2C_BROKEN_HOLD_BIT, +}; + static const struct udevice_id cdns_i2c_of_match[] = { - { .compatible = "cdns,i2c-r1p10" }, + { .compatible = "cdns,i2c-r1p10", .data = (ulong)&r1p10_i2c_def }, { .compatible = "cdns,i2c-r1p14" }, { /* end of table */ } }; -- 2.7.4

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[U-Boot] [PATCH][v3] armv8: fsl-layerscape: Add support of GPIO structure
by Prabhakar Kushwaha 06 Jan '17

06 Jan '17

Layerscape Gen2 SoC supports GPIO registers to control GPIO signals. Adding support of GPIO structure to access GPIO registers. Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava(a)nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v2: Incorporated York's comments - Removed CONFIG_SYS_GPIO1_ADDR as bool - Renamed CONFIG_SYS_GPIO1_ADDR Changes for v3: - Corrected the GPIO address - updated patch description This structure is required while supporting ethernent in LS1012AFRDM. arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index d684a07..33f3e2e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -52,6 +52,11 @@ #define QSPI0_BASE_ADDR (CONFIG_SYS_IMMR + 0x00550000) #define DSPI1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01100000) +#define GPIO1_BASE_ADDR (CONFIG_SYS_IMMR + 0x1300000) +#define GPIO2_BASE_ADDR (CONFIG_SYS_IMMR + 0x1310000) +#define GPIO3_BASE_ADDR (CONFIG_SYS_IMMR + 0x1320000) +#define GPIO4_BASE_ADDR (CONFIG_SYS_IMMR + 0x1330000) + #define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000) #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000) @@ -588,6 +593,16 @@ struct ccsr_cci400 { u8 res_e004[0x10000 - 0xe004]; }; +struct ccsr_gpio { + u32 gpdir; + u32 gpodr; + u32 gpdat; + u32 gpier; + u32 gpimr; + u32 gpicr; + u32 gpibe; +}; + /* MMU 500 */ #define SMMU_SCR0 (SMMU_BASE + 0x0) #define SMMU_SCR1 (SMMU_BASE + 0x4) -- 2.7.4

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[U-Boot] [PATCH] arm: PSCI: remove CONFIG_MP to support LS1012A
by Chenhui Zhao 06 Jan '17

06 Jan '17

To support PSCI on LS1012A, remove the macro CONFIG_MP. And, do code cleanup. Signed-off-by: Chenhui Zhao <chenhui.zhao(a)nxp.com> --- arch/arm/cpu/armv8/cpu-dt.c | 14 ++++-------- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 33 +++++++++++++-------------- arch/arm/cpu/armv8/sec_firmware.c | 2 +- arch/arm/include/asm/arch-fsl-layerscape/mp.h | 4 ++++ arch/arm/include/asm/armv8/sec_firmware.h | 7 ++++++ 5 files changed, 33 insertions(+), 27 deletions(-) diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c index 9ffb49c..247d8da 100644 --- a/arch/arm/cpu/armv8/cpu-dt.c +++ b/arch/arm/cpu/armv8/cpu-dt.c @@ -6,26 +6,22 @@ #include <common.h> #include <asm/psci.h> -#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include <asm/armv8/sec_firmware.h> -#endif +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT int psci_update_dt(void *fdt) { -#ifdef CONFIG_MP -#if defined(CONFIG_ARMV8_PSCI) -#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT /* * If the PSCI in SEC Firmware didn't work, avoid to update the * device node of PSCI. But still return 0 instead of an error * number to support detecting PSCI dynamically and then switching * the SMP boot method between PSCI and spin-table. */ - if (sec_firmware_support_psci_version() == 0xffffffff) + if (sec_firmware_support_psci_version() == PSCI_INVALID_VER) return 0; -#endif + fdt_psci(fdt); -#endif -#endif + return 0; } +#endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 0b516e3..a2b6c02 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -14,18 +14,14 @@ #include <asm/arch/soc.h> #include <asm/arch/cpu.h> #include <asm/arch/speed.h> -#ifdef CONFIG_MP #include <asm/arch/mp.h> -#endif #include <efi_loader.h> #include <fm_eth.h> #include <fsl-mc/fsl_mc.h> #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> #endif -#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include <asm/armv8/sec_firmware.h> -#endif DECLARE_GLOBAL_DATA_PTR; @@ -391,28 +387,31 @@ int cpu_eth_init(bd_t *bis) return error; } +static inline int check_psci(void) +{ + unsigned int psci_ver; + + psci_ver = sec_firmware_support_psci_version(); + if (psci_ver == PSCI_INVALID_VER) + return 1; + + return 0; +} + int arch_early_init_r(void) { -#ifdef CONFIG_MP - int rv = 1; - u32 psci_ver = 0xffffffff; -#endif #ifdef CONFIG_SYS_FSL_ERRATUM_A009635 erratum_a009635(); #endif -#ifdef CONFIG_MP -#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI) - /* Check the psci version to determine if the psci is supported */ - psci_ver = sec_firmware_support_psci_version(); -#endif - if (psci_ver == 0xffffffff) { - rv = fsl_layerscape_wake_seconday_cores(); - if (rv) + if (check_psci()) { + printf("PSCI: PSCI does not exist.\n"); + + /* if PSCI does not exist, boot secondary cores here */ + if (fsl_layerscape_wake_seconday_cores()) printf("Did not wake secondary cores\n"); } -#endif #ifdef CONFIG_SYS_HAS_SERDES fsl_serdes_init(); diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c index 2ddd67e..ecab451 100644 --- a/arch/arm/cpu/armv8/sec_firmware.c +++ b/arch/arm/cpu/armv8/sec_firmware.c @@ -227,7 +227,7 @@ unsigned int sec_firmware_support_psci_version(void) if (sec_firmware_addr & SEC_FIRMWARE_RUNNING) return _sec_firmware_support_psci_version(); - return 0xffffffff; + return PSCI_INVALID_VER; } #endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h index f7306ff..7f01423 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h @@ -29,7 +29,11 @@ extern u64 __spin_table[]; extern u64 __real_cntfrq; extern u64 *secondary_boot_code; extern size_t __secondary_boot_code_size; +#ifdef CONFIG_MP int fsl_layerscape_wake_seconday_cores(void); +#else +static inline int fsl_layerscape_wake_seconday_cores(void) { return 0; } +#endif void *get_spin_tbl_addr(void); phys_addr_t determine_mp_bootpg(void); void secondary_boot_func(void); diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h index eb68185..f3e6a80 100644 --- a/arch/arm/include/asm/armv8/sec_firmware.h +++ b/arch/arm/include/asm/armv8/sec_firmware.h @@ -11,12 +11,19 @@ #include <asm/arch/ppa.h> #endif +#define PSCI_INVALID_VER 0xffffffff + int sec_firmware_init(const void *, u32 *, u32 *); int _sec_firmware_entry(const void *, u32 *, u32 *); bool sec_firmware_is_valid(const void *); #ifdef CONFIG_ARMV8_PSCI unsigned int sec_firmware_support_psci_version(void); unsigned int _sec_firmware_support_psci_version(void); +#else +static inline unsigned int sec_firmware_support_psci_version(void) +{ + return PSCI_INVALID_VER; +} #endif #endif /* __SEC_FIRMWARE_H_ */ -- 2.7.4

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