January 2017 - U-Boot

[U-Boot] [PATCH] lib: gitignore *.elf and *.so generated by efi_loader
by Ladislav Michl 09 Jan '17

09 Jan '17

Signed-off-by: Ladislav Michl <ladis(a)linux-mips.org> --- lib/efi_loader/.gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/efi_loader/.gitignore b/lib/efi_loader/.gitignore new file mode 100644 index 0000000000..634a600f84 --- /dev/null +++ b/lib/efi_loader/.gitignore @@ -0,0 +1,2 @@ +*.efi +*.so -- 2.11.0

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[U-Boot] [PATCH 1/1] arm: mach-omap2: Fix secure file generation
by Andrew F. Davis 09 Jan '17

09 Jan '17

When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was not generated but generate an unsigned one anyway, first fix this warning to say that it was generated but not secured. When the user then exports TI_SECURE_DEV_PKG after getting this warning, and tries to re-build, 'make' will detect the build artifacts as unchanged and so assume they do not need to be re-generated. This causes it to fail to sign the files and it will pack unsigned files into the final image, even though TI_SECURE_DEV_PKG is now correctly defined and working. Fix this by using FORCE on the targets causes them to be re-run even if the dependent files have not changed. This then causes another issue. We currently rename the signed dtb files to overwrite the non-signed ones. We do this so the 'mkimage' tool gives the packaged dtb sections the correct name. If we do not rename the files then SPL will not find them during boot. Fix this by renaming the dtb files by appending _HS to the end of the filename, after the ".dtb", this causes them to still be named correctly in the FIT blob. Signed-off-by: Andrew F. Davis <afd(a)ti.com> --- arch/arm/mach-omap2/config_secure.mk | 36 +++++++++++++++++------------------- 1 file changed, 17 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-omap2/config_secure.mk b/arch/arm/mach-omap2/config_secure.mk index 1122439e38..0c843338d7 100644 --- a/arch/arm/mach-omap2/config_secure.mk +++ b/arch/arm/mach-omap2/config_secure.mk @@ -3,7 +3,7 @@ # # SPDX-License-Identifier: GPL-2.0+ # -quiet_cmd_mkomapsecimg = MKIMAGE $@ +quiet_cmd_mkomapsecimg = SECURE $@ ifneq ($(TI_SECURE_DEV_PKG),) ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh),) ifneq ($(CONFIG_SPL_BUILD),) @@ -18,11 +18,12 @@ endif else cmd_mkomapsecimg = echo "WARNING:" \ "$(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh not found." \ - "$@ was NOT created!" + "$@ was NOT secured!"; cp $< $@ endif else cmd_mkomapsecimg = echo "WARNING: TI_SECURE_DEV_PKG environment" \ - "variable must be defined for TI secure devices. $@ was NOT created!" + "variable must be defined for TI secure devices. \ + $@ was NOT secured!"; cp $< $@ endif ifdef CONFIG_SPL_LOAD_FIT @@ -35,51 +36,51 @@ cmd_omapsecureimg = $(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh \ else cmd_omapsecureimg = echo "WARNING:" \ "$(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh not found." \ - "$@ was NOT created!"; cp $< $@ + "$@ was NOT secured!"; cp $< $@ endif else cmd_omapsecureimg = echo "WARNING: TI_SECURE_DEV_PKG environment" \ "variable must be defined for TI secure devices." \ - "$@ was NOT created!"; cp $< $@ + "$@ was NOT secured!"; cp $< $@ endif endif # Standard X-LOADER target (QPSI, NOR flash) -u-boot-spl_HS_X-LOADER: $(obj)/u-boot-spl.bin +u-boot-spl_HS_X-LOADER: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkomapsecimg) # For MLO targets (SD card boot) the final file name that is copied to the SD # card FAT partition must be MLO, so we make a copy of the output file to a new # file with that name -u-boot-spl_HS_MLO: $(obj)/u-boot-spl.bin +u-boot-spl_HS_MLO: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkomapsecimg) @if [ -f $@ ]; then \ cp -f $@ MLO; \ fi # Standard 2ND target (certain peripheral boot modes) -u-boot-spl_HS_2ND: $(obj)/u-boot-spl.bin +u-boot-spl_HS_2ND: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkomapsecimg) # Standard ULO target (certain peripheral boot modes) -u-boot-spl_HS_ULO: $(obj)/u-boot-spl.bin +u-boot-spl_HS_ULO: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkomapsecimg) # Standard ISSW target (certain devices, various boot modes) -u-boot-spl_HS_ISSW: $(obj)/u-boot-spl.bin +u-boot-spl_HS_ISSW: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkomapsecimg) # For SPI flash on AM335x and AM43xx, these require special byte swap handling # so we use the SPI_X-LOADER target instead of X-LOADER and let the # create-boot-image.sh script handle that -u-boot-spl_HS_SPI_X-LOADER: $(obj)/u-boot-spl.bin +u-boot-spl_HS_SPI_X-LOADER: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkomapsecimg) # For supporting single stage XiP QSPI on AM43xx, the image is a full u-boot # file, not an SPL. In this case the mkomapsecimg command looks for a # u-boot-HS_* prefix -u-boot_HS_XIP_X-LOADER: $(obj)/u-boot.bin +u-boot_HS_XIP_X-LOADER: $(obj)/u-boot.bin FORCE $(call if_changed,mkomapsecimg) # For supporting the SPL loading and interpreting of FIT images whose @@ -90,21 +91,18 @@ ifdef CONFIG_SPL_LOAD_FIT MKIMAGEFLAGS_u-boot_HS.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) + $(patsubst %,-b arch/$(ARCH)/dts/%.dtb_HS,$(subst ",,$(CONFIG_OF_LIST))) OF_LIST_TARGETS = $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) $(OF_LIST_TARGETS): dtbs -%_HS.dtb: %.dtb +%.dtb_HS: %.dtb FORCE $(call if_changed,omapsecureimg) - $(Q)if [ -f $@ ]; then \ - cp -f $@ $<; \ - fi -u-boot-nodtb_HS.bin: u-boot-nodtb.bin +u-boot-nodtb_HS.bin: u-boot-nodtb.bin FORCE $(call if_changed,omapsecureimg) -u-boot_HS.img: u-boot-nodtb_HS.bin u-boot.img $(patsubst %.dtb,%_HS.dtb,$(OF_LIST_TARGETS)) +u-boot_HS.img: u-boot-nodtb_HS.bin u-boot.img $(patsubst %.dtb,%.dtb_HS,$(OF_LIST_TARGETS)) FORCE $(call if_changed,mkimage) $(Q)if [ -f $@ ]; then \ cp -f $@ u-boot.img; \ -- 2.11.0

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[U-Boot] [PATCH] mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig
by Jagan Teki 09 Jan '17

09 Jan '17

Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig which is missing in below commit "imx: mx6ull_14x14_evk: add plugin defconfig" (sha1: b90ebf49bb8f74afe68f696f59a0e24cc79f2031) Cc: Stefano Babic <sbabic(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Signed-off-by: Jagan Teki <jagan(a)openedev.com> --- board/freescale/mx6ullevk/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/mx6ullevk/MAINTAINERS b/board/freescale/mx6ullevk/MAINTAINERS index 4137674..73031cd 100644 --- a/board/freescale/mx6ullevk/MAINTAINERS +++ b/board/freescale/mx6ullevk/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/freescale/mx6ullevk/ F: include/configs/mx6ullevk.h F: configs/mx6ull_14x14_evk_defconfig +F: configs/mx6ull_14x14_evk_plugin_defconfig -- 1.9.1

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Re: [U-Boot] [linux-sunxi] Re: [RFC PATCH 1/4] sunxi: add DDR2 support to H3-like DRAM controller
by Icenowy Zheng 09 Jan '17

09 Jan '17

2017年1月9日下午6:30于 Andre Przywara <andre.przywara(a)arm.com>写道： > > Hi, > > On 05/01/17 22:55, Icenowy Zheng wrote: > > > > 2017年1月6日 06:37于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > >> > >> On Thu, Dec 29, 2016 at 03:00:58AM +0800, Icenowy Zheng wrote: > >>> H3-like DRAM controller needs some special code to operate a DDR2 DRAM > >>> chip. Add the logic to probe such a chip. > > Out of curiosity, how did you came up with those values? > It would be good if this was mentioned in the commit log. > > >>> As there's no commercial boards available now with H3 and DDR2 DRAM, the > >>> patch is developed and tested on a V3s chip, which has in-package DDR2 > >>> DRAM. > >>> > >>> Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> > >> > >> It would have been great if your previous patch renaming the H3 symbol > >> was part of that serie. > >> > >>> --- > >>> arch/arm/mach-sunxi/dram_sun8i_h3.c | 114 ++++++++++++++++++++++++++++++++++-- > >>> board/sunxi/Kconfig | 11 ++++ > >>> 2 files changed, 120 insertions(+), 5 deletions(-) > >>> > >>> diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c > >>> index 8e2527dee1..a48320e01c 100644 > >>> --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c > >>> +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c > >>> @@ -22,6 +22,9 @@ struct dram_para { > >>> u8 bus_width; > >>> u8 dual_rank; > >>> u8 row_bits; > >>> +#ifdef CONFIG_SUNXI_H3_DRAM_DDR2 > >>> + u8 bank_bits; > >>> +#endif > >>> }; > >>> > >>> static inline int ns_to_t(int nanoseconds) > >>> @@ -136,36 +139,77 @@ static void mctl_set_timing_params(struct dram_para *para) > >>> struct sunxi_mctl_ctl_reg * const mctl_ctl = > >>> (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; > >>> > >>> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 > >>> u8 tccd = 2; > >>> +#else > >>> + u8 tccd = 1; > >>> +#endif > >>> u8 tfaw = ns_to_t(50); > >>> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 > >>> u8 trrd = max(ns_to_t(10), 4); > >>> u8 trcd = ns_to_t(15); > >>> u8 trc = ns_to_t(53); > >>> u8 txp = max(ns_to_t(8), 3); > >>> u8 twtr = max(ns_to_t(8), 4); > >>> u8 trtp = max(ns_to_t(8), 4); > >>> +#else > >>> + u8 trrd = max(ns_to_t(10), 2); > >>> + u8 trcd = ns_to_t(20); > >>> + u8 trc = ns_to_t(65); > >>> + u8 txp = 2; > >>> + u8 twtr = max(ns_to_t(8), 2); > >>> + u8 trtp = max(ns_to_t(8), 2); > >>> +#endif > >>> u8 twr = max(ns_to_t(15), 3); > >>> u8 trp = ns_to_t(15); > >>> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 > >>> u8 tras = ns_to_t(38); > >>> +#else > >>> + u8 tras = ns_to_t(45); > >>> +#endif > >>> u16 trefi = ns_to_t(7800) / 32; > >>> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 > >>> u16 trfc = ns_to_t(350); > >>> +#else > >>> + u16 trfc = ns_to_t(328); > >>> +#endif > >>> > >>> u8 tmrw = 0; > >>> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 > >>> u8 tmrd = 4; > >>> +#else > >>> + u8 tmrd = 2; > >>> +#endif > >>> u8 tmod = 12; > >>> u8 tcke = 3; > >>> u8 tcksrx = 5; > >>> u8 tcksre = 5; > >>> u8 tckesr = 4; > >>> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 > >>> u8 trasmax = 24; > >>> +#else > >>> + u8 trasmax = 27; > >>> +#endif > >> > >> Can't that be moved into a structure that would have different > >> declaration, this is barely readable. > > I agree to that. If I got this correctly, the existing parameters here > are actually DRAM chip specific. It just happens that we use DDR3-1333 > parameters for all boards so far. Most A64 boards for instance sport > DDR3-1600 capable chips, also we will need adjustments for the LPDDR3 > chips used on the SoPine and Pinebook. So it would be good to address > this properly. > > Philipp has a quite elaborate rework to fix this and ease the way to > allow board specific tunings of those parameters: > > https://github.com/ptomsich/u-boot/commit/4ae474c756c3208a3bfaf36ed6f1850d4… > > as part of that branch: > https://github.com/ptomsich/u-boot/commits/a64uQ7-spl-wip I now think it worth to do a gaint rework for H3 DRAM code... This patch may need to be splited, and supports of A64, H5, R40 are also worthful to be part of the refactor. > > At some point in the future I wanted to clean this up and upstream it, I > am wondering if you can take a look at this now? > > Cheers, > Andre.

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[U-Boot] spl export fdt crashes
by matti kaasinen 09 Jan '17

09 Jan '17

Hi! I tried to useing falcom mode from nand flash: ti-u-boot, am335x based board using modified am335x_evm. include/configs/am335x_evm.h falcon mode variables untouched. I ran manually commands presented in: https://git.ti.com/ti-u-boot/ti-u-boot/blobs/ti-u-boot-2016.05/board/ti/am3… with the exception that I took dtb spl-os partition, so nand read instead of load nand, usin nand read. I get following printout from falcon mode preparation: => run nandargs => nand read ${loadaddr} NAND.kernel NAND read: device 0 offset 0x200000, size 0x800000 8388608 bytes read: OK => nand read ${fdtaddr} NAND.u-boot-spl-os NAND read: device 0 offset 0x80000, size 0x40000 262144 bytes read: OK => run nandargs => spl export fdt ${loadaddr} - ${fdtaddr} data abort pc : [<8ff611b2>] lr : [<8ff66325>] reloc pc : [<8080e1b2>] lr : [<80813325>] sp : 8ef28bd0 ip : 8ff971c7 fp : 8ffb30a0 r10: 8ffb30a0 r9 : 8ef32ed8 r8 : 8ef28c6c r7 : 00000003 r6 : 00000007 r5 : 8ffb30a0 r4 : 82000000 r3 : 00000000 r2 : 82000008 r1 : 82000000 r0 : 8ffa1711 Flags: Nzcv IRQs off FIQs on Mode SVC_32 Resetting CPU ... resetting ... What might go wrong? Thanks, Matti

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[U-Boot] [v3 01/30] arm: socfpga: arria10: add additional i2c nodes for Arria10
by Chee Tien Fong 09 Jan '17

09 Jan '17

From: Tien Fong Chee <tien.fong.chee(a)intel.com> Add remaining 3 I2C base addresses for the Arria10. Signed-off-by: Dinh Nguyen <dinguyen(a)opensource.altera.com> Signed-off-by: Tien Fong Chee <tien.fong.chee(a)intel.com> Reviewed-by: Stefan Roese <sr(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)kernel.org> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Tien Fong <skywindctf(a)gmail.com> --- arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h index a7056d4..902c321 100644 --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h @@ -29,6 +29,9 @@ #define SOCFPGA_MPUL2_ADDRESS 0xfffff000 #define SOCFPGA_I2C0_ADDRESS 0xffc02200 #define SOCFPGA_I2C1_ADDRESS 0xffc02300 +#define SOCFPGA_I2C2_ADDRESS 0xffc02400 +#define SOCFPGA_I2C3_ADDRESS 0xffc02500 +#define SOCFPGA_I2C4_ADDRESS 0xffc02600 #define SOCFPGA_ECC_OCRAM_ADDRESS 0xff8c3000 #define SOCFPGA_UART0_ADDRESS 0xffc02000 -- 1.7.7.4

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[U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers
by Icenowy Zheng 09 Jan '17

09 Jan '17

Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free DRAM initialization code, but can use modified dram_sun8i_h3.c. Add a invisible option for easier DRAM initialization code reuse. Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> --- arch/arm/include/asm/arch-sunxi/dram.h | 2 +- arch/arm/mach-sunxi/Makefile | 2 +- board/sunxi/Kconfig | 7 +++++++ 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index e0be744dba..c5456658a3 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -24,7 +24,7 @@ #include <asm/arch/dram_sun8i_a33.h> #elif defined(CONFIG_MACH_SUN8I_A83T) #include <asm/arch/dram_sun8i_a83t.h> -#elif defined(CONFIG_MACH_SUN8I_H3) +#elif defined(CONFIG_SUNXI_H3_DW_DRAM) #include <asm/arch/dram_sun8i_h3.h> #elif defined(CONFIG_MACH_SUN9I) #include <asm/arch/dram_sun9i.h> diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index e73114ee64..dc737db4b9 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -48,6 +48,6 @@ obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o -obj-$(CONFIG_MACH_SUN8I_H3) += dram_sun8i_h3.o +obj-$(CONFIG_SUNXI_H3_DW_DRAM) += dram_sun8i_h3.o obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o endif diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index e1d4ab148f..4ddd992684 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -42,6 +42,12 @@ config SUNXI_GEN_SUN6I separate ahb reset control registers, custom pmic bus, new style watchdog, etc. +config SUNXI_H3_DW_DRAM + bool + ---help--- + Select this for sunxi SoCs which uses a DRAM controller like the + DesignWare controller used in H3, mainly SoCs after H3, which do + not have official open-source DRAM initialization code. choice prompt "Sunxi SoC Variant" @@ -113,6 +119,7 @@ config MACH_SUN8I_H3 select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN6I select SUPPORT_SPL + select SUNXI_H3_DW_DRAM select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT config MACH_SUN9I -- 2.11.0

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[U-Boot] [PATCH] ARM64: zynqmp: Generate handoff structure for ATF
by Michal Simek 09 Jan '17

09 Jan '17

Xilinx ATF extending options for passing images from BL2(FSBL) to BL31. U-Boot SPL is FSBL replacement that's why it should generate handoff structure the same. Support only one entry which is U-Boot in EL2 itself. When FIT image is adopted structure generate should be data driven. Currently ATF is placing this structure at the beggining of OCM which is rewriting early parts of ATF which should be unused at that time. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/cpu/armv8/zynqmp/Makefile | 2 +- arch/arm/cpu/armv8/zynqmp/handoff.c | 87 ++++++++++++++++++++++++++++ arch/arm/cpu/armv8/zynqmp/spl.c | 2 + arch/arm/include/asm/arch-zynqmp/hardware.h | 9 +++ arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 + 5 files changed, 101 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv8/zynqmp/handoff.c diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile b/arch/arm/cpu/armv8/zynqmp/Makefile index be8673a7db44..013f136707b5 100644 --- a/arch/arm/cpu/armv8/zynqmp/Makefile +++ b/arch/arm/cpu/armv8/zynqmp/Makefile @@ -9,4 +9,4 @@ obj-y += clk.o obj-y += cpu.o obj-$(CONFIG_MP) += mp.o obj-y += slcr.o -obj-$(CONFIG_SPL_BUILD) += spl.o +obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o diff --git a/arch/arm/cpu/armv8/zynqmp/handoff.c b/arch/arm/cpu/armv8/zynqmp/handoff.c new file mode 100644 index 000000000000..25d6ef3f60fb --- /dev/null +++ b/arch/arm/cpu/armv8/zynqmp/handoff.c @@ -0,0 +1,87 @@ +/* + * Copyright 2016 - 2017 Xilinx, Inc. + * + * Michal Simek <michal.simek(a)xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/sys_proto.h> + +/* + * atfhandoffparams + * Parameter bitfield encoding + * ----------------------------------------------------------------------------- + * Exec State 0 0 -> Aarch64, 1-> Aarch32 + * endianness 1 0 -> LE, 1 -> BE + * secure (TZ) 2 0 -> Non secure, 1 -> secure + * EL 3:4 00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3 + * CPU# 5:6 00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3 + */ + +#define FSBL_FLAGS_ESTATE_SHIFT 0 +#define FSBL_FLAGS_ESTATE_MASK (1 << FSBL_FLAGS_ESTATE_SHIFT) +#define FSBL_FLAGS_ESTATE_A64 0 +#define FSBL_FLAGS_ESTATE_A32 1 + +#define FSBL_FLAGS_ENDIAN_SHIFT 1 +#define FSBL_FLAGS_ENDIAN_MASK (1 << FSBL_FLAGS_ENDIAN_SHIFT) +#define FSBL_FLAGS_ENDIAN_LE 0 +#define FSBL_FLAGS_ENDIAN_BE 1 + +#define FSBL_FLAGS_TZ_SHIFT 2 +#define FSBL_FLAGS_TZ_MASK (1 << FSBL_FLAGS_TZ_SHIFT) +#define FSBL_FLAGS_NON_SECURE 0 +#define FSBL_FLAGS_SECURE 1 + +#define FSBL_FLAGS_EL_SHIFT 3 +#define FSBL_FLAGS_EL_MASK (3 << FSBL_FLAGS_EL_SHIFT) +#define FSBL_FLAGS_EL0 0 +#define FSBL_FLAGS_EL1 1 +#define FSBL_FLAGS_EL2 2 +#define FSBL_FLAGS_EL3 3 + +#define FSBL_FLAGS_CPU_SHIFT 5 +#define FSBL_FLAGS_CPU_MASK (3 << FSBL_FLAGS_CPU_SHIFT) +#define FSBL_FLAGS_A53_0 0 +#define FSBL_FLAGS_A53_1 1 +#define FSBL_FLAGS_A53_2 2 +#define FSBL_FLAGS_A53_3 3 + +#define FSBL_MAX_PARTITIONS 8 + +/* Structure corresponding to each partition entry */ +struct xfsbl_partition { + uint64_t entry_point; + uint64_t flags; +}; + +/* Structure for handoff parameters to ARM Trusted Firmware (ATF) */ +struct xfsbl_atf_handoff_params { + uint8_t magic[4]; + uint32_t num_entries; + struct xfsbl_partition partition[FSBL_MAX_PARTITIONS]; +}; + +#ifdef CONFIG_SPL_OS_BOOT +void handoff_setup(void) +{ + struct xfsbl_atf_handoff_params *atfhandoffparams; + + atfhandoffparams = (void *)CONFIG_SPL_TEXT_BASE; + atfhandoffparams->magic[0] = 'X'; + atfhandoffparams->magic[1] = 'L'; + atfhandoffparams->magic[2] = 'N'; + atfhandoffparams->magic[3] = 'X'; + + atfhandoffparams->num_entries = 1; + atfhandoffparams->partition[0].entry_point = CONFIG_SYS_TEXT_BASE; + atfhandoffparams->partition[0].flags = FSBL_FLAGS_EL2 << + FSBL_FLAGS_EL_SHIFT; + + writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); +} +#endif diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c index f5f550f9e2b4..0a5f4306e822 100644 --- a/arch/arm/cpu/armv8/zynqmp/spl.c +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -128,6 +128,8 @@ __weak void psu_init(void) #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { + handoff_setup(); + return 0; } #endif diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index eb6f7a4ae447..6f83c0de65ef 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -141,4 +141,13 @@ struct csu_regs { #define csu_base ((struct csu_regs *)ZYNQMP_CSU_BASEADDR) +#define ZYNQMP_PMU_BASEADDR 0xFFD80000 + +struct pmu_regs { + u32 reserved[18]; + u32 gen_storage6; /* 0x48 */ +}; + +#define pmu_base ((struct pmu_regs *)ZYNQMP_PMU_BASEADDR) + #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 95fd91da2915..8c54fcedf401 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -21,4 +21,6 @@ unsigned int zynqmp_get_silicon_version(void); void psu_init(void); +void handoff_setup(void); + #endif /* _ASM_ARCH_SYS_PROTO_H */ -- 1.9.1

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[U-Boot] am335x based board nand boot crashes to ubi0 error
by matti kaasinen 09 Jan '17

09 Jan '17

Hi! I would need help related to nand boot with am335x based board. Board boots from mmc (sd card), but not from nand flash. I have been using yocto/poky build system with meta-ti layer that brings up u-boot-ti-staging. Current u-boot version is 2016.05 and linux-ti-staging-rt-4.4. I have used am335x_evm config (include/configs/am335x_evm.h) that I have made minor modifications to suit it to my board. Most of the modifications are made to board/ti/am335x/board.c and mux.c to adapt to different memories and pin mappings and lack of card id eeprom. This story is "follow up" to http://lists.denx.de/pipermail/u-boot/2017-January/277168.html. So, I2C was initialized somehow when booting from mmc, but not when booting from nand. "Follow up" part: Board did still not start booting kernel even though I2C init problem was fixed. The reason was that boot_targets variable has been assigned with mmc0 legacy_mmc0 mmc1 legacy_mmc1 nand0 pxe dhcp when main u-boot is brought up. These values are iterated when distro_bootcmd is executed. distro_bootcmd=for target in ${boot_targets}; do run bootcmd_${target}; done I made minor modification to distro_bootcmd: distro_bootcmd=for target in ${boot_targets}; do echo "======= ${target} =======" ; run bootcmd_${target}; done Please find the distro_bootcmd running results below: => run distro_bootcmd ======= mmc0 ======= Card did not respond to voltage select! ======= legacy_mmc0 ======= Card did not respond to voltage select! Card did not respond to voltage select! ======= mmc1 ======= data abort pc : [<8ff70fa0>] lr : [<8ff701e9>] reloc pc : [<8081dfa0>] lr : [<8081d1e9>] sp : 8ef286f0 ip : 8ff5891d fp : 00000003 r10: 8ffb3b18 r9 : 8ef32ed8 r8 : 8ef41b10 r7 : 8ff584bd r6 : 8ef39478 r5 : 8ef39500 r4 : 47810000 r3 : 8ff70f91 r2 : 00014892 r1 : 00000000 r0 : 8ef39500 Flags: nZCv IRQs off FIQs on Mode SVC_32 Resetting CPU ... So, MMC1 was troublemaker this time. I removed mmc1 from that command - I do not have mmc1 on my board. => setenv boot_targets ' mmc0 legacy_mmc0 nand0 ' Please find modified command results below: => run distro_bootcmd ======= mmc0 ======= Card did not respond to voltage select! ======= legacy_mmc0 ======= Card did not respond to voltage select! Card did not respond to voltage select! ======= nand0 ======= ## Error: "bootcmd_nand0" not defined NOTE!! Is this a bug in u-boot-ti? There is no bootcmd_nand0 in u-boot memory at this time. However, there is bootcmd_nand. So, I changed nand0 to nand => setenv boot_targets ' mmc0 legacy_mmc0 nand' => run distro_bootcmd ======= mmc0 ======= Card did not respond to voltage select! ======= legacy_mmc0 ======= Card did not respond to voltage select! Card did not respond to voltage select! ======= nand ======= Booting from nand ... NAND read: device 0 offset 0x80000, size 0x40000 262144 bytes read: OK NAND read: device 0 offset 0x200000, size 0x800000 8388608 bytes read: OK Kernel image @ 0x82000000 [ 0x000000 - 0x2c4fd8 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ef1b000, end 8ef27614 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpu ....... lots of listing and then ...... [ 1.172458] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda [ 1.179257] nand: Micron MT29F2G08ABAEAWP [ 1.183469] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 1.191491] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme [ 1.197164] 10 ofpart partitions found on MTD device 8000000.nand [ 1.203607] Creating 10 MTD partitions on "8000000.nand": [ 1.209285] 0x000000000000-0x000000020000 : "NAND.SPL" [ 1.216261] 0x000000020000-0x000000040000 : "NAND.SPL.backup1" [ 1.223834] 0x000000040000-0x000000060000 : "NAND.SPL.backup2" [ 1.231275] 0x000000060000-0x000000080000 : "NAND.SPL.backup3" [ 1.238794] 0x000000080000-0x0000000c0000 : "NAND.u-boot-spl-os" [ 1.246571] 0x0000000c0000-0x0000001c0000 : "NAND.u-boot" [ 1.254316] 0x0000001c0000-0x0000001e0000 : "NAND.u-boot-env" [ 1.261612] 0x0000001e0000-0x000000200000 : "NAND.u-boot-env.backup1" [ 1.269653] 0x000000200000-0x000000a00000 : "NAND.kernel" [ 1.283112] 0x000000a00000-0x000010000000 : "NAND.file-system" [ 1.520856] tps65217 0-0024: TPS65217 ID 0xe version 1.2 [ 1.526486] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz [ 1.533461] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 400 kHz [ 1.539830] ubi0: attaching mtd9 [ 1.543810] ubi0 error: validate_ec_hdr: bad VID header offset 512, expected 2048 [ 1.551672] ubi0 error: validate_ec_hdr: bad EC header [ 1.557063] Erase counter header dump: [ 1.560998] magic 0x55424923 [ 1.564930] version 1 [ 1.568041] ec 1 [ 1.571151] vid_hdr_offset 512 [ 1.574444] data_offset 2048 [ 1.577831] image_seq 1630296601 [ 1.581762] hdr_crc 0x988c84d [ 1.585600] erase counter header hexdump: [ 1.589844] CPU: 0 PID: 1 Comm: swapper Not tainted 4.4.39-rt49-g9d47072444 #2 [ 1.597427] Hardware name: Generic AM33XX (Flattened Device Tree) [ 1.603824] Backtrace: [ 1.606422] [<c0013380>] (dump_backtrace) from [<c001357c>] (show_stack+0x18/0x1c) [ 1.614370] r7:00000000 r6:00000001 r5:cf027000 r4:cf419000 [ 1.620337] [<c0013564>] (show_stack) from [<c0295998>] (dump_stack+0x24/0x28) [ 1.627937] [<c0295974>] (dump_stack) from [<c03c1e24>] (validate_ec_hdr+0xc0/0x12c) [ 1.636077] [<c03c1d64>] (validate_ec_hdr) from [<c03c2a6c>] (ubi_io_read_ec_hdr+0x168/0x218) [ 1.645047] r7:cf027000 r6:55424923 r5:cf419000 r4:00000000 [ 1.651012] [<c03c2904>] (ubi_io_read_ec_hdr) from [<c03c75d0>] (ubi_attach+0x164/0x14b8) [ 1.659607] r10:cf3e3c80 r9:c07d5b1c r8:00000000 r7:cf027000 r6:00000000 r5:cf027000 [ 1.667854] r4:00000000 [ 1.670519] [<c03c746c>] (ubi_attach) from [<c03bc768>] (ubi_attach_mtd_dev+0x6d0/0xc50) [ 1.679011] r10:00000800 r9:00000840 r8:cf3d8400 r7:cf027000 r6:00000000 r5:cf3d8400 [ 1.687256] r4:fffff800 [ 1.689923] [<c03bc098>] (ubi_attach_mtd_dev) from [<c0743300>] (ubi_init+0x1c8/0x250) [ 1.698240] r10:0000006e r9:c079d600 r8:00000000 r7:c0756734 r6:c0756738 r5:cf3d8400 [ 1.706487] r4:00000000 [ 1.709153] [<c0743138>] (ubi_init) from [<c00096a4>] (do_one_initcall+0x98/0x1e0) [ 1.717099] r8:00000000 r7:cf3e6a80 r6:c07623a0 r5:c0743138 r4:c07623a0 [ 1.724169] [<c000960c>] (do_one_initcall) from [<c0722e84>] (kernel_init_freeable+0x138/0x1dc) [ 1.733301] r8:c07225ec r7:c0751838 r6:c0751834 r5:c079d600 r4:00000007 [ 1.740386] [<c0722d4c>] (kernel_init_freeable) from [<c053948c>] (kernel_init+0x10/0xf0) [ 1.748973] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c053947c [ 1.757220] r4:00000000 [ 1.759887] [<c053947c>] (kernel_init) from [<c000f980>] (ret_from_fork+0x14/0x34) [ 1.767835] r5:c053947c r4:00000000 [ 1.771596] ubi0 error: ubi_io_read_ec_hdr: validation failed for PEB 0 [ 1.778549] ubi0 error: ubi_attach_mtd_dev: failed to attach mtd9, error -22 [ 1.785991] UBI error: cannot attach mtd9 [ 1.790295] hctosys: unable to open rtc device (rtc0) [ 1.801005] UBIFS error (pid: 1): cannot open "ubi0:rootfs", error -19VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0): error -19 [ 1.814905] Please append a correct "root=" boot option; here are the available partitions: [ 1.823726] 1f00 128 mtdblock0 (driver?) [ 1.829039] 1f01 128 mtdblock1 (driver?) [ 1.834351] 1f02 128 mtdblock2 (driver?) [ 1.839661] 1f03 128 mtdblock3 (driver?) [ 1.844974] 1f04 256 mtdblock4 (driver?) [ 1.850282] 1f05 1024 mtdblock5 (driver?) [ 1.855606] 1f06 128 mtdblock6 (driver?) [ 1.860915] 1f07 128 mtdblock7 (driver?) [ 1.866245] 1f08 8192 mtdblock8 (driver?) [ 1.871553] 1f09 251904 mtdblock9 (driver?) [ 1.876884] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) Now I'm terrified!! This reminds me for years back when I tried to boot from 3.x kernel written ubifs partition from u-boot. I never managed in that. I could touch ubifs filesystem from Linux or u-boot, but if I did so from Linux, I could not touch it from u-boot anymore and vice versa. Later on it worked with newer u-boot. Procedure I did now from SD card booted linux 4.4 for writing rootfs to mtdblock9 is listed below: ------------------------------------------------- flash_erase /dev/mtd9 0 0 > /dev/null ubiformat /dev/mtd9 > /dev/null ubiattach -p /dev/mtd9 > /dev/null ubimkvol -N rootfs -m /dev/ubi0 > /dev/null mkdir -p /mnt/flash mount -t ubifs ubi0:rootfs /mnt/flash > /dev/null tar -C /mnt/flash -xf rootfs.tgz > /dev/null sync umount /mnt/flash > /dev/null ubidetach -p /dev/mtd9 > /dev/null ------------------------------------------------- Did I do anything wrong in creating that? It is quite accessible from Linux. Do anyone know how to fix this problem? Have nand boot been tested with am335x_evm board? I'm somewhat worried about that as there was that nand0 device in boot_targets... Thanks, Matti

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[U-Boot] [PATCH v2 0/14] sunxi: Add support for the CHIP Pro
by Maxime Ripard 09 Jan '17

09 Jan '17

The CHIP Pro is a SoM made by NextThing Co, and that embeds a GR8 SIP, an AXP209 PMIC, a WiFi BT chip and a 512MB SLC NAND. Since the first Allwinner device coming whit an SLC NAND that doesn't have the shortcomings (and breakages) the MLC NAND has, we can finally enable the NAND support on a board by default. This is the occasion to introduce a bunch of additions needed imo to be able to come up with a sane NAND support for our users. The biggest pain point is that the BROM uses a different ECC and randomizer configuration than for the rest of the NAND. In order to lessen the number of bitflips, you also need to pad with random data the SPL image. Since it's quite tedious to do right (and most users won't be able to figure it out) and since if it is not done right, it will eventually turn into an unusable system (which is bad UX), we think that the best solution is to generate an SPL image that already embeds all this. We'll possible have to do the same thing for the U-Boot image (at least for the random padding) on MLC NANDs. The only drawback from that is that you need to flash it raw, instead of using the usual nand write, but it's just a different command, nothing major anyway. In order to flash it, from a device switched in FEL, on your host: sunxi-fel spl spl/sunxi-spl.bin sunxi-fel write 0x4a000000 u-boot-dtb.bin sunxi-fel write 0x43000000 spl/sunxi-spl-with-ecc.bin sunxi-fel exe 0x4a000000 And on the board, once u-boot is running (assuming the NAND is already erased): nand write.raw.noverify 0x43000000 0 40 nand write.raw.noverify 0x43000000 0x400000 40 nand write 0x4a000000 0x800000 0xc0000 I also encountered some weird bug in the private libgcc that prevents U-Boot from loading. Disabling CONFIG_USE_PRIVATE_LIBGCC fixes that. Let me know what you think, Maxime Changes from v1: - Allowed to build lib/bch.c for the host, and used that in the image builder - Fixed a bug in the NAND driver - Wrote a documentation on how to flash a NAND image on an Allwinner board - Fixed a few compilation breakages and issues - Moved U-boot offset out of the config header and into Kconfig - Moved the environment into UBI - Moved the environment selection to Kconfig - Moved the CMD_MTDPARTS options to Kconfig - Provide MTDIDS_DEFAULT and MTDPARTS_DEFAULT options through Kconfig - Added the tags from everyone Boris Brezillon (1): mtd: nand: add support for the TC58NVG2S0H chip Hans de Goede (1): sunxi: Enable UBI and NAND support Maxime Ripard (12): nand: sunxi: Fix modulo by zero error bch: Allow to build for the host tools: sunxi: Add spl image builder common: Move environment choice to Kconfig cmd: Add Kconfig option for CMD_MTDPARTS and related options mtd: sunxi: Select the U-Boot location config option mtd: sunxi: Change U-Boot offset sunxi: Add the default mtdids and mtdparts to our env nand: sunxi: Add options for the SPL NAND configuration scripts: sunxi: Build an raw SPL image sunxi: Sync GR8 DTS and AXP209 with the kernel sunxi: Add support for the CHIP Pro Makefile | 3 +- arch/arm/dts/Makefile | 1 +- arch/arm/dts/axp209.dtsi | 6 +- arch/arm/dts/ntc-gr8-chip-pro.dts | 266 +++++++- arch/arm/dts/ntc-gr8.dtsi | 1132 ++++++++++++++++++++++++++++++- board/sunxi/Kconfig | 8 +- board/sunxi/README.nand | 54 +- cmd/Kconfig | 19 +- cmd/mtdparts.c | 8 +- common/Kconfig | 65 ++- configs/CHIP_pro_defconfig | 32 +- drivers/mtd/nand/Kconfig | 19 +- drivers/mtd/nand/nand_ids.c | 3 +- drivers/mtd/nand/sunxi_nand_spl.c | 7 +- include/configs/sunxi-common.h | 44 +- include/environment.h | 2 +- lib/bch.c | 48 +- scripts/Makefile.spl | 15 +- tools/.gitignore | 1 +- tools/Makefile | 2 +- tools/sunxi-spl-image-builder.c | 484 +++++++++++++- 21 files changed, 2204 insertions(+), 15 deletions(-) create mode 100644 arch/arm/dts/ntc-gr8-chip-pro.dts create mode 100644 arch/arm/dts/ntc-gr8.dtsi create mode 100644 board/sunxi/README.nand create mode 100644 configs/CHIP_pro_defconfig create mode 100644 tools/sunxi-spl-image-builder.c base-commit: d8bdfc80da39211d95f10d24e79f2e867305f71b -- git-series 0.8.11

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