June 2016 - U-Boot

[U-Boot] [PATCH V2 1/3] mmc: fsl: reset to normal boot mode when eMMC fast boot
by Peng Fan 28 Jun '16

28 Jun '16

When booting in eMMC fast boot, MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Also clear DLL_CTRL delay line settings at USDHC initialization to eliminate the pre-settings from boot rom. Signed-off-by: Peng Fan <van.freenix(a)gmail.com> Cc: Pantelis Antoniou <panto(a)antoniou-consulting.com> Cc: York Sun <york.sun(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> --- V2: Rebased to lastest u-boot master drivers/mmc/fsl_esdhc.c | 38 +++++++++++++++++++++++++++++--------- include/fsl_esdhc.h | 6 ++++++ 2 files changed, 35 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 57ad975..9cd582f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -56,21 +56,27 @@ struct fsl_esdhc { uint fevt; /* Force event register */ uint admaes; /* ADMA error status register */ uint adsaddr; /* ADMA system address register */ - char reserved2[100]; /* reserved */ - uint vendorspec; /* Vendor Specific register */ - char reserved3[56]; /* reserved */ + char reserved2[4]; + uint dllctrl; + uint dllstat; + uint clktunectrlstatus; + char reserved3[84]; + uint vendorspec; + uint mmcboot; + uint vendorspec2; + char reserved4[48]; uint hostver; /* Host controller version register */ - char reserved4[4]; /* reserved */ - uint dmaerraddr; /* DMA error address register */ char reserved5[4]; /* reserved */ - uint dmaerrattr; /* DMA error attribute register */ + uint dmaerraddr; /* DMA error address register */ char reserved6[4]; /* reserved */ + uint dmaerrattr; /* DMA error attribute register */ + char reserved7[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities register 2 */ - char reserved7[8]; /* reserved */ + char reserved8[8]; /* reserved */ uint tcr; /* Tuning control register */ - char reserved8[28]; /* reserved */ + char reserved9[28]; /* reserved */ uint sddirctl; /* SD direction control register */ - char reserved9[712]; /* reserved */ + char reserved10[712];/* reserved */ uint scr; /* eSDHC control register */ }; @@ -616,6 +622,20 @@ static int esdhc_init(struct mmc *mmc) while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTA) && --timeout) udelay(1000); +#if defined(CONFIG_FSL_USDHC) + /* RSTA doesn't reset MMC_BOOT register, so manually reset it */ + esdhc_write32(&regs->mmcboot, 0x0); + /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */ + esdhc_write32(&regs->mixctrl, 0x0); + esdhc_write32(&regs->clktunectrlstatus, 0x0); + + /* Put VEND_SPEC to default value */ + esdhc_write32(&regs->vendorspec, VENDORSPEC_INIT); + + /* Disable DLL_CTRL delay line */ + esdhc_write32(&regs->dllctrl, 0x0); +#endif + #ifndef ARCH_MXC /* Enable cache snooping */ esdhc_write32(&regs->scr, 0x00000040); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index fa760a5..78c67c8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -35,6 +35,12 @@ #define SYSCTL_RSTC 0x02000000 #define SYSCTL_RSTD 0x04000000 +#define VENDORSPEC_CKEN 0x00004000 +#define VENDORSPEC_PEREN 0x00002000 +#define VENDORSPEC_HCKEN 0x00001000 +#define VENDORSPEC_IPGEN 0x00000800 +#define VENDORSPEC_INIT 0x20007809 + #define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) #define IRQSTAT_AC12E (0x01000000) -- 2.6.2

3 8

[U-Boot] [Patch V2 1/3] armv8: ls1043aqds: fix to get boot device info from FPGA
by Gong Qianyu 28 Jun '16

28 Jun '16

The LBMAP switches on the board will tell which boot device is used. Only QSPI boot is supported if the boot device is IFCCard. Signed-off-by: Gong Qianyu <Qianyu.Gong(a)nxp.com> --- board/freescale/ls1043aqds/ls1043aqds.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 7e47ef0..9447c93 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -47,7 +47,7 @@ enum { int checkboard(void) { char buf[64]; -#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT) +#ifndef CONFIG_SD_BOOT u8 sw; #endif @@ -55,8 +55,6 @@ int checkboard(void) #ifdef CONFIG_SD_BOOT puts("SD\n"); -#elif defined(CONFIG_QSPI_BOOT) - puts("QSPI\n"); #else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -67,8 +65,8 @@ int checkboard(void) puts("PromJet\n"); else if (sw == 0x9) puts("NAND\n"); - else if (sw == 0x15) - printf("IFCCard\n"); + else if (sw == 0xF) + printf("QSPI\n"); else printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); #endif -- 2.1.0.27.g96db324

2 3

[U-Boot] [PATCH] armv8/fsl_lsch2: Correct the cores frequency initialization
by Zhiqiang Hou 28 Jun '16

28 Jun '16

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> The register CLKCNCSR controls the frequency of all cores in the same cluster. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 453a93d..d57f4da 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -11,6 +11,7 @@ #include <asm/arch/clock.h> #include <asm/arch/soc.h> #include <fsl_ifc.h> +#include "cpu.h" DECLARE_GLOBAL_DATA_PTR; @@ -44,7 +45,7 @@ void get_sys_info(struct sys_info *sys_info) [5] = 2, /* CC2 PPL / 2 */ }; - uint i; + uint i, cluster; uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; unsigned long sysclk = CONFIG_SYS_CLK_FREQ; @@ -71,8 +72,9 @@ void get_sys_info(struct sys_info *sys_info) freq_c_pll[i] = sys_info->freq_systembus * ratio[i]; } - for (cpu = 0; cpu < CONFIG_MAX_CPUS; cpu++) { - u32 c_pll_sel = (in_be32(&clk->clkcsr[cpu].clkcncsr) >> 27) + for_each_cpu(i, cpu, cpu_numcores(), cpu_mask()) { + cluster = fsl_qoriq_core_to_cluster(cpu); + u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27) & 0xf; u32 cplx_pll = core_cplx_pll[c_pll_sel]; -- 2.1.0.27.g96db324

2 1

[U-Boot] uImage load address and entry point with Minnowboard
by vinoth eswaran 28 Jun '16

28 Jun '16

Hello, I am working on an embedded project to optimize the boot time on minnowboard. Currently I am working with the u-boot. With compressed kernel (bzImage) everything works fine, I want to check the performance with uncompressed kernel (vmlinux). I have found that u-boot cannot support the raw vmlinux and I need to generate the uImage using the u-boot tools. I tried creating the uImage from the vmlinux --but I did not understand what does the -a (load address) and -e (entry point ) points to? I assume that it is the same load address used when loading the kernel image from sd card to RAM. uImage creation: mkimage -A x86 -O linux -T kernel -a 0x01000000 -e 0x01000000 -n Linux -d vmlinux uImage Image Name: Linux Created: Wed Jun 22 16:31:07 2016 Image Type: Intel x86 Linux Kernel Image (gzip compressed) Data Size: 21966248 Bytes = 21451.41 kB = 20.95 MB Load Address: 01000000 Entry Point: 01000000 Now at start up I am seeing that the kernel is not running, Seeing the following error messages, reading uImage 21966312 bytes read in 481 ms (43.6 MiB/s) Wrong Image Format for bootm command ERROR: can't get kernel image! The bootcmd is "bootcmd=fatload mmc 0:1 01000000 uImage ; bootm 01000000" Do you have any idea why it is happening? Mit Freundlichen Grüßen VinothKumar +49 1798909072

4 9

[U-Boot] Radxa Rock2 square bug report (kernel won't load)
by Sandy Patterson 28 Jun '16

28 Jun '16

Hi, I am attempting to use U-Boot on a radxa rock2 board, and noticed that the latest release of u-boot doesn't allow the kernel to boot. I am including a boot log below. I was able to get a working u-boot which boots my kernel by compiling v2016.03. (git://git.denx.de/u-boot.git) I traced a bit and found two commits which seem to break things, but I stopped there. 1) ed980b8c62fbe17052ec6151a68b5b0be3809485 after this commit I am able to get a working uboot with this patch: diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index fd32fb5..c2780c4 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -67,3 +67,4 @@ CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_EFI_LOADER=n 2) c09d29057ab0b04db0857d319c6bff74de31b9c3 I wasn't able to find a solution here. I am using this toolchain: android-platform-prebuilts-gcc-linux-x86-arm-arm-eabi-4.6 Is there a better option for u-boot in general? I'm able to test and do some limited troubleshooting, but I don't think I can delve into dram init assembly code. I believe that v2016.03 is sufficient for our purposes, so this isn't critical for us. Just a friendly bug report. Good luck, Sandy Patterson U-Boot SPL 2016.05 (Jun 28 2016 - 09:57:30) Trying to boot from MMC1 I see a similar log in master: U-Boot 2016.05 (Jun 28 2016 - 09:57:30 -0400) Model: Radxa Rock 2 Square DRAM: 2 GiB MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1 ** First descriptor is NOT a primary desc on 0:1 ** stdio_add_devices: Video device failed (ret=-19) In: serial Out: serial Err: serial Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 5244128 bytes read in 390 ms (12.8 MiB/s) 41982 bytes read in 14 ms (2.9 MiB/s) 10534400 bytes read in 775 ms (13 MiB/s) Kernel image @ 0x2000000 [ 0x000000 - 0x5004e0 ] ## Flattened Device Tree blob at 01f00000 Booting using the fdt blob at 0x1f00000 Loading Ramdisk to 1f5f4000, end 1ffffe00 ... OK Loading Device Tree to 1f5e6000, end 1f5f33fd ... OK Starting kernel ... Reset not supported on this platform ### ERROR ### Please RESET the board ###

1 0

[U-Boot] comments: [PATCH v7 3/3] common: usb_storage: Implement logic to calculate optimal usb maximum trasfer blocks
by Matthew Bright 28 Jun '16

28 Jun '16

Hi Rajesh & Marek I have spend the last couple of days testing this patch and have a few review comments: On 06/16/2016 12:35 PM, Rajesh Bhagat wrote: > Implements the logic to calculate the optimal usb maximum trasfer blocks > instead of sending USB_MAX_XFER_BLK blocks which is 65535 and 20 in case > of EHCI and other USB protocols respectively. > > It defines USB_MIN_XFER_BLK/USB_MAX_XFER_BLK trasfer blocks that should > be checked for success starting from minimum to maximum, and rest of the > read/write are performed with that optimal value. It tries to increase/ > decrease the blocks in follwing scenarios: > > 1.decrease blocks: when read/write for a particular number of blocks > fails. > 2. increase blocks: when read/write for a particular number of blocks > pass and amount left to trasfer is greater than current number of > blocks. > > Currently changes are done for EHCI where min = 4096 and max = 65535 > is taken. And for other cases code is left unchanged by keeping min > = max = 20. > > Signed-off-by: Sriram Dash <sriram.dash at nxp.com> > Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com> > Reviewed-by: Simon Glass <sjg at chromium.org> > --- > Changes in v7: > - None > > Changes in v6: > - Adds paranthesis around macro variables > - Removes extra ternary operator from dec_cur_xfer_blks > - Clamps the size to min(blks, USB_MAX_XFER_BLK) in inc_cur_xfer_blks > > Changes in v5: > - None > > Changes in v4: > - Adds udev paramater in dec/inc_cur_xfer_blks function and adds > sanity check on it. > - Changes type of pos varible to unsigned int in dec/inc_cur_xfer_blks > - Removes usage of pos varible from usb_stor_read/write > > Changes in v3: > - Adds cur_xfer_blks in struct usb_device to retain values > - Adds functions dec/inc_cur_xfer_blks to remove code duplication > - Moves check from macro to calling functions > > Changes in v2: > - Removes table to store blocks and use formula (1 << (12 + n)) - 1 > - Adds logic to start from minimum, go to maximum in each read/write > > common/usb_storage.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++---- > include/usb.h | 1 + > 2 files changed, 62 insertions(+), 5 deletions(-) > > diff --git a/common/usb_storage.c b/common/usb_storage.c > index a7d84bf..93b901c 100644 > --- a/common/usb_storage.c > +++ b/common/usb_storage.c > @@ -106,11 +106,16 @@ struct us_data { > * enough free heap space left, but the SCSI READ(10) and WRITE(10) commands are > * limited to 65535 blocks. > */ Should this also include CONFIG_USB_XHCI? It appears that it is currently limited to the fixed 20 blocks. > +#define USB_MIN_XFER_BLK 4095 Where did this number 4095 come from; is 4095 blocks low enough? It surprises me that USB_MIN_XFER_BLK has been set so high, when the linux default is 240 blocks and the windows default is 128 blocks. Further, there appears to be some devices that will only support up to 64 blocks. http://lists.denx.de/pipermail/u-boot/2016-February/246250.html Maybe we could define a mid value for the transfer to start at; giving room to move in both directions dependent on the outcome of the transfer: #define USB_MIN_XFER_BLK 64 #define USB_MID_XFER_BLK 4095 #define USB_MAX_XFER_BLK 65535 However the 5 second delay incurred for each ehci timeout would make working all the way down to 64 blocks painfully slow. Maybe if the first transfer fails (at 4095 blocks) then it should jump straight to 64 blocks and work its way up on each success. > #define USB_MAX_XFER_BLK 65535 > #else > +#define USB_MIN_XFER_BLK 20 > #define USB_MAX_XFER_BLK 20 > #endif > > +#define GET_CUR_XFER_BLKS(blks) (LOG2(((blks) + 1) / (USB_MIN_XFER_BLK + 1))) > +#define CALC_CUR_XFER_BLKS(pos) ((1 << (12 + (pos))) - 1) > + > #ifndef CONFIG_BLK > static struct us_data usb_stor[USB_MAX_STOR_DEV]; > #endif > @@ -141,6 +146,44 @@ static void usb_show_progress(void) > debug("."); > } > > +static int dec_cur_xfer_blks(struct usb_device *udev) > +{ > + /* decrease the cur_xfer_blks */ > + unsigned int pos; > + unsigned short size; > + > + if (!udev) > + return -EINVAL; > + > + pos = GET_CUR_XFER_BLKS(udev->cur_xfer_blks); > + size = CALC_CUR_XFER_BLKS(pos - 1); > + > + if (size < USB_MIN_XFER_BLK) > + return -EINVAL; > + > + udev->cur_xfer_blks = size; > + return 0; > +} > + > +static int inc_cur_xfer_blks(struct usb_device *udev, lbaint_t blks) > +{ > + /* try to increase the cur_xfer_blks */ > + unsigned int pos; > + unsigned short size; > + > + if (!udev) > + return -EINVAL; > + > + pos = GET_CUR_XFER_BLKS(udev->cur_xfer_blks); > + size = CALC_CUR_XFER_BLKS(pos + 1); > + > + if (size > min(blks, (lbaint_t)USB_MAX_XFER_BLK)) > + return -EINVAL; > + > + udev->cur_xfer_blks = size; > + return 0; > +} > + > /******************************************************************************* > * show info on storage devices; 'usb start/init' must be invoked earlier > * as we only retrieve structures populated during devices initialization > @@ -1102,6 +1145,7 @@ static unsigned long usb_stor_read_write(struct blk_desc *block_dev, > struct usb_device *udev; > struct us_data *ss; > int retry; > + bool retry_flag = false; > ccb *srb = &usb_ccb; > #ifdef CONFIG_BLK > struct blk_desc *block_dev; > @@ -1141,26 +1185,35 @@ static unsigned long usb_stor_read_write(struct blk_desc *block_dev, > */ > retry = 2; > srb->pdata = (unsigned char *)buf_addr; > - if (blks > USB_MAX_XFER_BLK) > - smallblks = USB_MAX_XFER_BLK; > + if (blks > udev->cur_xfer_blks) > + smallblks = udev->cur_xfer_blks; > else > smallblks = (unsigned short) blks; > retry_it: > - if (smallblks == USB_MAX_XFER_BLK) > + debug("%s: retry #%d, cur_xfer_blks %hu, smallblks %hu\n", > + __func__, retry, udev->cur_xfer_blks, smallblks); > + if (smallblks == udev->cur_xfer_blks) > usb_show_progress(); > srb->datalen = block_dev->blksz * smallblks; > srb->pdata = (unsigned char *)buf_addr; > if (usb_read_write_10(srb, ss, start, smallblks, is_write)) { > debug("%s ERROR\n", __func__); > usb_request_sense(srb, ss); > - if (retry--) > + if (retry--) { > + if (!dec_cur_xfer_blks(udev)) > + smallblks = udev->cur_xfer_blks; There is a potential error here: 1. A previous transfer has set udev->cur_xfer_blks=8191. 2. A current transfer with smallblks=10 fails (for whatever reason). 3. Both udev->cur_xfer_blks and smallblks are set to 4095 blocks. 4. The retry transfer will now occur with 4085 too many blocks. The smallblks should not be assigned here; instead the retry_it label should be moved to include the the four lines of code above it, which take into account the current blks value. > + retry_flag = true; > goto retry_it; > + } > blkcnt -= blks; > break; > } > start += smallblks; > blks -= smallblks; > buf_addr += srb->datalen; > + > + if (!retry_flag && !inc_cur_xfer_blks(udev, blks)) There is a potential error here: 1. A previous transfer has set udev->cur_xfer_blks=8191, after a transfer with 16383 blocks caused an ehci time out error. 2. As retry_flag has been defined locally, all new transfers will again attempt to use 16383, which will cause another ehci time our error (each new transfer incurring another 5 second delay). I am not sure if this is the intended behavior. Maybe we do want to reattempt larger values on new transfers to weed out erroneous errors, however a 5 second delay on every new transfer is a steep price to pay for this. I suspect that once we have fallen back to a lower value, that we will want to stick to that lower value for all future transfers (on that specific device). A solution could be to replace the retry_flag with something like dev->xfer_throttled or dev->xfer_rate_limited. > + smallblks = udev->cur_xfer_blks; > } while (blks != 0); > ss->flags &= ~USB_READY; > > @@ -1169,7 +1222,7 @@ retry_it: > __func__, start, smallblks, buf_addr); > > usb_disable_asynch(0); /* asynch transfer allowed */ > - if (blkcnt >= USB_MAX_XFER_BLK) > + if (blkcnt >= udev->cur_xfer_blks) > debug("\n"); > return blkcnt; > } > @@ -1256,6 +1309,9 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum, > break; > } > > + /* Initialize the current transfer blocks to minimum value */ > + dev->cur_xfer_blks = USB_MIN_XFER_BLK; > + > /* > * We are expecting a minimum of 2 endpoints - in and out (bulk). > * An optional interrupt is OK (necessary for CBI protocol). > diff --git a/include/usb.h b/include/usb.h > index 02a0ccd..b815816 100644 > --- a/include/usb.h > +++ b/include/usb.h > @@ -153,6 +153,7 @@ struct usb_device { > struct udevice *dev; /* Pointer to associated device */ > struct udevice *controller_dev; /* Pointer to associated controller */ > #endif > + unsigned short cur_xfer_blks; /* Current maximum transfer blocks */ > }; > > struct int_queue; > -- > 2.6.2.198.g614a2ac > Cheers. - Matt Bright

2 1

[U-Boot] [PATCH 1/2] ARM: move #ifdef to match the error handling code
by Masahiro Yamada 28 Jun '16

28 Jun '16

Match the #ifdef ... #endif and the code, ret = do_something(); if (ret) return ret; This will make it easier to add more #ifdef'ed code. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- arch/arm/lib/bootm-fdt.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index 7677358..76b75d8 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -42,11 +42,14 @@ int arch_fixup_fdt(void *blob) } ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); -#ifdef CONFIG_ARMV7_NONSEC if (ret) return ret; +#ifdef CONFIG_ARMV7_NONSEC ret = psci_update_dt(blob); + if (ret) + return ret; #endif - return ret; + + return 0; } -- 1.9.1

8 14

[U-Boot] [PATCH 0/3] Add generic ioremap / iounmap defines
by Masahiro Yamada 28 Jun '16

28 Jun '16

I ran Buildman for the whole series, and I did not see any regression. 01: Merge branch 'master' of git://git.denx.de/u-boot-uniphier openrisc: + openrisc-generic arc: + tb100 axs101 axs103 blackfin: + bf533-stamp cm-bf527 arm: + socfpga_is1 powerpc: + P1022DS_36BIT_NAND T2080QDS_SPIFLASH T1042RDB_PI_SPIFLASH P1010RDB-PA_36BIT_NAND P1010RDB-PB_SDCARD T1042D4RDB_NAND T4240RDB_SDCARD P1010RDB-PB_36BIT_NAND P1022DS_36BIT_SDCARD P1010RDB-PB_36BIT_SDCARD P1022DS_NAND T4160QDS_NAND T1042RDB_PI_NAND T2080RDB_NAND P1022DS_SDCARD T1042RDB_PI_SDCARD T2081QDS_NAND T4160QDS_SDCARD T2080QDS_SDCARD T4240QDS_SDCARD P1010RDB-PA_SPIFLASH T1040RDB_SDCARD B4860QDS_NAND P1010RDB-PA_36BIT_SDCARD T1040D4RDB_SDCARD T1040D4RDB_SPIFLASH T2080QDS_NAND T1040D4RDB_NAND P1010RDB-PB_SPIFLASH P1010RDB-PA_NAND T1040RDB_SPIFLASH kmcoge4 T2081QDS_SDCARD T2081QDS_SPIFLASH T4240QDS_NAND B4420QDS_NAND T1040RDB_NAND P1010RDB-PA_SDCARD T2080RDB_SPIFLASH P1010RDB-PB_NAND T1042D4RDB_SPIFLASH P1022DS_SPIFLASH T1042D4RDB_SDCARD kmlion1 P1022DS_36BIT_SPIFLASH P1010RDB-PB_36BIT_SPIFLASH T2080RDB_SDCARD P1010RDB-PA_36BIT_SPIFLASH [snip lots of error messages we have in the mainline] 02: types.h: move and redefine resource_size_t 03: arm, nds32, sh: remove useless ioremap()/iounmap() defines 04: linux/io.h: add generic ioremap()/iounmap() defines Masahiro Yamada (3): types.h: move and redefine resource_size_t arm, nds32, sh: remove useless ioremap()/iounmap() defines linux/io.h: add generic ioremap()/iounmap() defines arch/arm/include/asm/io.h | 34 ---------------------------------- arch/arm/include/asm/types.h | 1 - arch/nds32/include/asm/io.h | 34 ---------------------------------- arch/sh/include/asm/io.h | 33 --------------------------------- include/linux/io.h | 16 ++++++++++++++++ include/linux/types.h | 4 ++++ 6 files changed, 20 insertions(+), 102 deletions(-) -- 1.9.1

2 5

[U-Boot] [PATCH v2 0/5] Update fastboot sparse image handling
by Steve Rae 28 Jun '16

28 Jun '16

While retaining the storage abstraction feature implemented in U-Boot, this series updates the fastboot sparse image handling by (1) fixing broken code, (2) resync'ing with the upstream code, and (3) improving performance when writing CHUNK_TYPE_FILL Changes in v2: - series rebased onto v2016.07-rc1 Steve Rae (5): fastboot: sparse: remove session-id logic fastboot: sparse: resync common/image-sparse.c (part 1) fastboot: sparse: resync common/image-sparse.c (part 2) fastboot: sparse: implement reserve() fastboot: sparse: improve CHUNK_TYPE_FILL write performance common/fb_mmc.c | 79 +++---- common/fb_nand.c | 106 +++++---- common/image-sparse.c | 478 +++++++++++++++------------------------- drivers/usb/gadget/f_fastboot.c | 47 ++-- include/fastboot.h | 4 +- include/fb_mmc.h | 7 +- include/fb_nand.h | 7 +- include/image-sparse.h | 29 ++- 8 files changed, 312 insertions(+), 445 deletions(-) -- 1.8.5

4 22

[U-Boot] please pull u-boot-samsung master
by Minkyu Kang 28 Jun '16

28 Jun '16

Dear Tom, The following changes since commit 4141e85bcd79c0b9b16def710e527f165107b7af: kbuild: avoid race between dtbs and dt/dt.dtb targets (2016-06-24 17:24:41 -0400) are available in the git repository at: git://git.denx.de/u-boot-samsung master for you to fetch changes up to ca2ec9adc951cc3798e9b0c3773cdcc613232a22: mmc: dw_mmc: fix the wrong AND operation (2016-06-27 09:43:26 +0900) ---------------------------------------------------------------- Jaehoon Chung (1): mmc: dw_mmc: fix the wrong AND operation drivers/mmc/dw_mmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- Thanks, Minkyu Kang.

2 1