June 2016 - U-Boot

[U-Boot] [PATCH] sunxi: Add support for eth1addr
by Hans de Goede 30 Jun '16

30 Jun '16

Currently we will already fill ethaddr with a fixed unique address based on the SoCs serial (from the sid) to make sure that boards which use the integrated emac / gmac get a fixed mac rather then a random one. On some boards (observed on 2 tablets using sdio rtl8703as wifi chips) the wifi does not come with a fixed mac either, so also set eth1addr, so that dts files can set an ethernet1 alias to get mac-address and local-mac-address filled for dt nodes describing the wifi controller. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- board/sunxi/board.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index b5a50f4..41d796c 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -641,6 +641,18 @@ int misc_init_r(void) eth_setenv_enetaddr("ethaddr", mac_addr); } + if (!getenv("eth1addr")) { + /* Non OUI / registered MAC address */ + mac_addr[0] = 0x12; + mac_addr[1] = (sid[0] >> 0) & 0xff; + mac_addr[2] = (sid[3] >> 24) & 0xff; + mac_addr[3] = (sid[3] >> 16) & 0xff; + mac_addr[4] = (sid[3] >> 8) & 0xff; + mac_addr[5] = (sid[3] >> 0) & 0xff; + + eth_setenv_enetaddr("eth1addr", mac_addr); + } + if (!getenv("serial#")) { snprintf(serial_string, sizeof(serial_string), "%08x%08x", sid[0], sid[3]); -- 2.7.4

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[U-Boot] [PATCH 00/11] ARM: uniphier: pinctrl and DT fixes/updates
by Masahiro Yamada 30 Jun '16

30 Jun '16

Masahiro Yamada (11): pinctrl: uniphier: remove wrong pin-mux functions for ProXstream2 pinctrl: uniphier: fix NAND pin-mux setting for PH1-LD11/LD20 pinctrl: uniphier: remove unneeded pin group nand_cs1 ARM: dts: uniphier: sync Device Trees with upstream Linux pinctrl: uniphier: allow to have pinctrl node under syscon node pinctrl: uniphier: split pinctrl driver for PH1-LD11 and PH1-LD20 pinctrl: uniphier: support pin configuration for dedicated pins pinctrl: uniphier: avoid building unneeded pin-mux tables for SPL pinctrl: uniphier: add ethernet pin-mux settings ARM: dts: uniphier: add AIDET nodes ARM: uniphier: add external IRQ settings arch/arm/dts/uniphier-common32.dtsi | 22 ++++- arch/arm/dts/uniphier-ph1-ld11-ref.dts | 13 +-- arch/arm/dts/uniphier-ph1-ld11.dtsi | 50 ++++++++-- arch/arm/dts/uniphier-ph1-ld20-ref.dts | 10 -- arch/arm/dts/uniphier-ph1-ld20.dtsi | 35 +++++-- arch/arm/dts/uniphier-ph1-ld4-ref.dts | 10 -- arch/arm/dts/uniphier-ph1-ld4.dtsi | 7 +- arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 10 -- arch/arm/dts/uniphier-ph1-ld6b.dtsi | 4 +- arch/arm/dts/uniphier-ph1-pro4-ace.dts | 10 -- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 10 -- arch/arm/dts/uniphier-ph1-pro4-sanji.dts | 10 -- arch/arm/dts/uniphier-ph1-pro4.dtsi | 7 +- arch/arm/dts/uniphier-ph1-pro5-4kbox.dts | 10 -- arch/arm/dts/uniphier-ph1-pro5.dtsi | 7 +- arch/arm/dts/uniphier-ph1-sld3.dtsi | 5 + arch/arm/dts/uniphier-ph1-sld8-ref.dts | 10 -- arch/arm/dts/uniphier-ph1-sld8.dtsi | 7 +- arch/arm/dts/uniphier-pinctrl.dtsi | 10 ++ arch/arm/dts/uniphier-proxstream2-gentil.dts | 10 -- arch/arm/dts/uniphier-proxstream2-vodka.dts | 10 -- arch/arm/dts/uniphier-proxstream2.dtsi | 7 +- arch/arm/dts/uniphier-ref-daughter.dtsi | 2 +- arch/arm/mach-uniphier/board_early_init_f.c | 39 ++++++++ arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c | 5 + drivers/pinctrl/uniphier/Kconfig | 10 +- drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 15 ++- drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 107 +++++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 95 ++++++++++--------- drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c | 93 ++++++++++-------- drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 97 ++++++++++--------- drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 110 ++++++++++++--------- drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 91 +++++++++--------- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 116 +++++++++++++---------- drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c | 87 +++++++++-------- drivers/pinctrl/uniphier/pinctrl-uniphier.h | 23 ++++- 37 files changed, 712 insertions(+), 453 deletions(-) create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c -- 1.9.1

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[U-Boot] [PATCH] ARM: uniphier: fix typo "talbe"
by Masahiro Yamada 30 Jun '16

30 Jun '16

Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- arch/arm/mach-uniphier/arm32/lowlevel_init.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index e2bb1fc..cc34116 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -29,7 +29,7 @@ ENTRY(lowlevel_init) bl debug_ll_init #endif - bl setup_init_ram @ RAM area for stack and page talbe + bl setup_init_ram @ RAM area for stack and page table /* * Now we are using the page table embedded in the Boot ROM. -- 1.9.1

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[U-Boot] [PATCH] sunxi: spl: Fix DRAM info printing
by Hans de Goede 30 Jun '16

30 Jun '16

The switch to simple_printf was causing the SPL dram info to show as: DRAM: u MiB This fixes this by switching from %lu to %d for printing the DRAM size. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- board/sunxi/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 41d796c..97aaa6d 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -529,7 +529,7 @@ void sunxi_board_init(void) #endif printf("DRAM:"); ramsize = sunxi_dram_init(); - printf(" %lu MiB\n", ramsize >> 20); + printf(" %d MiB\n", (int)(ramsize >> 20)); if (!ramsize) hang(); -- 2.7.4

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[U-Boot] [PATCH] SPL: sunxi: don't force .BSS into DRAM
by Andre Przywara 30 Jun '16

30 Jun '16

Probably due to some (ill-founded) fear of a large BSS all sunxi boards forced their SPL BSS section into DRAM. This only works if there is no usage of a .BSS variable before the DRAM is initialised. The recent inclusion of tiny-printf breaks this assumption (it has two variables in .BSS), so any early printf (printing a number) hangs a board. This in particular breaks the (WIP) Pine64 SPL, which at the moment links Allwinner's libdram library, trying to print debug information: DRAM:DRAM driver version: V1.0 DRAM Type = <hangs> As it turns out the normal BSS size for sunxi is about 256 Bytes, so we can happily remove the symbols and the linker script part that was forcing the section into DRAM and let the linker naturally put it into SRAM. Tested on BananaPi M1 and Pine64(-SPL), also buildman sunxi was happy. Thanks to Siarhei for providing helpful hints! Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> --- (and now with the list in CC: as well) ... arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 4 +--- include/configs/sunxi-common.h | 4 ---- 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds index 53f0cbd..a90404f 100644 --- a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds +++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds @@ -16,8 +16,6 @@ */ MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ LENGTH = CONFIG_SPL_MAX_SIZE } -MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ - LENGTH = CONFIG_SPL_BSS_MAX_SIZE } OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) @@ -54,5 +52,5 @@ SECTIONS *(.bss*) . = ALIGN(4); __bss_end = .; - } > .sdram + } > .sram } diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 94275a7..e3fe965 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -75,7 +75,6 @@ * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 -#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 #else #define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 @@ -86,11 +85,8 @@ * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 -#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #endif -#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ - #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) /* * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is -- 2.9.0

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[U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of CR3V
by Gong Qianyu 30 Jun '16

30 Jun '16

From: Mingkai Hu <mingkai.hu(a)nxp.com> Set the flash to Uniform Sector Architecture in the non-volatile register. After the power cycle, it's also Uniform Sector Architecture. Signed-off-by: Mingkai Hu <mingkai.hu(a)nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong(a)nxp.com> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 64d4e0f..366c362 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -975,7 +975,7 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) { u8 cmd[4]; - u32 offset = 0x800004; /* CR3V register offset */ + u32 offset = 0x4; /* CR3NV register offset */ u8 cr3v; int ret; -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] phylib: add support for aquantia AQR106/107 PHY
by Gong Qianyu 30 Jun '16

30 Jun '16

From: Mingkai Hu <mingkai.hu(a)nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu(a)nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong(a)nxp.com> diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index f90c2ae..ad12f6d 100644 --- a/drivers/net/phy/aquantia.c +++ b/drivers/net/phy/aquantia.c @@ -147,6 +147,32 @@ struct phy_driver aqr105_driver = { .shutdown = &gen10g_shutdown, }; +struct phy_driver aqr106_driver = { + .name = "Aquantia AQR106", + .uid = 0x3a1b4d0, + .mask = 0xfffffff0, + .features = PHY_10G_FEATURES, + .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS| + MDIO_MMD_PHYXS | MDIO_MMD_AN | + MDIO_MMD_VEND1), + .config = &aquantia_config, + .startup = &aquantia_startup, + .shutdown = &gen10g_shutdown, +}; + +struct phy_driver aqr107_driver = { + .name = "Aquantia AQR107", + .uid = 0x3a1b4e0, + .mask = 0xfffffff0, + .features = PHY_10G_FEATURES, + .mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS| + MDIO_MMD_PHYXS | MDIO_MMD_AN | + MDIO_MMD_VEND1), + .config = &aquantia_config, + .startup = &aquantia_startup, + .shutdown = &gen10g_shutdown, +}; + struct phy_driver aqr405_driver = { .name = "Aquantia AQR405", .uid = 0x3a1b4b2, @@ -165,6 +191,8 @@ int phy_aquantia_init(void) phy_register(&aq1202_driver); phy_register(&aq2104_driver); phy_register(&aqr105_driver); + phy_register(&aqr106_driver); + phy_register(&aqr107_driver); phy_register(&aqr405_driver); return 0; -- 2.1.0.27.g96db324

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[U-Boot] [PATCH v3 00/12] cmd: fdt: Add device tree overlays support
by Maxime Ripard 30 Jun '16

30 Jun '16

Hi, The device tree overlays are a great solution to the issue raised by the bunch expandable boards we find everywhere these days, like the Beaglebone, Raspberry Pi or CHIP. However, most of the time, the overlays are applied through a mechanism involving the firmware request interface in Linux, that is only fully functional once the userspace has been mounted and is running. Some expansion boards might need to be enabled before that, because they simply need to patch the DT early on, or need to be initialized early in order to be fully functional, or because they provide access to the root filesystem. In these cases, having the bootloader applying the overlay before Linux starts seems like the easiest solution. This implementation doesn't provide all the Linux fancyness though, there's no transactional application, which means that if the overlay cannot be applied for a reason while you're still halfway through the application, you're probably screwed. It also cannot remove an overlay, but I don't think that it is currently a use-case. There's still a bunch of work to extend the libfdt unit tests to test the new functions introduced, but these patches will be submitted in a near future. Let me know what you think, Maxime Changes from v2: - Add Kconfig option for the libfdt overlay support - Reworked the code to deal with Pantelis and David numerous comments, among which: * Remove the need for malloc in the overlay code, and added some libfdt functions to do that * Remove the DT magic in case of an error to not be able to use it anymore * Removed the fdt_ and _ function prefix for the static functions * Plus the usual bunch of rework, error checking and optimizations. - Added new tests to deal with bugs reported by David (the overlay was not applying when you add a subnode declared that was already in the base device tree, and using a local phandle was only working if the property storing it only had a length of 4). Changes from v1: - Moved the overlay code to libfdt - Added unit tests - Refactored the code to reduce the amount of memory allocation - No longer modify the overlay itself, but create a copy to operate on instead. - Removed the limitations on the fixups path, names and properties length - Fixed a few things here and there according to comments Maxime Ripard (12): cmd: fdt: Narrow the check for fdt addr scripts: Makefile.lib: Sanitize DTB names vsprintf: Include stdarg for va_list libfdt: Add new headers and defines libfdt: Add iterator over properties libfdt: Add max phandle retrieval function libfdt: Add fdt_setprop_inplace_by_index libfdt: Add fdt_path_offset_namelen libfdt: Add fdt_getprop_namelen_w libfdt: Add overlay application function cmd: fdt: add fdt overlay application subcommand tests: Introduce DT overlay tests Makefile | 1 + cmd/fdt.c | 26 ++- include/libfdt.h | 124 ++++++++++++- include/libfdt_env.h | 6 + include/test/overlay.h | 16 ++ include/test/suites.h | 1 + include/vsprintf.h | 2 + lib/Kconfig | 5 + lib/libfdt/Makefile | 2 + lib/libfdt/fdt_overlay.c | 381 ++++++++++++++++++++++++++++++++++++++ lib/libfdt/fdt_ro.c | 44 ++++- lib/libfdt/fdt_wip.c | 13 +- scripts/Makefile.lib | 8 +- test/Kconfig | 1 + test/cmd_ut.c | 6 + test/overlay/Kconfig | 11 ++ test/overlay/Makefile | 15 ++ test/overlay/cmd_ut_overlay.c | 243 ++++++++++++++++++++++++ test/overlay/test-fdt-base.dts | 21 +++ test/overlay/test-fdt-overlay.dts | 88 +++++++++ 20 files changed, 992 insertions(+), 22 deletions(-) create mode 100644 include/test/overlay.h create mode 100644 lib/libfdt/fdt_overlay.c create mode 100644 test/overlay/Kconfig create mode 100644 test/overlay/Makefile create mode 100644 test/overlay/cmd_ut_overlay.c create mode 100644 test/overlay/test-fdt-base.dts create mode 100644 test/overlay/test-fdt-overlay.dts -- 2.9.0

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[U-Boot] [PATCH v6] mmc: atmel_sdhci: Convert to the driver model support
by Wenyou Yang 30 Jun '16

30 Jun '16

Convert the driver to the driver model while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- Changes in v6: - Remove unnecessary white space. - Use sdhci_read(), instead of readl(). - Remove the local variables min_clk. Changes in v5: - Add Reviewed-by tag. Changes in v4: - Update the clk API based on [PATCH] clk: convert API to match reset/mailbox fstyle (http://patchwork.ozlabs.org/patch/625342/). - Remove check on dev_get_parent() return. - Fixed the return value, such as -ENODEV->-EINVAL. Changes in v3: - Remove the redundant log print. Changes in v2: - Add clock support, include enabling peripheral clock and generated clock. - Retain the existing legacy code to support boards which have not converted to driver model. drivers/mmc/Kconfig | 10 +++++ drivers/mmc/atmel_sdhci.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 107 insertions(+) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c80efc3..518c624 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -25,6 +25,16 @@ config MSM_SDHCI SD 3.0 specifications. Both SD and eMMC devices are supported. Card-detect gpios are not supported. +config ATMEL_SDHCI + bool "Atmel SDHCI controller support" + depends on DM_MMC && ARCH_AT91 + help + This enables support for the Atmel SDHCI controller, which supports + the embedded MultiMedia Card (e.MMC) Specification V4.51, the SD + Memory Card Specification V3.0, and the SDIO V3.0 specification. + It is compliant with the SD Host Controller Standard V3.0 + specification. + config ROCKCHIP_DWMMC bool "Rockchip SD/MMC controller support" depends on DM_MMC && OF_CONTROL diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index 24b68b6..bd33dff 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -6,12 +6,15 @@ */ #include <common.h> +#include <clk_client.h> +#include <dm.h> #include <malloc.h> #include <sdhci.h> #include <asm/arch/clk.h> #define ATMEL_SDHC_MIN_FREQ 400000 +#ifndef CONFIG_DM_MMC int atmel_sdhci_init(void *regbase, u32 id) { struct sdhci_host *host; @@ -38,3 +41,97 @@ int atmel_sdhci_init(void *regbase, u32 id) return 0; } + +#else + +DECLARE_GLOBAL_DATA_PTR; + +static int atmel_sdhci_probe(struct udevice *dev) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct sdhci_host *host = dev_get_priv(dev); + u32 max_clk; + u32 val; + u32 clk_base, clk_mul; + u32 gck_rate; + struct udevice *dev_clk; + struct clk clk; + int periph, ret; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return ret; + + periph = fdtdec_get_uint(gd->fdt_blob, clk.dev->of_offset, "reg", -1); + if (periph < 0) + return -EINVAL; + + dev_clk = dev_get_parent(clk.dev); + ret = clk_request(dev_clk, &clk); + if (ret) + return ret; + + clk.id = periph; + ret = clk_enable(&clk); + if (ret) + return ret; + + host->name = (char *)dev->name; + host->ioaddr = (void *)dev_get_addr(dev); + + host->quirks = 0; + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + + host->bus_width = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "bus-width", 4); + + val = sdhci_readl(host, SDHCI_CAPABILITIES); + clk_base = (val & SDHCI_CLOCK_V3_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; + val = sdhci_readl(host, SDHCI_CAPABILITIES_1); + clk_mul = (val & SDHCI_CLOCK_MUL_MASK) >> SDHCI_CLOCK_MUL_SHIFT; + gck_rate = clk_base * 1000000 * (clk_mul + 1); + + ret = clk_get_by_index(dev, 1, &clk); + if (ret) + return ret; + + periph = fdtdec_get_uint(gd->fdt_blob, clk.dev->of_offset, "reg", -1); + if (periph < 0) + return -EINVAL; + + dev_clk = dev_get_parent(clk.dev); + ret = clk_request(dev_clk, &clk); + if (ret) + return ret; + + clk.id = periph; + ret = clk_set_rate(&clk, gck_rate); + if (ret) + return ret; + + max_clk = clk_get_rate(&clk); + if (!max_clk) + return -EINVAL; + + add_sdhci(host, max_clk, ATMEL_SDHC_MIN_FREQ); + + upriv->mmc = host->mmc; + + clk_free(&clk); + + return 0; +} + +static const struct udevice_id atmel_sdhci_ids[] = { + { .compatible = "atmel,sama5d2-sdhci" }, + { } +}; + +U_BOOT_DRIVER(atmel_sdhci_drv) = { + .name = "atmel_sdhci", + .id = UCLASS_MMC, + .of_match = atmel_sdhci_ids, + .probe = atmel_sdhci_probe, + .priv_auto_alloc_size = sizeof(struct sdhci_host), +}; +#endif -- 2.7.4

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[U-Boot] [PATCH] powerpc: MPC8544DS: revert typo in I2C offset value
by York Sun 30 Jun '16

30 Jun '16

From: Benjamin Kamath <bkamath(a)spaceflight.com> I2C offset was changed by commit 00f792e0 from 0x3100 to 0x3000. This typo leads to error when reading SPD from DDR DIMMs. Signed-off-by: Benjamin Kamath <bkamath(a)spaceflight.com> Signed-off-by: York Sun <york.sun(a)nxp.com> --- include/configs/MPC8544DS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b9d97c1..321f71e 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -209,7 +209,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3100 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -- 2.7.4

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