May 2016 - U-Boot

[U-Boot] [RFC] [PATCH 0/8] a83t: Add initial PSCI / SMP support
by tpearson＠raptorengineering.com 17 May '16

17 May '16

This is an intial series aimed at getting non-secure mode for virtualization to work on the Allwinner A83t devices. This series adds PSCI support along with a few other other low-level initialization routines and boots the mainline kernel enough to detect 8 started SMP cores / threads. Unfortunately the mainline kernel appears to have other issues with timers so this could not be tested further, however it is hoped that with proper u-boot PSCI support the kernel developers will be able to work on SMP support for these SoCs. This is a first rough draft; in particular the WFI PSCI state has not been updated for the new device. Comments on the overall approach are welcome!

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[U-Boot] [PATCH 00/12] cleanup QEMU fw_cfg code
by Miao Yan 17 May '16

17 May '16

This patchset cleans the QEMU fw_cfg code: *) split qfw core and qfw command interface *) split x86 specific operations from qfw core *) move x86 ACPI generation code into qfw core as this can also be used by others like ARM64 *) various cleanups Miao Yan (12): x86: qemu: fix ACPI Kconfig options cmd: qfw: add API to iterate firmware list cmd: qfw: remove qemu_fwcfg_free_files() cmd: qfw: make fwcfg_present and fwcfg_dma_present public x86: qemu: split qfw command interface and qfw core x86: qemu: move x86 specific operations out of qfw core x86: qemu: add comment about qfw register endianness cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h] cmd: qfw: workaround qfw build issue cmd: qfw: do not depend on x86 cmd: qfw: bring ACPI generation code into qfw core x86: qemu: rename qemu/acpi_table.c arch/x86/Kconfig | 10 +- arch/x86/cpu/mp_init.c | 8 +- arch/x86/cpu/qemu/Makefile | 4 +- arch/x86/cpu/qemu/acpi_table.c | 243 -------------------------- arch/x86/cpu/qemu/cpu.c | 2 +- arch/x86/cpu/qemu/e820.c | 43 +++++ arch/x86/cpu/qemu/qemu.c | 52 +++++- arch/x86/lib/Makefile | 2 +- cmd/Kconfig | 2 +- cmd/Makefile | 2 +- cmd/cmd_qfw.c | 195 +++++++++++++++++++++ cmd/qemu_fw_cfg.c | 343 ------------------------------------ common/Kconfig | 1 + drivers/misc/Kconfig | 6 + drivers/misc/Makefile | 1 + drivers/misc/qfw.c | 387 +++++++++++++++++++++++++++++++++++++++++ include/qemu_fw_cfg.h | 162 ----------------- include/qfw.h | 176 +++++++++++++++++++ 18 files changed, 871 insertions(+), 768 deletions(-) delete mode 100644 arch/x86/cpu/qemu/acpi_table.c create mode 100644 arch/x86/cpu/qemu/e820.c create mode 100644 cmd/cmd_qfw.c delete mode 100644 cmd/qemu_fw_cfg.c create mode 100644 drivers/misc/qfw.c delete mode 100644 include/qemu_fw_cfg.h create mode 100644 include/qfw.h -- 1.9.1

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[U-Boot] [PATCH V2] mailbox: implement a sandbox test
by Stephen Warren 17 May '16

17 May '16

From: Stephen Warren <swarren(a)nvidia.com> This adds a sandbox mailbox implementation (provider), a test client device, instantiates them both from Sandbox's DT, and adds a DM test that excercises everything. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> Acked-by: Simon Glass <sjg(a)chromium.org> # v1 --- v2: * Share SANDBOX_MBOX_PING_XOR via header file. * Add include guards to header file. * Use UCLASS_MISC not UCLASS_TEST since the latter seems to have some semantics associated with it not desired for this test. --- arch/sandbox/dts/test.dts | 11 ++++ arch/sandbox/include/asm/mbox.h | 21 ++++++++ configs/sandbox_defconfig | 3 ++ drivers/mailbox/Kconfig | 7 +++ drivers/mailbox/Makefile | 2 + drivers/mailbox/sandbox-mbox-test.c | 54 +++++++++++++++++++ drivers/mailbox/sandbox-mbox.c | 104 ++++++++++++++++++++++++++++++++++++ test/dm/Makefile | 1 + test/dm/mailbox.c | 31 +++++++++++ 9 files changed, 234 insertions(+) create mode 100644 arch/sandbox/include/asm/mbox.h create mode 100644 drivers/mailbox/sandbox-mbox-test.c create mode 100644 drivers/mailbox/sandbox-mbox.c create mode 100644 test/dm/mailbox.c diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 89300096a5ab..686c215aea72 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -216,6 +216,17 @@ }; }; + mbox: mbox { + compatible = "sandbox,mbox"; + #mbox-cells = <1>; + }; + + mbox-test { + compatible = "sandbox,mbox-test"; + mboxes = <&mbox 100>, <&mbox 1>; + mbox-names = "other", "test"; + }; + mmc { compatible = "sandbox,mmc"; }; diff --git a/arch/sandbox/include/asm/mbox.h b/arch/sandbox/include/asm/mbox.h new file mode 100644 index 000000000000..2d7b7d03e522 --- /dev/null +++ b/arch/sandbox/include/asm/mbox.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __SANDBOX_MBOX_H +#define __SANDBOX_MBOX_H + +#include <common.h> + +#define SANDBOX_MBOX_PING_XOR 0x12345678 + +struct udevice; + +int sandbox_mbox_test_get(struct udevice *dev); +int sandbox_mbox_test_send(struct udevice *dev, uint32_t msg); +int sandbox_mbox_test_recv(struct udevice *dev, uint32_t *msg); +int sandbox_mbox_test_free(struct udevice *dev); + +#endif diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 9ad570c7fc49..8613da2c15f5 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -167,3 +167,6 @@ CONFIG_UNIT_TEST=y CONFIG_UT_TIME=y CONFIG_UT_DM=y CONFIG_UT_ENV=y +CONFIG_MISC=y +CONFIG_DM_MAILBOX=y +CONFIG_SANDBOX_MBOX=y diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index 8ae8edd28c52..9649b705895b 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -10,6 +10,13 @@ config DM_MAILBOX the basis of a variety of inter-process/inter-CPU communication protocols. +config SANDBOX_MBOX + bool "Enable the sandbox mailbox test driver" + depends on DM_MAILBOX && SANDBOX + help + Enable support for a test mailbox implementation, which simply echos + back a modified version of any message that is sent. + config TEGRA_HSP bool "Enable Tegra HSP controller support" depends on DM_MAILBOX && TEGRA diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index b5bc84032573..155dbeb09942 100644 --- a/drivers/mailbox/Makefile +++ b/drivers/mailbox/Makefile @@ -3,4 +3,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_DM_MAILBOX) += mailbox-uclass.o +obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox.o +obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox-test.o obj-$(CONFIG_TEGRA_HSP) += tegra-hsp.o diff --git a/drivers/mailbox/sandbox-mbox-test.c b/drivers/mailbox/sandbox-mbox-test.c new file mode 100644 index 000000000000..02d161aada33 --- /dev/null +++ b/drivers/mailbox/sandbox-mbox-test.c @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <mailbox_client.h> +#include <asm/io.h> + +struct sandbox_mbox_test { + struct mbox_chan chan; +}; + +int sandbox_mbox_test_get(struct udevice *dev) +{ + struct sandbox_mbox_test *sbmt = dev_get_priv(dev); + + return mbox_get_by_name(dev, "test", &sbmt->chan); +} + +int sandbox_mbox_test_send(struct udevice *dev, uint32_t msg) +{ + struct sandbox_mbox_test *sbmt = dev_get_priv(dev); + + return mbox_send(&sbmt->chan, &msg); +} + +int sandbox_mbox_test_recv(struct udevice *dev, uint32_t *msg) +{ + struct sandbox_mbox_test *sbmt = dev_get_priv(dev); + + return mbox_recv(&sbmt->chan, msg, 100); +} + +int sandbox_mbox_test_free(struct udevice *dev) +{ + struct sandbox_mbox_test *sbmt = dev_get_priv(dev); + + return mbox_free(&sbmt->chan); +} + +static const struct udevice_id sandbox_mbox_test_ids[] = { + { .compatible = "sandbox,mbox-test" }, + { } +}; + +U_BOOT_DRIVER(sandbox_mbox_test) = { + .name = "sandbox_mbox_test", + .id = UCLASS_MISC, + .of_match = sandbox_mbox_test_ids, + .priv_auto_alloc_size = sizeof(struct sandbox_mbox_test), +}; diff --git a/drivers/mailbox/sandbox-mbox.c b/drivers/mailbox/sandbox-mbox.c new file mode 100644 index 000000000000..1b7ac231cb7c --- /dev/null +++ b/drivers/mailbox/sandbox-mbox.c @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <mailbox_uclass.h> +#include <asm/io.h> +#include <asm/mbox.h> + +#define SANDBOX_MBOX_CHANNELS 2 + +struct sandbox_mbox_chan { + bool rx_msg_valid; + uint32_t rx_msg; +}; + +struct sandbox_mbox { + struct sandbox_mbox_chan chans[SANDBOX_MBOX_CHANNELS]; +}; + +static int sandbox_mbox_request(struct mbox_chan *chan) +{ + debug("%s(chan=%p)\n", __func__, chan); + + if (chan->id >= SANDBOX_MBOX_CHANNELS) + return -EINVAL; + + return 0; +} + +static int sandbox_mbox_free(struct mbox_chan *chan) +{ + debug("%s(chan=%p)\n", __func__, chan); + + return 0; +} + +static int sandbox_mbox_send(struct mbox_chan *chan, const void *data) +{ + struct sandbox_mbox *sbm = dev_get_priv(chan->dev); + const uint32_t *pmsg = data; + + debug("%s(chan=%p, data=%p)\n", __func__, chan, data); + + sbm->chans[chan->id].rx_msg = *pmsg ^ SANDBOX_MBOX_PING_XOR; + sbm->chans[chan->id].rx_msg_valid = true; + + return 0; +} + +static int sandbox_mbox_recv(struct mbox_chan *chan, void *data) +{ + struct sandbox_mbox *sbm = dev_get_priv(chan->dev); + uint32_t *pmsg = data; + + debug("%s(chan=%p, data=%p)\n", __func__, chan, data); + + if (!sbm->chans[chan->id].rx_msg_valid) + return -ENODATA; + + *pmsg = sbm->chans[chan->id].rx_msg; + sbm->chans[chan->id].rx_msg_valid = false; + + return 0; +} + +static int sandbox_mbox_bind(struct udevice *dev) +{ + debug("%s(dev=%p)\n", __func__, dev); + + return 0; +} + +static int sandbox_mbox_probe(struct udevice *dev) +{ + debug("%s(dev=%p)\n", __func__, dev); + + return 0; +} + +static const struct udevice_id sandbox_mbox_ids[] = { + { .compatible = "sandbox,mbox" }, + { } +}; + +struct mbox_ops sandbox_mbox_mbox_ops = { + .request = sandbox_mbox_request, + .free = sandbox_mbox_free, + .send = sandbox_mbox_send, + .recv = sandbox_mbox_recv, +}; + +U_BOOT_DRIVER(sandbox_mbox) = { + .name = "sandbox_mbox", + .id = UCLASS_MAILBOX, + .of_match = sandbox_mbox_ids, + .bind = sandbox_mbox_bind, + .probe = sandbox_mbox_probe, + .priv_auto_alloc_size = sizeof(struct sandbox_mbox), + .ops = &sandbox_mbox_mbox_ops, +}; diff --git a/test/dm/Makefile b/test/dm/Makefile index fd781e82cfe8..9eaf04b9ba98 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_DM_ETH) += eth.o obj-$(CONFIG_DM_GPIO) += gpio.o obj-$(CONFIG_DM_I2C) += i2c.o obj-$(CONFIG_LED) += led.o +obj-$(CONFIG_DM_MAILBOX) += mailbox.o obj-$(CONFIG_DM_MMC) += mmc.o obj-$(CONFIG_DM_PCI) += pci.o obj-$(CONFIG_RAM) += ram.o diff --git a/test/dm/mailbox.c b/test/dm/mailbox.c new file mode 100644 index 000000000000..be7bd6de0600 --- /dev/null +++ b/test/dm/mailbox.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <dm/test.h> +#include <asm/mbox.h> +#include <test/ut.h> + +static int dm_test_mailbox(struct unit_test_state *uts) +{ + struct udevice *dev; + uint32_t msg; + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "mbox-test", &dev)); + ut_assertok(sandbox_mbox_test_get(dev)); + + ut_asserteq(-ETIMEDOUT, sandbox_mbox_test_recv(dev, &msg)); + ut_assertok(sandbox_mbox_test_send(dev, 0xaaff9955UL)); + ut_assertok(sandbox_mbox_test_recv(dev, &msg)); + ut_asserteq(msg, 0xaaff9955UL ^ SANDBOX_MBOX_PING_XOR); + ut_asserteq(-ETIMEDOUT, sandbox_mbox_test_recv(dev, &msg)); + + ut_assertok(sandbox_mbox_test_free(dev)); + + return 0; +} +DM_TEST(dm_test_mailbox, DM_TESTF_SCAN_FDT); -- 2.8.2

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[U-Boot] Please pull u-boot-sunxi master (v2016.05 bugfix)
by Hans de Goede 16 May '16

16 May '16

Hi Tom, Here is a sunxi pull-req with a small bugfix for v2016.05: The following changes since commit 4cf4600f2569d7677a6f3cd933d7a189de6e7973: test, tools: update tbot documentation (2016-05-13 11:25:59 -0400) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to f0a711ec40a6af4ea438db0bd776886c32780ddd: sunxi: Enable USB host in CHIP defconfig (2016-05-15 11:04:29 +0200) ---------------------------------------------------------------- Hans de Goede (1): sunxi: Enable USB host in CHIP defconfig configs/CHIP_defconfig | 1 + 1 file changed, 1 insertion(+) Regards, Hans

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[U-Boot] PSCI patch set for ARMv7
by York Sun 16 May '16

16 May '16

Albert, I noticed a set of patch is delegated to you https://patchwork.ozlabs.org/project/uboot/list/?submitter=68732&state=&q=&… Please kindly let me know if you will act on them, or if you prefer I take care of them. My testing capacity will be limited to ls1 series SoCs. York

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[U-Boot] askenv with timeout?
by Eugeniu Rosca 16 May '16

16 May '16

Hi everyone, Recently I got the need to read some environment variable from stdin, as user input. So, I discovered the 'askenv' command. One additional requirement I have is avoiding any blocking behavior, which would be possible if askenv supported the timeout concept. However, it doesn't seem to be the case in the 'do_env_ask' function. Here follow some questions: - Will there be a timeout option for askenv in future? - What is the closest alternative right now (I believe some 'echo' statements combined with 'bootdelay')? Thanks for your time. Best regards, Eugeniu.

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[U-Boot] [PATCH 00/10] usb: dwc3: rework DWC3 and convert UniPhier xHCI driver to DM
by Masahiro Yamada 16 May '16

16 May '16

Masahiro Yamada (10): usb: xhci: add struct devrequest declaration to xhci.h usb: dwc3: make DWC3 core support code into a driver usb: dwc3: add UniPhier specific glue layer ARM: uniphier: switch over to USB DM ARM: uniphier: enable DWC3 xHCI driver usb: uniphier: remove UniPhier xHCI driver ARM: uniphier: delete unnecessary xHCI pin-mux settings ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIG ARM: dts: uniphier: add/update xHCI nodes ARM: uniphier: enable Generic EHCI for PH1-Pro4 arch/arm/Kconfig | 1 + arch/arm/dts/uniphier-ph1-ld20.dtsi | 17 ++++ arch/arm/dts/uniphier-ph1-pro4-ref.dts | 4 + arch/arm/dts/uniphier-ph1-pro4.dtsi | 32 ++++++-- arch/arm/dts/uniphier-ph1-pro5.dtsi | 32 ++++++-- arch/arm/dts/uniphier-proxstream2.dtsi | 32 ++++++-- arch/arm/mach-uniphier/clk/clk-pro4.c | 6 +- arch/arm/mach-uniphier/clk/clk-pro5.c | 6 +- arch/arm/mach-uniphier/clk/clk-pxs2.c | 6 +- arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c | 12 --- arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c | 11 --- arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c | 7 -- arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c | 7 -- arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c | 11 --- configs/uniphier_ld20_defconfig | 1 + configs/uniphier_pro4_defconfig | 3 + configs/uniphier_pxs2_ld6b_defconfig | 1 + drivers/usb/host/Kconfig | 10 +-- drivers/usb/host/Makefile | 2 +- drivers/usb/host/dwc3-uniphier.c | 110 ++++++++++++++++++++++++++ drivers/usb/host/xhci-dwc3.c | 71 ++++++++++++++++- drivers/usb/host/xhci-uniphier.c | 85 -------------------- drivers/usb/host/xhci.h | 2 + include/configs/uniphier.h | 4 + include/fdtdec.h | 1 - lib/fdtdec.c | 1 - 26 files changed, 300 insertions(+), 175 deletions(-) create mode 100644 drivers/usb/host/dwc3-uniphier.c delete mode 100644 drivers/usb/host/xhci-uniphier.c -- 1.9.1

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[U-Boot] [PATCH 0/5] MIPS Release 6 Support
by Paul Burton 16 May '16

16 May '16

This series introduces support for building U-Boot for release 6 of the MIPS architecture. This is supported by CPUs such as the M62xx, I6400 & P6600 as well as by emulators such as QEMU. Paul Burton (5): MIPS: Use unchecked immediate addition/subtraction MIPS: Simplify CONFIG_SYS_CPU values MIPS: Support for targetting MIPSr6 malta: Remove ".set mips32" directive malta: Support MIPS32r6 configurations arch/mips/Kconfig | 39 ++++++++++++++++++++++++++++++-------- arch/mips/Makefile | 2 ++ arch/mips/cpu/start.S | 22 +++++++++++---------- arch/mips/lib/cache_init.S | 2 +- board/imgtec/malta/lowlevel_init.S | 1 - 5 files changed, 46 insertions(+), 20 deletions(-) -- 2.8.2

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[U-Boot] Altera Cyclone 5 UART Communication Issues - U-Boot 2016.03
by Nathan Barrett 16 May '16

16 May '16

Hello All, I'm currently running U-Boot 2016.03 on a Terasic SoC Kit without any apparent issues. However, when I go to run the same build on our custom board, the debug port's UART0 RXD fails to receive any key presses when I'm attempting to stop autoboot. On both boards, the debug UART0 TX and RX lines are using the same pins for. The only difference between the boards is that our custom board is routing the UART TX and RX lines through the FPGA fabric. I'm making sure to start up the FPGA with these few additional lines in the boot sequence: #fatload mmc 0:${mmcloadpart} 0x2000000 soc_system.rbf; fpga load 0 0x2000000 0x23C1B4; I can tell that the FPGA does seem to be running fine, as the UART TX is coming through (I see all the proper boot info) and an FPGA controlled heartbeat LED starts blinking. Does anyone have any insight into what could be going on? Thank you, Nathan Barrett confidentiality: This e-mail and its attachments are intended for the above named only and may be confidential. If they have come to you in error you must take no action based on them, nor must you copy or show them to anyone; please reply to this e- mail and highlight the error. Security Warning: Please note that this e-mail has been created in the knowledge that Internet e-mail is not a 100% secure communications medium. We advise that you understand and observe this lack of security when e-mailing us. Viruses: Although we have taken steps to ensure that this e-mail and attachments are free from any virus, we advise that in keeping with good computing practice the recipient should ensure they are actually virus free.

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[U-Boot] a couple drivers/rtc/* drivers now superfluous?
by Robert P. J. Day 16 May '16

16 May '16

from mario's reply about unused files yesterday, it seems that drivers/rtc/ds1302.c is no longer referenced anywhere in the tree: $ grep -ir ds1302 * drivers/rtc/Makefile:obj-$(CONFIG_RTC_DS1302) += ds1302.o drivers/rtc/ds1302.c: * ds1302.c - Support for the Dallas Semiconductor DS1302 Timekeeping Chip drivers/rtc/ds1302.c:# define DPRINTF(x,args...) printf("ds1302: " x , ##args) drivers/rtc/ds1302.c:/* time data format for DS1302 */ drivers/rtc/ds1302.c:struct ds1302_st drivers/rtc/ds1302.c:static int ds1302_initted=0; drivers/rtc/ds1302.c: struct ds1302_st bbclk; drivers/rtc/ds1302.c: printf("ds1302: Clock was halted, starting clock\n"); drivers/rtc/ds1302.c: printf("ds1302: Clock was in 12 hour mode, fixing\n"); drivers/rtc/ds1302.c: printf("ds1302: Year was corrupted, fixing\n"); drivers/rtc/ds1302.c: ds1302_initted=1; drivers/rtc/ds1302.c: if(!ds1302_initted) rtc_init(); drivers/rtc/ds1302.c: struct ds1302_st bbclk; drivers/rtc/ds1302.c: if(!ds1302_initted) rtc_init(); drivers/rtc/ds1302.c: printf("ds1302: rtc_get: Clock was halted, clock probably " drivers/rtc/ds1302.c: struct ds1302_st bbclk; drivers/rtc/ds1302.c: if(!ds1302_initted) rtc_init(); $ it appears the same can be said about ds1306.c: drivers/rtc/ds1306.c: * Date & Time support for DS1306 RTC using SPI: drivers/rtc/ds1306.c:/* read clock time from DS1306 and return it in *tmp */ drivers/rtc/ds1306.c: /* Now we can enable the DS1306 RTC */ drivers/rtc/ds1306.c: /* Now we can disable the DS1306 RTC */ drivers/rtc/ds1306.c: immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ drivers/rtc/ds1306.c:/* set clock time in DS1306 RTC and in MPC8xx RTC */ drivers/rtc/ds1306.c: /* Now we can enable the DS1306 RTC */ drivers/rtc/ds1306.c: immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ drivers/rtc/ds1306.c: /* Now disable the DS1306 to terminate the write */ drivers/rtc/ds1306.c: /* Now enable the DS1306 to initiate a new write */ drivers/rtc/ds1306.c: immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ drivers/rtc/ds1306.c: immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */ drivers/rtc/ds1306.c: /* Now disable the DS1306 */ drivers/rtc/ds1306.c: immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */ drivers/rtc/ds1306.c: * see the time even if it doesn't have a DS1306 clock driver. drivers/rtc/ds1306.c:/* read clock time from DS1306 and return it in *tmp */ drivers/rtc/ds1306.c:/* set clock time from *tmp in DS1306 RTC */ drivers/rtc/ds1306.c:/* reset the DS1306 */ drivers/rtc/Makefile:obj-$(CONFIG_RTC_DS1306) += ds1306.o mario pointed out that ds1302.c clearly has no value since it uses a dead macro GTREGREAD. the same can't be said about ds1306.c so maybe it still has value but certainly nothing refers to it. thoughts on clearing out either or both? rday p.s. the top-level README file mentions neither of these: - Real-Time Clock: When CONFIG_CMD_DATE is selected, the type of the RTC has to be selected, too. Define exactly one of the following options: CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC CONFIG_RTC_MC146818 - use MC146818 RTC CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC ... snip ... -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

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