May 2016 - U-Boot

[U-Boot] U-Boot NOR Flash Copy Time Reduction
by yyurtcan 13 May '16

13 May '16

We have P4080DS board and u-boot for bootloader. We want to reduce to time to copy kernel image from NOR Flash to RAM. Can we optimize p4080ds u-boot NOR Flash copy time? If so, How? Best Regards. -- View this message in context: http://u-boot.10912.n7.nabble.com/U-Boot-NOR-Flash-Copy-Time-Reduction-tp25… Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [RFC] fastboot: sparse image handling and sessionId
by Steve Rae 13 May '16

13 May '16

Maxime, I suspect that the issue fixed in commit c7529db fastboot: sparse: fix block addressing for don't care chunk type complicated the assumptions which led to the implementation of the "sessionId" in commit 1f8690a sparse: Implement several chunks flashing The fastboot client will split the sparse images into several chunks if the image that it tries to flash is bigger than what the device can handle. In such a case, the bootloader is supposed to retain the last offset to which it wrote to, so that it can resume the writes at the right offset when flashing the next chunk. Retain the last offset we used, and use the session ID to know if we need it or not. Testing of this scenario has revealed that "fastboot flash" works as follows: When the image to download is larger than the "target reported max download size of 40960000 bytes", the fastboot client (running on the host) essentially performs multiple, independent fastboot download/write steps. As seen in the logs below, each download/write step: (a) starts at the same address (the address of the first block of the partition...) (b) ends at the same address (start address plus number of blocks "written"...) (c) and uses the CHUNK_TYPE_DONT_CARE 'chunk_sz' to manipulate the addresses to achieve (a) and (b) Here is an example of the first three fastboot download/writes for a large image to "file-system": - in the first, data is written to 0x24000-0x37848, then there is a CHUNK_TYPE_DONT_CARE which "moves" the address pointer to 0x424000 - in the second, it starts with a CHUNK_TYPE_DONT_CARE which "moves" the address from 0x24000 to 0x37848, then writes from 0x37848-0x4b098, then there is a CHUNK_TYPE_DONT_CARE which "moves" the address pointer to 0x424000 - in the third, it starts with a CHUNK_TYPE_DONT_CARE which "moves" the address from 0x24000 to 0x4b098, then writes from 0x4b098-0x5e8e0, then there is a CHUNK_TYPE_DONT_CARE which "moves" the address pointer to 0x424000 Starting download of 40932412 bytes .......................................................................... downloading of 40932412 bytes finished Flashing sparse image at offset 147456 Flashing Sparse Image - this is the starting address: 0x24000 ++++ (writing to flash) - this is the CHUNK_TYPE_DONT_CARE (before) address: 0x37848 - this is the CHUNK_TYPE_DONT_CARE (after) address: 0x424000 - this is the ending address: 0x424000 ........ wrote 4194304 blocks to 'file-system' Starting download of 40954208 bytes .......................................................................... downloading of 40954208 bytes finished Flashing sparse image at offset 147456 Flashing Sparse Image - this is the starting address: 0x24000 - this is the CHUNK_TYPE_DONT_CARE (before) address: 0x24000 - this is the CHUNK_TYPE_DONT_CARE (after) address: 0x37848 ++++ (writing to flash) - this is the CHUNK_TYPE_DONT_CARE (before) address: 0x4b098 - this is the CHUNK_TYPE_DONT_CARE (after) address: 0x424000 - this is the ending address: 0x424000 ........ wrote 4194304 blocks to 'file-system' Starting download of 40955896 bytes .......................................................................... downloading of 40955896 bytes finished Flashing sparse image at offset 147456 Flashing Sparse Image - this is the starting address: 0x24000 - this is the CHUNK_TYPE_DONT_CARE (before) address: 0x24000 - this is the CHUNK_TYPE_DONT_CARE (after) address: 0x4b098 ++++ (writing to flash) - this is the CHUNK_TYPE_DONT_CARE (before) address: 0x5e8e0 - this is the CHUNK_TYPE_DONT_CARE (after) address: 0x424000 - this is the ending address: 0x424000 ........ wrote 4194304 blocks to 'file-system' [... snip ...] Therefore, I think that the "sessonId" that is implemented in U-Boot is actually incorrect. There is no need to keep track of the addresses as each "fastboot flash" download/write step is completely independent. And I actually need to remove it in order to get this working again: - if (session_id > 0) - start = last_offset; - else - start = storage->start; + start = storage->start; Additionally (unfortunately) as with the previous discussion that we had about this code: #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV total_blocks += blkcnt; #endif the NAND implementation requires a method to process "blkcnt" to ensure the blkcnt skips the bad blocks... Please advise, Steve

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[U-Boot] U-Boot 2016.03 on Altera Cyclone 5 SOCKIT
by Nathan Barrett 13 May '16

13 May '16

Hello All, I'm trying to run U-Boot 2016 on a Terasic Cyclone 5 SoC Kit. I've got everything running up to this point: U-Boot SPL 2016.03 (May 12 2016 - 14:56:58) ../drivers/ddr/altera/sequencer.c: Preparing to start memory calibration ../drivers/ddr/altera/sequencer.c: CALIBRATION PASSED ../drivers/ddr/altera/sequencer.c: Calibration complete Trying to boot from MMC bad magic SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### If I look at my generated u-boot-with-spl.sfp, at address 0x3FFF0, I can see that U-Boot is sitting there and starts with the proper magic number header (0x27051956). This file is being placed onto my SD card via #sudo dd if=u-boot-with-spl.sfp of=/dev/sdb3 I went ahead and added some debugging breadcrumbs as well: U-Boot SPL 2016.03 (May 12 2016 - 15:27:36) ../drivers/ddr/altera/sequencer.c: Preparing to start memory calibration ../drivers/ddr/altera/sequencer.c: CALIBRATION PASSED ../drivers/ddr/altera/sequencer.c: Calibration complete Trying to boot from MMC ---At line 37 of common/spl/spl_mmc.c --- read sector a00, count=1 CONFIG_SYS_TEXT_BASE = 1000040 sizeof(struct image_header) = 40 magic = dba5b8aa --------------------------------------------------- bad magic SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Can anyone assist? Thanks, Nathan Barrett confidentiality: This e-mail and its attachments are intended for the above named only and may be confidential. If they have come to you in error you must take no action based on them, nor must you copy or show them to anyone; please reply to this e- mail and highlight the error. Security Warning: Please note that this e-mail has been created in the knowledge that Internet e-mail is not a 100% secure communications medium. We advise that you understand and observe this lack of security when e-mailing us. Viruses: Although we have taken steps to ensure that this e-mail and attachments are free from any virus, we advise that in keeping with good computing practice the recipient should ensure they are actually virus free.

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[U-Boot] [PATCH] sunxi: Enable USB host in CHIP defconfig
by Hans de Goede 13 May '16

13 May '16

Reported-and-tested-by: Dennis Gilmore <dennis(a)ausil.us> Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- configs/CHIP_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 0eca229..cbbec47 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -29,3 +29,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" CONFIG_G_DNL_VENDOR_NUM=0x1f3a CONFIG_G_DNL_PRODUCT_NUM=0x1010 +CONFIG_USB_EHCI_HCD=y -- 2.7.4

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[U-Boot] [PATCH 0/1] i2c: mvtwsi: running from flash ROM
by Chris Packham 13 May '16

13 May '16

We have a board using Marvell's MV78100 SoC (note despite the name this is quite different to the armada MV782x0/MV784x0 SoCs). The SoC support isn't upstream but since it's quite similar to the Orion/Kirkwood we've managed to keep reasonably up to date. One difference with our system is that it boots directly from NOR flash (as opposed to many Kirkwood implementations which make use of a pre-bootloader to setup RAM). Somewhere between v2015.04 and v2015.10 we started seeing a hang at startup. I eventually tracked this down to the write to twsi_control_flags which is putting the NOR flash into status mode leading to the hang when the next instruction is executed. I'm not sure how we haven't hit this before. In v2015.04 the same code path is executed but somehow no hang occurs. This code hasn't changed much between v2015.04 and v2015.10 and certainly not in any way that would change this behaviour. Presumably _something_ else has changed in a way that is affecting this behaviour but so far I haven't been able to narrow this down to a particular change. Chris Packham (1): i2c: mvtwsi: avoid writing to twsi_control_flags prior to relocation drivers/i2c/mvtwsi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.8.2

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[U-Boot] [PATCH v2 0/6] tegra: Move tegra20 towards the 'new' display bindings
by Simon Glass 13 May '16

13 May '16

The original tegra20 display driver was written before Linux had device tree bindings for display. Since then Linux has developed a robust set of bindings covering various aspects of enabling a display. This series moves closer to those bindings by using the panel and backlight as separate drivers. The device tree files for seaboard, ventana and harmony thereby become almost the same as Linux. Unfortunately this breaks the other boards, which will need a similar sync. So I'm not sure how easy it will be to accept this series. Still, it seems worth sending it out in the hope that board maintainers can help. I have kept this series separate so that it can progress separately. Changes in v2: - Add new patch to add a copyright header and header guard to errno.h - Add new patch to allow errno_str() to be used without CONFIG_ERRNO_STR - Rebase to master - Update harmony and ventana also - Don't enable CONFIG_ERRNO_STR for each board Simon Glass (6): errno: Add copyright header and header guard errno: Allow errno_str() to be used without CONFIG_ERRNO_STR tegra: dts: Sync tegra20 device tree files with Linux video: tegra: Move to using simple-panel and pwm-backlight tegra: video: Always use write-through cache on LCD fdt: Drop some unused compatible strings arch/arm/dts/tegra20-harmony.dts | 751 ++++++++++++++++++++++++++++-- arch/arm/dts/tegra20-seaboard.dts | 934 ++++++++++++++++++++++++++++++++++---- arch/arm/dts/tegra20-ventana.dts | 685 ++++++++++++++++++++++++++-- configs/colibri_t20_defconfig | 3 + configs/harmony_defconfig | 3 + configs/medcom-wide_defconfig | 3 + configs/paz00_defconfig | 3 + configs/seaboard_defconfig | 3 + configs/tec_defconfig | 3 + configs/ventana_defconfig | 3 + drivers/video/tegra.c | 333 +++----------- include/errno.h | 12 + include/fdtdec.h | 4 - lib/fdtdec.c | 4 - 14 files changed, 2312 insertions(+), 432 deletions(-) -- 2.8.0.rc3.226.g39d4020

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[U-Boot] [PATCH RESEND] arm/arm64: Move barrier instructions into separate header
by Andre Przywara 12 May '16

12 May '16

Commit bfb33f0bc45b ("sunxi: mctl_mem_matches: Add missing memory barrier") broke compilation for the Pine64, as dram_helper.c now includes <asm/armv7.h>, which does not compile on arm64. Fix this by moving all barrier instructions into a separate header file, which can easily be shared between arm and arm64. Also extend the inline assembly to take the "sy" argument, which is optional for ARMv7, but mandatory for v8. This fixes compilation for 64-bit sunxi boards (Pine64). Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> --- Hi Hans, Ian, can I get an ACK on this please? I don't see it moving forward, but it breaks build for Pine64 and it's clearly a regression, since 2016.05-rc3 works. But "buildman armv8" gives me this with the current origin/master: =============== arch64: + pine64_plus +In file included from arch/arm/include/asm/armv7.h:61:0, + from arch/arm/mach-sunxi/dram_helpers.c:10: + #define __arch_getl(a) (*(volatile unsigned int *)(a)) + ^ +arch/arm/include/asm/io.h:151:31: note: in expansion of macro '__arch_getl' + #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; }) + ^ +arch/arm/include/asm/armv7.h:115:9: note: in expansion of macro 'readl' + temp = readl(address); + ^ +{standard input}: Assembler messages: +{standard input}:102: Error: unknown mnemonic `mcr' -- `mcr p15,0,x2,c7,c10,4' +make[2]: *** [arch/arm/mach-sunxi/dram_helpers.o] Error 1 +make[1]: *** [arch/arm/mach-sunxi] Error 2 +make: *** [sub-make] Error 2 w+arch/arm/include/asm/armv7.h: In function 'v7_enable_smp': w+arch/arm/include/asm/io.h:72:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 37 0 1 /38 ls1043ardb_SECURE_BOOT =================== So it's the only armv8 board that fails :-( As I stated in my other mail from last week, buildman succeeded for "arm" with this patch as well - as least for those boards my hardfp toolchain could build. Please excuse my ignorance if it landed in some tree already, but I couldn't find it and patchwork doesn't give me a hint either. Cheers, Andre. arch/arm/include/asm/armv7.h | 21 +----------------- arch/arm/include/asm/barriers.h | 44 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-sunxi/dram_helpers.c | 2 +- 3 files changed, 46 insertions(+), 21 deletions(-) create mode 100644 arch/arm/include/asm/barriers.h diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h index 30e7939..423fc70 100644 --- a/arch/arm/include/asm/armv7.h +++ b/arch/arm/include/asm/armv7.h @@ -59,26 +59,7 @@ #ifndef __ASSEMBLY__ #include <linux/types.h> #include <asm/io.h> - -/* - * CP15 Barrier instructions - * Please note that we have separate barrier instructions in ARMv7 - * However, we use the CP15 based instructtions because we use - * -march=armv5 in U-Boot - */ -#define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0)) -#define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)) -#define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0)) - -#ifdef __ARM_ARCH_7A__ -#define ISB asm volatile ("isb" : : : "memory") -#define DSB asm volatile ("dsb" : : : "memory") -#define DMB asm volatile ("dmb" : : : "memory") -#else -#define ISB CP15ISB -#define DSB CP15DSB -#define DMB CP15DMB -#endif +#include <asm/barriers.h> /* * Workaround for ARM errata # 798870 diff --git a/arch/arm/include/asm/barriers.h b/arch/arm/include/asm/barriers.h new file mode 100644 index 0000000..37870f9 --- /dev/null +++ b/arch/arm/include/asm/barriers.h @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2016 ARM Ltd. + * + * ARM and ARM64 barrier instructions + * split from armv7.h to allow sharing between ARM and ARM64 + * + * Original copyright in armv7.h was: + * (C) Copyright 2010 Texas Instruments, <www.ti.com> Aneesh V <aneesh(a)ti.com> + * + * Much of the original barrier code was contributed by: + * Valentine Barshak <valentine.barshak(a)cogentembedded.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __BARRIERS_H__ +#define __BARRIERS_H__ + +#ifndef __ASSEMBLY__ + +#ifndef CONFIG_ARM64 +/* + * CP15 Barrier instructions + * Please note that we have separate barrier instructions in ARMv7 + * However, we use the CP15 based instructtions because we use + * -march=armv5 in U-Boot + */ +#define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0)) +#define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)) +#define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0)) + +#endif /* !CONFIG_ARM64 */ + +#if defined(__ARM_ARCH_7A__) || defined(CONFIG_ARM64) +#define ISB asm volatile ("isb sy" : : : "memory") +#define DSB asm volatile ("dsb sy" : : : "memory") +#define DMB asm volatile ("dmb sy" : : : "memory") +#else +#define ISB CP15ISB +#define DSB CP15DSB +#define DMB CP15DMB +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BARRIERS_H__ */ diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c index e0c823a..20b430f 100644 --- a/arch/arm/mach-sunxi/dram_helpers.c +++ b/arch/arm/mach-sunxi/dram_helpers.c @@ -7,7 +7,7 @@ */ #include <common.h> -#include <asm/armv7.h> +#include <asm/barriers.h> #include <asm/io.h> #include <asm/arch/dram.h> -- 2.8.2

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[U-Boot] GPIO driver for Freescale QorIQ T2080
by Hamish Martin 12 May '16

12 May '16

Hi, I'm looking for uboot driver support for the Freescale QorIQ T2080 CPU. This has 4 blocks of GPIOs similar to the single block defined in arch/powerpc/include/asm/mpc85xx_gpio.h. If someone is working on a driver for that CPU or similar, let me know. Ideally this would fit the new driver model. I'd be happy to help test it out and debug it. Alternatively, if you know another way to drive those GPIO blocks with existing code, feel free to suggest a way. Cheers, Hamish Martin.

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[U-Boot] [PATCH] usb: xhci: add struct devrequest declaration
by Masahiro Yamada 12 May '16

12 May '16

This should be declared for xhci_ctrl_tx() to avoid build error. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/usb/host/xhci.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 2afa386..16dd61a 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1252,6 +1252,8 @@ void xhci_acknowledge_event(struct xhci_ctrl *ctrl); union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected); int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe, int length, void *buffer); + +struct devrequest; int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, struct devrequest *req, int length, void *buffer); int xhci_check_maxpacket(struct usb_device *udev); -- 1.9.1

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[U-Boot] [PATCH] gadget: f_thor: properly enable 3rd endpoint defined by this protocol
by Lukasz Majewski 12 May '16

12 May '16

From: Marek Szyprowski <m.szyprowski(a)samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> --- drivers/usb/gadget/f_thor.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index a60e948..d49b5ef 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -949,6 +949,13 @@ static int thor_eps_setup(struct usb_function *f) dev->out_req = req; /* ACM control EP */ ep = dev->int_ep; + d = ep_desc(gadget, &hs_int_desc, &fs_int_desc); + debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress); + + result = usb_ep_enable(ep, d); + if (result) + goto exit; + ep->driver_data = cdev; /* claim */ exit: -- 2.0.0.rc2

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