December 2016 - U-Boot

[U-Boot] [PATCH 1/3] usb: ehci-mx6: implement ofdata_to_platdata
by Peng Fan 22 Dec '16

22 Dec '16

Implement ofdata_to_platdata to set the type to host or device. - Check "dr-mode" property. - If there is no "dr-mode", check phy_ctrl for i.MX6 and phy_status for i.MX7 Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/usb/host/ehci-mx6.c | 66 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 48889c1..91413c9 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -15,10 +15,13 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> #include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/sys_proto.h> #include <dm.h> #include "ehci.h" +DECLARE_GLOBAL_DATA_PTR; + #define USB_OTGREGS_OFFSET 0x000 #define USB_H1REGS_OFFSET 0x200 #define USB_H2REGS_OFFSET 0x400 @@ -48,6 +51,7 @@ #define ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS 0x00000040 #define USBNC_OFFSET 0x200 +#define USBNC_PHY_STATUS_OFFSET 0x23C #define USBNC_PHYSTATUS_ID_DIG (1 << 4) /* otg_id status */ #define USBNC_PHYCFG2_ACAENB (1 << 4) /* otg_id detection enable */ #define UCTRL_PWR_POL (1 << 9) /* OTG Polarity of Power Pin */ @@ -417,6 +421,67 @@ static const struct ehci_ops mx6_ehci_ops = { .init_after_reset = mx6_init_after_reset }; +static int ehci_usb_ofdata_to_platdata(struct udevice *dev) +{ + struct usb_platdata *plat = dev_get_platdata(dev); + void *__iomem addr = (void *__iomem)dev_get_addr(dev); + void *__iomem phy_ctrl, *__iomem phy_status; + const void *blob = gd->fdt_blob; + int offset = dev->of_offset, phy_off; + const char *mode; + u32 val; + + mode = fdt_getprop(blob, offset, "dr_mode", NULL); + if (mode) { + if (strcmp(mode, "peripheral") == 0) + plat->init_type = USB_INIT_DEVICE; + else if (strcmp(mode, "host") == 0) + plat->init_type = USB_INIT_HOST; + else if (strcmp(mode, "otg") == 0) + plat->init_type = USB_INIT_HOST; + else + return -EINVAL; + } else { + /* + * About fsl,usbphy, Refer to + * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt. + */ + if (is_mx6()) { + phy_off = fdtdec_lookup_phandle(blob, + offset, + "fsl,usbphy"); + if (phy_off < 0) + return -EINVAL; + + addr = (void __iomem *)fdtdec_get_addr(blob, phy_off, + "reg"); + if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) + return -EINVAL; + + phy_ctrl = (void __iomem *)(addr + USBPHY_CTRL); + val = readl(phy_ctrl); + + if (val & USBPHY_CTRL_OTG_ID) + plat->init_type = USB_INIT_DEVICE; + else + plat->init_type = USB_INIT_HOST; + } else if (is_mx7()) { + phy_status = (void __iomem *)(addr + + USBNC_PHY_STATUS_OFFSET); + val = readl(phy_status); + + if (val & USBNC_PHYSTATUS_ID_DIG) + plat->init_type = USB_INIT_DEVICE; + else + plat->init_type = USB_INIT_HOST; + } else { + return -EINVAL; + } + } + + return 0; +} + static int ehci_usb_probe(struct udevice *dev) { struct usb_platdata *plat = dev_get_platdata(dev); @@ -460,6 +525,7 @@ U_BOOT_DRIVER(usb_mx6) = { .name = "ehci_mx6", .id = UCLASS_USB, .of_match = mx6_usb_ids, + .ofdata_to_platdata = ehci_usb_ofdata_to_platdata, .probe = ehci_usb_probe, .remove = ehci_deregister, .ops = &ehci_usb_ops, -- 2.6.2

3 18

[U-Boot] [GIT PULL] Please pull u-boot-mmc master
by Jaehoon Chung 22 Dec '16

22 Dec '16

Dear Tom, Could you pull these patches on your master branch? The following changes since commit 0d92f2141ac5ef5c80d13e9501890f914525d43c: arm64: mvebu: Fix A8K memory mapping and add documentation (2016-12-21 09:52:35 +0100) are available in the git repository at: http://git.denx.de/u-boot-mmc.git master for you to fetch changes up to 9c4132b5267b8d58712077c1c231717c76c4d52f: mmc: Extend dependencies for zynq sdhci (2016-12-22 07:08:52 +0900) ---------------------------------------------------------------- Jaehoon Chung (1): mmc: spear: remove the entire spear_sdhci.c file Michal Simek (1): mmc: Extend dependencies for zynq sdhci drivers/mmc/Kconfig | 2 +- drivers/mmc/Makefile | 1 - drivers/mmc/spear_sdhci.c | 27 --------------------------- 3 files changed, 1 insertion(+), 29 deletions(-) delete mode 100644 drivers/mmc/spear_sdhci.c Best Regards, Jaehoon Chung

2 1

[U-Boot] Please pull u-boot-mpc85xx master
by york sun 22 Dec '16

22 Dec '16

Tom, The following changes since commit 0b4bc1b3ab1850fccbade3e6103f2036f6bdb364: Merge branch 'master' of git://git.denx.de/u-boot-spi (2016-12-16 18:32:43 -0500) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git for you to fetch changes up to 01b25d42c157e9132f2bb7366e63d28deccb554e: powerpc: Retain compatible property for L2 cache (2016-12-20 09:13:19 -0800) ---------------------------------------------------------------- Chris Packham (1): powerpc: Retain compatible property for L2 cache arch/powerpc/cpu/mpc85xx/fdt.c | 61 +++++++++++++++++++++++++----------------- 1 file changed, 36 insertions(+), 25 deletions(-) Thanks. York

2 1

[U-Boot] driver micrel ksz8873 in U-BOOT
by Дмитрий Мелоневич 21 Dec '16

21 Dec '16

I am a student, and I have the task to collect the U-boot driver micrel ksz8873 ethernet switch, but I do not get it, you can describe what you need to do.

2 1

[U-Boot] Please pull u-boot-marvell/master
by Stefan Roese 21 Dec '16

21 Dec '16

Hi Tom, please pull the following A7k/8k fix. Thanks, Stefan The following changes since commit 0bd1f96aa2f18d29e8321e519b0152853e500d4d: Merge git://git.denx.de/u-boot-mpc85xx (2016-12-20 12:20:12 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-marvell.git for you to fetch changes up to 0d92f2141ac5ef5c80d13e9501890f914525d43c: arm64: mvebu: Fix A8K memory mapping and add documentation (2016-12-21 09:52:35 +0100) ---------------------------------------------------------------- Konstantin Porotchkin (1): arm64: mvebu: Fix A8K memory mapping and add documentation arch/arm/mach-mvebu/armada8k/cpu.c | 58 +++++++++++++++++++++++++++++--------- doc/mvebu/armada-8k-memory.txt | 56 ++++++++++++++++++++++++++++++++++++ 2 files changed, 101 insertions(+), 13 deletions(-) create mode 100644 doc/mvebu/armada-8k-memory.txt

2 1

[U-Boot] [PATCH v2 1/2] Convert CONFIG_SPL_RAM_DEVICE to defconfig
by Stefan Agner 21 Dec '16

21 Dec '16

From: Stefan Agner <stefan.agner(a)toradex.com> This converts the following to Kconfig: CONFIG_SPL_RAM_DEVICE Signed-off-by: Stefan Agner <stefan.agner(a)toradex.com> --- Changes in v2: None common/spl/Kconfig | 8 ++++++++ configs/apalis_t30_defconfig | 1 + configs/beaver_defconfig | 1 + configs/cardhu_defconfig | 1 + configs/cei-tk1-som_defconfig | 1 + configs/colibri_t20_defconfig | 1 + configs/colibri_t30_defconfig | 1 + configs/dalmore_defconfig | 1 + configs/harmony_defconfig | 1 + configs/jetson-tk1_defconfig | 1 + configs/medcom-wide_defconfig | 1 + configs/nyan-big_defconfig | 1 + configs/paz00_defconfig | 1 + configs/plutux_defconfig | 1 + configs/seaboard_defconfig | 1 + configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + configs/socfpga_de1_soc_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_mcvevk_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/tec-ng_defconfig | 1 + configs/tec_defconfig | 1 + configs/topic_miami_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/trimslice_defconfig | 1 + configs/venice2_defconfig | 1 + configs/ventana_defconfig | 1 + configs/whistler_defconfig | 1 + configs/zynq_microzed_defconfig | 1 + configs/zynq_picozed_defconfig | 1 + configs/zynq_zc702_defconfig | 1 + configs/zynq_zc706_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm011_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + configs/zynq_zybo_defconfig | 1 + include/configs/microblaze-generic.h | 1 - include/configs/socfpga_common.h | 1 - include/configs/tegra-common.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 1 - 48 files changed, 50 insertions(+), 5 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index cba51f5..8f779e6 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -449,6 +449,14 @@ config SPL_POWER_SUPPORT in drivers/power, drivers/power/pmic and drivers/power/regulator as part of an SPL build. +config SPL_RAM_DEVICE + bool "Support booting from preloaded image in RAM" + depends on SPL + help + Enable booting of an image already loaded in RAM. The image has to + be already in memory when SPL takes over, e.g. loaded by the boot + ROM. + config SPL_SATA_SUPPORT bool "Support loading from SATA" depends on SPL diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 691148c..68ada32 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Apalis T30 # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 5cb73c0..7af382d 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 0214758..9673387 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 909b367..f901296 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index a543246..7806799 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Colibri T20 # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 2ab6764..fd27e4f 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Colibri T30 # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 0db2d1d..159e98a 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index d8712d5..9d14df9 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_HARMONY=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index b0aa3c7..3406abc 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index a65c3ad..2ed76c3 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index e6f862d..7953531 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index b3d6f90..07f9d24 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_PAZ00=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 3c45b9d..9e3b2f3 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index c3119dc..f066c06 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -4,6 +4,7 @@ CONFIG_TEGRA20=y CONFIG_TARGET_SEABOARD=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index d91990c..5f7615b 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -13,6 +13,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 905f766..11c4205 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -13,6 +13,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 7daf81a..8edbe06 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -13,6 +13,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index d8a3b82..e306062 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -15,6 +15,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index a0f04d0..84c5463 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -12,6 +12,7 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 5a53246..192a4b9 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -13,6 +13,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 9450d21..bd52885 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -13,6 +13,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 84a8890..9c5dd45 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -13,6 +13,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 641dd4d..b7b1bfc 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -14,6 +14,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 608cdf8..d95c399 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -14,6 +14,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index f52f19b..d554688 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 1ccec73..fe4b27c 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (TEC) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 3d6161e..4ecd00d 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTDELAY=0 CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="zynq-uboot> " # CONFIG_CMD_IMLS is not set diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 3160f00..5edbf5c 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTDELAY=0 CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="zynq-uboot> " # CONFIG_CMD_IMLS is not set diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index a145ff8..3959689 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 8ff879f..635184c 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 1f2809a..a5ebda2 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -4,6 +4,7 @@ CONFIG_TEGRA20=y CONFIG_TARGET_VENTANA=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/whistler_defconfig b/configs/whistler_defconfig index b7c3ed9..471a6b6 100644 --- a/configs/whistler_defconfig +++ b/configs/whistler_defconfig @@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra20-whistler" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_PROMPT="Tegra20 (Whistler) # " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 16d26c0..02c64e1 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 3ba6b66..3502882 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 117bfda..b4cef10 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index ef73849..007a547 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 1419efa..f338504 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index 2f4fc1e..a64ead1 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index d3116e1..08069ae 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " CONFIG_CMD_GPIO=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index add038c..baa192c 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 96f00e4..f4f9d01 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index dfac764..b990d44 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_NO_FLASH=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " # CONFIG_CMD_IMLS is not set diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 7abffdb..cc90b73 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -284,7 +284,6 @@ #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" -#define CONFIG_SPL_RAM_DEVICE #ifdef CONFIG_SYS_FLASH_BASE # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE #endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 58a6550..7292469 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -309,7 +309,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * 0xFFFF_FF00 ...... End of SRAM */ #define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE (64 * 1024) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 63b711b..4d57b8d 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -104,7 +104,6 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index d480990..7ee0e0b 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -261,7 +261,6 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_RAM_DEVICE /* u-boot is like dtb */ #define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin" diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 953e731..e04be5c 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -296,7 +296,6 @@ #define CONFIG_CMD_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" -- 2.10.2

2 3

[U-Boot] [PATCH] sf: ids: Correct Micron n25q128 flags
by Phil Edworthy 21 Dec '16

21 Dec '16

The n25q128 devices support 4K erase. Signed-off-by: Phil Edworthy <phil.edworthy(a)renesas.com> --- drivers/mtd/spi/spi_flash_ids.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index edca94e..e31131e 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -123,8 +123,8 @@ const struct spi_flash_info spi_flash_ids[] = { {"n25q32a", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, {"n25q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, {"n25q64a", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"n25q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"n25q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, {"n25q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, {"n25q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, -- 2.7.4

2 4

[U-Boot] [PATCH] zynq: spi: Honour the activation / deactivation delay
by Moritz Fischer 21 Dec '16

21 Dec '16

This is not currently implemented. Add support for this so that the Chrome OS EC can be used reliably. Signed-off-by: Moritz Fischer <moritz.fischer(a)ettus.com> Cc: Jagan Teki <jagan(a)openedev.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: u-boot(a)lists.denx.de --- drivers/spi/zynq_spi.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index 15ca271..5e7954c 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -56,6 +56,8 @@ struct zynq_spi_platdata { struct zynq_spi_regs *regs; u32 frequency; /* input frequency */ u32 speed_hz; + uint deactivate_delay_us; /* Delay to wait after deactivate */ + uint activate_delay_us; /* Delay to wait after activate */ }; /* zynq spi priv */ @@ -63,6 +65,7 @@ struct zynq_spi_priv { struct zynq_spi_regs *regs; u8 cs; u8 mode; + ulong last_transaction_us; /* Time of last transaction end */ u8 fifo_depth; u32 freq; /* required frequency */ }; @@ -78,6 +81,10 @@ static int zynq_spi_ofdata_to_platdata(struct udevice *bus) /* FIXME: Use 250MHz as a suitable default */ plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 250000000); + plat->deactivate_delay_us = fdtdec_get_int(blob, node, + "spi-deactivate-delay", 0); + plat->activate_delay_us = fdtdec_get_int(blob, node, + "spi-activate-delay", 0); plat->speed_hz = plat->frequency / 2; debug("%s: regs=%p max-frequency=%d\n", __func__, @@ -133,10 +140,19 @@ static int zynq_spi_probe(struct udevice *bus) static void spi_cs_activate(struct udevice *dev) { struct udevice *bus = dev->parent; + struct zynq_spi_platdata *plat = bus->platdata; struct zynq_spi_priv *priv = dev_get_priv(bus); struct zynq_spi_regs *regs = priv->regs; u32 cr; + /* If it's too soon to do another transaction, wait */ + if (plat->deactivate_delay_us && priv->last_transaction_us) { + ulong delay_us; /* The delay completed so far */ + delay_us = timer_get_us() - priv->last_transaction_us; + if (delay_us < plat->deactivate_delay_us) + udelay(plat->deactivate_delay_us - delay_us); + } + clrbits_le32(&regs->cr, ZYNQ_SPI_CR_CS_MASK); cr = readl(&regs->cr); /* @@ -147,15 +163,23 @@ static void spi_cs_activate(struct udevice *dev) */ cr |= (~(1 << priv->cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK; writel(cr, &regs->cr); + + if (plat->activate_delay_us) + udelay(plat->activate_delay_us); } static void spi_cs_deactivate(struct udevice *dev) { struct udevice *bus = dev->parent; + struct zynq_spi_platdata *plat = bus->platdata; struct zynq_spi_priv *priv = dev_get_priv(bus); struct zynq_spi_regs *regs = priv->regs; setbits_le32(&regs->cr, ZYNQ_SPI_CR_CS_MASK); + + /* Remember time of this transaction so we can honour the bus delay */ + if (plat->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); } static int zynq_spi_claim_bus(struct udevice *dev) -- 2.7.4

4 6

[U-Boot] [PATCH v2] arm64: mvebu: Fix A8K memory mapping and add documentation
by kostap＠marvell.com 21 Dec '16

21 Dec '16

From: Konstantin Porotchkin <kostap(a)marvell.com> Fix the MMU mapping for A8K device family: - Separate A7K and A8K memory mappings - Fix memory regions by including IO mapping for all 3 PCIe interfaces existing on each connected CP110 controller Add A8K memory mapping documentation with all regions configured by Marvell ATF. Change-Id: I9c930569b1853900f5fba2d5db319b092cc7a2a6 Signed-off-by: Konstantin Porotchkin <kostap(a)marvell.com> Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> Cc: Nadav Haklai <nadavh(a)marvell.com> Cc: Neta Zur Hershkovits <neta(a)marvell.com> Cc: Omri Itach <omrii(a)marvell.com> Cc: Igal Liberman <igall(a)marvell.com> Cc: Haim Boot <hayim(a)marvell.com> Cc: Hanna Hawa <hannah(a)marvell.com> --- Changes for v2: - Exclude CP1 memory regions from A7K MMU map - Dynamically adjust the MMU regions list according to the platform type arch/arm/mach-mvebu/armada8k/cpu.c | 58 +++++++++++++++++++++++++++++--------- doc/mvebu/armada-8k-memory.txt | 56 ++++++++++++++++++++++++++++++++++++ 2 files changed, 101 insertions(+), 13 deletions(-) create mode 100644 doc/mvebu/armada-8k-memory.txt diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c index 2719d68..2325e9a 100644 --- a/arch/arm/mach-mvebu/armada8k/cpu.c +++ b/arch/arm/mach-mvebu/armada8k/cpu.c @@ -21,7 +21,33 @@ DECLARE_GLOBAL_DATA_PTR; #define RFU_GLOBAL_SW_RST (MVEBU_RFU_BASE + 0x84) #define RFU_SW_RESET_OFFSET 0 +/* + * The following table includes all memory regions for Armada 7k and + * 8k SoCs. The Armada 7k is missing the CP110 slave regions here. Lets + * define these regions at the beginning of the struct so that they + * can be easier removed later dynamically if an Armada 7k device is detected. + * For a detailed memory map, please see doc/mvebu/armada-8k-memory.txt + */ +#define ARMADA_7K8K_COMMON_REGIONS_START 2 static struct mm_region mvebu_mem_map[] = { + /* Armada 80x0 memory regions include the CP1 (slave) units */ + { + /* SRAM, MMIO regions - CP110 slave region */ + .phys = 0xf4000000UL, + .virt = 0xf4000000UL, + .size = 0x02000000UL, /* 32MiB internal registers */ + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, + { + /* PCI CP1 regions */ + .phys = 0xfa000000UL, + .virt = 0xfa000000UL, + .size = 0x04000000UL, /* 64MiB CP110 slave PCI space */ + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, + /* Armada 80x0 and 70x0 common memory regions start here */ { /* RAM */ .phys = 0x0UL, @@ -47,29 +73,35 @@ static struct mm_region mvebu_mem_map[] = { PTE_BLOCK_NON_SHARE }, { - /* SRAM, MMIO regions - CP110 slave region */ - .phys = 0xf4000000UL, - .virt = 0xf4000000UL, - .size = 0x02000000UL, /* 32MiB internal registers */ + /* PCI CP0 regions */ + .phys = 0xf6000000UL, + .virt = 0xf6000000UL, + .size = 0x04000000UL, /* 64MiB CP110 master PCI space */ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE }, { - /* PCI regions */ - .phys = 0xf8000000UL, - .virt = 0xf8000000UL, - .size = 0x08000000UL, /* 128MiB PCI space (master & slave) */ - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE - }, - { - /* List terminator */ 0, } }; struct mm_region *mem_map = mvebu_mem_map; +void enable_caches(void) +{ + /* + * Armada 7k is not equipped with the CP110 slave CP. In case this + * code runs on an Armada 7k device, lets remove the CP110 slave + * entries from the memory mapping by moving the start to the + * common regions. + */ + if (of_machine_is_compatible("marvell,armada7040")) + mem_map = &mvebu_mem_map[ARMADA_7K8K_COMMON_REGIONS_START]; + + icache_enable(); + dcache_enable(); +} + void reset_cpu(ulong ignored) { u32 reg; diff --git a/doc/mvebu/armada-8k-memory.txt b/doc/mvebu/armada-8k-memory.txt new file mode 100644 index 0000000..064518e --- /dev/null +++ b/doc/mvebu/armada-8k-memory.txt @@ -0,0 +1,56 @@ + Memory Layout on Armada-8k SoC's + ================================ + +The below desribes the physical memory layout for Marvell's Armada-8k SoC's. + +This assumes that the SoC includes Dual CP configuration, in case the flavor is using +a single CP configuration, then all secondary-CP mappings are invalid. + +All "Reserved" areas below, are kept for future usage. + +Start End Use +-------------------------------------------------------------------------- +0x00000000 0xEFFFFFFF DRAM + +0xF0000000 0xF0FFFFFF AP Internal registers space + +0xF1000000 0xF1FFFFFF Reserved. + +0xF2000000 0xF3FFFFFF CP-0 Internal (configuration) registers + space. + +0xF4000000 0xF5FFFFFF CP-1 Internal (configuration) registers + space. + +0xF6000000 0xF6FFFFFF CP-0 / PCIe#0 Memory space. + +0xF7000000 0xF7FFFFFF CP-0 / PCIe#1 Memory space. + +0xF8000000 0xF8FFFFFF CP-0 / PCIe#2 Memory space. + +0xF9000000 0xF900FFFF CP-0 / PCIe#0 IO space. + +0xF9010000 0xF901FFFF CP-0 / PCIe#1 IO space. + +0xF9020000 0xF902FFFF CP-0 / PCIe#2 IO space. + +0xF9030000 0xF9FFFFFF Reserved. + +0xFA000000 0xFAFFFFFF CP-1 / PCIe#0 Memory space. + +0xFB000000 0xFBFFFFFF CP-1 / PCIe#1 Memory space. + +0xFC000000 0xFCFFFFFF CP-1 / PCIe#2 Memory space. + +0xFD000000 0xFD00FFFF CP-1 / PCIe#0 IO space. + +0xFD010000 0xFD01FFFF CP-1 / PCIe#1 IO space. + +0xFD020000 0xFD02FFFF CP-1 / PCIe#2 IO space. + +0xFD030000 0xFFEFFFFF Reserved. + +0xFFF00000 0xFFFFFFFF Bootrom + +0x100000000 <DRAM Size>-1 DRAM + -- 2.7.4

2 1

[U-Boot] [PATCH] common: Fix logic in fpga programming
by Michal Simek 21 Dec '16

21 Dec '16

Stop boot process if fpga programming fails. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- common/image.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/common/image.c b/common/image.c index bd07e86701a4..e3486e46a459 100644 --- a/common/image.c +++ b/common/image.c @@ -1375,11 +1375,10 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images, img_len, BIT_PARTIAL); } - printf(" Programming %s bitstream... ", name); if (err) - printf("failed\n"); - else - printf("OK\n"); + return 1; + + printf(" Programming %s bitstream... OK", name); break; default: printf("The given image format is not supported (corrupt?)\n"); -- 1.9.1

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