December 2016 - U-Boot

[U-Boot] [PATCH 10/10] arm: socfpga: arria10: Added Arria10 critical HW initialization to spl
by Chee Tien Fong 21 Dec '16

21 Dec '16

From: Tien Fong Chee <tien.fong.chee(a)intel.com> This patch adding the Arria10 critical hardware initialization before enabling console print out in spl. Signed-off-by: Tien Fong Chee <tien.fong.chee(a)intel.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)kernel.org> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Tien Fong <skywindctf(a)gmail.com> --- arch/arm/mach-socfpga/spl.c | 86 +++++++++++++++++++++++++++++++++++++++++- 1 files changed, 83 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c index fec4c7a..9375514 100644 --- a/arch/arm/mach-socfpga/spl.c +++ b/arch/arm/mach-socfpga/spl.c @@ -1,7 +1,7 @@ /* - * Copyright (C) 2012 Altera Corporation <www.altera.com> + * Copyright (C) 2012-2016 Altera Corporation <www.altera.com> * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0 */ #include <common.h> @@ -19,22 +19,32 @@ #include <asm/arch/sdram.h> #include <asm/arch/scu.h> #include <asm/arch/nic301.h> +#include <asm/sections.h> +#include <watchdog.h> +#include <fdtdec.h> +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#include <asm/arch/pinmux.h> +#endif DECLARE_GLOBAL_DATA_PTR; +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) static struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; static struct scu_registers *scu_regs = (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS; static struct nic301_registers *nic301_regs = (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; -static struct socfpga_system_manager *sysmgr_regs = +#endif + +static const struct socfpga_system_manager *sysmgr_regs = (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; u32 spl_boot_device(void) { const u32 bsel = readl(&sysmgr_regs->bootinfo); +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) switch (bsel & 0x7) { case 0x1: /* FPGA (HPS2FPGA Bridge) */ return BOOT_DEVICE_RAM; @@ -55,6 +65,24 @@ u32 spl_boot_device(void) printf("Invalid boot device (bsel=%08x)!\n", bsel); hang(); } +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) + switch ((bsel>>12) & 0x7) { + case 0x1: /* FPGA (HPS2FPGA Bridge) */ + return BOOT_DEVICE_RAM; + case 0x2: /* NAND Flash (1.8V) */ + case 0x3: /* NAND Flash (3.0V) */ + return BOOT_DEVICE_NAND; + case 0x4: /* SD/MMC External Transceiver (1.8V) */ + case 0x5: /* SD/MMC Internal Transceiver (3.0V) */ + return BOOT_DEVICE_MMC1; + case 0x6: /* QSPI Flash (1.8V) */ + case 0x7: /* QSPI Flash (3.0V) */ + return BOOT_DEVICE_SPI; + default: + printf("Invalid boot device (bsel=%08x)!\n", bsel); + hang(); + } +#endif } #ifdef CONFIG_SPL_MMC_SUPPORT @@ -68,6 +96,7 @@ u32 spl_boot_mode(const u32 boot_device) } #endif +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) static void socfpga_nic301_slave_ns(void) { writel(0x1, &nic301_regs->lwhps2fpgaregs); @@ -182,3 +211,54 @@ void board_init_f(ulong dummy) /* Configure simple malloc base pointer into RAM. */ gd->malloc_base = CONFIG_SYS_TEXT_BASE + (1024 * 1024); } +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +void board_init_f(ulong dummy) +{ + memset(__bss_start, 0, __bss_end - __bss_start); + /* + * Configure Clock Manager to use intosc clock instead external osc to + * ensure success watchdog operation. We do it as early as possible. + */ + cm_use_intosc(); + + watchdog_disable(); + + arch_early_init_r(); + +#ifdef CONFIG_HW_WATCHDOG + /* release osc1 watchdog timer 0 from reset */ + reset_deassert_osc1wd0(); + + /* reconfigure and enable the watchdog */ + hw_watchdog_init(); + WATCHDOG_RESET(); +#endif /* CONFIG_HW_WATCHDOG */ + +#ifdef CONFIG_OF_CONTROL + /* We need to access to FDT as this stage */ + /* FDT is at end of image */ + gd->fdt_blob = (void *)(__bss_end); + /* Check whether we have a valid FDT or not. */ + if (fdtdec_prepare_fdt()) { + panic("** CONFIG_OF_CONTROL defined but no FDT - please see " + "doc/README.fdt-control"); + } +#endif /* CONFIG_OF_CONTROL */ + + /* Initialize the timer */ + timer_init(); + + /* configuring the clock based on handoff */ + cm_basic_init(gd->fdt_blob); + WATCHDOG_RESET(); + + config_dedicated_pins(gd->fdt_blob); + WATCHDOG_RESET(); + + /* configure the Reset Manager */ + reset_deassert_dedicated_peripherals(); + + /* enable console uart printing */ + preloader_console_init(); +} +#endif -- 1.7.7.4

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[U-Boot] [GIT PULL] Xilinx fixes
by Michal Simek 21 Dec '16

21 Dec '16

Hi Tom, here are minumum number of patches I would like to get to 2017.01. It is fixing several issues - multiple ethernet controllers. - usb/sata together on zcu102 (by moving to DM) - logic in fpga boot via bootm - Fix ddr init code leaking for zynq and zynqmp - two trivial changes - empty lines - add cpu reference to enable Thanks, Michal The following changes since commit 4cf5c5f1e60e6541630ae829b5fa2db704c268f0: Prepare v2017.01-rc2 (2016-12-19 16:08:57 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 950f86ca38325c9ae7874895d2cdbdda5496e712: ARM64: zynqmp: Replace board specific with generic memory bank decoding (2016-12-20 09:15:28 +0100) ---------------------------------------------------------------- Michal Simek (8): common: miiphyutil: Add helper function for mdio bus name net: xilinx: Use mdio_register_seq() to support multiple instances dm: Add support for scsi/sata based devices block: Move ceva driver to DM gpio: zynq: Remove empty line common: Fix logic in fpga programming ARM64: zynqmp: Add missing SPL dependency for boot.bin generation ARM64: zynqmp: Add one empty line between license and nodes Moritz Fischer (1): ARM: dt: zynq: Add labels to cpu nodes to allow overriding OPPs. Nathan Rossi (3): fdt: add memory bank decoding functions for board setup ARM: zynq: Replace board specific with generic memory bank decoding ARM64: zynqmp: Replace board specific with generic memory bank decoding arch/arm/cpu/armv8/zynqmp/Kconfig | 1 + arch/arm/dts/zynq-7000.dtsi | 4 +-- arch/arm/dts/zynqmp.dtsi | 1 + arch/arm/include/asm/arch-zynqmp/hardware.h | 2 -- board/xilinx/zynq/board.c | 112 ++------------------------------------------------------------ board/xilinx/zynqmp/zynqmp.c | 123 ++------------------------------------------------------------------ common/board_r.c | 4 +-- common/image.c | 7 ++-- common/miiphyutil.c | 12 +++++++ common/scsi.c | 76 ++++++++++++++++++++++++++++++++++++++++++ configs/xilinx_zynqmp_ep_defconfig | 2 ++ configs/xilinx_zynqmp_zcu102_defconfig | 2 ++ configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 ++ drivers/block/Kconfig | 22 ++++++++++++ drivers/block/Makefile | 1 + drivers/block/ahci.c | 30 ++++++++++++----- drivers/block/blk-uclass.c | 2 +- drivers/block/sata_ceva.c | 41 +++++++++++++++++++++-- drivers/block/scsi-uclass.c | 27 +++++++++++++++ drivers/gpio/zynq_gpio.c | 1 - drivers/net/xilinx_axi_emac.c | 3 +- drivers/net/xilinx_emaclite.c | 3 +- drivers/net/zynq_gem.c | 3 +- include/ahci.h | 2 +- include/configs/xilinx_zynqmp.h | 1 - include/configs/xilinx_zynqmp_ep.h | 1 - include/configs/xilinx_zynqmp_zcu102.h | 2 -- include/dm/uclass-id.h | 1 + include/fdtdec.h | 34 +++++++++++++++++++ include/miiphy.h | 9 +++++ include/sata.h | 2 ++ include/scsi.h | 20 ++++++++++- lib/fdtdec.c | 56 +++++++++++++++++++++++++++++++ 33 files changed, 346 insertions(+), 263 deletions(-) create mode 100644 drivers/block/scsi-uclass.c -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs

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[U-Boot] Please pull u-boot-dm
by Simon Glass 21 Dec '16

21 Dec '16

Hi Tom, Here is the binman tool as well as conversion of x86 and sunxi to use it. The following changes since commit 0b4bc1b3ab1850fccbade3e6103f2036f6bdb364: Merge branch 'master' of git://git.denx.de/u-boot-spi (2016-12-16 18:32:43 -0500) are available in the git repository at: git://git.denx.de/u-boot-dm.git for you to fetch changes up to 68af10022442153f6f87958053fee030ad1cb57f: binman: Drop microcode features from ifdtool (2016-12-20 08:09:55 +1300) ---------------------------------------------------------------- Simon Glass (13): binman: Introduce binman, a tool for building binary images binman: Add basic entry types for U-Boot binman: Add support for building x86 ROMs binman: Add support for u-boot.img as an input binary binman: Add support for building x86 ROMs with SPL binman: Add support for building x86 images with FSP/CMC binman: Add a build rule for binman binman: Allow configuration options to be used in .dts files binman: Automatically include a U-Boot .dtsi file tegra: Use a U-Boot-specific .dtsi file sunxi: Use binman for sunxi boards x86: Use binman all x86 boards binman: Drop microcode features from ifdtool Makefile | 57 +- arch/arm/dts/sunxi-u-boot.dtsi | 14 + arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 15 + arch/arm/dts/tegra124-nyan-big.dts | 2 - arch/arm/dts/tegra20-u-boot.dtsi | 8 + arch/arm/dts/tegra20.dtsi | 2 - arch/x86/dts/emulation-u-boot.dtsi | 18 + arch/x86/dts/u-boot.dtsi | 62 ++ scripts/Makefile.lib | 25 +- tools/binman/.gitignore | 1 + tools/binman/README | 541 +++++++++++++++++ tools/binman/binman | 1 + tools/binman/binman.py | 114 ++++ tools/binman/cmdline.py | 53 ++ tools/binman/control.py | 118 ++++ tools/binman/entry_test.py | 27 + tools/binman/etype/_testing.py | 26 + tools/binman/etype/blob.py | 37 ++ tools/binman/etype/entry.py | 200 +++++++ tools/binman/etype/intel_cmc.py | 17 + tools/binman/etype/intel_descriptor.py | 55 ++ tools/binman/etype/intel_fsp.py | 17 + tools/binman/etype/intel_me.py | 17 + tools/binman/etype/intel_mrc.py | 17 + tools/binman/etype/intel_vga.py | 17 + tools/binman/etype/u_boot.py | 17 + tools/binman/etype/u_boot_dtb.py | 17 + tools/binman/etype/u_boot_dtb_with_ucode.py | 78 +++ tools/binman/etype/u_boot_img.py | 17 + tools/binman/etype/u_boot_nodtb.py | 17 + tools/binman/etype/u_boot_spl.py | 17 + tools/binman/etype/u_boot_spl_bss_pad.py | 26 + tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 28 + tools/binman/etype/u_boot_ucode.py | 84 +++ tools/binman/etype/u_boot_with_ucode_ptr.py | 87 +++ tools/binman/etype/x86_start16.py | 17 + tools/binman/etype/x86_start16_spl.py | 17 + tools/binman/fdt_test.py | 48 ++ tools/binman/func_test.py | 822 ++++++++++++++++++++++++++ tools/binman/image.py | 229 +++++++ tools/binman/test/01_invalid.dts | 5 + tools/binman/test/02_missing_node.dts | 6 + tools/binman/test/03_empty.dts | 9 + tools/binman/test/04_invalid_entry.dts | 11 + tools/binman/test/05_simple.dts | 11 + tools/binman/test/06_dual_image.dts | 22 + tools/binman/test/07_bad_align.dts | 12 + tools/binman/test/08_pack.dts | 30 + tools/binman/test/09_pack_extra.dts | 35 ++ tools/binman/test/10_pack_align_power2.dts | 12 + tools/binman/test/11_pack_align_size_power2.dts | 12 + tools/binman/test/12_pack_inv_align.dts | 13 + tools/binman/test/13_pack_inv_size_align.dts | 13 + tools/binman/test/14_pack_overlap.dts | 16 + tools/binman/test/15_pack_overflow.dts | 12 + tools/binman/test/16_pack_image_overflow.dts | 13 + tools/binman/test/17_pack_image_size.dts | 13 + tools/binman/test/18_pack_image_align.dts | 13 + tools/binman/test/19_pack_inv_image_align.dts | 14 + tools/binman/test/20_pack_inv_image_align_power2.dts | 13 + tools/binman/test/21_image_pad.dts | 16 + tools/binman/test/22_image_name.dts | 21 + tools/binman/test/23_blob.dts | 12 + tools/binman/test/24_sorted.dts | 17 + tools/binman/test/25_pack_zero_size.dts | 15 + tools/binman/test/26_pack_u_boot_dtb.dts | 14 + tools/binman/test/27_pack_4gb_no_size.dts | 18 + tools/binman/test/28_pack_4gb_outside.dts | 19 + tools/binman/test/29_x86-rom.dts | 19 + tools/binman/test/30_x86-rom-me-no-desc.dts | 15 + tools/binman/test/31_x86-rom-me.dts | 18 + tools/binman/test/32_intel-vga.dts | 13 + tools/binman/test/33_x86-start16.dts | 13 + tools/binman/test/34_x86_ucode.dts | 29 + tools/binman/test/35_x86_single_ucode.dts | 26 + tools/binman/test/36_u_boot_img.dts | 11 + tools/binman/test/37_x86_no_ucode.dts | 20 + tools/binman/test/38_x86_ucode_missing_node.dts | 26 + tools/binman/test/39_x86_ucode_missing_node2.dts | 23 + tools/binman/test/40_x86_ucode_not_in_image.dts | 28 + tools/binman/test/41_unknown_pos_size.dts | 11 + tools/binman/test/42_intel-fsp.dts | 13 + tools/binman/test/43_intel-cmc.dts | 13 + tools/binman/test/44_x86_optional_ucode.dts | 30 + tools/binman/test/descriptor.bin | Bin 0 -> 4096 bytes tools/binman/test/u_boot_no_ucode_ptr | Bin 0 -> 4182 bytes tools/binman/test/u_boot_no_ucode_ptr.c | 15 + tools/binman/test/u_boot_ucode_ptr | Bin 0 -> 4175 bytes tools/binman/test/u_boot_ucode_ptr.c | 15 + tools/binman/test/u_boot_ucode_ptr.lds | 18 + tools/ifdtool.c | 254 +------- 91 files changed, 3709 insertions(+), 300 deletions(-) create mode 100644 arch/arm/dts/sunxi-u-boot.dtsi create mode 100644 arch/arm/dts/tegra124-nyan-big-u-boot.dtsi create mode 100644 arch/arm/dts/tegra20-u-boot.dtsi create mode 100644 arch/x86/dts/emulation-u-boot.dtsi create mode 100644 arch/x86/dts/u-boot.dtsi create mode 100644 tools/binman/.gitignore create mode 100644 tools/binman/README create mode 120000 tools/binman/binman create mode 100755 tools/binman/binman.py create mode 100644 tools/binman/cmdline.py create mode 100644 tools/binman/control.py create mode 100644 tools/binman/entry_test.py create mode 100644 tools/binman/etype/_testing.py create mode 100644 tools/binman/etype/blob.py create mode 100644 tools/binman/etype/entry.py create mode 100644 tools/binman/etype/intel_cmc.py create mode 100644 tools/binman/etype/intel_descriptor.py create mode 100644 tools/binman/etype/intel_fsp.py create mode 100644 tools/binman/etype/intel_me.py create mode 100644 tools/binman/etype/intel_mrc.py create mode 100644 tools/binman/etype/intel_vga.py create mode 100644 tools/binman/etype/u_boot.py create mode 100644 tools/binman/etype/u_boot_dtb.py create mode 100644 tools/binman/etype/u_boot_dtb_with_ucode.py create mode 100644 tools/binman/etype/u_boot_img.py create mode 100644 tools/binman/etype/u_boot_nodtb.py create mode 100644 tools/binman/etype/u_boot_spl.py create mode 100644 tools/binman/etype/u_boot_spl_bss_pad.py create mode 100644 tools/binman/etype/u_boot_spl_with_ucode_ptr.py create mode 100644 tools/binman/etype/u_boot_ucode.py create mode 100644 tools/binman/etype/u_boot_with_ucode_ptr.py create mode 100644 tools/binman/etype/x86_start16.py create mode 100644 tools/binman/etype/x86_start16_spl.py create mode 100644 tools/binman/fdt_test.py create mode 100644 tools/binman/func_test.py create mode 100644 tools/binman/image.py create mode 100644 tools/binman/test/01_invalid.dts create mode 100644 tools/binman/test/02_missing_node.dts create mode 100644 tools/binman/test/03_empty.dts create mode 100644 tools/binman/test/04_invalid_entry.dts create mode 100644 tools/binman/test/05_simple.dts create mode 100644 tools/binman/test/06_dual_image.dts create mode 100644 tools/binman/test/07_bad_align.dts create mode 100644 tools/binman/test/08_pack.dts create mode 100644 tools/binman/test/09_pack_extra.dts create mode 100644 tools/binman/test/10_pack_align_power2.dts create mode 100644 tools/binman/test/11_pack_align_size_power2.dts create mode 100644 tools/binman/test/12_pack_inv_align.dts create mode 100644 tools/binman/test/13_pack_inv_size_align.dts create mode 100644 tools/binman/test/14_pack_overlap.dts create mode 100644 tools/binman/test/15_pack_overflow.dts create mode 100644 tools/binman/test/16_pack_image_overflow.dts create mode 100644 tools/binman/test/17_pack_image_size.dts create mode 100644 tools/binman/test/18_pack_image_align.dts create mode 100644 tools/binman/test/19_pack_inv_image_align.dts create mode 100644 tools/binman/test/20_pack_inv_image_align_power2.dts create mode 100644 tools/binman/test/21_image_pad.dts create mode 100644 tools/binman/test/22_image_name.dts create mode 100644 tools/binman/test/23_blob.dts create mode 100644 tools/binman/test/24_sorted.dts create mode 100644 tools/binman/test/25_pack_zero_size.dts create mode 100644 tools/binman/test/26_pack_u_boot_dtb.dts create mode 100644 tools/binman/test/27_pack_4gb_no_size.dts create mode 100644 tools/binman/test/28_pack_4gb_outside.dts create mode 100644 tools/binman/test/29_x86-rom.dts create mode 100644 tools/binman/test/30_x86-rom-me-no-desc.dts create mode 100644 tools/binman/test/31_x86-rom-me.dts create mode 100644 tools/binman/test/32_intel-vga.dts create mode 100644 tools/binman/test/33_x86-start16.dts create mode 100644 tools/binman/test/34_x86_ucode.dts create mode 100644 tools/binman/test/35_x86_single_ucode.dts create mode 100644 tools/binman/test/36_u_boot_img.dts create mode 100644 tools/binman/test/37_x86_no_ucode.dts create mode 100644 tools/binman/test/38_x86_ucode_missing_node.dts create mode 100644 tools/binman/test/39_x86_ucode_missing_node2.dts create mode 100644 tools/binman/test/40_x86_ucode_not_in_image.dts create mode 100644 tools/binman/test/41_unknown_pos_size.dts create mode 100644 tools/binman/test/42_intel-fsp.dts create mode 100644 tools/binman/test/43_intel-cmc.dts create mode 100644 tools/binman/test/44_x86_optional_ucode.dts create mode 100644 tools/binman/test/descriptor.bin create mode 100755 tools/binman/test/u_boot_no_ucode_ptr create mode 100644 tools/binman/test/u_boot_no_ucode_ptr.c create mode 100755 tools/binman/test/u_boot_ucode_ptr create mode 100644 tools/binman/test/u_boot_ucode_ptr.c create mode 100644 tools/binman/test/u_boot_ucode_ptr.lds Regards, Simon

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[U-Boot] Please pull from u-boot-i2c
by Heiko Schocher 21 Dec '16

21 Dec '16

Hello Tom, please pull from u-boot-i2c.git master The following changes since commit 0b4bc1b3ab1850fccbade3e6103f2036f6bdb364: Merge branch 'master' of git://git.denx.de/u-boot-spi (2016-12-16 18:32:43 -0500) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to 77466267eb3f937f432135f73efb25122e668cfc: i2c: mv_i2c.c: Correct address endianness (2016-12-19 09:32:00 +0100) ---------------------------------------------------------------- Bradley Bolen (1): i2c: mv_i2c.c: Correct address endianness drivers/i2c/mv_i2c.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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[U-Boot] [PATCH] driver: net: fsl-mc: Update MC memory allocation code
by Priyanka Jain 20 Dec '16

20 Dec '16

Firmware of Management Complex (MC) should be loaded at 512MB aligned privately allocated memory at DRAM end. And this memory should be reduced from total memory available for general purposes. Update memory allocation code in MC driver to support above requirements. Signed-off-by: Priyanka Jain <priyanka.jain(a)nxp.com> --- drivers/net/fsl-mc/mc.c | 98 +++++++++++++++++++++------------------------- 1 files changed, 45 insertions(+), 53 deletions(-) diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 46b8a6b..df3f7fa 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Freescale Semiconductor + * Copyright (C) 2014, 2016 Freescale Semiconductor * * SPDX-License-Identifier: GPL-2.0+ */ @@ -41,6 +41,7 @@ struct fsl_dpbp_obj *dflt_dpbp = NULL; struct fsl_dpio_obj *dflt_dpio = NULL; struct fsl_dpni_obj *dflt_dpni = NULL; static u64 mc_lazy_dpl_addr; +static u64 mc_ram_addr; #ifdef DEBUG void dump_ram_words(const char *title, void *addr) @@ -89,11 +90,11 @@ void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs) * Copying MC firmware or DPL image to DDR */ static int mc_copy_image(const char *title, - u64 image_addr, u32 image_size, u64 mc_ram_addr) + u64 image_addr, u32 image_size, u64 mc_addr) { - debug("%s copied to address %p\n", title, (void *)mc_ram_addr); - memcpy((void *)mc_ram_addr, (void *)image_addr, image_size); - flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size); + debug("%s copied to address %p\n", title, (void *)mc_addr); + memcpy((void *)mc_addr, (void *)image_addr, image_size); + flush_dcache_range(mc_addr, mc_addr + image_size); return 0; } @@ -156,16 +157,14 @@ int parse_mc_firmware_fit_image(u64 mc_fw_addr, /* * Calculates the values to be used to specify the address range * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers. - * It returns the highest 512MB-aligned address within the given - * address range, in '*aligned_base_addr', and the number of 256 MiB - * blocks in it, in 'num_256mb_blocks'. + * It stores the highest 512MB-aligned address within the given + * address range, in 'mc_ram_addr', and returns the number of 256 MB + * blocks in 'num_256mb_blocks'. */ -static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr, - size_t mc_ram_size, - u64 *aligned_base_addr, +static int calculate_mc_private_ram_params(size_t mc_ram_size, u8 *num_256mb_blocks) { - u64 addr; + u64 mc_ram_end_addr; u16 num_blocks; if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) { @@ -180,18 +179,39 @@ static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr, mc_ram_size); return -EINVAL; } + *num_256mb_blocks = num_blocks; - addr = (mc_private_ram_start_addr + mc_ram_size - 1) & + /* + * The MC private DRAM block will be carved at the end of DRAM + */ + if (gd->bd->bi_dram[1].start) { + mc_ram_end_addr = + gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size; + } else { + mc_ram_end_addr = + gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; + } + + mc_ram_addr = (mc_ram_end_addr - mc_ram_size) & MC_RAM_BASE_ADDR_ALIGNMENT_MASK; - if (addr < mc_private_ram_start_addr) { - printf("fsl-mc: ERROR: bad start address %#llx\n", - mc_private_ram_start_addr); + if (mc_ram_addr > mc_ram_end_addr) { + printf("fsl-mc: ERROR: bad end address %#llx\n", + mc_ram_end_addr); return -EFAULT; } - *aligned_base_addr = addr; - *num_256mb_blocks = num_blocks; + /* + * Total DRAM available for general purpose will get + * reduced by the size of private DRAM allocated to MC. + */ + if (gd->bd->bi_dram[1].start) { + gd->bd->bi_dram[1].size = + mc_ram_addr - gd->bd->bi_dram[1].start; + } else { + gd->bd->bi_dram[0].size = + mc_ram_addr - gd->bd->bi_dram[0].start; + } return 0; } @@ -225,7 +245,7 @@ static int mc_fixup_dpc(u64 dpc_addr) return 0; } -static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr) +static int load_mc_dpc(size_t mc_ram_size, u64 mc_dpc_addr) { u64 mc_dpc_offset; #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR @@ -282,7 +302,7 @@ static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr) return 0; } -static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr) +static int load_mc_dpl(size_t mc_ram_size, u64 mc_dpl_addr) { u64 mc_dpl_offset; #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR @@ -365,7 +385,6 @@ __weak bool soc_has_aiop(void) static int load_mc_aiop_img(u64 aiop_fw_addr) { - u64 mc_ram_addr = mc_get_dram_addr(); #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR void *aiop_img; #endif @@ -443,7 +462,6 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) int error = 0; int portal_id = 0; struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; - u64 mc_ram_addr = mc_get_dram_addr(); u32 reg_gsr; u32 reg_mcfbalr; #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR @@ -451,14 +469,11 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) size_t raw_image_size = 0; #endif struct mc_version mc_ver_info; - u64 mc_ram_aligned_base_addr; u8 mc_ram_num_256mb_blocks; size_t mc_ram_size = mc_get_dram_block_size(); - error = calculate_mc_private_ram_params(mc_ram_addr, - mc_ram_size, - &mc_ram_aligned_base_addr, + error = calculate_mc_private_ram_params(mc_ram_size, &mc_ram_num_256mb_blocks); if (error != 0) goto out; @@ -493,7 +508,7 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) #endif dump_ram_words("firmware", (void *)mc_ram_addr); - error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr); + error = load_mc_dpc(mc_ram_size, mc_dpc_addr); if (error != 0) goto out; @@ -503,11 +518,11 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) /* * Tell MC what is the address range of the DRAM block assigned to it: */ - reg_mcfbalr = (u32)mc_ram_aligned_base_addr | + reg_mcfbalr = (u32)mc_ram_addr | (mc_ram_num_256mb_blocks - 1); out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); out_le32(&mc_ccsr_regs->reg_mcfbahr, - (u32)(mc_ram_aligned_base_addr >> 32)); + (u32)(mc_ram_addr >> 32)); out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ); /* @@ -570,13 +585,12 @@ int mc_apply_dpl(u64 mc_dpl_addr) struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR; int error = 0; u32 reg_gsr; - u64 mc_ram_addr = mc_get_dram_addr(); size_t mc_ram_size = mc_get_dram_block_size(); if (!mc_dpl_addr) return -1; - error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr); + error = load_mc_dpl(mc_ram_size, mc_dpl_addr); if (error != 0) return error; @@ -611,28 +625,6 @@ int get_dpl_apply_status(void) } /** - * Return the MC address of private DRAM block. - */ -u64 mc_get_dram_addr(void) -{ - u64 mc_ram_addr; - - /* - * The MC private DRAM block was already carved at the end of DRAM - * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE: - */ - if (gd->bd->bi_dram[1].start) { - mc_ram_addr = - gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size; - } else { - mc_ram_addr = - gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; - } - - return mc_ram_addr; -} - -/** * Return the actual size of the MC private DRAM block. */ unsigned long mc_get_dram_block_size(void) -- 1.7.4.1

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Re: [U-Boot] [PATCH] powerpc: Retain compatible property for L2 cache
by Chris Packham 20 Dec '16

20 Dec '16

On 2/12/2016 6:34 AM, "york sun" <york.sun(a)nxp.com> wrote: > > On 11/30/2016 11:47 PM, Chris Packham wrote: > > On Thu, Dec 1, 2016 at 6:18 AM, york sun <york.sun(a)nxp.com> wrote: > >> On 11/28/2016 07:10 PM, Chris Packham wrote: > >>> Instead of setting the compatible property to "cache", append the > >>> desired value retaining what may already be set in the current property. > >>> > >>> Signed-off-by: Chris Packham <judge.packham(a)gmail.com> > >>> --- > >> > >> <snip> > >> > >>> > >>> arch/powerpc/cpu/mpc85xx/fdt.c | 3 ++- > >>> 1 file changed, 2 insertions(+), 1 deletion(-) > >>> > >>> diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c > >>> index 047c972ac78e..f31df41836d5 100644 > >>> --- a/arch/powerpc/cpu/mpc85xx/fdt.c > >>> +++ b/arch/powerpc/cpu/mpc85xx/fdt.c > >>> @@ -337,7 +337,8 @@ static inline void ft_fixup_l2cache(void *blob) > >>> fdt_setprop_cell(blob, l2_off, "cache-size", size); > >>> fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); > >>> fdt_setprop_cell(blob, l2_off, "cache-level", 2); > >>> - fdt_setprop(blob, l2_off, "compatible", "cache", 6); > >>> + if (fdt_node_check_compatible(blob, l2_off, "cache") == 1) > >>> + fdt_appendprop_string(blob, l2_off, "compatible", "cache"); > >>> } > >>> > >>> if (l3_off < 0) { > >>> > >> > >> You drop fdt_setprop, check the compatible "cache" and append it with > >> "cache" again? I thought you wanted > >> > >> compatible = "fsl,t2080-l2-cache-controller", "cache"; > > > > I already have "fsl,t2080-l2-cache-controller" in my dts. Really I just want > > > > fdt_appendprop_string(blob, l2_off, "compatible", "cache"); > > I see. > > > > > But the check is necessary because we run through this block multiple > > times (once per CPU). My initial version was > > > > struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr())); > > int len; > > char buf[40]; > > > > len = sprintf(buf, > > "fsl,%c%s-l2-cache-controller",tolower(cpu->name[0]), cpu->name + 1) + > > 1; > > len += sprintf(buf + len, "cache") + 1; > > > > fdt_setprop(blob, l2_off, "compatible", buf, len); > > > > But that's more code. > > > > Ideally we don't have to fix up dts. Since if we have to do it, I like > the long version better. If the dts doesn't have correct compatible, the > kernel won't take it, right? > Ok. I'll post a v2 based on the long version. As it's a repeat of code in another block I'll see if i can extract it to a helper function.

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[U-Boot] Cubieboard2 uboot 2016.09.01 not supporting booting from sata
by Robert Moskowitz 20 Dec '16

20 Dec '16

Dear listers, It has been over a year since I have built a new system and tried to set up to boot from sata. What I did in the past was to use a small mSD card with only the uboot bin and no partitions. All my partitions for either Fedrora25 or Centos7 are on the sata. I should boot up, the system sees no partitions on the mSD, it scans for other devices, finds the sata and proceeds from there. Something must have changed in the past year. Or else my notes on what to do are incomplete. Can you help? Here is a capture of a boot attempt with F25 on the sata: U-Boot SPL 2016.09.01 (Oct 19 2016 - 13:46:44) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from MMC1 U-Boot 2016.09.01 (Oct 19 2016 - 13:46:44 +0000) Allwinner Technology CPU: Allwinner A20 (SUN7I) Model: Cubietech Cubieboard2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 In: serial Out: serial Err: serial SCSI: Target spinup took 0 ms. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: eth0: ethernet@01c50000 Hit any key to stop autoboot: 0 ** Invalid partition 1 ** ** Invalid partition 1 ** ** Invalid partition 1 ** => thank you Bob

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[U-Boot] FIT Image Crashing
by Kipper, Matthew 20 Dec '16

20 Dec '16

Hi all, I'm working on a Zynq-7000 system that currently performs a "legacy" boot - the kernel, device tree and initramfs are loaded independently into RAM, and then they're all loaded by passing their addresses into 'bootm'. I'd like to update this to a "moderm" boot, where the system loads a single FIT image instead. This is my first exposure to FIT images - I thought I figured out how to do this, but my system is crashing so I'm beginning to doubt myself ;) This is the "legacy" load sequence (output omitted): setenv bootargs "console=ttyPS0,115200 root=/dev/ram rw ramdisk_size=0x1600000 earlyprintk init=/sbin/init" tftpboot 0x2000000 devicetree.dtb tftpboot 0x2080000 uImage tftpboot 0x4000000 initramfs.img Here's the output when I actually boot: Zynq> bootm 0x2080000 0x4000000 0x2000000 ## Booting kernel from Legacy Image at 02080000 ... Image Name: Linux-4.0.0-00011-gcfd1f62 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3297728 Bytes = 3.1 MiB Load Address: 00008000 Entry Point: 00008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 04000000 ... Image Name: Ramdisk Image Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 22569621 Bytes = 21.5 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 02000000 Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Ramdisk to 1ea79000, end 1ffff295 ... OK Loading Device Tree to 1ea73000, end 1ea78ba1 ... OK Starting kernel ... Uncompressing Linux... done, booting the kernel. Booting Linux on physical CPU 0x0 [Omitted] The kernel boots. All is well. To replace this with a FIT image, I created a '.its' file and compiled it with 'mkimage'. If it matters... * I'm using the 'mkimage' binary in my u-boot/tools directory * 'which dtc' points to the 'scripts/dtc' directory in the kernel tree that I'm using for my build I won't post the entire '.its' file, but here is the output from 'mkimage': FIT description: Test FIT Image Created: Mon Dec 19 14:09:14 2016 Image 0 (kernel@1) Description: Linux Kernel Created: Mon Dec 19 14:09:14 2016 Type: Kernel Image Compression: uncompressed Data Size: 3297792 Bytes = 3220.50 kB = 3.15 MB Architecture: ARM OS: Linux Load Address: 0x00008000 Entry Point: 0x00008000 Image 1 (fdt@1) Description: Device Tree Blob Created: Mon Dec 19 14:09:14 2016 Type: Flat Device Tree Compression: uncompressed Data Size: 11170 Bytes = 10.91 kB = 0.01 MB Architecture: ARM Image 2 (ramdisk@1) Description: initramfs Created: Mon Dec 19 14:09:14 2016 Type: RAMDisk Image Compression: gzip compressed Data Size: 22569685 Bytes = 22040.71 kB = 21.52 MB Architecture: ARM OS: Linux Load Address: 0x00000000 Entry Point: 0x00000000 Default Configuration: 'conf@1' Configuration 0 (conf@1) Description: Boot Linux kernel with FDT blob Kernel: kernel@1 Init Ramdisk: ramdisk@1 FDT: fdt@1 To me, it looks like the FIT image was built correctly. The load addresses and entry points line up with what U-Boot reports during a "legacy" boot. But this is my first time using FIT images, so I'm not 100% sure that this is correct. To load this image, I changed the command sequence to the following (output omitted): setenv bootargs "console=ttyPS0,115200 root=/dev/ram rw ramdisk_size=0x1600000 earlyprintk init=/sbin/init" tftpboot 0x2000000 image.itb All my bootargs are the same as before, but now I'm only loading a single FIT image into RAM rather than three separate images. Here's what happens when I try to boot: Zynq> bootm 0x2000000 ## Loading kernel from FIT Image at 02000000 ... Using 'conf@1' configuration Verifying Hash Integrity ... OK Trying 'kernel@1' kernel subimage Description: Linux Kernel Type: Kernel Image Compression: uncompressed Data Start: 0x020000c4 Data Size: 3297792 Bytes = 3.1 MiB Architecture: ARM OS: Linux Load Address: 0x00008000 Entry Point: 0x00008000 Verifying Hash Integrity ... OK ## Loading ramdisk from FIT Image at 02000000 ... Using 'conf@1' configuration Trying 'ramdisk@1' ramdisk subimage Description: initramfs Type: RAMDisk Image Compression: gzip compressed Data Start: 0x02327f88 Data Size: 22569685 Bytes = 21.5 MiB Architecture: ARM OS: Linux Load Address: 0x00000000 Entry Point: 0x00000000 Verifying Hash Integrity ... OK ## Loading fdt from FIT Image at 02000000 ... Using 'conf@1' configuration Trying 'fdt@1' fdt subimage Description: Device Tree Blob Type: Flat Device Tree Compression: uncompressed Data Start: 0x02325370 Data Size: 11170 Bytes = 10.9 KiB Architecture: ARM Verifying Hash Integrity ... OK Booting using the fdt blob at 0x2325370 Loading Kernel Image ... OK Loading Ramdisk to 1ea79000, end 1ffff2d5 ... OK Loading Device Tree to 1ea73000, end 1ea78ba1 ... OK Starting kernel ... undefined instruction pc : [<0000800c>] lr : [<3ff2b834>] reloc pc : [<c40dd00c>] lr : [<04000834>] sp : 3f30acb0 ip : 0000000c fp : 3ff2b8c0 r10: 00000000 r9 : 3f30aee0 r8 : 020000c4 r7 : 00000000 r6 : 00008000 r5 : 3ff9c868 r4 : 00000000 r3 : 00002ba2 r2 : 1ea73000 r1 : 00000000 r0 : 3f30afb0 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... Everything looks good up until "Starting kernel...". U-Boot reads the FIT image header and it lines up with my expectation. The kernel's load address matches the legacy boot's load address, but when U-Boot actually starts the kernel, the system crashes and resets. The 'pc' and 'reloc pc' values are the only real hint I'm seeing - does this mean that U-Boot is looking for the first kernel instruction at an offset of 0xC from the load address? Does relocation fit into this somehow? I do know that U-Boot is loading the kernel to 0x8000 before crashing. Here's a memory read before loading the FIT image: Zynq> md 0x8000 00008000: dfdc3ffc dd5ffbfe ff7fbabe ffffd7fe .?...._......... 00008010: 777fccfb fbbfeefb dde9f8cf ffffeee7 ...w............ 00008020: ffcefebc f76ffffb ffadf2ed f5f776ff ......o......v.. 00008030: eb31fdd9 fff28fff df5fb77f ffdbeeeb ..1......._..... 00008040: dedfef7f ebeffebe fddfbbbf f7f7d4ff ................ And here it is after the crash/reset: Zynq> md 0x8000 00008000: 56190527 3328f51d dc265858 c0513200 '..V..(3XX&..2Q. 00008010: 00800000 00800000 368dbc5f 00020205 ........_..6.... 00008020: 756e694c 2e342d78 2d302e30 31303030 Linux-4.0.0-0001 00008030: 63672d31 66316466 00003236 00000000 1-gcfd1f62...... 00008040: e1a00000 e1a00000 e1a00000 e1a00000 ................ When loading the FIT image, 'bootm' reported that the kernel data started at an offset of 0xc4 from the start of the FIT image. And lo and behold, if I read the memory at that address, 0x20000c4, it lines up with the data at 0x8000 after the (failed) boot. As I mentioned, this is my first time trying to boot from a FIT image, so I feel like I may have some major misunderstanding for how I should handle the load address, etc. Any guidance would be appreciated. As an aside, this is the output from my kernel build when creating the uImage that's inside the FIT image: /bin/sh ./scripts/mkuboot.sh -A arm -O linux -C none -T kernel -a 0x8000 -e 0x8000 -n 'Linux-4.0.0-00011-gcfd1f62' -d arch/arm/boot/zImage arch/arm/boot/uImage Image Name: Linux-4.0.0-00011-gcfd1f62 Created: Mon Dec 19 13:32:30 2016 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3297728 Bytes = 3220.44 kB = 3.14 MB Load Address: 00008000 Entry Point: 00008000

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[U-Boot] [PATCH v2 0/5] arm: tegra: apalis-tk1, mmc and ext clock loopback
by Marcel Ziswiler 20 Dec '16

20 Dec '16

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> This series adds support for the Toradex Apalis TK1 as well as moves the CONFIG_TEGRA_MMC to Kconfig and introduces a new option to disable the external clock loopback on SDMMC3. The whole series is also available here: http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next Changes in v2: - Added Simon's reviewed-by. - Added TODO(email) as suggested by Simon so it is clear this is temporary and will be moved to device tree controlled approach once proper kernel integration made it mainline. Marcel Ziswiler (5): arm: tegra: initial support for apalis tk1 mmc: tegra: introduce CONFIG_TEGRA_MMC to Kconfig mmc: tegra: move CONFIG_TEGRA_MMC from headers to defconfigs mmc: tegra: allow disabling external clock loopback apalis-tk1: disable external clock loopback on SDMMC3 arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra124-apalis.dts | 2203 ++++++++++++++++++++ arch/arm/include/asm/arch-tegra/tegra_mmc.h | 2 + arch/arm/mach-tegra/tegra124/Kconfig | 7 + board/toradex/apalis-tk1/Kconfig | 30 + board/toradex/apalis-tk1/MAINTAINERS | 7 + board/toradex/apalis-tk1/Makefile | 5 + board/toradex/apalis-tk1/apalis-tk1.c | 175 ++ board/toradex/apalis-tk1/as3722_init.c | 117 ++ board/toradex/apalis-tk1/as3722_init.h | 41 + .../toradex/apalis-tk1/pinmux-config-apalis-tk1.h | 287 +++ configs/apalis-tk1_defconfig | 55 + configs/apalis_t30_defconfig | 1 + configs/beaver_defconfig | 1 + configs/cardhu_defconfig | 1 + configs/cei-tk1-som_defconfig | 1 + configs/colibri_t20_defconfig | 1 + configs/colibri_t30_defconfig | 1 + configs/dalmore_defconfig | 1 + configs/harmony_defconfig | 1 + configs/jetson-tk1_defconfig | 1 + configs/medcom-wide_defconfig | 1 + configs/nyan-big_defconfig | 1 + configs/paz00_defconfig | 1 + configs/plutux_defconfig | 1 + configs/seaboard_defconfig | 1 + configs/tec-ng_defconfig | 1 + configs/tec_defconfig | 1 + configs/trimslice_defconfig | 1 + configs/venice2_defconfig | 1 + configs/ventana_defconfig | 1 + configs/whistler_defconfig | 1 + drivers/mmc/Kconfig | 17 + drivers/mmc/tegra_mmc.c | 16 + include/configs/apalis-tk1.h | 180 ++ include/configs/apalis_t30.h | 1 - include/configs/beaver.h | 1 - include/configs/cardhu.h | 1 - include/configs/cei-tk1-som.h | 1 - include/configs/colibri_t20.h | 1 - include/configs/colibri_t30.h | 1 - include/configs/dalmore.h | 1 - include/configs/e2220-1170.h | 1 - include/configs/harmony.h | 1 - include/configs/jetson-tk1.h | 1 - include/configs/medcom-wide.h | 1 - include/configs/nyan-big.h | 1 - include/configs/p2371-0000.h | 1 - include/configs/p2371-2180.h | 1 - include/configs/p2571.h | 1 - include/configs/p2771-0000.h | 1 - include/configs/paz00.h | 1 - include/configs/plutux.h | 1 - include/configs/seaboard.h | 1 - include/configs/tec-ng.h | 1 - include/configs/tec.h | 1 - include/configs/trimslice.h | 1 - include/configs/venice2.h | 1 - include/configs/ventana.h | 1 - include/configs/whistler.h | 1 - scripts/config_whitelist.txt | 1 - 61 files changed, 3163 insertions(+), 26 deletions(-) create mode 100644 arch/arm/dts/tegra124-apalis.dts create mode 100644 board/toradex/apalis-tk1/Kconfig create mode 100644 board/toradex/apalis-tk1/MAINTAINERS create mode 100644 board/toradex/apalis-tk1/Makefile create mode 100644 board/toradex/apalis-tk1/apalis-tk1.c create mode 100644 board/toradex/apalis-tk1/as3722_init.c create mode 100644 board/toradex/apalis-tk1/as3722_init.h create mode 100644 board/toradex/apalis-tk1/pinmux-config-apalis-tk1.h create mode 100644 configs/apalis-tk1_defconfig create mode 100644 include/configs/apalis-tk1.h -- 2.9.3

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[U-Boot] [PATCH 1/2] sunxi: add proper device tree for Orange Pi Zero boards
by Icenowy Zheng 20 Dec '16

20 Dec '16

Add a proper device tree file for Orange Pi Zero boards from Xunlong, which come with a Allwinner H2+ SoC (similar to H3). Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 143 +++++++++++++++++++++++++++ 2 files changed, 144 insertions(+) create mode 100644 arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f43746966c..5553351f7d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -271,6 +271,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-sinovoip-bpi-m3.dtb dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-orangepi-2.dtb \ sun8i-h3-orangepi-lite.dtb \ diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts new file mode 100644 index 0000000000..0989434074 --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts @@ -0,0 +1,143 @@ +/* + * Copyright (C) 2016 Icenowy Zheng <icenowy(a)aosc.xyz> + * + * Based on sun8i-h3-orangepi-one.dts, which is: + * Copyright (C) 2016 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "Xunlong Orange Pi Zero"; + compatible = "xunlong,orangepi-zero", "allwinner,sun8i-h2-plus"; + + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ + ethernet1 = &xr819; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + pwr_led { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + status_led { + label = "orangepi:red:status"; + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_vcc_wifi: reg_vcc_wifi { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; + enable-active-high; + gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + cd-inverted; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <&reg_vcc_wifi>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + /* + * Explicitly define the sdio device, so that we can add an ethernet + * alias for it (which e.g. makes u-boot set a mac-address). + */ + xr819: sdio_wifi@1 { + reg = <1>; + }; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + /* USB VBUS is always on */ + status = "okay"; +}; -- 2.11.0

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