January 2016 - U-Boot

[U-Boot] [PATCH 00/11] imx: introduce rdc and boot auxiliary core
by Peng Fan 18 Jan '16

18 Jan '16

From: Peng Fan <peng.fan(a)nxp.com> To i.MX6SX and i.MX7D, there is a M4 core embedded. Resources can be shared or occupied exclusively by setting Resource domain controller between A9/7 core and M4 core. Refer "Chapter 52 Resource Domain Controller (RDC)" of i.MX 6SoloX RM and "Chapter 3.2 Resource Domain Controller (RDC)" of i.MX 7Dual RM for detailed infomation. To bootup M4 core, a new command 'bootaux' is introduced. To i.MX7D, we need to setting RDC when booting M4 core, so make RDC and boot auxiliary core patches into one patch set. Peng Fan (11): imx: mx6: introduce rdc regs imx: imx-common: introduce Resource Domain Controller support imx: mx6sx Add RDC mappings of masters and peripherals imx: mx7d: Add RDC support imx: mx7d: clock support for RDC imx: imx-common: introduce boot auxiliary core imx: mx6: implement functions to boot auxiliary core imx: mx6sxsabresd: add command and macros for boot m4 core imx: mx7: implement functions to boot auxiliary core imx: mx7dsabresd: add command and macros for boot m4 core imx: mx7d: isolate resources to domain 0 for A7 core arch/arm/cpu/armv7/mx6/soc.c | 38 ++++++ arch/arm/cpu/armv7/mx7/clock.c | 6 + arch/arm/cpu/armv7/mx7/soc.c | 100 ++++++++++++++++ arch/arm/imx-common/Kconfig | 14 +++ arch/arm/imx-common/Makefile | 2 + arch/arm/imx-common/imx_bootaux.c | 59 +++++++++ arch/arm/imx-common/rdc-sema.c | 184 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/imx-rdc.h | 16 +++ arch/arm/include/asm/arch-mx6/imx-regs.h | 29 +++++ arch/arm/include/asm/arch-mx6/mx6sx_rdc.h | 155 ++++++++++++++++++++++++ arch/arm/include/asm/arch-mx7/imx-rdc.h | 16 +++ arch/arm/include/asm/arch-mx7/imx-regs.h | 8 ++ arch/arm/include/asm/arch-mx7/mx7d_rdc.h | 163 +++++++++++++++++++++++++ arch/arm/include/asm/imx-common/rdc-sema.h | 117 ++++++++++++++++++ configs/mx7dsabresd_defconfig | 2 + include/configs/mx6sxsabresd.h | 24 ++++ include/configs/mx7dsabresd.h | 24 ++++ 17 files changed, 957 insertions(+) create mode 100644 arch/arm/imx-common/imx_bootaux.c create mode 100644 arch/arm/imx-common/rdc-sema.c create mode 100644 arch/arm/include/asm/arch-mx6/imx-rdc.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6sx_rdc.h create mode 100644 arch/arm/include/asm/arch-mx7/imx-rdc.h create mode 100644 arch/arm/include/asm/arch-mx7/mx7d_rdc.h create mode 100644 arch/arm/include/asm/imx-common/rdc-sema.h -- 2.6.2

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[U-Boot] [PATCH v2 00/19] driver model bring-up of omap timer on dra72, dra74, am335x and am437x-sk evm
by Mugunthan V N 18 Jan '16

18 Jan '16

This patch series enables omap timer to adopt driver model. This has been tested on the following evms (logs [1]) by invoking 'sleep 10' command with minicom timestamps. * dra72 evm * dra74 evm * am335x evm * am335x bbb * am437x-sk evm * am437x-gp evm Also pushed a branch for testing [2] [1] - http://pastebin.ubuntu.com/14190309/ [2] - git://git.ti.com/~mugunthanvnm/ti-u-boot/mugunth-ti-u-boot.git dm-timer-v2 Changes from initial->v2: * Moved get timer either from choosen/first available timer from dm_timer_init to timer_init. * Fixed typo errors in doc and comments * Changed omap_timer_get_count dedfinition as per latest code base. Mugunthan V N (19): arm: omap-common: do not build timer when CONFIG_TIMER defined dm: timer: uclass: add timer init to add timer device dm: timer: uclass: Add flag to control sequence numbering drivers: timer: omap_timer: add timer driver for omap devices based on dm am43xx_evm: timer: do not define CONFIG_TIMER for spl arm: dts: am437x-sk-evm: add tick-timer to chosen node defconfig: am437x_sk_evm: enable timer driver model arm: dts: am437x-gp-evm: add tick-timer to chosen node defconfig: am437x_gp_evm: enable timer driver model am335x_evm: timer: do not define CONFIG_TIMER for spl arm: dts: am335x-boneblack: add tick-timer to chosen node defconfig: am335x_boneblack_vboot: enable timer driver model arm: dts: am335x-evm: add tick-timer to chosen node defconfig: am335x_gp_evm: enable timer driver model ti_omap5_common: timer: do not define CONFIG_TIMER for spl arm: dts: dra72-evm: add tick-timer to chosen node defconfig: dra72_evm: enable timer driver model arm: dts: dra7-evm: add tick-timer to chosen node defconfig: dra74_evm: enable timer driver model arch/arm/cpu/armv7/omap-common/Makefile | 6 ++ arch/arm/dts/am335x-boneblack.dts | 1 + arch/arm/dts/am335x-evm.dts | 1 + arch/arm/dts/am437x-gp-evm.dts | 1 + arch/arm/dts/am437x-sk-evm.dts | 1 + arch/arm/dts/dra7-evm.dts | 1 + arch/arm/dts/dra72-evm.dts | 1 + configs/am335x_boneblack_vboot_defconfig | 2 + configs/am335x_gp_evm_defconfig | 2 + configs/am437x_gp_evm_defconfig | 2 + configs/am437x_sk_evm_defconfig | 2 + configs/dra72_evm_defconfig | 2 + configs/dra74_evm_defconfig | 2 + doc/device-tree-bindings/chosen.txt | 43 ++++++++++++ drivers/timer/Kconfig | 6 ++ drivers/timer/Makefile | 1 + drivers/timer/omap-timer.c | 108 +++++++++++++++++++++++++++++++ drivers/timer/timer-uclass.c | 43 ++++++++++++ include/configs/am335x_evm.h | 1 + include/configs/am43xx_evm.h | 1 + include/configs/ti_omap5_common.h | 1 + lib/time.c | 13 +--- 22 files changed, 230 insertions(+), 11 deletions(-) create mode 100644 doc/device-tree-bindings/chosen.txt create mode 100644 drivers/timer/omap-timer.c -- 2.7.0.rc1.5.gf3adf45

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[U-Boot] [PATCH v7 4/7] mips: ath79: add serial driver for ar933x SOC
by Wills Wang 18 Jan '16

18 Jan '16

Reviewed-by: Thomas Chou <thomas(a)wytron.com.tw> Signed-off-by: Wills Wang <wills.wang(a)live.com> --- Changes in v7: - remove map_physmem for debug port Changes in v6: - Remove wait loop in putc and getc - Use map_physmem instead of KSEG1ADDR Changes in v5: - remove ar933x_serial_platdata - Import document "qca,ar9330-uart.txt" from kernel - Add support for debug UART Changes in v4: - Auto calculate baudrate for serial driver - Move pinctrl code in serial driver into arch/mips/mach-ath79 - Use get_serial_clock to serial clock source Changes in v3: - Convert serial driver to driver model Changes in v2: - Move serial driver code into drivers/serial .../serial/qca,ar9330-uart.txt | 24 ++ drivers/serial/Kconfig | 17 ++ drivers/serial/Makefile | 1 + drivers/serial/serial_ar933x.c | 254 +++++++++++++++++++++ 4 files changed, 296 insertions(+) create mode 100644 doc/device-tree-bindings/serial/qca,ar9330-uart.txt create mode 100644 drivers/serial/serial_ar933x.c diff --git a/doc/device-tree-bindings/serial/qca,ar9330-uart.txt b/doc/device-tree-bindings/serial/qca,ar9330-uart.txt new file mode 100644 index 0000000..ec576a1 --- /dev/null +++ b/doc/device-tree-bindings/serial/qca,ar9330-uart.txt @@ -0,0 +1,24 @@ +* Qualcomm Atheros AR9330 High-Speed UART + +Required properties: + +- compatible: Must be "qca,ar9330-uart" + +- reg: Specifies the physical base address of the controller and + the length of the memory mapped region. + +Additional requirements: + + Each UART port must have an alias correctly numbered in "aliases" + node. + +Example: + + aliases { + serial0 = &uart0; + }; + + uart0: uart@18020000 { + compatible = "qca,ar9330-uart"; + reg = <0x18020000 0x14>; + }; diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 1fc287e..f147379 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -69,6 +69,14 @@ config DEBUG_UART_ALTERA_UART You will need to provide parameters to make this work. The driver will be available until the real driver model serial is running. +config DEBUG_UART_AR933X + bool "QCA/Atheros ar933x" + help + Select this to enable a debug UART using the ar933x uart driver. + You will need to provide parameters to make this work. The + driver will be available until the real driver model serial is + running. + config DEBUG_UART_NS16550 bool "ns16550" help @@ -186,6 +194,15 @@ config ALTERA_UART Select this to enable an UART for Altera devices. Please find details on the "Embedded Peripherals IP User Guide" of Altera. +config AR933X_UART + bool "QCA/Atheros ar933x UART support" + depends on DM_SERIAL + help + Select this to enable UART support for QCA/Atheros ar933x + devices. This driver uses driver model and requires a device + tree binding to operate, please refer to the document at + doc/device-tree-bindings/serial/qca,ar9330-uart.txt. + config SYS_NS16550 bool "NS16550 UART or compatible" help diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index dd87147..b7b82ae 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -17,6 +17,7 @@ endif obj-$(CONFIG_ALTERA_UART) += altera_uart.o obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o +obj-$(CONFIG_AR933X_UART) += serial_ar933x.o obj-$(CONFIG_ARM_DCC) += arm_dcc.o obj-$(CONFIG_ATMEL_USART) += atmel_usart.o obj-$(CONFIG_EFI_APP) += serial_efi.o diff --git a/drivers/serial/serial_ar933x.c b/drivers/serial/serial_ar933x.c new file mode 100644 index 0000000..ccba2f5 --- /dev/null +++ b/drivers/serial/serial_ar933x.c @@ -0,0 +1,254 @@ +/* + * Copyright (C) 2015-2016 Wills Wang <wills.wang(a)live.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <div64.h> +#include <errno.h> +#include <serial.h> +#include <asm/io.h> +#include <asm/addrspace.h> +#include <asm/types.h> +#include <mach/ar71xx_regs.h> + +#define AR933X_UART_DATA_REG 0x00 +#define AR933X_UART_CS_REG 0x04 +#define AR933X_UART_CLK_REG 0x08 + +#define AR933X_UART_DATA_TX_RX_MASK 0xff +#define AR933X_UART_DATA_RX_CSR BIT(8) +#define AR933X_UART_DATA_TX_CSR BIT(9) +#define AR933X_UART_CS_IF_MODE_S 2 +#define AR933X_UART_CS_IF_MODE_M 0x3 +#define AR933X_UART_CS_IF_MODE_DTE 1 +#define AR933X_UART_CS_IF_MODE_DCE 2 +#define AR933X_UART_CS_TX_RDY_ORIDE BIT(7) +#define AR933X_UART_CS_RX_RDY_ORIDE BIT(8) +#define AR933X_UART_CLK_STEP_M 0xffff +#define AR933X_UART_CLK_SCALE_M 0xfff +#define AR933X_UART_CLK_SCALE_S 16 +#define AR933X_UART_CLK_STEP_S 0 + +struct ar933x_serial_priv { + void __iomem *regs; +}; + +static inline u32 ar933x_serial_read(struct udevice *dev, u32 offset) +{ + struct ar933x_serial_priv *priv = dev_get_priv(dev); + + return readl(priv->regs + offset); +} + +static inline void ar933x_serial_write(struct udevice *dev, + u32 val, u32 offset) +{ + struct ar933x_serial_priv *priv = dev_get_priv(dev); + + writel(val, priv->regs + offset); +} + +/* + * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) + */ +static u32 ar933x_serial_get_baud(u32 clk, u32 scale, u32 step) +{ + u64 t; + u32 div; + + div = (2 << 16) * (scale + 1); + t = clk; + t *= step; + t += (div / 2); + do_div(t, div); + + return t; +} + +static void ar933x_serial_get_scale_step(u32 clk, u32 baud, + u32 *scale, u32 *step) +{ + u32 tscale, baudrate; + long min_diff; + + *scale = 0; + *step = 0; + + min_diff = baud; + for (tscale = 0; tscale < AR933X_UART_CLK_SCALE_M; tscale++) { + u64 tstep; + int diff; + + tstep = baud * (tscale + 1); + tstep *= (2 << 16); + do_div(tstep, clk); + + if (tstep > AR933X_UART_CLK_STEP_M) + break; + + baudrate = ar933x_serial_get_baud(clk, tscale, tstep); + diff = abs(baudrate - baud); + if (diff < min_diff) { + min_diff = diff; + *scale = tscale; + *step = tstep; + } + } +} + +static int ar933x_serial_setbrg(struct udevice *dev, int baudrate) +{ + u32 val, scale, step; + + val = get_serial_clock(); + ar933x_serial_get_scale_step(val, baudrate, &scale, &step); + + val = (scale & AR933X_UART_CLK_SCALE_M) + << AR933X_UART_CLK_SCALE_S; + val |= (step & AR933X_UART_CLK_STEP_M) + << AR933X_UART_CLK_STEP_S; + ar933x_serial_write(dev, val, AR933X_UART_CLK_REG); + + return 0; +} + +static int ar933x_serial_putc(struct udevice *dev, const char c) +{ + u32 data; + + data = ar933x_serial_read(dev, AR933X_UART_DATA_REG); + if (!(data & AR933X_UART_DATA_TX_CSR)) + return -EAGAIN; + + data = (u32)c | AR933X_UART_DATA_TX_CSR; + ar933x_serial_write(dev, data, AR933X_UART_DATA_REG); + + return 0; +} + +static int ar933x_serial_getc(struct udevice *dev) +{ + u32 data; + + data = ar933x_serial_read(dev, AR933X_UART_DATA_REG); + if (!(data & AR933X_UART_DATA_RX_CSR)) + return -EAGAIN; + + ar933x_serial_write(dev, AR933X_UART_DATA_RX_CSR, + AR933X_UART_DATA_REG); + return data & AR933X_UART_DATA_TX_RX_MASK; +} + +static int ar933x_serial_pending(struct udevice *dev, bool input) +{ + u32 data; + + data = ar933x_serial_read(dev, AR933X_UART_DATA_REG); + if (input) + return (data & AR933X_UART_DATA_RX_CSR) ? 1 : 0; + else + return (data & AR933X_UART_DATA_TX_CSR) ? 0 : 1; +} + +static int ar933x_serial_probe(struct udevice *dev) +{ + struct ar933x_serial_priv *priv = dev_get_priv(dev); + u32 val; + fdt_addr_t addr; + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->regs = map_physmem(addr, + AR933X_UART_SIZE, + MAP_NOCACHE); + + /* + * UART controller configuration: + * - no DMA + * - no interrupt + * - DCE mode + * - no flow control + * - set RX ready oride + * - set TX ready oride + */ + val = (AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S) | + AR933X_UART_CS_TX_RDY_ORIDE | AR933X_UART_CS_RX_RDY_ORIDE; + ar933x_serial_write(dev, val, AR933X_UART_CS_REG); + return 0; +} + +static const struct dm_serial_ops ar933x_serial_ops = { + .putc = ar933x_serial_putc, + .pending = ar933x_serial_pending, + .getc = ar933x_serial_getc, + .setbrg = ar933x_serial_setbrg, +}; + +static const struct udevice_id ar933x_serial_ids[] = { + { .compatible = "qca,ar9330-uart" }, + { } +}; + +U_BOOT_DRIVER(serial_ar933x) = { + .name = "serial_ar933x", + .id = UCLASS_SERIAL, + .of_match = ar933x_serial_ids, + .priv_auto_alloc_size = sizeof(struct ar933x_serial_priv), + .probe = ar933x_serial_probe, + .ops = &ar933x_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +#ifdef CONFIG_DEBUG_UART_AR933X + +#include <debug_uart.h> + +static inline void _debug_uart_init(void) +{ + void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE; + u32 val, scale, step; + + /* + * UART controller configuration: + * - no DMA + * - no interrupt + * - DCE mode + * - no flow control + * - set RX ready oride + * - set TX ready oride + */ + val = (AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S) | + AR933X_UART_CS_TX_RDY_ORIDE | AR933X_UART_CS_RX_RDY_ORIDE; + writel(val, regs + AR933X_UART_CS_REG); + + ar933x_serial_get_scale_step(CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE, &scale, &step); + + val = (scale & AR933X_UART_CLK_SCALE_M) + << AR933X_UART_CLK_SCALE_S; + val |= (step & AR933X_UART_CLK_STEP_M) + << AR933X_UART_CLK_STEP_S; + writel(val, regs + AR933X_UART_CLK_REG); +} + +static inline void _debug_uart_putc(int c) +{ + void __iomem *regs = (void *)CONFIG_DEBUG_UART_BASE; + u32 data; + + do { + data = readl(regs + AR933X_UART_DATA_REG); + } while (!(data & AR933X_UART_DATA_TX_CSR)); + + data = (u32)c | AR933X_UART_DATA_TX_CSR; + writel(data, regs + AR933X_UART_DATA_REG); +} + +DEBUG_UART_FUNCS + +#endif -- 1.9.1

3 2

[U-Boot] [PATCH v2 0/6] clk: some fixes, device tree support, new features
by Masahiro Yamada 18 Jan '16

18 Jan '16

Masahiro Yamada (6): clk: fix comments in include/clk.h clk: add needed include and declaration to include/clk.h clk: add static qualifier to local functions clk: change the type of return value to long clk: add API to enable clock clk: add device tree support for clock framework drivers/clk/clk-uclass.c | 51 ++++++++++++++++++++++++--- drivers/clk/clk_rk3036.c | 6 ++-- drivers/clk/clk_rk3288.c | 6 ++-- drivers/clk/clk_sandbox.c | 8 ++--- include/clk.h | 87 +++++++++++++++++++++++++++++++++++++---------- 5 files changed, 126 insertions(+), 32 deletions(-) -- 1.9.1

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[U-Boot] [PATCH v2] patman: Add --thread option
by Mateusz Kulikowski 18 Jan '16

18 Jan '16

Add option to create threaded series of patches. With it, it will be possible to create patch threads like this: [PATCH 0/10] Add support for time travel [PATCH 1/10] Add Flux Capacitor driver [PATCH 2/10] Add Mr. Fusion driver (...) Internally it will call git send-email with --thread option Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski(a)gmail.com> --- Changes in v2: - Added '-T' option tools/patman/gitutil.py | 6 +++++- tools/patman/patman.py | 4 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index 9e739d8..5f1b4f6 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -328,7 +328,7 @@ def BuildEmailList(in_list, tag=None, alias=None, raise_on_error=True): return result def EmailPatches(series, cover_fname, args, dry_run, raise_on_error, cc_fname, - self_only=False, alias=None, in_reply_to=None): + self_only=False, alias=None, in_reply_to=None, thread=False): """Email a patch series. Args: @@ -342,6 +342,8 @@ def EmailPatches(series, cover_fname, args, dry_run, raise_on_error, cc_fname, self_only: True to just email to yourself as a test in_reply_to: If set we'll pass this to git as --in-reply-to. Should be a message ID that this is in reply to. + thread: True to add --thread to git send-email (make + all patches reply to cover-letter or first patch in series) Returns: Git command that was/would be run @@ -400,6 +402,8 @@ def EmailPatches(series, cover_fname, args, dry_run, raise_on_error, cc_fname, cmd = ['git', 'send-email', '--annotate'] if in_reply_to: cmd.append('--in-reply-to="%s"' % in_reply_to) + if thread: + cmd.append('--thread') cmd += to cmd += cc diff --git a/tools/patman/patman.py b/tools/patman/patman.py index 6fe8fe0..d05c5ff 100755 --- a/tools/patman/patman.py +++ b/tools/patman/patman.py @@ -61,6 +61,8 @@ parser.add_option('--no-check', action='store_false', dest='check_patch', help="Don't check for patch compliance") parser.add_option('--no-tags', action='store_false', dest='process_tags', default=True, help="Don't process subject tags as aliaes") +parser.add_option('-T', '--thread', action='store_true', dest='thread', + default=False, help='Create patches as a single thread') parser.usage += """ @@ -161,7 +163,7 @@ else: if its_a_go: cmd = gitutil.EmailPatches(series, cover_fname, args, options.dry_run, not options.ignore_bad_tags, cc_file, - in_reply_to=options.in_reply_to) + in_reply_to=options.in_reply_to, thread=options.thread) else: print col.Color(col.RED, "Not sending emails due to errors/warnings") -- 2.5.0

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[U-Boot] [PATCH] ARM: Disable "DISCARD" for secure section if CONFIG_ARMV7_SECURE_BASE isn't defined
by Dongsheng Wang 18 Jan '16

18 Jan '16

From: Wang Dongsheng <dongsheng.wang(a)nxp.com> Fix PSCI hang up without CONFIG_ARMV7_SECURE_BASE define. "DISCARD" will remove ._secure.text relocate, but PSCI framework has already used some absolute address those need to relocate. Use readelf -t -r u-boot show us: .__secure_start addr: 601408e4 .__secure_end addr: 60141460 60141140 00000017 R_ARM_RELATIVE 46 _secure_monitor: 47 #ifdef CONFIG_ARMV7_PSCI 48 ldr r5, =_psci_vectors 60141194 00000017 R_ARM_RELATIVE 6014119c 00000017 R_ARM_RELATIVE 601411a4 00000017 R_ARM_RELATIVE 601411ac 00000017 R_ARM_RELATIVE 64 _psci_table: 66 .word psci_cpu_suspend ... 72 .word psci_migrate 60141344 00000017 R_ARM_RELATIVE 6014145c 00000017 R_ARM_RELATIVE 202 ldr r5, =psci_text_end Solutions: 1. Change absolute address to RelAdr. Based on LDR (immediate, ARM), we only have 4K offset to jump. Now PSCI code size is close to 4K size that is LDR limit jump size, so even if the LDR is based on the current instruction address, there is also have a risk for RelAdr. If we use two jump steps I think we can fix this issue, but looks too hack, so give up this way. 2. Enable "DISCARD" only for CONFIG_ARMV7_SECURE_BASE has defined. If CONFIG_ARMV7_SECURE_BASE is defined in platform, all of secure will in the BASE address that is absolute. psci_update_dt will relocate the PSCI code into link stage address(CONFIG_ARMV7_SECURE_BASE address), so using this method. Signed-off-by: Wang Dongsheng <dongsheng.wang(a)nxp.com> Reviewed-by: Peng Fan <Peng.Fan(a)nxp.com> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Tom Warren <twarren(a)nvidia.com> Cc: York Sun <yorksun(a)freescale.com> Cc: Hans De Goede <hdegoede(a)redhat.com> Cc: Ian Campbell <ijc(a)hellion.org.uk> Cc: Tom Rini <trini(a)konsulko.com> Cc: Jan Kiszka <jan.kiszka(a)siemens.com> Cc: Stefano Babic <sbabic(a)denx.de> diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index d48a905..413d459 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -14,6 +14,7 @@ OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { +#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC) /* * Discard the relocation entries for secure text. * The secure code is bundled with u-boot image, so there will @@ -31,6 +32,7 @@ SECTIONS * avoid hole in the final image. */ /DISCARD/ : { *(.rel._secure*) } +#endif . = 0x00000000; . = ALIGN(4); -- 2.1.0.27.g96db324

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[U-Boot] [PATCH 00/18] dm: video: Introduce initial driver-model video support
by Simon Glass 18 Jan '16

18 Jan '16

This series starts the process of converting LCD and video devices over to use driver model. Both now use a very similar API thanks to earlier work by Nikita Kiryanov. With the driver-model conversion these will end up unified in a single uclass. Unfortunately there are different features supported by each. This implementation provides for a common set of features which should serve most purposes. The intent is to support: - bitmap devices with 8, 16 and 32 bits per pixel - text console wih white on black or vice versa - rotated text console - bitmap display (BMP format) More can be added as additional boards are ported over to use driver model for video. The name 'video' is chosen for the uclass since it is more generic than LCD. Another option would be 'display' but that would introduce a third concept to U-Boot which seems like the wrong approach. The existing LCD and video init functions are not needed now, so this uclass does not implement them. This includes lcd_ctrl_init(), lcd_enable() and video_init(). Tests are provided to check that console text and bitmap output is correct. These should be able to be extended as more features are added. Future work will convert a few boards over to use driver model for video. Likely targets are x86, exynos, tegra. Also, Rockchip LCD support will be added using driver model (patches will likely be sent some time in January). Simon Glass (18): tiny-printf: Always print zeroes sandbox: Support the bmp command dm: core: Call uclass post_bind() after the driver's bind() method bzip2: Support compression for sandbox dm: video: Add a video uclass dm: lcd: Avoid using the lcd.h header file with driver model dm: video: Add a uclass for the text console dm: video: Add a 'normal' text console driver dm: video: Add a driver for a rotated text console common: Move LCD and video memory reservation together dm: common: Add memory reservation for the video uclass dm: video: Implement the bmp command for driver model dm: stdio: video: Plumb the video uclass into stdio sandbox: Move CONFIG_VIDEO_SANDBOX_SDL to Kconfig dm: video: sandbox: Convert sandbox to use driver model for video dm: video: test: Add tests for the video uclass dm: video: test: Add tests for rotated consoles dm: video: test: Test that bitmap display works correctly arch/sandbox/dts/sandbox.dts | 1 + arch/sandbox/dts/test.dts | 7 + board/sandbox/sandbox.c | 17 - common/Makefile | 2 + common/board_f.c | 71 ++- common/cmd_bmp.c | 37 +- common/lcd.c | 11 - common/stdio.c | 19 +- configs/sandbox_defconfig | 5 +- drivers/core/device.c | 7 + drivers/core/uclass.c | 5 - drivers/serial/sandbox.c | 5 +- drivers/video/Kconfig | 62 ++ drivers/video/Makefile | 3 + drivers/video/console_normal.c | 141 +++++ drivers/video/console_rotate.c | 435 ++++++++++++++ drivers/video/sandbox_sdl.c | 90 ++- drivers/video/vidconsole-uclass.c | 239 ++++++++ drivers/video/video-uclass.c | 249 ++++++++ drivers/video/video_bmp.c | 353 ++++++++++++ include/asm-generic/global_data.h | 4 + include/bzlib.h | 3 + include/configs/sandbox.h | 13 +- include/dm/test.h | 8 + include/dm/uclass-id.h | 2 + include/fdtdec.h | 1 - include/lcd.h | 12 +- include/video.h | 169 +++++- include/video_console.h | 136 +++++ lib/bzip2/Makefile | 1 + lib/bzip2/bzlib_blocksort.c | 1134 +++++++++++++++++++++++++++++++++++++ lib/bzip2/bzlib_compress.c | 714 +++++++++++++++++++++++ lib/fdtdec.c | 1 - lib/tiny-printf.c | 16 +- test/dm/Makefile | 1 + test/dm/video.c | 271 +++++++++ tools/logos/denx-comp.bmp | Bin 0 -> 4148 bytes 37 files changed, 4101 insertions(+), 144 deletions(-) create mode 100644 drivers/video/console_normal.c create mode 100644 drivers/video/console_rotate.c create mode 100644 drivers/video/vidconsole-uclass.c create mode 100644 drivers/video/video-uclass.c create mode 100644 drivers/video/video_bmp.c create mode 100644 include/video_console.h create mode 100644 lib/bzip2/bzlib_blocksort.c create mode 100644 lib/bzip2/bzlib_compress.c create mode 100644 test/dm/video.c create mode 100644 tools/logos/denx-comp.bmp -- 2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH 0/6] dm: x86: Remove pirq_init() and cpu_irq_init()
by Simon Glass 17 Jan '16

17 Jan '16

This series adds an interrupt driver for x86. Since different platforms can implement this in their own way, we no-longer need the platform-specific weak function. We can also dispense with the arch_misc_init() call in some cases. Simon Glass (6): dm: x86: Create a driver for x86 interrupts dm: x86: Set up interrupt routing from interrupt_init() dm: x86: Add a common PIRQ init function dm: x86: quark: Add an interrupt driver dm: x86: queensbay: Add an interrupt driver dm: x86: Drop the weak cpu_irq_init() function arch/x86/cpu/baytrail/valleyview.c | 2 +- arch/x86/cpu/interrupts.c | 9 ++++++ arch/x86/cpu/irq.c | 32 ++++++++++++++----- arch/x86/cpu/qemu/qemu.c | 5 --- arch/x86/cpu/quark/Makefile | 2 +- arch/x86/cpu/quark/irq.c | 49 ++++++++++++++++++++++++++++ arch/x86/cpu/quark/quark.c | 27 +--------------- arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/irq.c | 65 ++++++++++++++++++++++++++++++++++++++ arch/x86/cpu/queensbay/tnc.c | 39 +---------------------- arch/x86/dts/crownbay.dts | 2 +- arch/x86/dts/galileo.dts | 2 +- arch/x86/include/asm/irq.h | 19 ++--------- include/configs/qemu-x86.h | 1 - include/dm/uclass-id.h | 1 + 15 files changed, 158 insertions(+), 99 deletions(-) create mode 100644 arch/x86/cpu/quark/irq.c create mode 100644 arch/x86/cpu/queensbay/irq.c -- 2.6.0.rc2.230.g3dd15c0

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[U-Boot] Kconfig bug (optional choice deselected by following option)
by Mateusz Kulikowski 17 Jan '16

17 Jan '16

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Hi all, I have found weird feature of Kconfig. If I misused something, please let me know - I found at least one place where the same error occurs. Let's consider the following Kconfig (you can put it anywhere in the source tree): <-------------- copy -----------------> menu "Testmenu" choice prompt "Problem to solve" optional default n help Solve one of great world problems config SOLVE_HUNGER bool "Hunger" config SOLVE_WARS bool "Wars" config CURE_CANCER bool "Cancer" endchoice config TREES default n bool "Plant trees in garden" endmenu config BLAH default n bool "Totally unrelated option" <------------- paste -------------------> Now, select HUNGER important problem to solve; Warning - select it with space, _not_ enter + selection from list; Then select either TREES or BLAH. Weird thing is - SOLVE_HUNGER is unselected. It doesn't happen when you select (anything) by entering selection menu (i.e. enter). Even if you deselect option and then select it with space. It happens both in menuconfig and nconfig. It happens both in recent U-Boot b57843e6 and Linux kernel ece62678. Unfortunately my knowledge of Kconfig is very limited so your help would be appreciated. Best Regards, Mateusz -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJWm31YAAoJELvtohmVtQzB7dEH/0/9BMe6+Oq38UVSUcjmNzaH GqUdkK9MN9tYD6euHTcynlT0HZRkDTYCOFmQjG68Lj1Ejx0/Si2KYe6NKexvkysB HAshC0+rGkbOgW0fkBByL2HY8PGAxtNbSbcwzC7xnhRMCkiPp2xiMy1pwRSOI7tN dDzXEuuTvGxsGHUm8dSuxGE9Wd96MY71BDzO+vQrP+CiCV7IeKYMfiYhngN6FEBz Sq5YCljVsSIvsZuBIaJlPuU7vnS64x2RnxkPskln9k4M9gv6GQOAcRb+YZ0PKLOs qSdzBTvQsEMBdsJBk2nGgBIXUcFSPbAAQwl1FyepFlgm4d6152Wf9BQxFJBNij4= =zry6 -----END PGP SIGNATURE-----

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[U-Boot] [PATCH v2] Enable snooping on transactions from CAAM block
by Aneesh Bansal 17 Jan '16

17 Jan '16

To enable snooping on CAAM transactions following programmign is done 1. Enable core snooping (CCI interface, Core is Slave5 on CCI) This setting is also required for making the system coherent 2. CAAM IP lies behind SMMU3 in teh system. Configure SMMU3 to do teh following: a) Program SCR to bypass transactions with stream ID other than taht of CAAM b_ Program S2CR to change memroy attributes of transactions with CAAM's stream ID (0x10) to cacheable. Signed-off-by: Ruchika Gupta <ruchika.gupta(a)nxp.com> Signed-off-by: Nitesh Narayan Lal <nitesh.lal(a)nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal(a)nxp.com> --- Changes in v2: Avoid mixing the use of u32 and uint32_t. Using uint32_t at all places. arch/arm/include/asm/arch-ls102xa/config.h | 1 + .../include/asm/arch-ls102xa/ls102xa_stream_id.h | 34 ++++++++++++++++++++ board/freescale/common/ls102xa_stream_id.c | 36 +++++++++++++++++++++- board/freescale/ls1021aqds/ls1021aqds.c | 4 +++ board/freescale/ls1021atwr/ls1021atwr.c | 4 +++ 5 files changed, 78 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index f066480..f14ea2f 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -38,6 +38,7 @@ #define CONFIG_SYS_LS102XA_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CONFIG_SYS_LS102XA_USB1_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) +#define CONFIG_SYS_SMMU3_ADDR (CONFIG_SYS_IMMR + 0x300000) #define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000 diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h index fa571b3..68e4e02 100644 --- a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h +++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h @@ -6,6 +6,39 @@ #ifndef __FSL_LS102XA_STREAM_ID_H_ #define __FSL_LS102XA_STREAM_ID_H_ +#define CONFIG_SMMU_NSCR_OFFSET 0x400 +#define CONFIG_SMMU_SMR_OFFSET 0x800 +#define CONFIG_SMMU_S2CR_OFFSET 0xc00 + +#define SMMU_NSCR_CLIENTPD_SHIFT 0 +#define SMMU_NSCR_MTCFG_SHIFT 20 + +#define SMR_SMR_VALID_SHIFT 31 +#define SMR_ID_MASK 0x7fff +#define SMR_MASK_SHIFT 16 + +#define S2CR_WACFG_SHIFT 22 +#define S2CR_WACFG_MASK 0x3 +#define S2CR_WACFG_WRITE_ALLOCATE 0x2 + +#define S2CR_RACFG_SHIFT 20 +#define S2CR_RACFG_MASK 0x3 +#define S2CR_RACFG_READ_ALLOCATE 0x2 + +#define S2CR_TYPE_SHIFT 16 +#define S2CR_TYPE_MASK 0x3 +#define S2CR_TYPE_BYPASS 0x01 + +#define S2CR_MEM_ATTR_SHIFT 12 +#define S2CR_MEM_ATTR_MASK 0xf +#define S2CR_MEM_ATTR_CACHEABLE 0xa + +#define S2CR_MTCFG 0x00000800 + +#define S2CR_SHCFG_SHIFT 8 +#define S2CR_SHCFG_MASK 0x3 +#define S2CR_SHCFG_OUTER_CACHEABLE 0x1 +#define S2CR_SHCFG_INNER_CACHEABLE 0x2 #include <fsl_sec.h> @@ -71,4 +104,5 @@ struct smmu_stream_id { void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size); void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num); +void ls1021x_config_smmu3(uint32_t liodn); #endif diff --git a/board/freescale/common/ls102xa_stream_id.c b/board/freescale/common/ls102xa_stream_id.c index f434269..9ae29b8 100644 --- a/board/freescale/common/ls102xa_stream_id.c +++ b/board/freescale/common/ls102xa_stream_id.c @@ -20,7 +20,7 @@ void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num) void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size) { int i; - u32 liodn; + uint32_t liodn; for (i = 0; i < size; i++) { if (tbl[i].num_ids == 2) @@ -31,3 +31,37 @@ void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size) out_le32((uint32_t *)(tbl[i].reg_offset), liodn); } } + +void ls1021x_config_smmu3(uint32_t liodn) +{ + uint32_t *addr; + uint32_t smr, s2cr, nscr; + + addr = (uint32_t *)(CONFIG_SYS_SMMU3_ADDR + CONFIG_SMMU_NSCR_OFFSET); + /* SMMU NSCR configuration */ + nscr = in_le32(addr); + + nscr = nscr & ~(1 << SMMU_NSCR_CLIENTPD_SHIFT | + 1 << SMMU_NSCR_MTCFG_SHIFT); + out_le32(addr, nscr); + + /* SMMU SMR configuration */ + addr = (uint32_t *)(CONFIG_SYS_SMMU3_ADDR + CONFIG_SMMU_SMR_OFFSET); + + smr = 0; + smr = smr & (~(SMR_ID_MASK << SMR_MASK_SHIFT)); + smr = smr | (1 << SMR_SMR_VALID_SHIFT) | liodn; + + out_le32(addr, smr); + + /* SMMU S2CR configuration */ + addr = (uint32_t *)(CONFIG_SYS_SMMU3_ADDR + CONFIG_SMMU_S2CR_OFFSET); + s2cr = (S2CR_WACFG_WRITE_ALLOCATE << S2CR_WACFG_SHIFT) | + (S2CR_RACFG_READ_ALLOCATE << S2CR_RACFG_SHIFT) | + (S2CR_TYPE_BYPASS << S2CR_TYPE_SHIFT) | + (S2CR_MEM_ATTR_CACHEABLE << S2CR_MEM_ATTR_SHIFT) | + S2CR_MTCFG | + (S2CR_SHCFG_OUTER_CACHEABLE << S2CR_SHCFG_SHIFT); + + out_le32(addr, s2cr); +} diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index be3358a..ca1ea61 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -481,6 +481,10 @@ int board_init(void) ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id)); + /* Configure SMMU3 to make transactions with CAAM stream ID + * as cacheable + */ + ls1021x_config_smmu3(0x10); #ifdef CONFIG_LAYERSCAPE_NS_ACCESS enable_layerscape_ns_access(); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 8eaff5f..ae62bca 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -528,6 +528,10 @@ int board_init(void) ARRAY_SIZE(sec_liodn_tbl)); ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id)); + /* Configure SMMU3 to make transactions with CAAM stream ID + * as cacheable + */ + ls1021x_config_smmu3(0x10); #ifdef CONFIG_LAYERSCAPE_NS_ACCESS enable_layerscape_ns_access(); -- 1.8.1.4

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