September 2015 - U-Boot

[U-Boot] [PATCH 0/7] ARM: DRA7: DDR3: Enable hw leveling
by Lokesh Vutla 16 Dec '15

16 Dec '15

This series updates the DDR3 init sequence and adds support for hw leveling for all DRA7 platforms. Tested memtest and reboot on DRA7-evm , DRA72-evm, BeagleBoard-x15 boards. Lokesh Vutla (7): ARM: DRA7: DDR3: Add support for HW leveling ARM: BeagleBoard-X15: Enable HW leveling ARM: DRA7-evm: Enable HW leveling ARM: DRA72-evm: Enable HW leveling ARM: DRA7: Add is_dra72x cpu check definition ARM: DRA7: Update DDR IO configuration ARM: DRA7: Update DDR IO registers arch/arm/cpu/armv7/omap-common/emif-common.c | 146 +++++++++++++++++++++++---- arch/arm/cpu/armv7/omap5/hw_data.c | 16 +-- arch/arm/cpu/armv7/omap5/hwinit.c | 12 ++- arch/arm/cpu/armv7/omap5/sdram.c | 115 ++++++++++++++++++--- arch/arm/include/asm/emif.h | 9 ++ arch/arm/include/asm/omap_common.h | 7 ++ board/ti/beagle_x15/board.c | 41 ++++++-- 7 files changed, 288 insertions(+), 58 deletions(-) -- 1.9.1

4 25

[U-Boot] [PATCH 1/2] microblaze: spl: Do not call mem_malloc_init and use early alloc
by Michal Simek 14 Dec '15

14 Dec '15

This patch has some parts connected together: - Use _gd in bss section which is automatically cleared Location at SPL_MALLOC_END wasn't cleared at all - Use MALLOC_F_LEN(early alloc) instead of FULL MALLOC (mem_malloc_init is not called at all) - Simplify malloc and stack init. At the end of SPL addr is malloc area and below is stack Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/microblaze/cpu/start.S | 6 +++++- include/configs/microblaze-generic.h | 32 +++++++++++--------------------- 2 files changed, 16 insertions(+), 22 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index cf9ee7e3e6ad..953d3a15eef2 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -162,7 +162,11 @@ clear_bss: #endif brai board_init_f #else - addi r31, r0, CONFIG_SYS_SPL_MALLOC_END + addi r31, r0, _gd +#if defined(CONFIG_SYS_MALLOC_F_LEN) + addi r6, r0, CONFIG_SPL_STACK_ADDR + swi r6, r31, GD_MALLOC_BASE +#endif brai board_init_r #endif 1: bri 1b diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 770acbea691b..166ab4f05654 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -113,7 +113,12 @@ #endif #define CONFIG_SYS_MALLOC_LEN 0xC0000 -#define CONFIG_SYS_MALLOC_F_LEN 1024 +#ifndef CONFIG_SPL_BUILD +# define CONFIG_SYS_MALLOC_F_LEN 1024 +#else +# define CONFIG_SYS_MALLOC_SIMPLE +# define CONFIG_SYS_MALLOC_F_LEN 0x150 +#endif /* Stack location before relocation */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_TEXT_BASE @@ -426,25 +431,11 @@ /* BRAM start */ #define CONFIG_SYS_INIT_RAM_ADDR 0x0 /* BRAM size - will be generated */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 -/* Stack pointer prior relocation, must situated at on-chip RAM */ -#define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100 - -/* - * The main reason to do it in this way is that MALLOC_START - * can't be defined - common/spl/spl.c - */ -#if (CONFIG_SYS_SPL_MALLOC_SIZE != 0) -# define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \ - CONFIG_SYS_SPL_MALLOC_SIZE) -# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START -#else -# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END -#endif +# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + CONFIG_SYS_MALLOC_F_LEN) /* Just for sure that there is a space for stack */ #define CONFIG_SPL_STACK_SIZE 0x100 @@ -453,8 +444,7 @@ #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ CONFIG_SYS_INIT_RAM_ADDR - \ - GENERATED_GBL_DATA_SIZE - \ - CONFIG_SYS_SPL_MALLOC_SIZE - \ + CONFIG_SYS_MALLOC_F_LEN - \ CONFIG_SPL_STACK_SIZE) #endif /* __CONFIG_H */ -- 1.8.2.3

2 4

[U-Boot] [PATCH v2 0/7] mtd/st_smi: Add fixes for smi driver
by Vipin Kumar 14 Dec '15

14 Dec '15

Modifications in v2 (Review comments incorporation) - Use setbits_le32 and clrbits_le32 whereever applicable in patch-set - Define smi_mtd_init() routine irrespective of CONFIG_MTD_DEVICE Modifications in v1 - Add MTD support for smi driver - Write to flash in a tight loop - Alphabetically sort the list of devices - Avoid issuing multiple write enable commands Armando Visconti (1): mtd/st_smi: Add support for Micron N25Q128 Flash Vipin Kumar (6): mtd/st_smi: Clear error flags while initiating a fresh write mtd/st_smi: Rearrange the supported devices in alphabetical order mtd/st_smi: Avoid issuing multiple WE commands mtd/st_smi: Write to flash in a tight loop mtd/st_smi: Use page sizes respective to flash mtd/st_smi: Add mtd support for smi drivers/mtd/st_smi.c | 260 ++++++++++++++++++++++++++++++++++++++------- include/linux/mtd/st_smi.h | 1 - 2 files changed, 223 insertions(+), 38 deletions(-) -- 1.8.0

3 14

[U-Boot] [PATCH] FSL SPI read fix.
by Dale Smith 14 Dec '15

14 Dec '15

The fsl spi engine is non functional when reading from a device. This patch fixes it. Note that none of the other spi interfaces parse through the datastream looking for 0x0b bytes. -Dale diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c index a1ebd33..737719b 100644 --- a/drivers/spi/fsl_espi.c +++ b/drivers/spi/fsl_espi.c @@ -291,17 +291,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, debug("***spi_xfer:...%08x readed\n", tmpdin); } } - if (data_in) { - memcpy(data_in, buffer + 2 * cmd_len, tran_len); - if (*buffer == 0x0b) { - data_in += tran_len; - data_len -= tran_len; - *(int *)buffer += tran_len; - } - } spi_cs_deactivate(slave); } - + if (data_in) + memcpy(data_in, buffer + rx_offset, len); free(buffer); return 0; }

6 8

Re: [U-Boot] [linux-sunxi] Mainline U-Boot, EHCI, usbkbd not working (workaround)
by B.R. Oake 13 Dec '15

13 Dec '15

(This started on the linux-sunxi mailing list but will hopefully be of interest on the U-Boot list) On 04/01/15 13:45, Lars Doelle wrote: > while testing with mainline u-boot, I came over the > problem, that the USB keyboard is not recognized. > > The device is an A20-OLinuXIno-LIME2. I used the > current A20-OLinuXino-Lime2_defconfig for building. > > In my understanding, the issue should be reproducible > with all devices having an EHCI root hub. > > --- > sun7i# usb reset > (Re)start USB... > USB0: USB EHCI 1.00 > scanning bus 0 for devices... cannot reset port 1!? > 1 USB Device(s) found > USB1: USB EHCI 1.00 > scanning bus 1 for devices... 1 USB Device(s) found > scanning usb for storage devices... 0 Storage Device(s) found > sun7i# usb tree > USB device tree: > 1 Hub (480 Mb/s, 0mA) > u-boot EHCI Host Controller > > 2 Hub (480 Mb/s, 0mA) > u-boot EHCI Host Controller > --- > > As a workaround, i plugged an USB hub in between: > [...] I also have this problem. I've tried three different USB keyboards on an A20-Olinuxino-Micro and a Banana Pi, and I always get that error "cannot reset port N!?" where N is whichever USB socket I've plugged it into, and U-Boot cannot see the keyboard. Once Linux has loaded, the keyboard works without any trouble. Can anyone suggest what is causing this? Thank you, B.R. Oake.

5 7

[U-Boot] [PATCH] arm: socfpga: Fix cache configuration
by Stefan Roese 09 Dec '15

09 Dec '15

By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache policy is selected. This leads to much better performance on the SoCFPGA. A quick network test shows this: Without this patch: => tftp 100000 big-40mb Speed: 1000, full duplex Using dwmac.ff702000 device TFTP from server 192.168.1.54; our IP address is 192.168.1.252 Filename 'big-40mb'. Load address: 0x100000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ########################## 2.5 MiB/s With this patch: => tftp 100000 big-40mb Speed: 1000, full duplex Using dwmac.ff702000 device TFTP from server 192.168.1.54; our IP address is 192.168.1.252 Filename 'big-40mb'. Load address: 0x100000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ########################## 7.6 MiB/s A performance improvement of factor ~3. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Chin Liang See <clsee(a)altera.com> Cc: Pavel Machek <pavel(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> --- include/configs/socfpga_common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 38ae763..a2811ba 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -73,7 +73,6 @@ /* * Cache */ -#define CONFIG_SYS_ARM_CACHE_WRITEALLOC #define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS -- 2.5.2

4 27

[U-Boot] [PATCH] dm: core: Enable optional use of fdt_translate_address()
by Stefan Roese 04 Dec '15

04 Dec '15

The current "simple" address translation simple_bus_translate() is not working on some platforms (e.g. MVEBU). As here more complex "ranges" properties are used in many nodes (multiple tuples etc). This patch enables the optional use of the common fdt_translate_address() function which handles this translation correctly. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/core/Kconfig | 30 ++++++++++++++++++++++++++++++ drivers/core/device.c | 8 +++++++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 41f4e69..15681df 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -120,4 +120,34 @@ config SPL_SIMPLE_BUS Supports the 'simple-bus' driver, which is used on some systems in SPL. +config OF_TRANSLATE + bool "Translate addresses using fdt_translate_address" + depends on DM && OF_CONTROL + default y + help + If this option is enabled, the reg property will be translated + using the fdt_translate_address() function. This is necessary + on some platforms (e.g. MVEBU) using complex "ranges" + properties in many nodes. As this translation is not handled + correctly in the default simple_bus_translate() function. + + If this option is not enabled, simple_bus_translate() will be + used for the address translation. This function is faster and + smaller in size than fdt_translate_address(). + +config SPL_OF_TRANSLATE + bool "Translate addresses using fdt_translate_address" + depends on SPL_DM && SPL_OF_CONTROL + default n + help + If this option is enabled, the reg property will be translated + using the fdt_translate_address() function. This is necessary + on some platforms (e.g. MVEBU) using complex "ranges" + properties in many nodes. As this translation is not handled + correctly in the default simple_bus_translate() function. + + If this option is not enabled, simple_bus_translate() will be + used for the address translation. This function is faster and + smaller in size than fdt_translate_address(). + endmenu diff --git a/drivers/core/device.c b/drivers/core/device.c index a6cd936..0cf73cf 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -11,6 +11,7 @@ #include <common.h> #include <fdtdec.h> +#include <fdt_support.h> #include <malloc.h> #include <dm/device.h> #include <dm/device-internal.h> @@ -580,7 +581,12 @@ fdt_addr_t dev_get_addr(struct udevice *dev) fdt_addr_t addr; addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); - if (CONFIG_IS_ENABLED(SIMPLE_BUS) && addr != FDT_ADDR_T_NONE) { + if (CONFIG_IS_ENABLED(OF_TRANSLATE)) { + const fdt32_t *reg = fdt_getprop(gd->fdt_blob, dev->of_offset, + "reg", NULL); + addr = fdt_translate_address((void *)gd->fdt_blob, + dev->of_offset, reg); + } else if (CONFIG_IS_ENABLED(SIMPLE_BUS) && addr != FDT_ADDR_T_NONE) { if (device_get_uclass_id(dev->parent) == UCLASS_SIMPLE_BUS) addr = simple_bus_translate(dev->parent, addr); } -- 2.5.1

6 29

[U-Boot] [PATCH] arm: ls1021a: Ensure Generic Timer disabled before jumping into the OS
by Alison Wang 30 Nov '15

30 Nov '15

This patch addresses a problem mentioned recently on this mailing list: [1]. In that posting a LS1021 based system was locking up at about 5 minutes after boot,but the problem was mysteriously related to the toolchain used for building u-boot.Debugging the problem reveals a stuck interrupt 29 on the GIC. It appears Freescale's LS1021 support in u-boot erroneously sets the 64-bit ARM generic PL1 physical time CompareValue register to all-ones with a 32-bit value.This causes the timer compare to fire 344 seconds after u-boot configures it.Depending on how fast u-boot gets the kernel booted,this amounts to about 5-minutes of Linux uptime before locking up. Apparently the bug is masked by some toolchains. Perhaps this is explained by default compiler options, word sizes, or binutils versions. To fix the above issue, the generic physical timer is disabled before jumping to the OS. [1] https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.ht… Signed-off-by: Chris Kilgour <techie(a)whiterocker.com> Signed-off-by: Alison Wang <alison.wang(a)freescale.com> --- arch/arm/cpu/armv7/ls102xa/cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 75f0d8c..298422f 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -346,3 +346,13 @@ void smp_kick_all_cpus(void) out_be32(&gur->brrl, 0x2); } #endif + +void arch_preboot_os(void) +{ + unsigned long ctrl; + + /* Disable PL1 Physical Timer */ + asm("mrc p15, 0, %0, c14, c2, 1" : "=r" (ctrl)); + ctrl &= ~ARCH_TIMER_CTRL_ENABLE; + asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl)); +} -- 2.1.0.27.g96db324

5 7

[U-Boot] [PATCH] arm: ls1021a: Ensure LS1021 ARM Generic Timer CompareValue Set 64-bit
by Alison Wang 30 Nov '15

30 Nov '15

This patch addresses a problem mentioned recently on this mailing list: [1]. In that posting a LS1021 based system was locking up at about 5 minutes after boot, but the problem was mysteriously related to the toolchain used for building u-boot. Debugging the problem reveals a stuck interrupt 29 on the GIC. It appears Freescale's LS1021 support in u-boot erroneously sets the 64-bit ARM generic PL1 physical time CompareValue register to all-ones with a 32-bit value. This causes the timer compare to fire 344 seconds after u-boot configures it. Depending on how fast u-boot gets the kernel booted, this amounts to about 5-minutes of Linux uptime before locking up. Apparently the bug is masked by some toolchains. Perhaps this is explained by default compiler options, word sizes, or binutils versions. At any rate this patch makes the manipulation explicitly 64-bit which alleviates the issue. [1] https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.ht… Signed-off-by: Chris Kilgour <techie(a)whiterocker.com> Signed-off-by: Alison Wang <alison.wang(a)freescale.com> --- arch/arm/cpu/armv7/ls102xa/timer.c | 3 ++- arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index 11b17b2..e6a32ca 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -56,7 +56,8 @@ static inline unsigned long long us_to_tick(unsigned long long usec) int timer_init(void) { struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR; - unsigned long ctrl, val, freq; + unsigned long ctrl, freq; + unsigned long long val; /* Enable System Counter */ writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index ee547fb..34854da 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -31,7 +31,7 @@ #define RCWSR4_SRDS1_PRTCL_SHIFT 24 #define RCWSR4_SRDS1_PRTCL_MASK 0xff000000 -#define TIMER_COMP_VAL 0xffffffff +#define TIMER_COMP_VAL 0xffffffffffffffffull #define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define SYS_COUNTER_CTRL_ENABLE (1 << 24) -- 2.1.0.27.g96db324

6 9

[U-Boot] [PATCH] checkpatch.pl: Fix checkpatch.pl warnings with Perl 5.22
by Moritz Fischer 30 Nov '15

30 Nov '15

This patch fixes a bunch of deprecation warings that show up when using checkpatch.pl with Perl 5.22. Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/\#\s*define.*do\s{ <-- HERE / at ./scripts/checkpatch.pl line 2829. Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/$.*${ <-- HERE / at ./scripts/checkpatch.pl line 3262. Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/do{ <-- HERE / at ./scripts/checkpatch.pl line 3263. Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/^${ <-- HERE / at ./scripts/checkpatch.pl line 3636. Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/(?^x: Signed-off-by: Moritz Fischer <moritz.fischer(a)ettus.com> --- scripts/checkpatch.pl | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 74db2e2..3a6b9fa 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2825,8 +2825,8 @@ sub process { # function brace can't be on same line, except for #defines of do while, # or if closed on same line - if (($line=~/$Type\s*$Ident\(.*$.*\s{/) and - !($line=~/\#\s*define.*do\s{/) and !($line=~/}/)) { + if (($line=~/$Type\s*$Ident$.*$.*\s\{/) and + !($line=~/\#\s*define.*do\s\{/) and !($line=~/\}/)) { ERROR("OPEN_BRACE", "open brace '{' following function declarations go on the next line\n" . $herecurr); } @@ -3259,12 +3259,12 @@ sub process { ## } #need space before brace following if, while, etc - if (($line =~ /$.*${/ && $line !~ /$$Type${/) || - $line =~ /do{/) { + if (($line =~ /$.*$\{/ && $line !~ /$$Type$\{/) || + $line =~ /do\{/) { if (ERROR("SPACING", "space required before the open brace '{'\n" . $herecurr) && $fix) { - $fixed[$linenr - 1] =~ s/^(\+.*(?:do|\))){/$1 {/; + $fixed[$linenr - 1] =~ s/^(\+.*(?:do|\)))\{/$1 {/; } } @@ -3633,7 +3633,7 @@ sub process { $dstat !~ /^for\s*$Constant$/ && # for (...) $dstat !~ /^for\s*$Constant\s+(?:$Ident|-?$Constant)$/ && # for (...) bar() $dstat !~ /^do\s*{/ && # do {... - $dstat !~ /^\({/ && # ({... + $dstat !~ /^\(\{/ && # ({... $ctx !~ /^.\s*#\s*define\s+TRACE_(?:SYSTEM|INCLUDE_FILE|INCLUDE_PATH)\b/) { $ctx =~ s/\n*$//; -- 2.5.1

5 9