September 2015 - U-Boot

[U-Boot] Fwd: Marvell Armada XP u-boot from uart
by Konstantin Lezhnyev 06 Apr '16

06 Apr '16

---------- Forwarded message ---------- From: Konstantin Lezhnyev <konst.ru(a)gmail.com> Date: 2015-05-26 13:30 GMT+05:00 Subject: Re: [U-Boot] Marvell Armada XP u-boot from uart To: Stefan Roese <sr(a)denx.de> I'm sorry, the wording of my question was too short. I have already fulfilled the steps described in the article. But the article describes loading of the image from manufacturer - it is not my case. 1. I create a configuration for my board from maxbcm config. 2. Set `BOOT_FROM` parameter in board\my\kwbimage.cfg to `uart`. 3. Set DDR timings/settings. 4. Upload and execute image via uart. 5. Memory training ended successfully. But then I get the following messages in the terminal: | >>spl:board_init_r() | boot device - 8 | ... | SPI probe failed. Boot device 8 - constant `BOOT_DEVICE_SPI`. Function code returns this value looks like: | u32 spl_boot_device(void) | { | /* Right now only booting via SPI NOR flash is supported */ | return BOOT_DEVICE_SPI; | } And now I repeat my question: >Is it possible to load and boot Marvell Armada XP u-boot completely from uart without spi or nand flash? Regards, kon5t. 2015-05-23 13:08 GMT+05:00 Stefan Roese <sr(a)denx.de>: > On 22.05.2015 16:12, Peter Robinson wrote: > >> Is it possible to load and boot Marvell Armada XP u-boot completely from >>> uart without spi or nand flash? >>> I have custom board with MV78460 and clean flash memory. >>> >> >> You can use kwboot I believe. >> > > Correct. kwboot can be used to upload and execute a binary (compiled for > UART booting) via UART. Please make sure to use the "-a" parameter for the > Armada XP timings. > > Thanks, > Stefan > >

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[U-Boot] [PATCH] tools/kwboot.c: Support UART fallback mode
by Kevin Smith 29 Mar '16

29 Mar '16

On some processors such as Armada 38x, if the hardware- configured boot mode fails, the CPU falls back to booting over UART. When this happens the chip prints a failure message, waits for the magic sequence and, when it is received, prints a "(boot)" message, then sends a NAK to start the transfer. This breaks the current kwboot behavior because the xmodem transfer only tries to read one character after the magic sequence, looking for the NAK. Instead it gets the "(boot)" text, and retries the magic sequence. The CPU thinks the repeated sequence is part of the packet, stops NAKing, and one side or another eventually times out. This patch adds support for a fallback mode which continues to scan for a NAK in the characters received after the sequence, printing out any non-NAK characters. This allows kwboot to skip the "(boot)" message, find the NAK, and start the transfer successfully. Signed-off-by: Kevin Smith <kevin.smith(a)elecsyscorp.com> --- tools/kwboot.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/tools/kwboot.c b/tools/kwboot.c index af7a6ee..6b58fc9 100644 --- a/tools/kwboot.c +++ b/tools/kwboot.c @@ -71,6 +71,7 @@ struct kwboot_block { #define KWBOOT_BLK_RSP_TIMEO 1000 /* ms */ static int kwboot_verbose; +static int support_fallback; static int msg_req_delay = KWBOOT_MSG_REQ_DELAY; static int msg_rsp_timeo = KWBOOT_MSG_RSP_TIMEO; @@ -300,7 +301,15 @@ kwboot_bootmsg(int tty, void *msg) continue; } - rc = kwboot_tty_recv(tty, &c, 1, msg_rsp_timeo); + while (1) { + rc = kwboot_tty_recv(tty, &c, 1, msg_rsp_timeo); + if (support_fallback && rc == 0 && c != NAK) { + printf("%c", c); + fflush(stdout); + continue; + } + break; + } kwboot_spinner(); @@ -657,7 +666,7 @@ static void kwboot_usage(FILE *stream, char *progname) { fprintf(stream, - "Usage: %s [-d | -a | -q <req-delay> | -s <resp-timeo> | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n", + "Usage: %s [-f] [-d | -a | -q <req-delay> | -s <resp-timeo> | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n", progname); fprintf(stream, "\n"); fprintf(stream, @@ -667,6 +676,7 @@ kwboot_usage(FILE *stream, char *progname) " -D <image>: boot <image> without preamble (Dove)\n"); fprintf(stream, " -d: enter debug mode\n"); fprintf(stream, " -a: use timings for Armada XP\n"); + fprintf(stream, " -f: support UART fallback after failed boot\n"); fprintf(stream, " -q <req-delay>: use specific request-delay\n"); fprintf(stream, " -s <resp-timeo>: use specific response-timeout\n"); fprintf(stream, "\n"); @@ -701,7 +711,7 @@ main(int argc, char **argv) kwboot_verbose = isatty(STDOUT_FILENO); do { - int c = getopt(argc, argv, "hb:ptaB:dD:q:s:"); + int c = getopt(argc, argv, "hb:ptfaB:dD:q:s:"); if (c < 0) break; @@ -728,6 +738,10 @@ main(int argc, char **argv) term = 1; break; + case 'f': + support_fallback = 1; + break; + case 'a': msg_req_delay = KWBOOT_MSG_REQ_DELAY_AXP; msg_rsp_timeo = KWBOOT_MSG_RSP_TIMEO_AXP; -- 2.4.6

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[U-Boot] [UBOOT PATCH v1 0/2] Add ACPI table support on Minnowmax
by Saket Sinha 21 Mar '16

21 Mar '16

This series adds ACPI table support on Minnowmax. Saket Sinha (2): x86: Add ACPI table support to Minnowmax x86: Add DSDT table for supporting ACPI on Minnowmax board/intel/minnowmax/Makefile | 1 + board/intel/minnowmax/acpi.c | 234 +++++++++++++++++++++++ board/intel/minnowmax/acpi/cpu.asl | 65 +++++++ board/intel/minnowmax/acpi/device_nvs.asl | 75 ++++++++ board/intel/minnowmax/acpi/globalnvs.asl | 88 +++++++++ board/intel/minnowmax/acpi/mainboard.asl | 13 ++ board/intel/minnowmax/acpi/platform.asl | 62 ++++++ board/intel/minnowmax/acpi/sleepstates.asl | 14 ++ board/intel/minnowmax/acpi/southcluster.asl | 286 ++++++++++++++++++++++++++++ board/intel/minnowmax/dsdt.asl | 46 +++++ 10 files changed, 884 insertions(+) create mode 100644 board/intel/minnowmax/acpi.c create mode 100644 board/intel/minnowmax/acpi/cpu.asl create mode 100644 board/intel/minnowmax/acpi/device_nvs.asl create mode 100644 board/intel/minnowmax/acpi/globalnvs.asl create mode 100644 board/intel/minnowmax/acpi/mainboard.asl create mode 100644 board/intel/minnowmax/acpi/platform.asl create mode 100644 board/intel/minnowmax/acpi/sleepstates.asl create mode 100644 board/intel/minnowmax/acpi/southcluster.asl create mode 100644 board/intel/minnowmax/dsdt.asl -- 2.1.4

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[U-Boot] [PATCH v1 1/1] fastboot: Update getvar command to get 'userdata' partition size
by Dileep Katta 17 Mar '16

17 Mar '16

This patch adds functionality to getvar command to get the userdata partition size. Signed-off-by: Dileep Katta <dileep.katta(a)linaro.org> --- common/fb_mmc.c | 38 ++++++++++++++++++++++++++++++++++++++ drivers/usb/gadget/f_fastboot.c | 2 ++ include/fb_mmc.h | 2 ++ 3 files changed, 42 insertions(+) diff --git a/common/fb_mmc.c b/common/fb_mmc.c index 6ea3938..1bb6335 100644 --- a/common/fb_mmc.c +++ b/common/fb_mmc.c @@ -32,6 +32,44 @@ void fastboot_okay(const char *s) strncat(response_str, s, RESPONSE_LEN - 4 - 1); } +void fb_mmc_get_ptn_size(const char *cmd, char *response) +{ + int ret; + block_dev_desc_t *dev_desc; + disk_partition_t info; + u32 sz_mb; + u64 sz = 0; + char buf[RESPONSE_LEN]; + + /* initialize the response buffer */ + response_str = response; + + dev_desc = get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); + if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { + error("invalid mmc device"); + fastboot_fail("invalid mmc device"); + return; + } + + ret = get_partition_info_efi_by_name(dev_desc, cmd, &info); + if (ret) { + error("cannot find partition: '%s'", cmd); + fastboot_fail("cannot find partition"); + return; + } + + sz = (info.size * (u64)info.blksz) >> 10; + + if (sz >= 0xFFFFFFFF) { + sz_mb = (u32)(sz >> 10); + sprintf(buf, "0x%d MB", sz_mb); + fastboot_okay(buf); + } else { + sprintf(buf, "%d KB", (u32)sz); + fastboot_okay(buf); + } +} + static void write_raw_image(block_dev_desc_t *dev_desc, disk_partition_t *info, const char *part_name, void *buffer, unsigned int download_bytes) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 310175a..17b64ef 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -363,6 +363,8 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) strncat(response, s, chars_left); else strcpy(response, "FAILValue not set"); + } else if (!strcmp_l1("userdata_size", cmd)) { + fb_mmc_get_ptn_size("userdata", response); } else { error("unknown variable: %s\n", cmd); strcpy(response, "FAILVariable not implemented"); diff --git a/include/fb_mmc.h b/include/fb_mmc.h index 1ad1d13..353f325 100644 --- a/include/fb_mmc.h +++ b/include/fb_mmc.h @@ -4,5 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +void fb_mmc_get_ptn_size(const char *cmd, char *response); + void fb_mmc_flash_write(const char *cmd, void *download_buffer, unsigned int download_bytes, char *response); -- 1.8.3.2

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[U-Boot] buildman for sandbox
by Joe Hershberger 13 Mar '16

13 Mar '16

Hi Simon, Is there a way to make buildman compile sandbox with a non-system tool chain? I've tried creating an alias from sandbox to i386 and removing the "root" entry. It then simply claims not to have a sandbox tool chain. Thanks, -Joe

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[U-Boot] [PATCH v3 0/4] x86: gpio: Tidy up GPIO driver
by Simon Glass 13 Mar '16

13 Mar '16

The ICH GPIO driver does not work correctly at present. This series tidies things up and fixes a few bugs. One issue remaining is that reading from output GPIOs does not work - it always returns 0. Changes in v3: - Correct failure logic in pci_get_bus() - Use pci_get_bus in pci_bus_to_hose() Changes in v2: - Adjust pci_get_bus() to probe bus 0 so that the required bus is found Simon Glass (4): dm: pci: Allow a PCI bus to be found without an alias gpio: Report errors when GPIOs cannot be read WIP: x86: gpio: Handle the case where reading a GPIO fails WIP: x86: gpio: Make sure that output GPIOs can be read common/cmd_gpio.c | 34 +++++++++++++++++++++++++++------- drivers/gpio/intel_ich6_gpio.c | 28 ++++++++++++++++++++++++++-- drivers/pci/pci-uclass.c | 28 ++++++++++++++++++++++++---- 3 files changed, 77 insertions(+), 13 deletions(-) -- 2.5.0.457.gab17608

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[U-Boot] [PATCH v4] x86: baytrail: Configure FSP UPD from device tree
by Andrew Bradford 12 Mar '16

12 Mar '16

From: Andrew Bradford <andrew.bradford(a)kodakalaris.com> Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford(a)kodakalaris.com> --- Changes from v3: - Fix small typographical issues (lowercase hex numbers, grammar, etc), no functional changes. Changes from v2: - Switch to using booleans in dts, where appropriate. - Add Bayley Bay dts modifications. - Clarify docs to show bool versus int properties. - Include enable-igt property from FSPv4. Changes from v1: - Use "-" rather than "_" in dt property names. - Use "Bay Trail" for the formal name of the Intel product family. - Use an "fsp," prefix for dt property names for clarity. - Fix minor code indentation issues. - Create a dt subnode for the memory-down-params. - Clarify documentation that dt overrides the FSP's config, so we don't use booleans. arch/x86/cpu/baytrail/fsp_configs.c | 167 +++++++++++++++++---- arch/x86/dts/bayleybay.dts | 40 +++++ arch/x86/dts/minnowmax.dts | 58 +++++++ .../misc/intel,baytrail-fsp.txt | 158 +++++++++++++++++++ include/fdtdec.h | 2 + lib/fdtdec.c | 2 + 6 files changed, 397 insertions(+), 30 deletions(-) create mode 100644 doc/device-tree-bindings/misc/intel,baytrail-fsp.txt diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index 86b6926..ba56ebb 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -1,14 +1,18 @@ /* * Copyright (C) 2013, Intel Corporation * Copyright (C) 2014, Bin Meng <bmeng.cn(a)gmail.com> + * Copyright (C) 2015, Kodak Alaris, Inc * * SPDX-License-Identifier: Intel */ #include <common.h> +#include <fdtdec.h> #include <asm/arch/fsp/azalia.h> #include <asm/fsp/fsp_support.h> +DECLARE_GLOBAL_DATA_PTR; + /* ALC262 Verb Table - 10EC0262 */ static const uint32_t verb_table_data13[] = { /* Pin Complex (NID 0x11) */ @@ -116,41 +120,144 @@ const struct pch_azalia_config azalia_config = { .reset_wait_timer_us = 300 }; +/** + * Override the FSP's UPD. + * If the device tree does not specify an integer setting, use the default + * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file. + */ void update_fsp_upd(struct upd_region *fsp_upd) { struct memory_down_data *mem; + const void *blob = gd->fdt_blob; + int node; - /* - * Configure everything here to avoid the poor hard-pressed user - * needing to run Intel's binary configuration tool. It may also allow - * us to support the 1GB single core variant easily. - * - * TODO(sjg(a)chromium.org): Move to device tree - */ - fsp_upd->mrc_init_tseg_size = 8; - fsp_upd->mrc_init_mmio_size = 0x800; - fsp_upd->emmc_boot_mode = 0xff; - fsp_upd->enable_sdio = 1; - fsp_upd->enable_sdcard = 1; - fsp_upd->enable_hsuart0 = 1; fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config; - fsp_upd->enable_i2_c0 = 0; - fsp_upd->enable_i2_c2 = 0; - fsp_upd->enable_i2_c3 = 0; - fsp_upd->enable_i2_c4 = 0; - fsp_upd->enable_xhci = 0; - fsp_upd->igd_render_standby = 1; + + node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP); + if (node < 0) { + debug("%s: Cannot find FSP node\n", __func__); + return; + } + + fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node, + "fsp,mrc-init-tseg-size", + 0); + fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node, + "fsp,mrc-init-mmio-size", + 0x800); + fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node, + "fsp,mrc-init-spd-addr1", + 0xa0); + fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node, + "fsp,mrc-init-spd-addr2", + 0xa2); + fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node, + "fsp,emmc-boot-mode", 2); + fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio"); + fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node, + "fsp,enable-sdcard"); + fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node, + "fsp,enable-hsuart0"); + fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node, + "fsp,enable-hsuart1"); + fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi"); + fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata"); + fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode", 1); + fsp_upd->enable_azalia = fdtdec_get_bool(blob, node, + "fsp,enable-azalia"); + fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci"); + fsp_upd->enable_lpe = fdtdec_get_bool(blob, node, "fsp,enable-lpe"); + fsp_upd->lpss_sio_enable_pci_mode = fdtdec_get_bool(blob, node, + "fsp,lpss-sio-enable-pci-mode"); + fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0"); + fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1"); + fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0"); + fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1"); + fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2"); + fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3"); + fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4"); + fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5"); + fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6"); + fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0"); + fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1"); + fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi"); + fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node, + "fsp,igd-dvmt50-pre-alloc", + 2); + fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size", + 2); + fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size", 2); + fsp_upd->serial_debug_port_address = fdtdec_get_int(blob, node, + "fsp,serial-debug-port-address", + 0x3f8); + fsp_upd->serial_debug_port_type = fdtdec_get_int(blob, node, + "fsp,serial-debug-port-type", + 1); + fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node, + "fsp,mrc-debug-msg"); + fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable"); + fsp_upd->scc_enable_pci_mode = fdtdec_get_bool(blob, node, + "fsp,scc-enable-pci-mode"); + fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node, + "fsp,igd-render-standby"); + fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node, + "fsp,txe-uma-enable"); + fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection", 4); + fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node, + "fsp,emmc45-ddr50-enabled"); + fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node, + "fsp,emmc45-hs200-enabled"); + fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node, + "fsp,emmc45-retune-timer-value", + 8); + fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd"); mem = &fsp_upd->memory_params; - mem->enable_memory_down = 1; - mem->dram_speed = 1; - mem->dimm_width = 1; - mem->dimm_density = 2; - mem->dimm_tcl = 0xb; - mem->dimm_trpt_rcd = 0xb; - mem->dimm_twr = 0xc; - mem->dimm_twtr = 6; - mem->dimm_trrd = 6; - mem->dimm_trtp = 6; - mem->dimm_tfaw = 0x14; + mem->enable_memory_down = fdtdec_get_bool(blob, node, + "fsp,enable-memory-down"); + if (mem->enable_memory_down) { + node = fdtdec_next_compatible(blob, node, + COMPAT_INTEL_BAYTRAIL_FSP_MDP); + if (node < 0) { + debug("%s: Cannot find FSP memory-down-params node\n", + __func__); + } else { + mem->dram_speed = fdtdec_get_int(blob, node, + "fsp,dram-speed", + 0x02); + mem->dram_type = fdtdec_get_int(blob, node, + "fsp,dram-type", 0x01); + mem->dimm_0_enable = fdtdec_get_bool(blob, node, + "fsp,dimm-0-enable"); + mem->dimm_1_enable = fdtdec_get_bool(blob, node, + "fsp,dimm-1-enable"); + mem->dimm_width = fdtdec_get_int(blob, node, + "fsp,dimm-width", + 0x00); + mem->dimm_density = fdtdec_get_int(blob, node, + "fsp,dimm-density", + 0x01); + mem->dimm_bus_width = fdtdec_get_int(blob, node, + "fsp,dimm-bus-width", + 0x03); + mem->dimm_sides = fdtdec_get_int(blob, node, + "fsp,dimm-sides", + 0x00); + mem->dimm_tcl = fdtdec_get_int(blob, node, + "fsp,dimm-tcl", 0x09); + mem->dimm_trpt_rcd = fdtdec_get_int(blob, node, + "fsp,dimm-trpt-rcd", + 0x09); + mem->dimm_twr = fdtdec_get_int(blob, node, + "fsp,dimm-twr", 0x0A); + mem->dimm_twtr = fdtdec_get_int(blob, node, + "fsp,dimm-twtr", 0x05); + mem->dimm_trrd = fdtdec_get_int(blob, node, + "fsp,dimm-trrd", 0x04); + mem->dimm_trtp = fdtdec_get_int(blob, node, + "fsp,dimm-trtp", 0x05); + mem->dimm_tfaw = fdtdec_get_int(blob, node, + "fsp,dimm-tfaw", 0x14); + } + } } diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 9f8fa70..0ca7c3e 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -188,6 +188,46 @@ }; }; + fsp { + compatible = "intel,baytrail-fsp"; + fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-mmio-size = <0x800>; + fsp,mrc-init-spd-addr1 = <0xa0>; + fsp,mrc-init-spd-addr2 = <0xa2>; + fsp,emmc-boot-mode = <2>; + fsp,enable-sdio; + fsp,enable-sdcard; + fsp,enable-hsuart1; + fsp,enable-spi; + fsp,enable-sata; + fsp,sata-mode = <1>; + fsp,enable-xhci; + fsp,enable-lpe; + fsp,lpss-sio-enable-pci-mode; + fsp,enable-dma0; + fsp,enable-dma1; + fsp,enable-i2c0; + fsp,enable-i2c1; + fsp,enable-i2c2; + fsp,enable-i2c3; + fsp,enable-i2c4; + fsp,enable-i2c5; + fsp,enable-i2c6; + fsp,enable-pwm0; + fsp,enable-pwm1; + fsp,igd-dvmt50-pre-alloc = <2>; + fsp,aperture-size = <2>; + fsp,gtt-size = <2>; + fsp,serial-debug-port-address = <0x3f8>; + fsp,serial-debug-port-type = <1>; + fsp,mrc-debug-msg; + fsp,scc-enable-pci-mode; + fsp,os-selection = <4>; + fsp,emmc45-ddr50-enabled; + fsp,emmc45-retune-timer-value = <8>; + fsp,enable-igd; + }; + microcode { update@0 { #include "microcode/m0230671117.dtsi" diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 9527233..4c9e265 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -122,6 +122,64 @@ 0x01000000 0x0 0x2000 0x2000 0 0xe000>; }; + fsp { + compatible = "intel,baytrail-fsp"; + fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-mmio-size = <0x800>; + fsp,mrc-init-spd-addr1 = <0xa0>; + fsp,mrc-init-spd-addr2 = <0xa2>; + fsp,emmc-boot-mode = <2>; + fsp,enable-sdio; + fsp,enable-sdcard; + fsp,enable-hsuart1; + fsp,enable-spi; + fsp,enable-sata; + fsp,sata-mode = <1>; + fsp,enable-xhci; + fsp,enable-lpe; + fsp,lpss-sio-enable-pci-mode; + fsp,enable-dma0; + fsp,enable-dma1; + fsp,enable-i2c0; + fsp,enable-i2c1; + fsp,enable-i2c2; + fsp,enable-i2c3; + fsp,enable-i2c4; + fsp,enable-i2c5; + fsp,enable-i2c6; + fsp,enable-pwm0; + fsp,enable-pwm1; + fsp,igd-dvmt50-pre-alloc = <2>; + fsp,aperture-size = <2>; + fsp,gtt-size = <2>; + fsp,serial-debug-port-address = <0x3f8>; + fsp,serial-debug-port-type = <1>; + fsp,mrc-debug-msg; + fsp,scc-enable-pci-mode; + fsp,os-selection = <4>; + fsp,emmc45-ddr50-enabled; + fsp,emmc45-retune-timer-value = <8>; + fsp,enable-igd; + fsp,enable-memory-down; + fsp,memory-down-params { + compatible = "intel,baytrail-fsp-mdp"; + fsp,dram-speed = <1>; + fsp,dram-type = <1>; + fsp,dimm-0-enable; + fsp,dimm-width = <1>; + fsp,dimm-density = <2>; + fsp,dimm-bus-width = <3>; + fsp,dimm-sides = <0>; + fsp,dimm-tcl = <0xb>; + fsp,dimm-trpt-rcd = <0xb>; + fsp,dimm-twr = <0xc>; + fsp,dimm-twtr = <6>; + fsp,dimm-trrd = <6>; + fsp,dimm-trtp = <6>; + fsp,dimm-tfaw = <0x14>; + }; + }; + spi { #address-cells = <1>; #size-cells = <0>; diff --git a/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt new file mode 100644 index 0000000..b44b5b5 --- /dev/null +++ b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt @@ -0,0 +1,158 @@ +Intel Bay Trail FSP UPD Binding +=============================== + +The device tree node which describes the overriding of the Intel Bay Trail FSP +UPD data for configuring the SoC. + +All properties can be found within the `upd-region` struct in +arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in +Intel's FSP Binary Configuration Tool for Bay Trail. This list of properties is +matched up to Intel's E3800 FSPv4 release. + +# Boolean properties: + +- fsp,enable-sdio +- fsp,enable-sdcard +- fsp,enable-hsuart0 +- fsp,enable-hsuart1 +- fsp,enable-spi +- fsp,enable-sata +- fsp,enable-azalia +- fsp,enable-xhci +- fsp,enable-lpe +- fsp,lpss-sio-enable-pci-mode +- fsp,enable-dma0 +- fsp,enable-dma1 +- fsp,enable-i2-c0 +- fsp,enable-i2-c1 +- fsp,enable-i2-c2 +- fsp,enable-i2-c3 +- fsp,enable-i2-c4 +- fsp,enable-i2-c5 +- fsp,enable-i2-c6 +- fsp,enable-pwm0 +- fsp,enable-pwm1 +- fsp,enable-hsi +- fsp,mrc-debug-msg +- fsp,isp-enable +- fsp,scc-enable-pci-mode +- fsp,igd-render-standby +- fsp,txe-uma-enable +- fsp,emmc45-ddr50-enabled +- fsp,emmc45-hs200-enabled +- fsp,enable-igd +- fsp,enable-memory-down + +If you set "fsp,enable-memory-down" you are strongly encouraged to provide an +"fsp,memory-down-params{};" to specify how your memory is configured. If you do +not set "fsp,enable-memory-down", then the DIMM SPD information will be +discovered by the FSP and used to setup main memory. + + +# Integer properties: + +- fsp,mrc-init-tseg-size +- fsp,mrc-init-mmio-size +- fsp,mrc-init-spd-addr1 +- fsp,mrc-init-spd-addr2 +- fsp,emmc-boot-mode +- fsp,sata-mode +- fsp,igd-dvmt50-pre-alloc +- fsp,aperture-size +- fsp,gtt-size +- fsp,serial-debug-port-address +- fsp,serial-debug-port-type +- fsp,os-selection +- fsp,emmc45-retune-timer-value + +- fsp,memory-down-params { + + # Boolean properties: + + - fsp,dimm-0-enable + - fsp,dimm-1-enable + + # Integer properties: + + - fsp,dram-speed + - fsp,dram-type + - fsp,dimm-width + - fsp,dimm-density + - fsp,dimm-bus-width + - fsp,dimm-sides + - fsp,dimm-tcl + - fsp,dimm-trpt-rcd + - fsp,dimm-twr + - fsp,dimm-twtr + - fsp,dimm-trrd + - fsp,dimm-trtp + - fsp,dimm-tfaw +}; + + +Example (from MinnowMax Dual Core): +----------------------------------- + +/ { + ... + + fsp { + compatible = "intel,baytrail-fsp"; + fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-mmio-size = <0x800>; + fsp,mrc-init-spd-addr1 = <0xa0>; + fsp,mrc-init-spd-addr2 = <0xa2>; + fsp,emmc-boot-mode = <2>; + fsp,enable-sdio; + fsp,enable-sdcard; + fsp,enable-hsuart1; + fsp,enable-spi; + fsp,enable-sata; + fsp,sata-mode = <1>; + fsp,enable-xhci; + fsp,enable-lpe; + fsp,lpss-sio-enable-pci-mode; + fsp,enable-dma0; + fsp,enable-dma1; + fsp,enable-i2c0; + fsp,enable-i2c1; + fsp,enable-i2c2; + fsp,enable-i2c3; + fsp,enable-i2c4; + fsp,enable-i2c5; + fsp,enable-i2c6; + fsp,enable-pwm0; + fsp,enable-pwm1; + fsp,igd-dvmt50-pre-alloc = <2>; + fsp,aperture-size = <2>; + fsp,gtt-size = <2>; + fsp,serial-debug-port-address = <0x3f8>; + fsp,serial-debug-port-type = <1>; + fsp,mrc-debug-msg; + fsp,scc-enable-pci-mode; + fsp,os-selection = <4>; + fsp,emmc45-ddr50-enabled; + fsp,emmc45-retune-timer-value = <8>; + fsp,enable-igd; + fsp,enable-memory-down; + fsp,memory-down-params { + compatible = "intel,baytrail-fsp-mdp"; + fsp,dram-speed = <1>; + fsp,dram-type = <1>; + fsp,dimm-0-enable; + fsp,dimm-width = <1>; + fsp,dimm-density = <2>; + fsp,dimm-bus-width = <3>; + fsp,dimm-sides = <0>; + fsp,dimm-tcl = <0xb>; + fsp,dimm-trpt-rcd = <0xb>; + fsp,dimm-twr = <0xc>; + fsp,dimm-twtr = <6>; + fsp,dimm-trrd = <6>; + fsp,dimm-trtp = <6>; + fsp,dimm-tfaw = <0x14>; + }; + }; + + ... +}; diff --git a/include/fdtdec.h b/include/fdtdec.h index 4b3f8d1..987d51a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -186,6 +186,8 @@ enum fdt_compat_id { COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */ COMPAT_INTEL_PCH, /* Intel PCH */ COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */ + COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */ + COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel Bay Trail FSP memory-down params */ COMPAT_COUNT, }; diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 48667ef..42e8a8b 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -78,6 +78,8 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"), COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"), COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"), + COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), + COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), }; const char *fdtdec_get_compatible(enum fdt_compat_id id) -- 1.9.1

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[U-Boot] [PATCH v1 1/3] fastboot: OUT transaction length must be aligned to wMaxPacketSize
by Dileep Katta 11 Mar '16

11 Mar '16

OUT transactions must be aligned to wMaxPacketSize for each transfer, or else transfer will not complete successfully. This patch modifies rx_bytes_expected to return a transfer length that is aligned to wMaxPacketSize. Note that the value of ep->desc->wMaxPacketSize and ep->maxpacket may not be the same value, and it is the value of ep->desc->wMaxPacketSize that should be used for alignment. Signed-off-by: Dileep Katta <dileep.katta(a)linaro.org> --- drivers/usb/gadget/f_fastboot.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index a8d8205..0d53a61 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -370,13 +370,20 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) fastboot_tx_write_str(response); } -static unsigned int rx_bytes_expected(void) +static unsigned int rx_bytes_expected(unsigned maxpacket) { int rx_remain = download_size - download_bytes; + int rem = 0; if (rx_remain < 0) return 0; if (rx_remain > EP_BUFFER_SIZE) return EP_BUFFER_SIZE; + if (rx_remain < maxpacket) { + rx_remain = maxpacket; + } else if (rx_remain % maxpacket != 0) { + rem = rx_remain % maxpacket; + rx_remain = rx_remain + (maxpacket - rem); + } return rx_remain; } @@ -425,7 +432,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) printf("\ndownloading of %d bytes finished\n", download_bytes); } else { - req->length = rx_bytes_expected(); + req->length = rx_bytes_expected(ep->desc->wMaxPacketSize); if (req->length < ep->maxpacket) req->length = ep->maxpacket; } @@ -453,7 +460,7 @@ static void cb_download(struct usb_ep *ep, struct usb_request *req) } else { sprintf(response, "DATA%08x", download_size); req->complete = rx_handler_dl_image; - req->length = rx_bytes_expected(); + req->length = rx_bytes_expected(ep->desc->wMaxPacketSize); if (req->length < ep->maxpacket) req->length = ep->maxpacket; } -- 1.8.3.2

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[U-Boot] How do I tell buildman to use a /specific/ toolchain?
by Stephen Warren 07 Mar '16

07 Mar '16

Simon, I have 3 different ARM toolchains installed into /usr/bin via distro packages. How do I tell buildman which of those to use? I had originally thought that ~/.buildman's [toolchain] section contained CROSS_COMPILE-like values, so I tried: > [toolchain] > root: / > arm0-not-installed: arm-none-gnueabi- > arm1: arm-none-eabi- > arm2: arm-linux-gnueabihf- > arm3: arm-linux-gnueabi- > arch64: aarch64-linux-gnu- > > [toolchain-alias] > arm: arm1 > aarch64: aarch64 (I intended to change the "arm: arm1" line to point at arm1/2/3 based on which I wanted to use at a particular time). However, running "buildman --list-toolchains" and re-reading the docs shows me that the [toolchain] values are absolute directories that buildman searches for files named *-gcc: > - scanning path 'arm-none-gnueabi-' > - looking in 'arm-none-gnueabi-/.' > - looking in 'arm-none-gnueabi-/bin' > - looking in 'arm-none-gnueabi-/usr/bin' If buildman finds multiple toolchains, there doesn't seem to be a way to tell it which one to use. Am I missing something? I suppose a solution wouuld be to move the compiler binaries into different separate directories, and only list one of those directories in ~/.buildman. However, I can't do that for distro-packaged toolchains (well, I suppose I could manually mv everything all over the place, but that's really fragile since it'd break any time the package got upgraded or removed and re-installed). I think it makes sense to add new syntax into ~/.buildman to specify "don't do automagical searching, just use this CROSS_COMPILE value that I say". Does that sound reasonable? Automagic stuff makes for great defaults, but if it can't be overridden, it sucks when you actually know what you want.

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[U-Boot] Weird error message on buildman
by Masahiro Yamada 07 Mar '16

07 Mar '16

Hi Simon, When I try to run Buildman against a branch named "test", it fails with a weird error message. $ git branch * master $ git checkout -b test master Switched to a new branch 'test' $ echo foo >> README $ git add README $ git commit -m foo [test f8f6569] foo 1 file changed, 1 insertion(+) $ tools/buildman/buildman -b test Branch 'test' not found $ git branch master * test Indeed, the branch "test" exists, but Buildman reports "Branch "test' not found". Could you check it out, please? Best Regards Masahiro Yamada

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