September 2015 - U-Boot

[U-Boot] [PATCH 00/18] dm: test: Add test code for new uclasses
by Simon Glass 03 Oct '15

03 Oct '15

Several new uclasses have been written and we need tests for these before they can be merged. This series adds the test code. Simon Glass (18): dm: Add platform data advice and admonishment dm: test: Allow test names to leave out the dm_test_ prefix dm: test: Add tests for the clk uclass dm: test: Add tests for the pinctrl uclass sandbox: Support multiple reset types dm: reset: Allow reset_walk() to return sandbox: Add a warm and cold reset driver sandbox: Use the reset driver to handle reset dm: test: Add a test for the reset uclass dm: test: Add a test for the ram uclass dm: test: Add a test for the mmc uclass led: Return -ENODEV if the LED device cannot be found dm: test: Add a test for the LED uclass dm: test: Add a test for the system controller uclass dm: test: Add a size to each reg property test: Add a macro to check that a value is not an error pointer dm: core: Add device checking to syscon_get_regmap() test: Add a test for regmap arch/sandbox/cpu/cpu.c | 9 +-- arch/sandbox/cpu/state.c | 4 ++ arch/sandbox/dts/test.dts | 76 ++++++++++++++++++++--- arch/sandbox/include/asm/state.h | 3 + arch/sandbox/include/asm/test.h | 19 ++++++ arch/sandbox/include/asm/u-boot-sandbox.h | 3 + configs/sandbox_defconfig | 8 +++ doc/driver-model/README.txt | 17 ++++- drivers/clk/Makefile | 1 + drivers/clk/clk_sandbox.c | 85 +++++++++++++++++++++++++ drivers/core/syscon-uclass.c | 7 ++- drivers/led/led-uclass.c | 5 +- drivers/led/led_gpio.c | 6 ++ drivers/misc/Makefile | 2 + drivers/misc/reset-uclass.c | 31 +++++++-- drivers/misc/reset_sandbox.c | 100 ++++++++++++++++++++++++++++++ drivers/misc/syscon_sandbox.c | 27 ++++++++ drivers/mmc/Makefile | 1 + drivers/mmc/sandbox_mmc.c | 25 ++++++++ drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl_sandbox.c | 80 ++++++++++++++++++++++++ drivers/ram/Makefile | 1 + drivers/ram/sandbox_ram.c | 38 ++++++++++++ include/dm/platdata.h | 9 +++ include/dt-bindings/clock/sandbox-clk.h | 10 +++ include/led.h | 2 +- include/reset.h | 11 +++- include/test/ut.h | 15 +++++ test/dm/Makefile | 8 +++ test/dm/clk.c | 59 ++++++++++++++++++ test/dm/led.c | 72 +++++++++++++++++++++ test/dm/mmc.c | 27 ++++++++ test/dm/pinctrl.c | 63 +++++++++++++++++++ test/dm/ram.c | 28 +++++++++ test/dm/regmap.c | 82 ++++++++++++++++++++++++ test/dm/reset.c | 74 ++++++++++++++++++++++ test/dm/syscon.c | 31 +++++++++ test/dm/test-main.c | 15 ++++- 38 files changed, 1021 insertions(+), 34 deletions(-) create mode 100644 drivers/clk/clk_sandbox.c create mode 100644 drivers/misc/reset_sandbox.c create mode 100644 drivers/misc/syscon_sandbox.c create mode 100644 drivers/mmc/sandbox_mmc.c create mode 100644 drivers/pinctrl/pinctrl_sandbox.c create mode 100644 drivers/ram/sandbox_ram.c create mode 100644 include/dt-bindings/clock/sandbox-clk.h create mode 100644 test/dm/clk.c create mode 100644 test/dm/led.c create mode 100644 test/dm/mmc.c create mode 100644 test/dm/pinctrl.c create mode 100644 test/dm/ram.c create mode 100644 test/dm/regmap.c create mode 100644 test/dm/reset.c create mode 100644 test/dm/syscon.c -- 2.4.3.573.g4eafbef

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[U-Boot] [PATCH] fdt: fix fdtdec_get_addr_size not to require any size cells
by Stephen Warren 03 Oct '15

03 Oct '15

From: Stephen Warren <swarren(a)nvidia.com> fdtdec_get_addr_size() may be used in two cases: a) With sizep supplied, in which case both an address and a size are parsed from DT. In this case, the DT property must be large enough to contain both values. b) With sizep NULL, in which case only an address is parsed from DT. In this case, the DT property only need be large enough to contain this address value. Commit 02464e386bb5 "fdt: add new fdt address parsing functions" broke this relaxed checking, and required the DT property to contain both an address and a size value in all cases. Fix fdtdec_get_addr_size() to vary ns based on whether the size value is being parsed from the DT or not. This is safe since the function only parses the first entry in the property, so the overall value of (na + ns) need not be accurate, since it is never used to step through the property data to find other entries. Besides, this fixed behaviour essentially matches the original behaviour before the patch this patch fixes. (The original code validated that the property was exactly the length of either na or (na + ns), whereas the current code only validates that the property is at least that long. For non-failure cases, the two behaviours are identical). Cc: Przemyslaw Marczak <p.marczak(a)samsung.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Thierry Reding <treding(a)nvidia.com> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Michal Suchanek <hramrach(a)gmail.com> Fixes: 02464e386bb5 ("fdt: add new fdt address parsing functions") Reported-by: Przemyslaw Marczak <p.marczak(a)samsung.com> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- lib/fdtdec.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 9f0b65de3831..1fdb4f0d9ce9 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -180,10 +180,11 @@ fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, const char *prop_name, fdt_size_t *sizep) { + int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; + return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, sizeof(fdt_addr_t) / sizeof(fdt32_t), - sizeof(fdt_size_t) / sizeof(fdt32_t), - sizep); + ns, sizep); } fdt_addr_t fdtdec_get_addr(const void *blob, int node, -- 1.9.1

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[U-Boot] [PATCH v2 1/2] malloc_simple: Add Kconfig option for using only malloc_simple in the SPL
by Hans de Goede 03 Oct '15

03 Oct '15

common/dlmalloc.c is quite big, both in .text and .data usage, therefor on some boards the SPL is build to use only malloc_simple.c and not the dlmalloc.c code. This is done in various include/configs/foo.h with the following construct: #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE #endif This commit introduces a SPL_MALLOC_SIMPLE Kconfig bool which allows selecting this functionality through Kconfig instead. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- Changes in v2: -Fix commit message wrt quoting lines starting with a # -Rename Kconfig option from SPL_MALLOC_SIMPLE to SPL_SYS_MALLOC_SIMPLE -Simplify the ifdef checks to #if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) --- Kconfig | 10 ++++++++++ common/malloc_simple.c | 2 +- include/_exports.h | 2 +- include/exports.h | 2 +- include/malloc.h | 2 +- 5 files changed, 14 insertions(+), 4 deletions(-) diff --git a/Kconfig b/Kconfig index 05a34f7..7770743 100644 --- a/Kconfig +++ b/Kconfig @@ -114,6 +114,16 @@ config SPL help If you want to build SPL as well as the normal image, say Y. +config SPL_SYS_MALLOC_SIMPLE + bool + depends on SPL + prompt "Only use malloc_simple functions in the spl" + help + Say Y here to only use the *_simple malloc functions from + malloc_simple.c, rather then using the versions from dlmalloc.c + this will make the SPL binary smaller at the cost of more heap + usage as the *_simple malloc functions do not re-use free-ed mem. + config SPL_STACK_R depends on SPL bool "Enable SDRAM location for SPL stack" diff --git a/common/malloc_simple.c b/common/malloc_simple.c index c745863..9bf1fed 100644 --- a/common/malloc_simple.c +++ b/common/malloc_simple.c @@ -40,7 +40,7 @@ void *memalign_simple(size_t align, size_t bytes) return ptr; } -#ifdef CONFIG_SYS_MALLOC_SIMPLE +#if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) void *calloc(size_t nmemb, size_t elem_size) { size_t size = nmemb * elem_size; diff --git a/include/_exports.h b/include/_exports.h index 74a882a..11beeb2 100644 --- a/include/_exports.h +++ b/include/_exports.h @@ -23,7 +23,7 @@ EXPORT_FUNC(dummy, void, free_hdlr, void) #endif EXPORT_FUNC(malloc, void *, malloc, size_t) -#ifndef CONFIG_SYS_MALLOC_SIMPLE +#if !CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) EXPORT_FUNC(free, void, free, void *) #endif EXPORT_FUNC(udelay, void, udelay, unsigned long) diff --git a/include/exports.h b/include/exports.h index a3e0469..deef8fb 100644 --- a/include/exports.h +++ b/include/exports.h @@ -19,7 +19,7 @@ int printf(const char* fmt, ...); void install_hdlr(int, interrupt_handler_t, void*); void free_hdlr(int); void *malloc(size_t); -#ifndef CONFIG_SYS_MALLOC_SIMPLE +#if !CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) void free(void*); #endif void __udelay(unsigned long); diff --git a/include/malloc.h b/include/malloc.h index f4da9e6..f20e4d3 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -872,7 +872,7 @@ extern Void_t* sbrk(); #else -#ifdef CONFIG_SYS_MALLOC_SIMPLE +#if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) #define malloc malloc_simple #define realloc realloc_simple #define memalign memalign_simple -- 2.4.3

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[U-Boot] [PATCH] nios2 : convert altera_pio to driver model
by Thomas Chou 03 Oct '15

03 Oct '15

Convert altera_pio to driver model. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/nios2/dts/3c120_devboard.dts | 38 ++++ arch/nios2/include/asm/gpio.h | 80 +------- board/altera/nios2-generic/nios2-generic.c | 7 - configs/nios2-generic_defconfig | 2 + drivers/gpio/Kconfig | 7 + drivers/gpio/altera_pio.c | 316 +++++++---------------------- include/configs/nios2-generic.h | 20 -- 7 files changed, 124 insertions(+), 346 deletions(-) diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts index a35f5fe..f6ac273 100644 --- a/arch/nios2/dts/3c120_devboard.dts +++ b/arch/nios2/dts/3c120_devboard.dts @@ -132,6 +132,44 @@ clock-frequency = <62500000>; u-boot,dm-pre-reloc; }; + + user_led_pio_8out: gpio@0x4cc0 { + compatible = "altr,pio-1.0"; + reg = <0x00004cc0 0x00000010>; + resetvalue = <255>; + width = <8>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "led"; + }; + + user_dipsw_pio_8in: gpio@0x4ce0 { + compatible = "altr,pio-1.0"; + reg = <0x00004ce0 0x00000010>; + interrupt-parent = <&cpu>; + interrupts = <8>; + edge_type = <2>; + level_trigger = <0>; + resetvalue = <0>; + width = <8>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "dipsw"; + }; + + user_pb_pio_4in: gpio@0x4d00 { + compatible = "altr,pio-1.0"; + reg = <0x00004d00 0x00000010>; + interrupt-parent = <&cpu>; + interrupts = <9>; + edge_type = <2>; + level_trigger = <0>; + resetvalue = <0>; + width = <4>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "pb"; + }; }; cfi_flash_64m: flash@0x0 { diff --git a/arch/nios2/include/asm/gpio.h b/arch/nios2/include/asm/gpio.h index 908381f..306ab4c 100644 --- a/arch/nios2/include/asm/gpio.h +++ b/arch/nios2/include/asm/gpio.h @@ -1,79 +1 @@ -/* - * nios2 gpio driver - * - * This gpio core is described in http://nioswiki.com/GPIO - * bit[0] data - * bit[1] output enable - * - * When CONFIG_SYS_GPIO_BASE is not defined, the board may either - * provide its own driver or the altera_pio driver may be used. - * - * Copyright (C) 2010 Thomas Chou <thomas(a)wytron.com.tw> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _ASM_NIOS2_GPIO_H_ -#define _ASM_NIOS2_GPIO_H_ - -#ifdef CONFIG_SYS_GPIO_BASE -#include <asm/io.h> - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return 0; -} - -static inline int gpio_free(unsigned gpio) -{ - return 0; -} - -static inline int gpio_direction_input(unsigned gpio) -{ - writel(1, CONFIG_SYS_GPIO_BASE + (gpio << 2)); - return 0; -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); - return 0; -} - -static inline int gpio_get_value(unsigned gpio) -{ - return readl(CONFIG_SYS_GPIO_BASE + (gpio << 2)); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); -} - -static inline int gpio_is_valid(int number) -{ - return ((unsigned)number) < CONFIG_SYS_GPIO_WIDTH; -} -#else -#ifdef CONFIG_ALTERA_PIO -extern int altera_pio_init(u32 base, u8 width, char iot, - u32 rstval, u32 negmask, - const char *label); - -extern void altera_pio_info(void); -#define gpio_status() altera_pio_info() -#endif - -extern int gpio_request(unsigned gpio, const char *label); -extern int gpio_free(unsigned gpio); -extern int gpio_direction_input(unsigned gpio); -extern int gpio_direction_output(unsigned gpio, int value); -extern int gpio_get_value(unsigned gpio); -extern void gpio_set_value(unsigned gpio, int value); -extern int gpio_is_valid(int number); -#endif /* CONFIG_SYS_GPIO_BASE */ - -#endif /* _ASM_NIOS2_GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/board/altera/nios2-generic/nios2-generic.c b/board/altera/nios2-generic/nios2-generic.c index 384fee9..61d32c7 100644 --- a/board/altera/nios2-generic/nios2-generic.c +++ b/board/altera/nios2-generic/nios2-generic.c @@ -37,13 +37,6 @@ int board_early_init_f(void) int board_early_init_r(void) { -#ifdef CONFIG_ALTERA_PIO -#ifdef LED_PIO_BASE - altera_pio_init(LED_PIO_BASE, LED_PIO_WIDTH, 'o', - LED_PIO_RSTVAL, (1 << LED_PIO_WIDTH) - 1, - "led"); -#endif -#endif return 0; } diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig index 9dc6a72..ad72272 100644 --- a/configs/nios2-generic_defconfig +++ b/configs/nios2-generic_defconfig @@ -1,5 +1,6 @@ CONFIG_NIOS2=y CONFIG_DM_SERIAL=y +CONFIG_DM_GPIO=y CONFIG_TARGET_NIOS2_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard" CONFIG_HUSH_PARSER=y @@ -15,5 +16,6 @@ CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_ALTERA_PIO=y CONFIG_ALTERA_JTAG_UART=y CONFIG_ALTERA_JTAG_UART_BYPASS=y diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ef57a89..9e49471 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -14,6 +14,13 @@ config DM_GPIO particular GPIOs that they provide. The uclass interface is defined in include/asm-generic/gpio.h. +config ALTERA_PIO + bool "Altera PIO driver" + depends on DM_GPIO + help + Select this to enable PIO for Altera devices. Please find + details on the "Embedded Peripherals IP User Guide" of Altera. + config DWAPB_GPIO bool "DWAPB GPIO driver" depends on DM && DM_GPIO diff --git a/drivers/gpio/altera_pio.c b/drivers/gpio/altera_pio.c index 3ca5907..14a922b 100644 --- a/drivers/gpio/altera_pio.c +++ b/drivers/gpio/altera_pio.c @@ -1,286 +1,122 @@ /* - * Driver for Altera's PIO ip core - * + * Copyright (C) 2015 Thomas Chou <thomas(a)wytron.com.tw> * Copyright (C) 2011 Missing Link Electronics * Joachim Foerster <joachim(a)missinglinkelectronics.com> * * SPDX-License-Identifier: GPL-2.0+ - * - * To use this driver, in your board's config. header: - * #define CONFIG_ALTERA_PIO - * #define CONFIG_SYS_ALTERA_PIO_NUM <number-of-pio-cores> - * #define CONFIG_SYS_ALTERA_PIO_GPIO_NUM <total-number-of-gpios> - * And in your board's early setup routine: - * altera_pio_init(<baseaddr>, <width>, 'i'|'o'|'t', - * <reset-value>, <neg-mask>, "label"); - * - 'i'|'o'|'t': PIO is input-only/output-only/tri-state - * - <reset-value>: for correct initial status display, output-only - * - <neg-mask> is meant to be used to in cases of active-low - * GPIOs, such as LEDs and buttons (on/pressed == 0). Each bit - * which is 1 in <neg-mask> inverts the corresponding GPIO's value - * before set/after get. So: gpio_set_value(gpio, 1) => LED on . - * - * Do NOT define CONFIG_SYS_GPIO_BASE ! - * - * Optionally, in your board's config. header: - * - To force a GPIO numbering scheme like in Linux ... - * #define CONFIG_GPIO_DOWNTO_NUMBERING - * ... starting with 255 (default) - * #define CONFIG_GPIO_DOWNTO_MAX 255 */ #include <common.h> +#include <dm.h> +#include <errno.h> +#include <malloc.h> +#include <fdtdec.h> #include <asm/io.h> #include <asm/gpio.h> -#ifdef CONFIG_GPIO_DOWNTO_NUMBERING -#ifndef CONFIG_GPIO_DOWNTO_MAX -#define CONFIG_GPIO_DOWNTO_MAX 255 -#endif -#endif - -#define ALTERA_PIO_DATA 0x0 -#define ALTERA_PIO_DIR 0x4 - -#define GPIO_LABEL_SIZE 9 +DECLARE_GLOBAL_DATA_PTR; +struct altera_pio_regs { + u32 data; /* Data register */ + u32 direction; /* Direction register */ +}; -static struct altera_pio { - u32 base; - u8 width; - char iot; - u32 negmask; - u32 sh_data; - u32 sh_dir; - int gidx; - char label[GPIO_LABEL_SIZE]; -} pios[CONFIG_SYS_ALTERA_PIO_NUM]; +struct altera_pio_platdata { + struct altera_pio_regs *regs; + int gpio_count; + const char *bank_name; +}; -static int pio_num; - -static struct altera_pio_gpio { - unsigned num; - struct altera_pio *pio; - char reqlabel[GPIO_LABEL_SIZE]; -} gpios[CONFIG_SYS_ALTERA_PIO_GPIO_NUM]; - -static int pio_gpio_num; - - -static int altera_pio_gidx(unsigned gpio) +static int altera_pio_direction_input(struct udevice *dev, unsigned pin) { - int i; + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; - for (i = 0; i < pio_gpio_num; ++i) { - if (gpio == gpios[i].num) - break; - } - if (i >= pio_gpio_num) - return -1; - return i; -} + clrbits_le32(&regs->direction, 1 << pin); -static struct altera_pio *altera_pio_get_and_mask(unsigned gpio, u32 *mask) -{ - int gidx = altera_pio_gidx(gpio); - if (gidx < 0) - return NULL; - if (mask) - *mask = 1 << (gidx - gpios[gidx].pio->gidx); - return gpios[gidx].pio; + return 0; } -#define altera_pio_use_gidx(_gidx, _reqlabel) \ - { strncpy(gpios[_gidx].reqlabel, _reqlabel, GPIO_LABEL_SIZE); } -#define altera_pio_unuse_gidx(_gidx) { gpios[_gidx].reqlabel[0] = '\0'; } -#define altera_pio_is_gidx_used(_gidx) (gpios[_gidx].reqlabel[0] != '\0') - -static int altera_pio_gpio_init(struct altera_pio *pio, u8 width) +static int altera_pio_direction_output(struct udevice *dev, unsigned pin, + int val) { - u8 gidx = pio_gpio_num; - int i; - - if (!width) - return -1; - if ((pio_gpio_num + width) > CONFIG_SYS_ALTERA_PIO_GPIO_NUM) - return -1; - - for (i = 0; i < width; ++i) { -#ifdef CONFIG_GPIO_DOWNTO_NUMBERING - gpios[pio_gpio_num + i].num = \ - CONFIG_GPIO_DOWNTO_MAX + 1 - gidx - width + i; -#else - gpios[pio_gpio_num + i].num = pio_gpio_num + i; -#endif - gpios[pio_gpio_num + i].pio = pio; - altera_pio_unuse_gidx(pio_gpio_num + i); - } - pio_gpio_num += width; - return gidx; -} + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; -int altera_pio_init(u32 base, u8 width, char iot, u32 rstval, u32 negmask, - const char *label) -{ - if (pio_num >= CONFIG_SYS_ALTERA_PIO_NUM) - return -1; + if (val) + setbits_le32(&regs->data, 1 << pin); + else + clrbits_le32(&regs->data, 1 << pin); + /* change the data first, then the direction. to avoid glitch */ + setbits_le32(&regs->direction, 1 << pin); - pios[pio_num].base = base; - pios[pio_num].width = width; - pios[pio_num].iot = iot; - switch (iot) { - case 'i': - /* input only */ - pios[pio_num].sh_dir = 0; - pios[pio_num].sh_data = readl(base + ALTERA_PIO_DATA); - break; - case 'o': - /* output only */ - pios[pio_num].sh_dir = 0xffffffff & ((1 << width) - 1); - pios[pio_num].sh_data = rstval; - break; - case 't': - /* bidir, tri-state */ - pios[pio_num].sh_dir = readl(base + ALTERA_PIO_DIR); - pios[pio_num].sh_data = readl(base + ALTERA_PIO_DATA); - break; - default: - return -1; - } - pios[pio_num].negmask = negmask & ((1 << width) - 1); - pios[pio_num].gidx = altera_pio_gpio_init(&pios[pio_num], width); - if (pios[pio_num].gidx < 0) - return -1; - strncpy(pios[pio_num].label, label, GPIO_LABEL_SIZE); - return pio_num++; + return 0; } -void altera_pio_info(void) +static int altera_pio_get_value(struct udevice *dev, unsigned pin) { - int i; - int j; - int gidx; - u32 mask; + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; - for (i = 0; i < pio_num; ++i) { - printf("Altera PIO % 2d, @0x%08x, " - "width: %u, label: %s\n", - i, pios[i].base, pios[i].width, pios[i].label); - gidx = pios[i].gidx; - for (j = gidx; j < (gidx + pios[i].width); ++j) { - mask = 1 << (j - gidx); - printf("\tGPIO % 4d: %s %s [%c] %s\n", - gpios[j].num, - gpios[j].pio->sh_dir & mask ? "out" : " in", - gpio_get_value(gpios[j].num) ? "set" : "clr", - altera_pio_is_gidx_used(j) ? 'x' : ' ', - gpios[j].reqlabel); - } - } + return !!(readl(&regs->data) & (1 << pin)); } -int gpio_request(unsigned gpio, const char *label) +static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val) { - int gidx = altera_pio_gidx(gpio); - if (gidx < 0) - return gidx; - if (altera_pio_is_gidx_used(gidx)) - return -1; - - altera_pio_use_gidx(gidx, label); - return 0; -} + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; -int gpio_free(unsigned gpio) -{ - int gidx = altera_pio_gidx(gpio); - if (gidx < 0) - return gidx; - if (!altera_pio_is_gidx_used(gidx)) - return -1; + if (val) + setbits_le32(&regs->data, 1 << pin); + else + clrbits_le32(&regs->data, 1 << pin); - altera_pio_unuse_gidx(gidx); return 0; } -int gpio_direction_input(unsigned gpio) +static int altera_pio_probe(struct udevice *dev) { - u32 mask; - struct altera_pio *pio; + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct altera_pio_platdata *plat = dev_get_platdata(dev); - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return -1; - if (pio->iot == 'o') - return -1; + uc_priv->gpio_count = plat->gpio_count; + uc_priv->bank_name = plat->bank_name; - writel(pio->sh_dir &= ~mask, pio->base + ALTERA_PIO_DIR); return 0; } -int gpio_direction_output(unsigned gpio, int value) +static int altera_pio_ofdata_to_platdata(struct udevice *dev) { - u32 mask; - struct altera_pio *pio; + struct altera_pio_platdata *plat = dev_get_platdata(dev); - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return -1; - if (pio->iot == 'i') - return -1; + plat->regs = ioremap(dev_get_addr(dev), + sizeof(struct altera_pio_regs)); + plat->gpio_count = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "width", 0); + plat->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset, + "gpio-bank-name", NULL); - value = (pio->negmask & mask) ? !value : value; - if (value) - pio->sh_data |= mask; - else - pio->sh_data &= ~mask; - writel(pio->sh_data, pio->base + ALTERA_PIO_DATA); - writel(pio->sh_dir |= mask, pio->base + ALTERA_PIO_DIR); return 0; } -int gpio_get_value(unsigned gpio) -{ - u32 mask; - struct altera_pio *pio; - u32 val; - - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return -1; - - if ((pio->sh_dir & mask) || (pio->iot == 'o')) - val = pio->sh_data & mask; - else - val = readl(pio->base + ALTERA_PIO_DATA) & mask; - return (pio->negmask & mask) ? !val : val; -} - -void gpio_set_value(unsigned gpio, int value) -{ - u32 mask; - struct altera_pio *pio; - - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return; - if (pio->iot == 'i') - return; - - value = (pio->negmask & mask) ? !value : value; - if (value) - pio->sh_data |= mask; - else - pio->sh_data &= ~mask; - writel(pio->sh_data, pio->base + ALTERA_PIO_DATA); - return; -} - -int gpio_is_valid(int number) -{ - int gidx = altera_pio_gidx(number); - - if (gidx < 0) - return 1; - return 0; -} +static const struct dm_gpio_ops altera_pio_ops = { + .direction_input = altera_pio_direction_input, + .direction_output = altera_pio_direction_output, + .get_value = altera_pio_get_value, + .set_value = altera_pio_set_value, +}; + +static const struct udevice_id altera_pio_ids[] = { + { .compatible = "altr,pio-1.0" }, + { } +}; + +U_BOOT_DRIVER(altera_pio) = { + .name = "altera_pio", + .id = UCLASS_GPIO, + .of_match = altera_pio_ids, + .ops = &altera_pio_ops, + .ofdata_to_platdata = altera_pio_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct altera_pio_platdata), + .probe = altera_pio_probe, +}; diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index dcb90de..90ccbd1 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -33,26 +33,6 @@ #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_TIMER_FREQ /* - * STATUS LED - */ -#define CONFIG_ALTERA_PIO -#define CONFIG_SYS_ALTERA_PIO_NUM 1 -#define CONFIG_SYS_ALTERA_PIO_GPIO_NUM LED_PIO_WIDTH - -#define CONFIG_STATUS_LED /* Enable status driver */ -#define CONFIG_BOARD_SPECIFIC_LED -#define CONFIG_GPIO_LED /* Enable GPIO LED driver */ -#define CONFIG_GPIO /* Enable GPIO driver */ -#define LED_PIO_BASE USER_LED_PIO_8OUT_BASE -#define LED_PIO_WIDTH 8 -#define LED_PIO_RSTVAL 0xff - -#define STATUS_LED_BIT 0 /* Bit-0 on GPIO */ -#define STATUS_LED_STATE STATUS_LED_ON -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) /* 500 msec */ -#define STATUS_LED_BOOT STATUS_LED_BIT - -/* * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -- 2.1.4

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[U-Boot] [PATCH] nios2: add clear and set bits macros
by Thomas Chou 03 Oct '15

03 Oct '15

These macros can be used to clear and set multiple bits in a register using a single call. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/nios2/include/asm/io.h | 57 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h index b4bd20f..123e885 100644 --- a/arch/nios2/include/asm/io.h +++ b/arch/nios2/include/asm/io.h @@ -116,4 +116,61 @@ static inline void outsl (unsigned long port, const void *src, unsigned long cou while (count--) outl (*p++, port); } +/* + * Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single call. These macros can + * also be used to set a multiple-bit bit pattern using a mask, by + * specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) +#define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) + +#define out_le64(a,v) out_arch(q,le64,a,v) +#define out_le32(a,v) out_arch(l,le32,a,v) +#define out_le16(a,v) out_arch(w,le16,a,v) + +#define in_le64(a) in_arch(q,le64,a) +#define in_le32(a) in_arch(l,le32,a) +#define in_le16(a) in_arch(w,le16,a) + +#define out_be32(a,v) out_arch(l,be32,a,v) +#define out_be16(a,v) out_arch(w,be16,a,v) + +#define in_be32(a) in_arch(l,be32,a) +#define in_be16(a) in_arch(w,be16,a) + +#define out_8(a,v) __raw_writeb(v,a) +#define in_8(a) __raw_readb(a) + +#define clrbits(type, addr, clear) \ + out_##type((addr), in_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + out_##type((addr), in_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + #endif /* __ASM_NIOS2_IO_H_ */ -- 2.1.4

3 6

[U-Boot] [PATCH] serial: rockchip: make ROCKCHIP_SERIAL depend on ARCH_ROCKCHIP
by Masahiro Yamada 03 Oct '15

03 Oct '15

It looks like this line was copy-pasted, but not modified. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/serial/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index ccb80d2..ddb725d 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -111,7 +111,7 @@ config DEBUG_UART_SHIFT config ROCKCHIP_SERIAL bool "Rockchip on-chip UART support" - depends on ARCH_UNIPHIER && DM_SERIAL + depends on ARCH_ROCKCHIP && DM_SERIAL help Select this to enable a debug UART for Rockchip devices. This uses the ns16550 driver. You will need to #define CONFIG_SYS_NS16550 in -- 1.9.1

2 2

[U-Boot] [PATCH 1/2] sunxi: Add generic defconfigs for A23 Q8 tablets with 800x480 LCD
by Hans de Goede 03 Oct '15

03 Oct '15

The 7" Q8 tablet enclosure is used for a ton of slightly different cheap chinese tablets. There are some differences in which accelerometer / wifi is used, but other then that these are all the same from a u-boot / kernel pov. When we get to adding accelerometer support the plan is to add some kind of autodetection and mangle the dt accordingly (likely using the new quirks mechanism). For now this is a non issue as we do not yet have accelerometer support, and in the future, some sort of auto-detect is the way to go as we cannot expect users to exactly know what is inside their tablet. The dts files this commit adds are identical to the ones submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/sun8i-a23-q8-tablet.dts | 65 +++++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 1 + configs/q8_a23_tablet_800x480_defconfig | 25 +++++++++++++ 4 files changed, 93 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/sun8i-a23-q8-tablet.dts create mode 100644 configs/q8_a23_tablet_800x480_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b51c4c6..6a053cc 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -154,7 +154,8 @@ dtb-$(CONFIG_MACH_SUN8I_A23) += \ sun8i-a23-evb.dtb \ sun8i-a23-gt90h-v4.dtb \ sun8i-a23-ippo-q8h-v5.dtb \ - sun8i-a23-ippo-q8h-v1.2.dtb + sun8i-a23-ippo-q8h-v1.2.dtb \ + sun8i-a23-q8-tablet.dtb dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-a33-et-q8-v1.6.dtb \ sun8i-a33-ga10h-v1.1.dtb \ diff --git a/arch/arm/dts/sun8i-a23-q8-tablet.dts b/arch/arm/dts/sun8i-a23-q8-tablet.dts new file mode 100644 index 0000000..6062ea7 --- /dev/null +++ b/arch/arm/dts/sun8i-a23-q8-tablet.dts @@ -0,0 +1,65 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a23.dtsi" +#include "sun8i-q8-common.dtsi" + +/ { + model = "Q8 A23 Tablet"; + compatible = "allwinner,q8-a23", "allwinner,sun8i-a23"; +}; + +/* + * FIXME for now we only support host mode and rely on u-boot to have + * turned on Vbus which is controlled by the axp223 pmic on the board. + * + * Once we have axp223 support we should switch to fully supporting otg. + */ +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index f7a837a..67a9d29 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -50,6 +50,7 @@ F: configs/ga10h_v1_1_defconfig F: configs/gt90h_v4_defconfig F: configs/Ippo_q8h_v1_2_defconfig F: configs/Ippo_q8h_v1_2_a33_1024x600_defconfig +F: configs/q8_a23_tablet_800x480_defconfig F: configs/q8_a33_tablet_800x480_defconfig F: configs/q8_a33_tablet_1024x600_defconfig F: include/configs/sun9i.h diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig new file mode 100644 index 0000000..00c30dc --- /dev/null +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -0,0 +1,25 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_A23=y +CONFIG_DRAM_CLK=432 +CONFIG_DRAM_ZQ=63306 +CONFIG_MMC0_CD_PIN="PB4" +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_USB0_ID_DET="PH8" +CONFIG_AXP_GPIO=y +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:15,ri:211,up:10,lo:22,hs:30,vs:13,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_POWER="PH7" +CONFIG_VIDEO_LCD_BL_EN="PH6" +CONFIG_VIDEO_LCD_BL_PWM="PH0" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_AXP221_DLDO1_VOLT=3300 +CONFIG_AXP221_ALDO1_VOLT=3000 +CONFIG_USB_MUSB_HOST=y -- 2.5.0

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[U-Boot] Pull request: u-boot-net.git master
by Joe Hershberger 03 Oct '15

03 Oct '15

The following changes since commit 1f8836396de8215b7f460616926052b32597bb29: Prepare v2015.10-rc4 (2015-09-28 16:57:42 -0400) are available in the git repository at: git://git.denx.de/u-boot-net.git master for you to fetch changes up to 8ac46a98618ea21cf9900961fcff9cf803198271: sunxi: add NetConsole by default for Banana Pi/Pro (2015-09-29 21:54:46 -0500) ---------------------------------------------------------------- Bernhard Nortmann (5): net: expose eth_is_active() function to test network device state net: fix netconsole when CONFIG_DM_ETH is set net: avoid eth_unregister() call when function is unavailable net: support NETCONSOLE option via Kconfig sunxi: add NetConsole by default for Banana Pi/Pro Mugunthan V N (1): net: phy: on phy device create do not initialize link to 1 common/bootm.c | 2 ++ configs/Bananapi_defconfig | 1 + configs/Bananapro_defconfig | 1 + drivers/net/netconsole.c | 14 +++++++++++--- drivers/net/phy/phy.c | 2 +- include/net.h | 4 ++++ net/Kconfig | 6 ++++++ net/eth.c | 18 +++++++++++++++++- 8 files changed, 43 insertions(+), 5 deletions(-)

2 1

[U-Boot] Please pull u-boot-sunxi master
by Hans de Goede 03 Oct '15

03 Oct '15

Hi Tom, Here is a (the final?) sunxi pull-req for v2015.10, highlights: -Misc fixes / tweaks -Add support for 2 new boards The following changes since commit 1f8836396de8215b7f460616926052b32597bb29: Prepare v2015.10-rc4 (2015-09-28 16:57:42 -0400) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to 46f166caad48ed38f6ccc0c2fc6d1828d15dacb2: sunxi: Add generic defconfigs for A33 Q8 tablets with 1024x600 / 800x480 LCD (2015-09-29 11:50:44 +0200) ---------------------------------------------------------------- Bernhard Nortmann (4): sunxi: move SPL-related definitions to platform-specific include sunxi: (mksunxiboot) signature to indicate "sunxi" SPL variant sunxi: retrieve FEL-provided values to environment variables sunxi: add "fel" boot target Hans de Goede (7): sunxi: Rename A10s-Wobo-i5_defconfig to Wobo_i5_defconfig sunxi: sunxi-common.h cleanup sunxi: Tweak various memory addresses sunxi: Simplify spl board_init_f function sunxi_nand_spl: Be smarter about where to look for backup u-boot.bin sunxi: mmc: Fix clk-delay settings sunxi: Add generic defconfigs for A33 Q8 tablets with 1024x600 / 800x480 LCD arch/arm/cpu/armv7/sunxi/board.c | 8 +-- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-a33-q8-tablet.dts | 65 +++++++++++++++++ arch/arm/dts/sun8i-q8-common.dtsi | 84 ++++++++++++++++++++++ arch/arm/include/asm/arch-sunxi/spl.h | 54 ++++++++++---- board/sunxi/MAINTAINERS | 5 +- board/sunxi/board.c | 35 +++++++++ .../{A10s-Wobo-i5_defconfig => Wobo_i5_defconfig} | 0 configs/q8_a33_tablet_1024x600_defconfig | 25 +++++++ configs/q8_a33_tablet_800x480_defconfig | 25 +++++++ drivers/mmc/sunxi_mmc.c | 16 ++++- drivers/mtd/nand/sunxi_nand_spl.c | 26 +++++-- include/configs/sunxi-common.h | 42 +++++------ tools/mksunxiboot.c | 21 ++---- 14 files changed, 341 insertions(+), 66 deletions(-) create mode 100644 arch/arm/dts/sun8i-a33-q8-tablet.dts create mode 100644 arch/arm/dts/sun8i-q8-common.dtsi rename configs/{A10s-Wobo-i5_defconfig => Wobo_i5_defconfig} (100%) create mode 100644 configs/q8_a33_tablet_1024x600_defconfig create mode 100644 configs/q8_a33_tablet_800x480_defconfig Regards, Hans

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[U-Boot] Please pull u-boot-x86.git (take 2)
by Simon Glass 03 Oct '15

03 Oct '15

Hi Tom. This include one more bug fix. The following changes since commit 1f8836396de8215b7f460616926052b32597bb29: Prepare v2015.10-rc4 (2015-09-28 16:57:42 -0400) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to 196193a4d4963a8dde00c7cdd0ec83b60ea61e61: x86: fsp: Report correct number of E820 table entries (2015-09-28 21:56:27 -0700) ---------------------------------------------------------------- Bin Meng (1): x86: fsp: Report correct number of E820 table entries Simon Glass (1): x86: chromebook_link: Expand early malloc() memory arch/x86/lib/fsp/fsp_dram.c | 3 ++- configs/chromebook_link_defconfig | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) Regards, Simon

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