September 2015 - U-Boot

[U-Boot] [PATCH] imximage: fix commands other than write_data
by Troy Kisky 08 Oct '15

08 Oct '15

When CHECK_BITS_SET was added, they forgot to add a new command table, and instead overwrote the previous table. Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> --- Note: this needs tested to make sure imx7dsabresd still boots as its dcd header has changed diff --git a/tools/imximage.c b/tools/imximage.c index 0da48a7..97a6880 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -160,54 +160,80 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, } } +static struct dcd_v2_cmd *gd_last_cmd; + static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len, int32_t cmd) { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + struct dcd_v2_cmd *d = gd_last_cmd; + struct dcd_v2_cmd *d2; + int len; + + if (!d) + d = &dcd_v2->dcd_cmd; + d2 = d; + len = be16_to_cpu(d->write_dcd_command.length); + if (len > 4) + d2 = (struct dcd_v2_cmd *)(((char *)d) + len); switch (cmd) { case CMD_WRITE_DATA: - dcd_v2->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 4); - dcd_v2->write_dcd_command.param = DCD_WRITE_DATA_PARAM; + if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) && + (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM)) + break; + d = d2; + d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG; + d->write_dcd_command.length = cpu_to_be16(4); + d->write_dcd_command.param = DCD_WRITE_DATA_PARAM; break; case CMD_WRITE_CLR_BIT: - dcd_v2->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 4); - dcd_v2->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM; + if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) && + (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM)) + break; + d = d2; + d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG; + d->write_dcd_command.length = cpu_to_be16(4); + d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM; break; /* * Check data command only supports one entry, - * so use 0xC = size(address + value + command). */ case CMD_CHECK_BITS_SET: - dcd_v2->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16(0xC); - dcd_v2->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM; + d = d2; + d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG; + d->write_dcd_command.length = cpu_to_be16(4); + d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM; break; case CMD_CHECK_BITS_CLR: - dcd_v2->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16(0xC); - dcd_v2->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM; + d = d2; + d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG; + d->write_dcd_command.length = cpu_to_be16(4); + d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM; break; default: break; } + gd_last_cmd = d; } static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, int fld, uint32_t value, uint32_t off) { - dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + struct dcd_v2_cmd *d = gd_last_cmd; + int len; + + len = be16_to_cpu(d->write_dcd_command.length); + off = (len - 4) >> 3; switch (fld) { case CFG_REG_ADDRESS: - dcd_v2->addr_data[off].addr = cpu_to_be32(value); + d->addr_data[off].addr = cpu_to_be32(value); break; case CFG_REG_VALUE: - dcd_v2->addr_data[off].value = cpu_to_be32(value); + d->addr_data[off].value = cpu_to_be32(value); + off++; + d->write_dcd_command.length = cpu_to_be16((off << 3) + 4); break; default: break; @@ -236,12 +262,20 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, char *name, int lineno) { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + struct dcd_v2_cmd *d = gd_last_cmd; + int len; + + if (!d) + d = &dcd_v2->dcd_cmd; + len = be16_to_cpu(d->write_dcd_command.length); + if (len > 4) + d = (struct dcd_v2_cmd *)(((char *)d) + len); + + len = (char *)d - (char *)&dcd_v2->header; dcd_v2->header.tag = DCD_HEADER_TAG; - dcd_v2->header.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 8); + dcd_v2->header.length = cpu_to_be16(len); dcd_v2->header.version = DCD_VERSION; - set_dcd_param_v2(imxhdr, dcd_len, CMD_WRITE_DATA); } static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, @@ -314,6 +348,7 @@ static void set_hdr_func(void) max_dcd_entries = MAX_HW_CFG_SIZE_V1; break; case IMXIMAGE_V2: + gd_last_cmd = NULL; set_dcd_val = set_dcd_val_v2; set_dcd_param = set_dcd_param_v2; set_dcd_rst = set_dcd_rst_v2; diff --git a/tools/imximage.h b/tools/imximage.h index d41c74f..c7b9b5c 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -133,10 +133,14 @@ typedef struct { uint8_t param; } __attribute__((packed)) write_dcd_command_t; -typedef struct { - ivt_header_t header; +struct dcd_v2_cmd { write_dcd_command_t write_dcd_command; dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2]; +}; + +typedef struct { + ivt_header_t header; + struct dcd_v2_cmd dcd_cmd; uint32_t padding[1]; /* end up on an 8-byte boundary */ } dcd_v2_t; -- 1.9.1

3 9

[U-Boot] DWMMC crontroller in Exynos4412
by Humberto López León 08 Oct '15

08 Oct '15

Hi Simon, I'm working on implementing a driver for SD/MMC cards in the framework GenodeOS. I think you could help me with your experience in this type of implementation in the u-boot. The hardware platform on which the driver will work is a ODROID-x2 (exynos4412). I use the DWMMC contoller, but I'm not sure if this is the right controller to handle SD/MMC cards in Exynos4412 SoC. The SDHCI controller is most appropriate? Thank you for your help

4 12

[U-Boot] [PATCH 1/1] imximage: header.length of 4 is valid
by Troy Kisky 07 Oct '15

07 Oct '15

Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> --- tools/imximage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/imximage.c b/tools/imximage.c index 97a6880..7c21922 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -396,8 +396,8 @@ static void print_hdr_v2(struct imx_header *imx_hdr) dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table; uint32_t size, version; - size = be16_to_cpu(dcd_v2->header.length) - 8; - if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) { + size = be16_to_cpu(dcd_v2->header.length); + if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t)) + 8) { fprintf(stderr, "Error: Image corrupt DCD size %d exceed maximum %d\n", (uint32_t)(size / sizeof(dcd_addr_data_t)), -- 1.9.1

3 5

[U-Boot] [PATCH v3 0/4] Move tpm_tis_i2c to tpm_tis_infineon and convert last tpm driver to use DM_TPM
by Christophe Ricard 06 Oct '15

06 Oct '15

Hi Simon, This patch serie move tpm_tis_i2c driver to tpm_tis_infineon. It also convert the latest tpm driver tpm_atmel_twi to DM_TPM. In this version i am only adding mention to Tom Rini review Best Regards Christophe Changes in v3: - Adding mention to Tom Rini review Christophe Ricard (4): dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineon dm: tpm: Add Driver Model support for tpm_atmel_twi driver dm: tpm: Remove every compilation switch for TPM driver model dm: tpm: Every TPM drivers should depends on DM_TPM README | 4 +- common/cmd_tpm.c | 13 +--- configs/nyan-big_defconfig | 2 +- configs/peach-pi_defconfig | 2 +- configs/peach-pit_defconfig | 2 +- configs/snow_defconfig | 2 +- configs/spring_defconfig | 2 +- drivers/tpm/Kconfig | 10 +-- drivers/tpm/Makefile | 2 +- drivers/tpm/tpm_atmel_twi.c | 74 ++++++++++++++++------- drivers/tpm/{tpm_tis_i2c.c => tpm_tis_infineon.c} | 5 +- drivers/tpm/{tpm_tis_i2c.h => tpm_tis_infineon.h} | 0 include/tis.h | 60 ------------------ include/tpm.h | 6 -- lib/tpm.c | 20 +----- 15 files changed, 72 insertions(+), 132 deletions(-) rename drivers/tpm/{tpm_tis_i2c.c => tpm_tis_infineon.c} (99%) rename drivers/tpm/{tpm_tis_i2c.h => tpm_tis_infineon.h} (100%) delete mode 100644 include/tis.h -- 2.1.4

2 14

[U-Boot] [PATCH v4 1/3] bitops: Add support for order_base_2()
by Fabio Estevam 05 Oct '15

05 Oct '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> Add support for the order_base_2() macro (and its dependencies) from the Linux kernel. This is useful for the SPI NOR unlock function. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v3: - None arch/arm/include/asm/bitops.h | 56 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 9b78043..b9b6d21 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -108,6 +108,62 @@ static inline int __ilog2(unsigned int x) return generic_fls(x) - 1; } +static inline int fls64(__u64 x) +{ + if (x == 0) + return 0; + return generic_fls(x) + 1; +} + +static inline unsigned fls_long(unsigned long l) +{ + if (sizeof(l) == 4) + return generic_fls(l); + return fls64(l); +} + +/* + * round up to nearest power of two + */ +static inline __attribute__((const)) +unsigned long __roundup_pow_of_two(unsigned long n) +{ + return 1UL << fls_long(n - 1); +} + +/** + * roundup_pow_of_two - round the given value up to nearest power of two + * @n - parameter + * + * round the given value up to the nearest power of two + * - the result is undefined when n == 0 + * - this can be used to initialise global variables from constant data + */ +#define roundup_pow_of_two(n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n == 1) ? 1 : \ + (1UL << (__ilog2((n) - 1) + 1)) \ + ) : \ + __roundup_pow_of_two(n) \ +) + +/** + * order_base_2 - calculate the (rounded up) base 2 order of the argument + * @n: parameter + * + * The first few values calculated by this routine: + * ob2(0) = 0 + * ob2(1) = 0 + * ob2(2) = 1 + * ob2(3) = 2 + * ob2(4) = 2 + * ob2(5) = 3 + * ... and so on. + */ + +#define order_base_2(n) __ilog2(roundup_pow_of_two(n)) + /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. -- 1.9.1

2 6

[U-Boot] [PATCH 0/3] Fix fdt 'reg' parsing and unbreak Odroid U3
by Przemyslaw Marczak 05 Oct '15

05 Oct '15

Booting of Odroid U3 with SD card, ends with error: MMC: EXYNOS DWMMC: 0 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Generally this was broken, because of wrong addresses assigned to GPIOs. The source of the problem was in rework of lib/fdtdec.c, after which function fdtdec_get_addr() doesn't work as previous and function dev_get_addr() doesn't works as expected. The code after rework in lib/fdtdec.c assume, that #size-cells property, should be always greater or equal to 1. This was wrong, because it can be 0. In case of debugging the issue I found, that mmc clock was computed wrong, for Exynos4, because of function get_mmc_clk(), which always return -1 for this SoC. Tested on: Odroid U3 and Odroid XU3. Przemyslaw Marczak (3): fix: fdtdec: allow parse 'reg' property with zero value in '#size-cells' fix: s5p_gpio: call: dev_get_addr() instead of fdtdec_get_addr() fix: mach-exynos: clock: restore calling dead exynos4_get_mmc_clk() arch/arm/mach-exynos/clock.c | 10 ++++------ drivers/gpio/s5p_gpio.c | 18 +++++++++++------- lib/fdtdec.c | 2 +- 3 files changed, 16 insertions(+), 14 deletions(-) -- 1.9.1

6 41

[U-Boot] [PATCH v2] zynq-common: Define spi args offset and size
by Siva Durga Prasad Paladugu 04 Oct '15

04 Oct '15

Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL spi mode. These macros defines the device tree offset, size and the kernel image offset in flash respectively. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- Changes for v2: - Moved the configs under SPI-SPL as per review comment. - Updated the commit message with description of the configs. - Placed the kernel offset at 0x200000. - This patch is based on u-boot-spi/master branch --- include/configs/zynq-common.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index f6dd03b..45dafe2 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -355,6 +355,10 @@ #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 +#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 +#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 +#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ + CONFIG_SYS_SPI_ARGS_SIZE) #endif /* for booting directly linux */ -- 1.7.1

3 5

[U-Boot] [PATCH] spi: ignore set speed and mode if not available
by Thomas Chou 04 Oct '15

04 Oct '15

Some cores, such as Altera SPI and QuadSPI, can not change speed and mode at runtime. Ignore the operation which is not available. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- drivers/spi/spi-uclass.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index d666272..5298073 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -21,13 +21,11 @@ DECLARE_GLOBAL_DATA_PTR; static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) { struct dm_spi_ops *ops; - int ret; + int ret = 0; ops = spi_get_ops(bus); if (ops->set_speed) ret = ops->set_speed(bus, speed); - else - ret = -EINVAL; if (ret) { printf("Cannot set speed (err=%d)\n", ret); return ret; @@ -35,8 +33,6 @@ static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) if (ops->set_mode) ret = ops->set_mode(bus, mode); - else - ret = -EINVAL; if (ret) { printf("Cannot set mode (err=%d)\n", ret); return ret; -- 2.1.4

4 6

[U-Boot] [PATCH] nios2: convert nios2 cpu to driver model
by Thomas Chou 04 Oct '15

04 Oct '15

Convert nios2 cpu to driver model. The cpu parameters are extracted from device tree and saved to global data structure. We will use them to replace the custom_fpga.h . Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/Kconfig | 3 ++ arch/nios2/cpu/cpu.c | 80 ++++++++++++++++++++++++++++++++++-- arch/nios2/dts/3c120_devboard.dts | 1 + arch/nios2/include/asm/global_data.h | 8 ++++ configs/nios2-generic_defconfig | 2 - 5 files changed, 89 insertions(+), 5 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 207c778..9be1538 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -64,6 +64,9 @@ config NIOS2 select HAVE_GENERIC_BOARD select SYS_GENERIC_BOARD select SUPPORT_OF_CONTROL + select OF_CONTROL + select DM + select CPU config OPENRISC bool "OpenRISC architecture" diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c index 39ae972..f2cb022 100644 --- a/arch/nios2/cpu/cpu.c +++ b/arch/nios2/cpu/cpu.c @@ -6,7 +6,9 @@ */ #include <common.h> -#include <asm/nios2.h> +#include <cpu.h> +#include <dm.h> +#include <errno.h> #include <asm/cache.h> DECLARE_GLOBAL_DATA_PTR; @@ -51,10 +53,82 @@ void dcache_disable(void) flush_dcache(CONFIG_SYS_DCACHE_SIZE, CONFIG_SYS_DCACHELINE_SIZE); } -int arch_cpu_init(void) +int arch_cpu_init_dm(void) { - gd->cpu_clk = CONFIG_SYS_CLK_FREQ; + struct udevice *dev; + + uclass_first_device(UCLASS_CPU, &dev); gd->ram_size = CONFIG_SYS_SDRAM_SIZE; return 0; } + +static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size) +{ + const char *cpu_name = "Nios-II"; + + if (size < strlen(cpu_name)) + return -ENOSPC; + strcpy(buf, cpu_name); + + return 0; +} + +static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info) +{ + + info->cpu_freq = gd->cpu_clk; + info->features = 1 << CPU_FEAT_L1_CACHE + | (gd->arch.has_mmu ? 1 << CPU_FEAT_MMU : 0); + + return 0; +} + +static int altera_nios2_get_count(struct udevice *dev) +{ + return 1; +} + +static int altera_nios2_probe(struct udevice *dev) +{ + gd->cpu_clk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "clock-frequency", 0); + gd->arch.dcache_line_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "dcache-line-size", 0); + gd->arch.icache_line_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "icache-line-size", 0); + gd->arch.dcache_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "dcache-size", 0); + gd->arch.icache_size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "icache-size", 0); + gd->arch.reset_addr = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "altr,reset-addr", 0); + gd->arch.exception_addr = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "altr,exception-addr", 0); + gd->arch.has_mmu = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "altr,has-mmu", 0); + gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x8000000; + + return 0; +} + +static const struct cpu_ops altera_nios2_ops = { + .get_desc = altera_nios2_get_desc, + .get_info = altera_nios2_get_info, + .get_count = altera_nios2_get_count, +}; + +static const struct udevice_id altera_nios2_ids[] = { + { .compatible = "altr,nios2-1.0" }, + { .compatible = "altr,nios2-1.1" }, + { } +}; + +U_BOOT_DRIVER(altera_nios2) = { + .name = "altera_nios2", + .id = UCLASS_CPU, + .of_match = altera_nios2_ids, + .probe = altera_nios2_probe, + .ops = &altera_nios2_ops, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts index 781a652..2e2956f 100644 --- a/arch/nios2/dts/3c120_devboard.dts +++ b/arch/nios2/dts/3c120_devboard.dts @@ -41,6 +41,7 @@ altr,exception-addr = <0xd0000020>; altr,has-initda = <1>; altr,has-mmu = <1>; + u-boot,dm-pre-reloc; }; }; diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h index 580b019..ee5180b 100644 --- a/arch/nios2/include/asm/global_data.h +++ b/arch/nios2/include/asm/global_data.h @@ -9,6 +9,14 @@ /* Architecture-specific global data */ struct arch_global_data { + u32 dcache_line_size; + u32 icache_line_size; + u32 dcache_size; + u32 icache_size; + u32 reset_addr; + u32 exception_addr; + int has_mmu; + u32 io_region_base; }; #include <asm-generic/global_data.h> diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig index ad72272..63d99d8 100644 --- a/configs/nios2-generic_defconfig +++ b/configs/nios2-generic_defconfig @@ -13,9 +13,7 @@ CONFIG_HUSH_PARSER=y CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y -CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_ALTERA_PIO=y CONFIG_ALTERA_JTAG_UART=y CONFIG_ALTERA_JTAG_UART_BYPASS=y -- 2.1.4

4 12

[U-Boot] [PATCH 1/2] gpio: tegra: remove unused type
by Stephen Warren 03 Oct '15

03 Oct '15

From: Stephen Warren <swarren(a)nvidia.com> These enum values aren't used anywhere. Remove them. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- This series depends on my previous "ARM: tegra: don't enable GPIOs until direction is set" drivers/gpio/tegra_gpio.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c index 2dfd02d62053..f9c06fe88b71 100644 --- a/drivers/gpio/tegra_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -25,13 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; -enum { - TEGRA_CMD_INFO, - TEGRA_CMD_PORT, - TEGRA_CMD_OUTPUT, - TEGRA_CMD_INPUT, -}; - struct tegra_gpio_platdata { struct gpio_ctlr_bank *bank; const char *port_name; /* Name of port, e.g. "B" */ -- 1.9.1

2 6