September 2015 - U-Boot

[U-Boot] [PATCH 0/5] sbc8641d: misc fixes and generic board enablement
by Paul Gortmaker 18 Oct '15

18 Oct '15

The sbc8641d is not really a state of the art board anymore, but it does have the distinctive feature of being one of the relatively few SMP powerpc boards around. Combined with its small form factor, it remains a useful testing platform. So here we enable the generic board support so that it can remain in tree. One note worthy of mention is that the same commit that breaks[1] the sbc8548 board [commit 294b91a58171 ("Set up stdio earlier when using driver model")] also breaks this board in the identical way (hangs at "Net:" line during bootup). So the baseline for run time testing was one commit prior to that commit that introduced the regressions. The fixes are all board specific and a branch off 294b91a58171~ will merge seamlessly to master, or they can be applied to master; whenever the regressions of 294b91a58171 are resolved then things will work again on the tip of tree. [1] https://www.marc.info/?l=u-boot&m=142655649417364&w=3 Paul Gortmaker (5): sbc8641d: enable command line editing sbc8641d: increase malloc pool size to a sane default sbc8641d: set proper environment sector size. sbc8641d: add basic flash setup instructions to README file sbc8641d: enable and test CONFIG_SYS_GENERIC_BOARD board/sbc8641d/README | 21 +++++++++++++++++++++ include/configs/sbc8641d.h | 7 +++++-- 2 files changed, 26 insertions(+), 2 deletions(-) -- 2.1.0

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[U-Boot] [PATCH 00/10] x86: Early debug enhancements
by Simon Glass 18 Oct '15

18 Oct '15

This series adds a few more features to the debug UART, making it possible to use it even when the board needs to perform additional init for the UART to work. The debug UART is anabled on link. Some minor PCI tidy-ups are also included. Link currently does not boot due to lack of early malloc() memory. For now just increase the size. Simon Glass (10): x86: chromebook_link: Expand early malloc() memory malloc_simple: Add debug() information dm: pci: Tidy up auto-config error handling dm: pci: Correct a few debug() statements dm: pci: Adjust pci_find_and_bind_driver() to return -EPERM debug_uart: Adjust the declaration of debug_uart_init() debug_uart: Support board-specific UART initialisation debug_uart: Add an option to announce the debug UART x86: Init the debug UART if enabled x86: chromebook_link: Enable the debug UART arch/x86/cpu/ivybridge/cpu.c | 7 ++++++ arch/x86/cpu/start.S | 3 +++ common/malloc_simple.c | 4 ++++ configs/chromebook_link_defconfig | 11 ++++++--- drivers/pci/pci-uclass.c | 50 ++++++++++++++++++++++++++------------- drivers/serial/Kconfig | 21 ++++++++++++++++ drivers/serial/ns16550.c | 2 +- drivers/serial/serial_efi.c | 2 +- drivers/serial/serial_s5p.c | 2 +- include/debug_uart.h | 30 +++++++++++++++++++++-- lib/efi/efi_stub.c | 2 +- 11 files changed, 108 insertions(+), 26 deletions(-) -- 2.6.0.rc0.131.gf624c3d

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[U-Boot] [PATCH v2 1/2] bitops: Add support for order_base_2()
by Fabio Estevam 16 Oct '15

16 Oct '15

Add support for the order_base_2() macro (and its dependencies) from the Linux kernel. This is useful for the SPI NOR unlock function. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - None. arch/arm/include/asm/bitops.h | 56 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 9b78043..b9b6d21 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -108,6 +108,62 @@ static inline int __ilog2(unsigned int x) return generic_fls(x) - 1; } +static inline int fls64(__u64 x) +{ + if (x == 0) + return 0; + return generic_fls(x) + 1; +} + +static inline unsigned fls_long(unsigned long l) +{ + if (sizeof(l) == 4) + return generic_fls(l); + return fls64(l); +} + +/* + * round up to nearest power of two + */ +static inline __attribute__((const)) +unsigned long __roundup_pow_of_two(unsigned long n) +{ + return 1UL << fls_long(n - 1); +} + +/** + * roundup_pow_of_two - round the given value up to nearest power of two + * @n - parameter + * + * round the given value up to the nearest power of two + * - the result is undefined when n == 0 + * - this can be used to initialise global variables from constant data + */ +#define roundup_pow_of_two(n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n == 1) ? 1 : \ + (1UL << (__ilog2((n) - 1) + 1)) \ + ) : \ + __roundup_pow_of_two(n) \ +) + +/** + * order_base_2 - calculate the (rounded up) base 2 order of the argument + * @n: parameter + * + * The first few values calculated by this routine: + * ob2(0) = 0 + * ob2(1) = 0 + * ob2(2) = 1 + * ob2(3) = 2 + * ob2(4) = 2 + * ob2(5) = 3 + * ... and so on. + */ + +#define order_base_2(n) __ilog2(roundup_pow_of_two(n)) + /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. -- 1.9.1

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[U-Boot] [PATCH] arm: mmu: Add missing volatile for reading SCTLR register
by Alison Wang 16 Oct '15

16 Oct '15

When building u-boot with the latest Linaro toolchain, such as gcc-linaro-4.9, u-boot will hang at PCIE init on LS1021A platform. The issue is reported on http://comments.gmane.org/gmane.linux.linaro.toolchain/5163. As volatile is missing when reading SCTLR register and SCTLR is set according to the value read from SCTLR, it causes CR_M bit is not set. Then MMU is not enabled, the access to VA for PCIE fails. This patch will add the missing volatile for reading SCTLR register. Signed-off-by: Alison Wang <alison.wang(a)freescale.com> --- arch/arm/include/asm/system.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 89f2294..f5096dc 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -155,7 +155,7 @@ void flush_l3_cache(void); static inline unsigned int get_cr(void) { unsigned int val; - asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); + asm volatile("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); return val; } -- 2.1.0.27.g96db324

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[U-Boot] [PATCH 1/3] armv8/mmu: Clean up TCR programming
by Thierry Reding 15 Oct '15

15 Oct '15

From: Thierry Reding <treding(a)nvidia.com> Use the inner shareable attribute for memory, which makes more sense considering that this code is called when caches are being enabled. Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Marc Zyngier <marc.zyngier(a)arm.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> --- arch/arm/include/asm/armv8/mmu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 04fa0be64ca3..6d42f5533a74 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -102,9 +102,9 @@ #define TCR_EL2_IPS_BITS (3 << 16) /* 42 bits physical address */ #define TCR_EL3_IPS_BITS (3 << 16) /* 42 bits physical address */ -/* PTWs cacheable, inner/outer WBWA and non-shareable */ +/* PTWs cacheable, inner/outer WBWA and inner shareable */ #define TCR_FLAGS (TCR_TG0_64K | \ - TCR_SHARED_NON | \ + TCR_SHARED_INNER | \ TCR_ORGN_WBWA | \ TCR_IRGN_WBWA | \ TCR_T0SZ(VA_BITS)) -- 2.4.5

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[U-Boot] [PATCH] ARM: uniphier: fix address mapping in README.uniphier
by Masahiro Yamada 15 Oct '15

15 Oct '15

Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- doc/README.uniphier | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/doc/README.uniphier b/doc/README.uniphier index 6ba0320..57b947b 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -129,10 +129,10 @@ as follows: BKSZ Description RAM slot Peripherals -------------------------------------------------------------------- - 0b00 15MB RAM / 1MB Peri 00000000-0effffff 0f000000-0fffffff - 0b01 31MB RAM / 1MB Peri 00000000-1effffff 1f000000-1fffffff - 0b10 64MB RAM / 1MB Peri 00000000-3effffff 3f000000-3fffffff - 0b11 127MB RAM / 1MB Peri 00000000-7effffff 7f000000-7fffffff + 0b00 15MB RAM / 1MB Peri 00000000-00efffff 00f00000-00ffffff + 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff + 0b10 64MB RAM / 1MB Peri 00000000-03efffff 03f00000-03ffffff + 0b11 127MB RAM / 1MB Peri 00000000-07efffff 07f00000-07ffffff Set BSKZ[1:0] to 0b01 for U-Boot. This mode is the most handy because EA[24] is always supported by the save pin -- 1.9.1

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[U-Boot] [PATCH] powerpc/t4240qds: add support of reading Core voltage
by shh.xie＠gmail.com 15 Oct '15

15 Oct '15

From: Shaohui Xie <Shaohui.Xie(a)freescale.com> A U-boot CMD vdd_read is implemented to read Core voltage. Signed-off-by: Shaohui Xie <Shaohui.Xie(a)freescale.com> --- board/freescale/t4qds/t4240qds.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/board/freescale/t4qds/t4240qds.c b/board/freescale/t4qds/t4240qds.c index 4f2cccd..56273e4 100644 --- a/board/freescale/t4qds/t4240qds.c +++ b/board/freescale/t4qds/t4240qds.c @@ -887,8 +887,38 @@ static int do_vdd_adjust(cmd_tbl_t *cmdtp, return 0; } +static int do_vdd_read(cmd_tbl_t *cmdtp, + int flag, int argc, + char * const argv[]) +{ + int vdd, ret; + + if (argc < 1) + return CMD_RET_USAGE; + + ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR); + if (ret) { + printf("VID: I2c failed to switch channel\n"); + return 0; + } + + vdd = read_voltage(); + if (vdd < 0) + printf("VID: Could not read voltage\n"); + else + printf("VID: Core voltage is at %d mV\n", vdd); + + return 0; +} + U_BOOT_CMD( vdd_override, 2, 0, do_vdd_adjust, "Override VDD", "- override with the voltage specified in mV, eg. 1050" ); + +U_BOOT_CMD( + vdd_read, 1, 0, do_vdd_read, + "read VDD", + " - Read the voltage specified in mV" +) -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] ls1021atwr: sdboot: change serdes 0x20 to 0x30
by Yuan Yao 14 Oct '15

14 Oct '15

For LS1021ATWR board in order to support SATA(Gen 3), SerDes Lan B will be connect to SATA directly. So SerDes 0x20 can't support 2SGMII at the same time. In order to support two SGMII and one RGMII at the same time, we used 0x30 to replace 0x20. Signed-off-by: Yuan Yao <yao.yuan(a)freescale.com> --- board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg b/board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg index 9c3e3b0..3d40528 100644 --- a/board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg +++ b/board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg @@ -3,12 +3,12 @@ aa55aa55 01ee0100 #enable IFC, disable QSPI and DSPI 0608000a 00000000 00000000 00000000 -20000000 00407900 60040a00 21046000 -00000000 00000000 00000000 00038000 +30000000 00407900 60040a00 21046000 +00000000 00000000 00000000 20038000 00080000 881b7340 00000000 00000000 #disable IFC, enable QSPI and DSPI #0608000a 00000000 00000000 00000000 -#20000000 00407900 60040a00 21046000 -#00000000 00000000 00000000 00038000 +#30000000 00407900 60040a00 21046000 +#00000000 00000000 00000000 20038000 #20084800 881b7340 00000000 00000000 -- 2.1.0.27.g96db324

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[U-Boot] [PATCH 1/2] dm: implement a Miscellaneous uclass
by Thomas Chou 13 Oct '15

13 Oct '15

Implement a Miscellaneous uclass with generic read or write operations. This class is used only for those do not fit other more general classes. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- drivers/misc/Kconfig | 6 ++++++ drivers/misc/Makefile | 1 + drivers/misc/misc-uclass.c | 14 ++++++++++++++ include/dm/uclass-id.h | 1 + 4 files changed, 22 insertions(+) create mode 100644 drivers/misc/misc-uclass.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 8b38a84..51c2a08 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -4,6 +4,12 @@ menu "Multifunction device drivers" +config DM_MISC + bool "Enable Driver Model for Misc drivers" + depends on DM + help + Enable driver model for miscellaneous devices. + config CMD_CROS_EC bool "Enable crosec command" depends on CROS_EC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 8d0fc3c..b285946 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -5,6 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_DM_MISC) += misc-uclass.o obj-$(CONFIG_ALI152X) += ali512x.o obj-$(CONFIG_DS4510) += ds4510.o obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c new file mode 100644 index 0000000..40fe947 --- /dev/null +++ b/drivers/misc/misc-uclass.c @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2010 Thomas Chou <thomas(a)wytron.com.tw> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <misc.h> + +UCLASS_DRIVER(misc) = { + .id = UCLASS_MISC, + .name = "misc", +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index aff34a4..a6982ab 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -39,6 +39,7 @@ enum uclass_id { UCLASS_LED, /* Light-emitting diode (LED) */ UCLASS_LPC, /* x86 'low pin count' interface */ UCLASS_MASS_STORAGE, /* Mass storage device */ + UCLASS_MISC, /* Miscellaneous device */ UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ UCLASS_PCH, /* x86 platform controller hub */ -- 2.1.4

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[U-Boot] [PATCH 0/2] Enhance Odroid board
by Guillaume GARDET 13 Oct '15

13 Oct '15

Those 2 patches enhances Odroid board support. * First patch replace 'fatload' command by 'load', to be able to use EXT* partitions while keeping FAT partition compatibility. * Second patch adds boot script (boot.scr) support. If no boot script are found, it boots as usual. Signed-off-by: Guillaume GARDET <guillaume.gardet(a)free.fr> Cc: Przemyslaw Marczak <p.marczak(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- Guillaume GARDET (2): odroid: replace 'fatload' with 'load' to be able to use EXT* partitions odroid: Add boot script (boot.scr) support include/configs/odroid.h | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) -- 1.8.4.5

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