August 2015 - U-Boot

[U-Boot] [PATCH 0/4] arm: rmobile: Stout board support and minor fixes
by Vladimir Barinov 31 Aug '15

31 Aug '15

This patch series adds the following: 1) sh-pfc: fix gpio input read 2) serial-sh: SCIFA interface for R-Car Gen2 SoCs 3) rmobile: add SCIFA port base offsets 4) rmobile: Add Stout board support Signed-off-by: Vladimir Barinov <vladimir.barinov(a)cogentembedded.com> --- arch/arm/cpu/armv7/rmobile/Kconfig | 8 arch/arm/include/asm/arch-rmobile/rcar-base.h | 3 board/renesas/stout/Kconfig | 12 board/renesas/stout/MAINTAINERS | 6 board/renesas/stout/Makefile | 11 board/renesas/stout/cpld.c | 167 + board/renesas/stout/cpld.h | 183 + board/renesas/stout/qos.c | 2435 ++++++++++++++++++++++++++ board/renesas/stout/qos.h | 14 board/renesas/stout/stout.c | 232 ++ configs/stout_defconfig | 21 drivers/gpio/sh_pfc.c | 3 drivers/serial/serial_sh.h | 43 include/configs/stout.h | 112 + 14 files changed, 3239 insertions(+), 11 deletions(-)

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Re: [U-Boot] [PATCH 24/45] arm: Remove openrd boards
by Prafulla Wadaskar 31 Aug '15

31 Aug '15

Cced maintainer for this board, Simon Kagstrom Regards.... Prafulla. . . (Sent from smartphone, apologies for typos, if any) On 31-Aug-2015 7:07 am, Simon Glass <sjg(a)chromium.org> wrote: These boards have not been converted to generic board by the deadline. Remove them. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- arch/arm/mach-kirkwood/Kconfig | 4 - board/Marvell/openrd/Kconfig | 12 --- board/Marvell/openrd/MAINTAINERS | 12 --- board/Marvell/openrd/Makefile | 14 ---- board/Marvell/openrd/kwbimage.cfg | 152 ----------------------------------- board/Marvell/openrd/openrd.c | 161 -------------------------------------- board/Marvell/openrd/openrd.h | 30 ------- configs/openrd_base_defconfig | 7 -- configs/openrd_client_defconfig | 7 -- configs/openrd_ultimate_defconfig | 7 -- include/configs/openrd.h | 137 -------------------------------- 11 files changed, 543 deletions(-) delete mode 100644 board/Marvell/openrd/Kconfig delete mode 100644 board/Marvell/openrd/MAINTAINERS delete mode 100644 board/Marvell/openrd/Makefile delete mode 100644 board/Marvell/openrd/kwbimage.cfg delete mode 100644 board/Marvell/openrd/openrd.c delete mode 100644 board/Marvell/openrd/openrd.h delete mode 100644 configs/openrd_base_defconfig delete mode 100644 configs/openrd_client_defconfig delete mode 100644 configs/openrd_ultimate_defconfig delete mode 100644 include/configs/openrd.h diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index ae29a11..9c6e398 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -4,9 +4,6 @@ choice prompt "Marvell Kirkwood board select" optional -config TARGET_OPENRD - bool "Marvell OpenRD Board" - config TARGET_RD6281A bool "RD6281A Board" @@ -54,7 +51,6 @@ endchoice config SYS_SOC default "kirkwood" -source "board/Marvell/openrd/Kconfig" source "board/Marvell/rd6281a/Kconfig" source "board/Marvell/dreamplug/Kconfig" source "board/Marvell/guruplug/Kconfig" diff --git a/board/Marvell/openrd/Kconfig b/board/Marvell/openrd/Kconfig deleted file mode 100644 index 124b66d..0000000 --- a/board/Marvell/openrd/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_OPENRD - -config SYS_BOARD - default "openrd" - -config SYS_VENDOR - default "Marvell" - -config SYS_CONFIG_NAME - default "openrd" - -endif diff --git a/board/Marvell/openrd/MAINTAINERS b/board/Marvell/openrd/MAINTAINERS deleted file mode 100644 index 7a189ab..0000000 --- a/board/Marvell/openrd/MAINTAINERS +++ /dev/null @@ -1,12 +0,0 @@ -OPENRD BOARD -M: Prafulla Wadaskar <prafulla(a)marvell.com> -S: Maintained -F: board/Marvell/openrd/ -F: include/configs/openrd.h -F: configs/openrd_base_defconfig - -OPENRD_CLIENT BOARD -#M: - -S: Maintained -F: configs/openrd_client_defconfig -F: configs/openrd_ultimate_defconfig diff --git a/board/Marvell/openrd/Makefile b/board/Marvell/openrd/Makefile deleted file mode 100644 index 8f95b79..0000000 --- a/board/Marvell/openrd/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# -# (C) Copyright 2009 -# Net Insight <www.netinsight.net<http://www.netinsight.net>> -# Written-by: Simon Kagstrom <simon.kagstrom(a)netinsight.net> -# -# Based on sheevaplug: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com<http://www.marvell.com>> -# Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := openrd.o diff --git a/board/Marvell/openrd/kwbimage.cfg b/board/Marvell/openrd/kwbimage.cfg deleted file mode 100644 index 8e59937..0000000 --- a/board/Marvell/openrd/kwbimage.cfg +++ /dev/null @@ -1,152 +0,0 @@ -# -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com<http://www.marvell.com>> -# Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> -# -# SPDX-License-Identifier: GPL-2.0+ -# -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -# - -# Boot Media configurations -BOOT_FROM nand -NAND_ECC_MODE default -NAND_PAGE_SIZE 0x0800 - -# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed - -# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1b1b1b9b - -#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000c30 # DDR Configuration register -# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01 - -DATA 0xFFD01404 0x37543000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay - -DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) -# bit3-0: TRAS lsbs -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP - -DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required - -DATA 0xFFD01410 0x000000cc # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 11, Cs0size=1Gb -# bit5-4: 00, Cs1width=x8 -# bit7-6: 11, Cs1size=1Gb -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required - -DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required - -DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required - -DATA 0xFFD0141C 0x00000C52 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required - -DATA 0xFFD01420 0x00000042 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strength reduced -# bit2: 0, DDR ODT control lsd (disabled) -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, (disabled) -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required - -DATA 0xFFD01424 0x0000F17F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 0 -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required - -DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) - -DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x0F, Size (i.e. 256MB) - -DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb -DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1 - -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled - -DATA 0xFFD01494 0x00120012 # DDR ODT Control (Low) -# bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1 -# bit7-4: 0001, (read) M_ODT[1] is asserted during read from DRAM CS0 -# bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1. -# bit23-20: 0001, (write) M_ODT[1] is asserted during write to DRAM CS0. -DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) - -DATA 0xFFD0149C 0x0000E40f # CPU ODT Control -# bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3 -# bit11-10: 01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm -# bit13-12: 10, M_STARTBURST_IN I/O buffer ODT Select: 75 ohm -# bit14: 1, M_STARTBURST_IN ODT: Enabled -# bit15: 1, DDR IO ODT Unit: Use ODT block -DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write - -# End of Header extension -DATA 0x0 0x0 diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c deleted file mode 100644 index 55cf525..0000000 --- a/board/Marvell/openrd/openrd.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * (C) Copyright 2009 - * Net Insight <www.netinsight.net<http://www.netinsight.net>> - * Written-by: Simon Kagstrom <simon.kagstrom(a)netinsight.net> - * - * Based on sheevaplug.c: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com<http://www.marvell.com>> - * Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <miiphy.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> -#include <asm/arch/mpp.h> -#include "openrd.h" - -DECLARE_GLOBAL_DATA_PTR; - -int board_early_init_f(void) -{ - /* - * default gpio configuration - * There are maximum 64 gpios controlled through 2 sets of registers - * the below configuration configures mainly initial LED status - */ - mvebu_config_gpio(OPENRD_OE_VAL_LOW, - OPENRD_OE_VAL_HIGH, - OPENRD_OE_LOW, OPENRD_OE_HIGH); - - /* Multi-Purpose Pins Functionality configuration */ - static const u32 kwmpp_config[] = { - MPP0_NF_IO2, - MPP1_NF_IO3, - MPP2_NF_IO4, - MPP3_NF_IO5, - MPP4_NF_IO6, - MPP5_NF_IO7, - MPP6_SYSRST_OUTn, - MPP7_GPO, - MPP8_TW_SDA, - MPP9_TW_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP12_SD_CLK, - MPP13_SD_CMD, /* Alt UART1_TXD */ - MPP14_SD_D0, /* Alt UART1_RXD */ - MPP15_SD_D1, - MPP16_SD_D2, - MPP17_SD_D3, - MPP18_NF_IO0, - MPP19_NF_IO1, - MPP20_GE1_0, - MPP21_GE1_1, - MPP22_GE1_2, - MPP23_GE1_3, - MPP24_GE1_4, - MPP25_GE1_5, - MPP26_GE1_6, - MPP27_GE1_7, - MPP28_GPIO, - MPP29_TSMP9, - MPP30_GE1_10, - MPP31_GE1_11, - MPP32_GE1_12, - MPP33_GE1_13, - MPP34_GPIO, /* UART1 / SD sel */ - MPP35_TDM_CH0_TX_QL, - MPP36_TDM_SPI_CS1, - MPP37_TDM_CH2_TX_QL, - MPP38_TDM_CH2_RX_QL, - MPP39_AUDIO_I2SBCLK, - MPP40_AUDIO_I2SDO, - MPP41_AUDIO_I2SLRC, - MPP42_AUDIO_I2SMCLK, - MPP43_AUDIO_I2SDI, - MPP44_AUDIO_EXTCLK, - MPP45_TDM_PCLK, - MPP46_TDM_FS, - MPP47_TDM_DRX, - MPP48_TDM_DTX, - MPP49_TDM_CH0_RX_QL, - 0 - }; - - kirkwood_mpp_conf(kwmpp_config, NULL); - return 0; -} - -int board_init(void) -{ - /* - * arch number of board - */ -#if defined(CONFIG_BOARD_IS_OPENRD_BASE) - gd->bd->bi_arch_number = MACH_TYPE_OPENRD_BASE; -#elif defined(CONFIG_BOARD_IS_OPENRD_CLIENT) - gd->bd->bi_arch_number = MACH_TYPE_OPENRD_CLIENT; -#elif defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE) - gd->bd->bi_arch_number = MACH_TYPE_OPENRD_ULTIMATE; -#endif - - /* adress of boot parameters */ - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - return 0; -} - -#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116/88E1121 PHY */ -void mv_phy_init(char *name) -{ - u16 reg; - u16 devadr; - - if (miiphy_set_current_dev(name)) - return; - - /* command to read PHY dev address */ - if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { - printf("Err..%s could not read PHY dev address\n", - __FUNCTION__); - return; - } - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, devadr); - - printf(PHY_NO" Initialized on %s\n", name); -} - -void reset_phy(void) -{ - mv_phy_init("egiga0"); - -#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT - /* Kirkwood ethernet driver is written with the assumption that in case - * of multiple PHYs, their addresses are consecutive. But unfortunately - * in case of OpenRD-Client, PHY addresses are not consecutive.*/ - miiphy_write("egiga1", 0xEE, 0xEE, 24); -#endif - -#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) || \ - defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE) - /* configure and initialize both PHY's */ - mv_phy_init("egiga1"); -#endif -} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/openrd/openrd.h b/board/Marvell/openrd/openrd.h deleted file mode 100644 index 56dfeea..0000000 --- a/board/Marvell/openrd/openrd.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * (C) Copyright 2009 - * Net Insight <www.netinsight.net<http://www.netinsight.net>> - * Written-by: Simon Kagstrom <simon.kagstrom(a)netinsight.net> - * - * Based on sheevaplug.h: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com<http://www.marvell.com>> - * Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __OPENRD_BASE_H -#define __OPENRD_BASE_H - -#define OPENRD_OE_LOW (~(1<<28)) /* RS232 / RS485 */ -#define OPENRD_OE_HIGH (~(1<<2)) /* SD / UART1 */ -#define OPENRD_OE_VAL_LOW (0) /* Sel RS232 */ -#define OPENRD_OE_VAL_HIGH (1 << 2) /* Sel SD */ - -/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#endif /* __OPENRD_BASE_H */ diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig deleted file mode 100644 index 1686139..0000000 --- a/configs/openrd_base_defconfig +++ /dev/null @@ -1,7 +0,0 @@ -CONFIG_ARM=y -CONFIG_KIRKWOOD=y -CONFIG_TARGET_OPENRD=y -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_SETEXPR is not set diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig deleted file mode 100644 index c342315..0000000 --- a/configs/openrd_client_defconfig +++ /dev/null @@ -1,7 +0,0 @@ -CONFIG_ARM=y -CONFIG_KIRKWOOD=y -CONFIG_TARGET_OPENRD=y -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_SETEXPR is not set diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig deleted file mode 100644 index 530ba4d..0000000 --- a/configs/openrd_ultimate_defconfig +++ /dev/null @@ -1,7 +0,0 @@ -CONFIG_ARM=y -CONFIG_KIRKWOOD=y -CONFIG_TARGET_OPENRD=y -CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_SETEXPR is not set diff --git a/include/configs/openrd.h b/include/configs/openrd.h deleted file mode 100644 index 7211314..0000000 --- a/include/configs/openrd.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * (C) Copyright 2009 - * Net Insight <www.netinsight.net<http://www.netinsight.net>> - * Written-by: Simon Kagstrom <simon.kagstrom(a)netinsight.net> - * - * Based on sheevaplug.h: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com<http://www.marvell.com>> - * Written-by: Prafulla Wadaskar <prafulla(a)marvell.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _CONFIG_OPENRD_H -#define _CONFIG_OPENRD_H - -/* - * Version number information - */ -#ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE -# define CONFIG_IDENT_STRING "\nOpenRD-Ultimate" -#else -# ifdef CONFIG_BOARD_IS_OPENRD_CLIENT -# define CONFIG_IDENT_STRING "\nOpenRD-Client" -# else -# ifdef CONFIG_BOARD_IS_OPENRD_BASE -# define CONFIG_IDENT_STRING "\nOpenRD-Base" -# else -# error Unknown OpenRD board specified -# endif -# endif -#endif - -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ -#define CONFIG_KW88F6281 1 /* SOC Name */ -#define CONFIG_MACH_OPENRD_BASE /* Machine type */ -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ - -/* - * Commands configuration - */ -#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ -#define CONFIG_SYS_MVFS -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ENV -#define CONFIG_CMD_MII -#define CONFIG_CMD_MMC -#define CONFIG_CMD_NAND -#define CONFIG_CMD_PING -#define CONFIG_CMD_USB -#define CONFIG_CMD_IDE - -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-common.h" - -/* - * Environment variables configurations - */ -#ifdef CONFIG_CMD_NAND -#define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ -#else -#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ -#endif -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ -#define CONFIG_ENV_SIZE 0x20000 /* 128k */ -#define CONFIG_ENV_ADDR 0x60000 -#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */ -/* - * Environment is right behind U-Boot in flash. Make sure U-Boot - * doesn't grow into the environment area. - */ -#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET - -/* - * Default environment variables - */ -#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ - "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ - "${x_bootcmd_usb}; bootm 0x6400000;" - -#define MTDIDS_DEFAULT "nand0=nand_mtd" -#define MTDPARTS_DEFAULT "mtdparts=nand_mtd:0x100000@0x000000(uboot),"\ - "0x400000@0x100000(uImage),"\ - "0x1fb00000@0x500000(rootfs)" - -#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ - "=ttyS0,115200 "MTDPARTS_DEFAULT " rw ubi.mtd=2,2048\0" \ - "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \ - "x_bootcmd_usb=usb start\0" \ - "x_bootargs_root=root=ubi0:rootfs rootfstype=ubifs\0" \ - "mtdids="MTDIDS_DEFAULT"\0" \ - "mtdparts="MTDPARTS_DEFAULT"\0" - -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -# ifdef CONFIG_BOARD_IS_OPENRD_BASE -# define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -# else -# define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ -# endif -# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE -# define CONFIG_PHY_BASE_ADR 0x0 -# define PHY_NO "88E1121" -# else -# define CONFIG_PHY_BASE_ADR 0x8 -# define PHY_NO "88E1116" -# endif -#endif /* CONFIG_CMD_NET */ - -/* - * SATA Driver configuration - */ -#ifdef CONFIG_MVSATA_IDE -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET -#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET -#endif /*CONFIG_MVSATA_IDE*/ - -#ifdef CONFIG_CMD_MMC -#define CONFIG_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_MVEBU_MMC -#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE -#endif /* CONFIG_CMD_MMC */ - -#endif /* _CONFIG_OPENRD_BASE_H */ -- 2.5.0.457.gab17608

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[U-Boot] [PATCH resend 1/2] ARM: Add workaround for Cortex-A9 errata 845369
by Peng Fan 31 Aug '15

31 Aug '15

From: Nitin Garg <nitin.garg(a)freescale.com> Under very rare timing circumstances, transition into streaming mode might create a data corruption. Exists on all Cortex-A9 revisions. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> Signed-off-by: Nitin Garg <nitin.garg(a)freescale.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> --- Original patch: http://lists.denx.de/pipermail/u-boot/2015-April/209724.html README | 1 + arch/arm/cpu/armv7/start.S | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/README b/README index a52ff46..7da9415 100644 --- a/README +++ b/README @@ -683,6 +683,7 @@ The following options need to be configured: CONFIG_ARM_ERRATA_751472 CONFIG_ARM_ERRATA_794072 CONFIG_ARM_ERRATA_761320 + CONFIG_ARM_ERRATA_845369 If set, the workarounds for these ARM errata are applied early during U-Boot startup. Note that these options force the diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index b180944..0c4fe61 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -163,6 +163,11 @@ ENTRY(cpu_init_cp15) orr r0, r0, #1 << 21 @ set bit #21 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register #endif +#ifdef CONFIG_ARM_ERRATA_845369 + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register + orr r0, r0, #1 << 22 @ set bit #22 + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register +#endif mov r5, lr @ Store my Caller mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR) -- 1.8.4

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[U-Boot] [PATCH] mmc_spi: fix big-endian support error on be_to_cpu16
by Thomas Chou 31 Aug '15

31 Aug '15

u-boot/drivers/mmc/mmc_spi.c:94: undefined reference to `be_to_cpu16' It should be cpu_to_be16. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> Cc: Yoshinori Sato <ysato(a)users.sourceforge.jp> Cc: Pantelis Antoniou <pantelis.antoniou(a)konsulko.com> --- drivers/mmc/mmc_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index 9032a73..37721ae 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -91,7 +91,7 @@ static uint mmc_spi_readdata(struct mmc *mmc, void *xbuf, spi_xfer(spi, bsize * 8, NULL, buf, 0); spi_xfer(spi, 2 * 8, NULL, &crc, 0); #ifdef CONFIG_MMC_SPI_CRC_ON - if (be_to_cpu16(cyg_crc16(buf, bsize)) != crc) { + if (cpu_to_be16(cyg_crc16(buf, bsize)) != crc) { debug("%s: CRC error\n", mmc->cfg->name); r1 = R1_SPI_COM_CRC; break; -- 2.1.4

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[U-Boot] [RFC v3 PATCH 0/4] add pinctrl driver framework
by Masahiro Yamada 31 Aug '15

31 Aug '15

Sorry for delay. This is RFC v3. (I forgot to send a pre-requisite patch.) README.pinctrl is missing in this version (I will do it in the next version), but the code itself is almost ready for the review. This series depends on "Add macros to ease our life with independent CONFIGs between U-Boot and SPL", consists of 15 patches. Masahiro Yamada (4): dm: do not return pointer if NULL is given to devp of device_bind() pinctrl: add pin control uclass support pinctrl: add simple pinctrl implementation pinctrl: sandbox: add sandbox pinctrl driver arch/sandbox/dts/sandbox.dts | 19 +++ configs/sandbox_defconfig | 5 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/core/device.c | 10 +- drivers/pinctrl/Kconfig | 53 ++++++ drivers/pinctrl/Makefile | 4 + drivers/pinctrl/pinctrl-generic.c | 351 ++++++++++++++++++++++++++++++++++++++ drivers/pinctrl/pinctrl-sandbox.c | 157 +++++++++++++++++ drivers/pinctrl/pinctrl-uclass.c | 180 +++++++++++++++++++ include/dm/pinctrl.h | 220 ++++++++++++++++++++++++ include/dm/uclass-id.h | 2 + 12 files changed, 1002 insertions(+), 2 deletions(-) create mode 100644 drivers/pinctrl/Kconfig create mode 100644 drivers/pinctrl/Makefile create mode 100644 drivers/pinctrl/pinctrl-generic.c create mode 100644 drivers/pinctrl/pinctrl-sandbox.c create mode 100644 drivers/pinctrl/pinctrl-uclass.c create mode 100644 include/dm/pinctrl.h -- 1.9.1

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[U-Boot] [PATCH v2 0/8] dm: rockchip: Enable booting from MMC
by Sjoerd Simons 31 Aug '15

31 Aug '15

This patchset allows u-boot on RK3288 device to load and boot kernels from MMC using the standard distro boot commands. Patchset is on top of the rockchip-working branch of u-boot dm There are some small oddities with the support: - Linux crashes when try to use the FDT if it's re-allocated to memory locations above 512MB. So fdt_high is set to ensure it stays below that. - This SoC seems sensitive to the order in which the caches are disabled, when disabling the i-cache before the d-cache starting linux fails (unsure if it fails before or after jumping to linux though) To fix the latter ``arm: Turn of d-cache before i-cache'' changes the ordering in the general v7 code. However i have not tested this yet on other device, so it may well need to be handled in rockchip specific code. Tested on a Radxa Rock 2 with square baseboard, booting from SD card. I haven't tested eMMC yet however i suspect the SPL will need modifications there to load u-boot from eMMC rather then SD (which has index 0) ideally by detecting where the SPL itself got loaded from. Changes in v2: - Check error code from uclass_get and thread it through to mmc_initialize - Also drop CONFIG_SPL_LED from the firefly defconfig - Fixed various typos and inconsitencies in commit message Sjoerd Simons (8): doc: Fix reference to Rock pro when Rock 2 is meant mmc: Probe DM based mmc devices in u-boot rockchip: Disable sdio mmc slot on rk3288-firefly rockchip: Turn off CONFIG_SPL_LED_SUPPORT for firefly rockchip: Add config_distro_bootcmd support arm: Turn of d-cache before i-cache rockchip: Drop first 32kb of zeros from the rkSD image type rockchip: Update todo in README.rockchip arch/arm/cpu/armv7/cpu.c | 15 ++++++++------ arch/arm/dts/rk3288-firefly.dtsi | 2 +- configs/firefly-rk3288_defconfig | 1 - doc/README.rockchip | 9 ++++----- drivers/mmc/mmc.c | 43 ++++++++++++++++++++++++++++++++++++---- include/configs/firefly-rk3288.h | 1 - include/configs/rk3288_common.h | 21 ++++++++++++++++++++ tools/rksd.c | 9 ++------- 8 files changed, 76 insertions(+), 25 deletions(-) -- 2.5.1

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[U-Boot] [PATCH] dts: fix dependency of OF_SPL_REMOVE_PROPS
by Masahiro Yamada 31 Aug '15

31 Aug '15

This should depend on SPL_OF_CONTROL (it is not equivalent to SPL && OF_CONTROL). Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- dts/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dts/Kconfig b/dts/Kconfig index d72a909..a04bb96 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -58,7 +58,7 @@ config DEFAULT_DEVICE_TREE config OF_SPL_REMOVE_PROPS string "List of device tree properties to drop for SPL" - depends on OF_CONTROL && SPL + depends on SPL_OF_CONTROL default "pinctrl-0 pinctrl-names clocks clock-names interrupt-parent" help Since SPL normally runs in a reduced memory space, the device tree -- 1.9.1

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[U-Boot] [PATCH v2 00/28] dm: Convert TPM drivers to driver model
by Simon Glass 31 Aug '15

31 Aug '15

This series adds driver model support for Trusted Platform Modules (TPMs). These have a very simple interface and are configured via the device tree. Two bus types are supported at present: I2C and LPC (Intel Low-Pin-Count). Most drivers and users are converted over to driver model. The exception is the Atmel TPM and its users. The I2C driver has been cleaned up and simplified. It was ported from Linux and was pretty hard to follow. This series includes patches to unify the code, remove duplicated data structures and drop unnecessary indirection. Also this series enables the TPM on all Chromebooks supported by upstream U-Boot (snow, spring, nyan-big, pit, pi, link, panther) since some did not have it fully enabled. As before, the 'tpm' command can be used to implement TPM functionality. In addition a 'tpmtest' command provides some basic TPM tests taken from Chrome OS U-Boot. These are fairly rudimentary but are useful if you know what you are doing. Changes in v2: - Add a 'TPM' menu in Kconfig - Add new patch with a 'tpmtest' command - Add new patch with functions to access flags and permissions - Add tpm device tree node for panther also - Correct error checking code in tpm_sendrecv_command() - Correct error-checking code in report_return_code() - Enable 'tpmtest' command for nyan - Enhance uclass to support timeouts with new send()/recv() methods - Implement the get_desc() method - Include tpm.h header file instead of tis.h - Move the timeout definitions into a new tpm_internal.h header - Update cover letter to mention panther and the tpmtest command. - Update driver for the new uclass interface - Update driver for v2 TPM uclass which supports timeouts - Use tpm_ prefix instead of tis_ for TPM functions Simon Glass (28): tpm: Remove old pre-driver-model I2C code tpm: Drop two unused options tpm: Add Kconfig options for TPMs tpm: Convert board config TPM options to Kconfig tpm: Convert drivers to use SPDX tpm: Move the I2C TPM code into one file tpm: tpm_tis_i2c: Drop unnecessary methods tpm: tpm_tis_i2c: Drop struct tpm_vendor_specific tpm: tpm_tis_i2c: Merge struct tpm_dev into tpm_chip tpm: tpm_tis_i2c: Merge struct tpm into tpm_chip tpm: tpm_tis_i2c: Move definitions into the header file tpm: tpm_tis_i2c: Simplify init code tpm: tpm_tis_i2c: Use a consistent tpm_tis_i2c_ prefix tpm: tpm_tis_i2c: Tidy up delays dm: tpm: Add a uclass for Trusted Platform Modules dm: tpm: Convert the TPM command and library to driver model dm: i2c: Add a command to adjust the offset length tpm: Report tpm errors on the command line dm: tpm: sandbox: Convert TPM driver to driver model tpm: Check that parse_byte_string() has data to parse exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devices dm: tpm: Convert I2C driver to driver model dm: tpm: Convert LPC driver to driver model tpm: Add a 'tpm info' command tpm: Add functions to access flags and permissions dm: tpm: Add a 'tpmtest' command tpm: Enable 'tpmtest' command for Chrome OS boards with TPMs tegra: nyan: Enable TPM command and driver README | 6 - arch/arm/dts/exynos5250-snow.dts | 9 + arch/arm/dts/exynos5250-spring.dts | 8 + arch/arm/dts/exynos5420-peach-pit.dts | 6 +- arch/arm/dts/exynos5800-peach-pi.dts | 6 +- arch/sandbox/dts/sandbox.dts | 4 + arch/x86/dts/chromebook_link.dts | 5 + arch/x86/dts/chromebox_panther.dts | 5 + common/Kconfig | 22 + common/Makefile | 1 + common/cmd_i2c.c | 33 + common/cmd_tpm.c | 100 ++- common/cmd_tpm_test.c | 565 +++++++++++++++++ configs/chromebook_link_defconfig | 5 + configs/chromebox_panther_defconfig | 5 + .../controlcenterd_36BIT_SDCARD_DEVELOP_defconfig | 4 + configs/controlcenterd_36BIT_SDCARD_defconfig | 4 + .../controlcenterd_TRAILBLAZER_DEVELOP_defconfig | 4 + configs/controlcenterd_TRAILBLAZER_defconfig | 4 + configs/coreboot-x86_defconfig | 5 + configs/nyan-big_defconfig | 5 + configs/peach-pi_defconfig | 5 + configs/peach-pit_defconfig | 5 + configs/sandbox_defconfig | 4 + configs/snow_defconfig | 5 + configs/spring_defconfig | 5 + drivers/tpm/Kconfig | 69 ++ drivers/tpm/Makefile | 4 +- drivers/tpm/tpm-uclass.c | 133 ++++ drivers/tpm/tpm.c | 694 --------------------- drivers/tpm/tpm_atmel_twi.c | 15 +- drivers/tpm/tpm_internal.h | 287 +++++++++ drivers/tpm/tpm_tis_i2c.c | 572 ++++++++--------- drivers/tpm/{tpm_private.h => tpm_tis_i2c.h} | 88 +-- drivers/tpm/tpm_tis_lpc.c | 290 ++++----- drivers/tpm/tpm_tis_sandbox.c | 57 +- include/configs/controlcenterd.h | 7 - include/configs/efi-x86.h | 2 - include/configs/exynos5-common.h | 7 - include/configs/x86-common.h | 2 - include/dm/uclass-id.h | 1 + include/fdtdec.h | 2 - include/tis.h | 3 + include/tpm.h | 243 +++++++- lib/Kconfig | 10 + lib/fdtdec.c | 2 - lib/tpm.c | 82 ++- 47 files changed, 2102 insertions(+), 1298 deletions(-) create mode 100644 common/cmd_tpm_test.c create mode 100644 drivers/tpm/tpm-uclass.c delete mode 100644 drivers/tpm/tpm.c create mode 100644 drivers/tpm/tpm_internal.h rename drivers/tpm/{tpm_private.h => tpm_tis_i2c.h} (54%) -- 2.5.0.457.gab17608

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[U-Boot] [PATCH] dm: core: Add Kconfig for simple bus driver
by Marek Vasut 31 Aug '15

31 Aug '15

Add Kconfig entries for the simple-bus driver, both for U-Boot and for SPL. The simple-bus is enabled by default in U-Boot and disabled by default in SPL to preserve the original behavior. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/core/Kconfig | 15 +++++++++++++++ drivers/core/Makefile | 5 ++--- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index e40372d..3403d1f 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -59,3 +59,18 @@ config DM_SEQ_ALIAS Most boards will have a '/aliases' node containing the path to numbered devices (e.g. serial0 = &serial0). This feature can be disabled if it is not required, to save code space in SPL. + +config SIMPLE_BUS + bool "Support simple-bus driver" + depends on DM && OF_CONTROL + default y + help + Supports the 'simple-bus' driver, which is used on some systems. + +config SPL_SIMPLE_BUS + bool "Support simple-bus driver in SPL" + depends on SPL_DM && OF_CONTROL + default n + help + Supports the 'simple-bus' driver, which is used on some systems + in SPL. diff --git a/drivers/core/Makefile b/drivers/core/Makefile index 5c2ead8..74588b1 100644 --- a/drivers/core/Makefile +++ b/drivers/core/Makefile @@ -5,9 +5,8 @@ # obj-y += device.o lists.o root.o uclass.o util.o -ifndef CONFIG_SPL_BUILD -obj-$(CONFIG_OF_CONTROL) += simple-bus.o -endif +obj-$(CONFIG_SIMPLE_BUS) += simple-bus.o +obj-$(CONFIG_SPL_SIMPLE_BUS) += simple-bus.o obj-$(CONFIG_DM_DEVICE_REMOVE) += device-remove.o obj-$(CONFIG_DM) += dump.o obj-$(CONFIG_OF_CONTROL) += regmap.o -- 2.1.4

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[U-Boot] [PATCH] video: discard empty video_set_lut implementation
by Peng Fan 31 Aug '15

31 Aug '15

Discard the empty video_set_lut function from platform video drivers. This commit "69d275458893eaec35229b589092c2a6bde5440f" introduces a weak function video_set_lut, so we do not need an strong function in platform drivers, which does nothing. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> --- drivers/video/da8xx-fb.c | 10 ---------- drivers/video/mx3fb.c | 9 --------- drivers/video/mxc_ipuv3_fb.c | 9 --------- 3 files changed, 28 deletions(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 3a5f325..e2b2144 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -1035,16 +1035,6 @@ err_release_fb: return NULL; } -void video_set_lut(unsigned int index, /* color number */ - unsigned char r, /* red */ - unsigned char g, /* green */ - unsigned char b /* blue */ - ) -{ - - return; -} - void da8xx_video_init(const struct da8xx_panel *panel, const struct lcd_ctrl_config *lcd_cfg, int bits_pixel) { diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index aa4cc43..3f10d5c 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -904,12 +904,3 @@ void *video_hw_init(void) return (void *) &panel; } - -void video_set_lut(unsigned int index, /* color number */ - unsigned char r, /* red */ - unsigned char g, /* green */ - unsigned char b /* blue */ - ) -{ - return; -} diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c index 1fa9531..265274b 100644 --- a/drivers/video/mxc_ipuv3_fb.c +++ b/drivers/video/mxc_ipuv3_fb.c @@ -599,15 +599,6 @@ void *video_hw_init(void) return (void *)&panel; } -void video_set_lut(unsigned int index, /* color number */ - unsigned char r, /* red */ - unsigned char g, /* green */ - unsigned char b /* blue */ - ) -{ - return; -} - int ipuv3_fb_init(struct fb_videomode const *mode, uint8_t disp, uint32_t pixfmt) -- 1.8.4

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