August 2015 - U-Boot

[U-Boot] [PATCH 1/2] x86: coreboot: Convert to use more dm drivers
by Bin Meng 01 Sep '15

01 Sep '15

Move to driver model for RTC, USB and ETH on coreboot. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- arch/x86/cpu/coreboot/coreboot.c | 6 ------ configs/coreboot-x86_defconfig | 5 ++++- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 0e9f15f..845f86a 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -8,7 +8,6 @@ #include <common.h> #include <fdtdec.h> -#include <netdev.h> #include <asm/io.h> #include <asm/msr.h> #include <asm/mtrr.h> @@ -48,11 +47,6 @@ int last_stage_init(void) return 0; } -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} - void board_final_cleanup(void) { /* diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index df3a624..b1e94f6 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -12,7 +12,10 @@ CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_DM_PCI=y CONFIG_SPI_FLASH=y -CONFIG_NETDEVICES=y +CONFIG_DM_ETH=y CONFIG_E1000=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_DM_RTC=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_SYS_VSNPRINTF=y -- 1.8.2.1

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[U-Boot] [PATCH v3] x86: panther: Add PCI and video configuration
by Simon Glass 01 Sep '15

01 Sep '15

Add a PCI node to the device tree. This allows SPI flash and SATA to work correctly. Also configure the video to come up correctly even though there is no keyboard. Signed-off-by: Simon Glass <sjg(a)chromium.org> Reviewed-by: Bin Meng <bmeng.cn(a)gmail.com> --- Changes in v3: - Fix 'correectly' typo Changes in v2: - Fix PCI I/O range value arch/x86/dts/chromebox_panther.dts | 10 ++++++++++ include/configs/chromebox_panther.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index 84eae3a..31daf26 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -42,6 +42,16 @@ stdout-path = "/serial"; }; + pci { + compatible = "pci-x86"; + #address-cells = <3>; + #size-cells = <2>; + u-boot,dm-pre-reloc; + ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 + 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 + 0x01000000 0x0 0x1000 0x1000 0 0xf000>; + }; + spi { #address-cells = <1>; #size-cells = <0>; diff --git a/include/configs/chromebox_panther.h b/include/configs/chromebox_panther.h index 00fe26d..dc732b8 100644 --- a/include/configs/chromebox_panther.h +++ b/include/configs/chromebox_panther.h @@ -14,4 +14,6 @@ /* Avoid a warning in the Realtek Ethernet driver */ #define CONFIG_SYS_CACHELINE_SIZE 16 +#define CONFIG_VGA_AS_SINGLE_DEVICE + #endif /* __CONFIG_H */ -- 2.5.0.457.gab17608

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[U-Boot] [PATCH 1/3] x86: ifdtool: Support checking region overlap before U-Boot
by Bin Meng 01 Sep '15

01 Sep '15

We have the capability to check regions written after U-Boot that do not overlap. Since regions can also be written before U-Boot, add such check for these too. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- tools/ifdtool.c | 66 ++++++++++++++++++++++++++++++++++++++++----------------- 1 file changed, 46 insertions(+), 20 deletions(-) diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 1f95203..48059c0 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -707,10 +707,12 @@ int inject_region(char *image, int size, int region_type, char *region_fname) * 8MB ROM the start address is 0xfff80000. * @write_fname: Filename to add to the image * @offset_uboot_top: Offset of the top of U-Boot + * @offset_uboot_start: Offset of the start of U-Boot * @return number of bytes written if OK, -ve on error */ static int write_data(char *image, int size, unsigned int addr, - const char *write_fname, int offset_uboot_top) + const char *write_fname, int offset_uboot_top, + int offset_uboot_start) { int write_fd, write_size; int offset; @@ -720,13 +722,25 @@ static int write_data(char *image, int size, unsigned int addr, return write_fd; offset = (uint32_t)(addr + size); - if (offset_uboot_top && offset_uboot_top >= offset) { - fprintf(stderr, "U-Boot image overlaps with region '%s'\n", - write_fname); - fprintf(stderr, - "U-Boot finishes at offset %x, file starts at %x\n", - offset_uboot_top, offset); - return -EXDEV; + if (offset_uboot_top) { + if (offset_uboot_start < offset && + offset_uboot_top >= offset) { + fprintf(stderr, "U-Boot image overlaps with region '%s'\n", + write_fname); + fprintf(stderr, + "U-Boot finishes at offset %x, file starts at %x\n", + offset_uboot_top, offset); + return -EXDEV; + } + if (offset_uboot_start > offset && + offset_uboot_start <= offset + write_size) { + fprintf(stderr, "U-Boot image overlaps with region '%s'\n", + write_fname); + fprintf(stderr, + "U-Boot starts at offset %x, file finishes at %x\n", + offset_uboot_start, offset + write_size); + return -EXDEV; + } } debug("Writing %s to offset %#x\n", write_fname, offset); @@ -927,27 +941,36 @@ static int write_ucode(char *image, int size, struct input_file *fdt, */ static int write_uboot(char *image, int size, struct input_file *uboot, struct input_file *fdt, unsigned int ucode_ptr, - int collate_ucode) + int collate_ucode, int *offset_uboot_top, + int *offset_uboot_start) { - const void *blob; int uboot_size, fdt_size; + int uboot_top; - uboot_size = write_data(image, size, uboot->addr, uboot->fname, 0); + uboot_size = write_data(image, size, uboot->addr, uboot->fname, 0, 0); if (uboot_size < 0) return uboot_size; fdt->addr = uboot->addr + uboot_size; debug("U-Boot size %#x, FDT at %#x\n", uboot_size, fdt->addr); - fdt_size = write_data(image, size, fdt->addr, fdt->fname, 0); + fdt_size = write_data(image, size, fdt->addr, fdt->fname, 0, 0); if (fdt_size < 0) return fdt_size; - blob = (void *)image + (uint32_t)(fdt->addr + size); + + uboot_top = (uint32_t)(fdt->addr + size) + fdt_size; if (ucode_ptr) { - return write_ucode(image, size, fdt, fdt_size, ucode_ptr, - collate_ucode); + uboot_top = write_ucode(image, size, fdt, fdt_size, ucode_ptr, + collate_ucode); + if (uboot_top < 0) + return uboot_top; } - return ((char *)blob + fdt_size) - image; + if (offset_uboot_top && offset_uboot_start) { + *offset_uboot_top = uboot_top; + *offset_uboot_start = (uint32_t)(uboot->addr + size); + } + + return 0; } static void print_version(void) @@ -1268,13 +1291,14 @@ int main(int argc, char *argv[]) } if (mode_write_descriptor) - ret = write_data(image, size, -size, desc_fname, 0); + ret = write_data(image, size, -size, desc_fname, 0, 0); if (mode_inject) ret = inject_region(image, size, region_type, inject_fname); if (mode_write) { int offset_uboot_top = 0; + int offset_uboot_start = 0; for (wr_idx = 0; wr_idx < wr_num; wr_idx++) { ifile = &input_file[wr_idx]; @@ -1282,11 +1306,13 @@ int main(int argc, char *argv[]) continue; } else if (ifile->type == IF_uboot) { ret = write_uboot(image, size, ifile, fdt, - ucode_ptr, collate_ucode); - offset_uboot_top = ret; + ucode_ptr, collate_ucode, + &offset_uboot_top, + &offset_uboot_start); } else { ret = write_data(image, size, ifile->addr, - ifile->fname, offset_uboot_top); + ifile->fname, offset_uboot_top, + offset_uboot_start); } if (ret < 0) break; -- 1.8.2.1

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Re: [U-Boot] [PATCH 1/3] x86: ifdtool: Support checking region overlap before U-Boot
by Simon Glass 01 Sep '15

01 Sep '15

On 27 August 2015 at 10:01, Andy Pont <andy.pont(a)sdcsystems.com> wrote: > Bin wrote... > >> We have the capability to check regions written after U-Boot that >> do not overlap. Since regions can also be written before U-Boot, >> add such check for these too. >> >> Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> >> --- > > This fixes the issue I raised this morning with building the .rom file for > Galileo with the latest master, so: > > Tested-by: Andy Pont <andy.pont(a)sdcsystems.com> Acked-by: Simon Glass <sjg(a)chromium.org> Tested on Minnowmax: Tested-by: Simon Glass <sjg(a)chromium.org>

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[U-Boot] Question: Full benifit of the .itb
by Brian_Brelsford＠Dell.com 01 Sep '15

01 Sep '15

Dell Customer Communication I have a question with respect to the .itb as a complete bootable/execution entity. OUR PAST DESIGNs: Our past home grown solutions, much like fit update, is a binary that contains the various components (meaning kernel, root file system, other stuff). 1) They are copied into hard coded flash locations, bootcmd then does mmc read of kernel, then bootm, kernel goes to hard coded location to get the rootfs, etc. 2) We also have a system that copy's the kernel and rootfs as files into a ext4 file system, bootcmd does ext4load of kernel, then bootm, kernel knows of file /rootfs, etc. FULL BENEFIT OF .itb It would seem that the benefit of having everything in the .itb (Kernel, rootfs, dtb, etc). It can be copied as a single blob, so fwupdate is really just a single copy to your flash device. QUESTIONs: Is the full intent of the .itb is to leave it all together, kernel, dtb, rootfs, other stuff? Pull the itb into memory, boot the kernel, it knows how to find the rootfs, etc. OR Is the .itb a kernel/dtb , then via bootargs we tell the kernel where rootfs is? Meaning it is not part of the .itb. What the open source industry doing? If I am totally off base please feel free to correct me. Thank you for your time. Brian Brelsford

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[U-Boot] Please pull u-boot-sunxi master
by Hans de Goede 31 Aug '15

31 Aug '15

Hi Tom, Here is another sunxi pull-req for v2015.10, highlights: -Bug fixes and cleanups to the spl nand support which was merged at the beginning of the v2015.10 cycle -Add support for a few new boards -Misc fixes The following changes since commit f875bbb49111c308b90b9ca74d1b79f69498b278: ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support (2015-08-31 00:29:23 +0900) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to fa5e102019e28a5936e52d6aa9f5624cf1744a35: sunxi: increase SYS_MONITOR_LEN (2015-08-31 16:03:05 +0200) ---------------------------------------------------------------- Boris Brezillon (2): sunxi_nand_spl: clear status flags in SPL implementation sunxi: increase SYS_MONITOR_LEN Chen-Yu Tsai (1): sunxi: Enable non-secure access to RTC on sun6i (A31s) Hans de Goede (26): sunxi: axp221: Allow specifying dcdc2 voltage via Kconfig sunxi: Add support for gt90h-v4 tablets sunxi: musb: Drop no longer accurate comment in Kconfig help text sunxi: Drop LCD_MODE from A13-OLinuxIno defconfigs sunxi: Add CONFIG_MMC0_CD_PIN to various boards sunxi_nand_spl: Fix CONFIG_SPL_NAND_SUNXI handling sunxi_nand_spl: Drop unnecessary temp buf sunxi_nand_spl: We only need to reset the nand chip once sunxi_nand_spl: Do not bother writing the spare-area reg in syndrome mode sunxi_nand_spl: Use SYS_NAND_SELF_INIT and only do nand init when necessary sunxi_nand_spl: Make sure the DMA controller is enabled sunxi_nand_spl: Turn off clocks when we're done with the nand sunxi_nand_spl: Add proper cache flusing sunxi_nand_spl: Use kernel driver algorithm for determining ecc_mode / _off sunxi_nand_spl: Add support for sun4i and sun5i SoCs sunxi_nand_spl: Properly config page-size in the nand ctl register sunxi_nand_spl: Parametrize lowlevel read functions sunxi_nand_spl: Auto detect nand configuration parameters sunxi_nand_spl: Add support for backup boot partitions sunxi_nand_spl: Rename SPL_NAND_SUNXI to NAND_SUNXI sunxi_nand_spl: Remove NAND_SUNXI_SPL_SYNDROME_PARTITIONS_END mtd: nand: Make CONFIG_SYS_NAND_U_BOOT_OFFS configurable through Kconfig sunxi: Ampe_A76_defconfig: Add otg id pin configuration sunxi: Add inet97fv2_defconfig sunxi: Add inet98v_rev2 defconfig and dts file sunxi: Fix MAINTAINERS board sorting Marcus Cooper (1): sunxi: Add support for the Olimex A20 EVB Yousong Zhou (1): sunxi: mmc: set transfer timeout according to byte_cnt. arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/board.c | 5 + arch/arm/cpu/armv7/sunxi/tzpc.c | 18 ++ arch/arm/dts/Makefile | 3 + arch/arm/dts/sun5i-a13-inet-98v-rev2.dts | 236 ++++++++++++++++++++++++++ arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 244 +++++++++++++++++++++++++++ arch/arm/dts/sun8i-a23-gt90h-v4.dts | 145 ++++++++++++++++ arch/arm/include/asm/arch-sunxi/tzpc.h | 23 +++ board/sunxi/Kconfig | 1 + board/sunxi/MAINTAINERS | 10 +- board/sunxi/board.c | 34 ++-- configs/A10-OLinuXino-Lime_defconfig | 1 + configs/A13-OLinuXinoM_defconfig | 2 +- configs/A13-OLinuXino_defconfig | 2 +- configs/A20-OLinuXino-Lime_defconfig | 1 + configs/A20-Olimex-SOM-EVB_defconfig | 16 ++ configs/Ampe_A76_defconfig | 1 + configs/Cubieboard_defconfig | 1 + configs/Cubietruck_defconfig | 1 + configs/gt90h_v4_defconfig | 26 +++ configs/inet97fv2_defconfig | 20 +++ configs/inet98v_rev2_defconfig | 22 +++ drivers/mmc/sunxi_mmc.c | 6 +- drivers/mtd/nand/Kconfig | 57 ++----- drivers/mtd/nand/Makefile | 2 +- drivers/mtd/nand/sunxi_nand_spl.c | 268 +++++++++++++++++------------- drivers/power/Kconfig | 9 + drivers/usb/musb-new/Kconfig | 4 +- include/configs/sunxi-common.h | 12 +- 29 files changed, 990 insertions(+), 181 deletions(-) create mode 100644 arch/arm/cpu/armv7/sunxi/tzpc.c create mode 100644 arch/arm/dts/sun5i-a13-inet-98v-rev2.dts create mode 100644 arch/arm/dts/sun7i-a20-olimex-som-evb.dts create mode 100644 arch/arm/dts/sun8i-a23-gt90h-v4.dts create mode 100644 arch/arm/include/asm/arch-sunxi/tzpc.h create mode 100644 configs/A20-Olimex-SOM-EVB_defconfig create mode 100644 configs/gt90h_v4_defconfig create mode 100644 configs/inet97fv2_defconfig create mode 100644 configs/inet98v_rev2_defconfig Regards, Hans

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[U-Boot] Please pull u-boot-dm
by Simon Glass 31 Aug '15

31 Aug '15

Hi Tom, This includes Masahiro's pinctrl uclass (used by Rockchip), a few bug fixes and tidy-ups, and conversion of the TPM code to driver model. The following changes since commit f875bbb49111c308b90b9ca74d1b79f69498b278: ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support (2015-08-31 00:29:23 +0900) are available in the git repository at: git://git.denx.de/u-boot-dm.git for you to fetch changes up to 897705ec39682ab3bf5bb87bc49d7a491d522051: dts: fix dependency of OF_SPL_REMOVE_PROPS (2015-08-31 07:57:29 -0600) ---------------------------------------------------------------- Bin Meng (3): drivers: kconfig: Move "Generic Driver Options" menu to the top drivers: kconfig: Move PHYS_TO_BUS to "Device Drivers" menu drivers: kconfig: Sort driver menu in alphabetical order Marek Vasut (1): dm: core: Add Kconfig for simple bus driver Masahiro Yamada (5): dm: simplify uclass_foreach_dev() implementation dm: core: allow device_bind() to not return a device pointer pinctrl: add pin control uclass support pinctrl: sandbox: add sandbox pinctrl driver dts: fix dependency of OF_SPL_REMOVE_PROPS Misha Komarovskiy (1): exynos: Rise ARM voltage to 1.1V for chained bootloaders Simon Glass (30): dm: Use dev_get_addr() where possible buildman: Correct 'Series-cover-cc' detection logic tpm: Remove old pre-driver-model I2C code tpm: Drop two unused options tpm: Add Kconfig options for TPMs tpm: Convert board config TPM options to Kconfig tpm: Convert drivers to use SPDX tpm: Move the I2C TPM code into one file tpm: tpm_tis_i2c: Drop unnecessary methods tpm: tpm_tis_i2c: Drop struct tpm_vendor_specific tpm: tpm_tis_i2c: Merge struct tpm_dev into tpm_chip tpm: tpm_tis_i2c: Merge struct tpm into tpm_chip tpm: tpm_tis_i2c: Move definitions into the header file tpm: tpm_tis_i2c: Simplify init code tpm: tpm_tis_i2c: Use a consistent tpm_tis_i2c_ prefix tpm: tpm_tis_i2c: Tidy up delays dm: tpm: Add a uclass for Trusted Platform Modules dm: tpm: Convert the TPM command and library to driver model dm: i2c: Add a command to adjust the offset length tpm: Report tpm errors on the command line dm: tpm: sandbox: Convert TPM driver to driver model tpm: Check that parse_byte_string() has data to parse exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devices dm: tpm: Convert I2C driver to driver model dm: tpm: Convert LPC driver to driver model tpm: Add a 'tpm info' command tpm: Add functions to access flags and permissions dm: tpm: Add a 'tpmtest' command tpm: Enable 'tpmtest' command for Chrome OS boards with TPMs tegra: nyan: Enable TPM command and driver README | 6 - arch/arm/dts/exynos5250-snow.dts | 9 ++ arch/arm/dts/exynos5250-spring.dts | 8 ++ arch/arm/dts/exynos5420-peach-pit.dts | 6 +- arch/arm/dts/exynos5800-peach-pi.dts | 6 +- arch/sandbox/dts/sandbox.dts | 23 ++++ arch/x86/dts/chromebook_link.dts | 5 + arch/x86/dts/chromebox_panther.dts | 5 + board/samsung/common/exynos5-dt.c | 7 +- common/Kconfig | 22 ++++ common/Makefile | 1 + common/cmd_i2c.c | 33 ++++++ common/cmd_tpm.c | 100 +++++++++++++---- common/cmd_tpm_test.c | 564 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ configs/chromebook_link_defconfig | 5 + configs/chromebox_panther_defconfig | 5 + configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig | 4 + configs/controlcenterd_36BIT_SDCARD_defconfig | 4 + configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig | 4 + configs/controlcenterd_TRAILBLAZER_defconfig | 4 + configs/coreboot-x86_defconfig | 5 + configs/nyan-big_defconfig | 5 + configs/peach-pi_defconfig | 5 + configs/peach-pit_defconfig | 5 + configs/sandbox_defconfig | 7 ++ configs/snow_defconfig | 5 + configs/spring_defconfig | 5 + drivers/Kconfig | 60 +++++----- drivers/Makefile | 1 + drivers/core/Kconfig | 15 +++ drivers/core/Makefile | 4 +- drivers/core/device.c | 12 +- drivers/gpio/s5p_gpio.c | 3 +- drivers/gpio/sunxi_gpio.c | 3 +- drivers/gpio/tegra_gpio.c | 3 +- drivers/i2c/s3c24x0_i2c.c | 6 +- drivers/i2c/tegra_i2c.c | 2 +- drivers/pinctrl/Kconfig | 109 ++++++++++++++++++ drivers/pinctrl/Makefile | 4 + drivers/pinctrl/pinctrl-generic.c | 359 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/pinctrl/pinctrl-sandbox.c | 147 +++++++++++++++++++++++++ drivers/pinctrl/pinctrl-uclass.c | 240 ++++++++++++++++++++++++++++++++++++++++ drivers/serial/ns16550.c | 2 +- drivers/serial/serial_arc.c | 3 +- drivers/serial/serial_pl01x.c | 2 +- drivers/serial/serial_s5p.c | 2 +- drivers/spi/designware_spi.c | 2 +- drivers/spi/exynos_spi.c | 2 +- drivers/spi/fsl_dspi.c | 2 +- drivers/spi/tegra114_spi.c | 2 +- drivers/spi/tegra20_sflash.c | 2 +- drivers/spi/tegra20_slink.c | 2 +- drivers/spi/zynq_spi.c | 2 +- drivers/tpm/Kconfig | 69 ++++++++++++ drivers/tpm/Makefile | 4 +- drivers/tpm/tpm-uclass.c | 133 ++++++++++++++++++++++ drivers/tpm/tpm.c | 694 ------------------------------------------------------------------------------------------------------------------- drivers/tpm/tpm_atmel_twi.c | 15 +-- drivers/tpm/tpm_internal.h | 287 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/tpm/tpm_tis_i2c.c | 572 +++++++++++++++++++++++++++++++++++++++++++--------------------------------------------------- drivers/tpm/{tpm_private.h => tpm_tis_i2c.h} | 88 ++++++++------- drivers/tpm/tpm_tis_lpc.c | 290 ++++++++++++++++++++++-------------------------- drivers/tpm/tpm_tis_sandbox.c | 57 ++++++++-- drivers/usb/host/ehci-tegra.c | 8 +- drivers/usb/host/xhci-exynos5.c | 2 +- drivers/video/tegra124/dp.c | 3 +- dts/Kconfig | 2 +- include/configs/controlcenterd.h | 7 -- include/configs/efi-x86.h | 2 - include/configs/exynos5-common.h | 7 -- include/configs/x86-common.h | 2 - include/dm/device-internal.h | 4 +- include/dm/lists.h | 4 +- include/dm/pinctrl.h | 227 ++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 3 + include/dm/uclass.h | 9 +- include/fdtdec.h | 2 - include/tis.h | 3 + include/tpm.h | 243 +++++++++++++++++++++++++++++++++++++++- lib/Kconfig | 10 ++ lib/fdtdec.c | 2 - lib/tpm.c | 82 +++++++++++++- tools/patman/series.py | 2 +- 83 files changed, 3305 insertions(+), 1377 deletions(-) create mode 100644 common/cmd_tpm_test.c create mode 100644 drivers/pinctrl/Kconfig create mode 100644 drivers/pinctrl/Makefile create mode 100644 drivers/pinctrl/pinctrl-generic.c create mode 100644 drivers/pinctrl/pinctrl-sandbox.c create mode 100644 drivers/pinctrl/pinctrl-uclass.c create mode 100644 drivers/tpm/tpm-uclass.c delete mode 100644 drivers/tpm/tpm.c create mode 100644 drivers/tpm/tpm_internal.h rename drivers/tpm/{tpm_private.h => tpm_tis_i2c.h} (54%) create mode 100644 include/dm/pinctrl.h Regards, Simon

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Re: [U-Boot] [PATCH v5 1/5] spi: cadence_qspi: move trigger base configuration in init
by Vikas MANOCHA 31 Aug '15

31 Aug '15

Hi Marek, > -----Original Message----- > From: Vikas MANOCHA > Sent: Thursday, August 27, 2015 9:03 AM > To: Marek Vasut > Cc: u-boot(a)lists.denx.de; sr(a)denx.de; grmoore(a)opensource.altera.com; > jteki(a)openedev.com > Subject: RE: [PATCH v5 1/5] spi: cadence_qspi: move trigger base > configuration in init > > Hi, > > > -----Original Message----- > > From: Marek Vasut [mailto:marex@denx.de] > > Sent: Thursday, August 27, 2015 8:52 AM > > To: Vikas MANOCHA > > Cc: u-boot(a)lists.denx.de; sr(a)denx.de; grmoore(a)opensource.altera.com; > > jteki(a)openedev.com > > Subject: Re: [PATCH v5 1/5] spi: cadence_qspi: move trigger base > > configuration in init > > > > On Thursday, August 27, 2015 at 05:46:12 PM, Vikas MANOCHA wrote: > > > Hi, > > > > > > > -----Original Message----- > > > > From: Marek Vasut [mailto:marex@denx.de] > > > > Sent: Thursday, August 27, 2015 1:36 AM > > > > To: Vikas MANOCHA > > > > Cc: u-boot(a)lists.denx.de; sr(a)denx.de; > > grmoore(a)opensource.altera.com; > > > > jteki(a)openedev.com > > > > Subject: Re: [PATCH v5 1/5] spi: cadence_qspi: move trigger base > > > > configuration in init > > > > > > > > On Thursday, August 27, 2015 at 12:44:26 AM, Vikas Manocha wrote: > > > > > No need to configure indirect trigger address for every read/write. > > > > > > > > > > Signed-off-by: Vikas Manocha <vikas.manocha(a)st.com> > > > > > --- > > > > > > > > > > Changes in v5: fixed type cast compilation warnings. > > > > > Changes in v4: removed extra type casts. > > > > > Changes in v3: added commit message & removed extra bracket. > > > > > Changes in v2: Rebased to master > > > > > > > > > > drivers/spi/cadence_qspi_apb.c | 9 ++------- > > > > > 1 file changed, 2 insertions(+), 7 deletions(-) > > > > > > > > > > diff --git a/drivers/spi/cadence_qspi_apb.c > > > > > b/drivers/spi/cadence_qspi_apb.c index d053407..d377ad1 100644 > > > > > --- a/drivers/spi/cadence_qspi_apb.c > > > > > +++ b/drivers/spi/cadence_qspi_apb.c > > > > > @@ -534,6 +534,8 @@ void cadence_qspi_apb_controller_init(struct > > > > > cadence_spi_platdata *plat) > > > > > > > > > > /* Indirect mode configurations */ > > > > > writel((plat->sram_size/2), plat->regbase + > > > > > > > > > > CQSPI_REG_SRAMPARTITION); > > > > > + writel((u32)plat->ahbbase & > > > > > > > > CQSPI_INDIRECTTRIGGER_ADDR_MASK, > > > > > > > > Why can't you just drop this masking and the cast ? > > > > > > Masking is dropped in another patch in same series. > > > > So you're adding broken code first only to fix it later ? I don't like this. > > Try to understand the code, if you drop masking here, that will break the > code. > > > > > > Casting is required as ahbbase is a pointer. > > > > ahbbase is used as u32 value all around the place, so just fix it to > > u32 and drop the cast. > > Check ahbbase, it is declared as pointer. This patch is not to fix ahbbase type. Let me know if you have any more comments for this v5. Cheers, Vikas > > Cheers, > Vikas > > > > > Best regards, > > Marek Vasut

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[U-Boot] [PATCH 0/9] imx: mx6: support LPDDR2 and add mx6slevk spl
by Peng Fan 31 Aug '15

31 Aug '15

This patch set is to support SPL for mx6slevk board. But mx6slevk features one LPDDR2 chip. Then we need to first add LPDDR2 SPL support. Also introduce one ddr_type entry to differentiate DDR3 and LPDDR2. This patch set also correct tRFC and tXS for DDR3 4Gb chip. The LPDDR2 part is implemented referencing MX6SL LPDDR2 Script Aid V0.04.xlsx and JESD209-2E. I am not DDR expert, can not guarantee that this can achieve production quality. Please review. Patchset tested boot on mx6sxsabresd revb and mx6slevk board. Peng Fan (9): imx: mx6: ddr add more register entry for mmdc_p_regs imx: mx6: ddr no support MMDC1 for i.MX6SL imx: mx6: ddr correct tRFC and tXS imx: mx6: ddr add dram io configuration and header file for i.MX6SL imx: mx6: ddr add mpzqlp2ctl entry imx: mx6: ddr add an entry ddr_type for mx6_ddr_sysinfo imx: mx6: ddr init MMDC according to ddr_type imx: mx6: ddr: add LPDDR2 support imx: mx6slevk: add SPL support arch/arm/cpu/armv7/mx6/Kconfig | 1 + arch/arm/cpu/armv7/mx6/ddr.c | 379 +++++++++++++++++++++- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 140 +++++++- arch/arm/include/asm/arch-mx6/mx6sl-ddr.h | 45 +++ board/barco/platinum/spl_picon.c | 1 + board/barco/platinum/spl_titanium.c | 1 + board/freescale/mx6sabresd/mx6sabresd.c | 1 + board/freescale/mx6slevk/mx6slevk.c | 164 ++++++++++ board/freescale/mx6sxsabresd/mx6sxsabresd.c | 1 + board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 1 + board/gateworks/gw_ventana/gw_ventana_spl.c | 1 + board/solidrun/mx6cuboxi/mx6cuboxi.c | 1 + configs/mx6slevk_spl_defconfig | 8 + include/configs/imx6_spl.h | 2 +- include/configs/mx6slevk.h | 7 + 15 files changed, 733 insertions(+), 20 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/mx6sl-ddr.h create mode 100644 configs/mx6slevk_spl_defconfig -- 1.8.4

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[U-Boot] [PATCH v2 1/2] video, lg4573: make spi bus and cs configurable
by Heiko Schocher 31 Aug '15

31 Aug '15

make the spi bus and the spi chipselect configurable for the lg4573 driver. Use it on the aristainetos boards. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- Changes in v2: - add comments from Stefano Babic - move this patch before the 2b aristainetos board support and add there the spi bus settings for the display - rebased against u-boot-imx e1518ebda736a1225c4c2a651e21c446dee3fdb0 drivers/video/lg4573.c | 3 ++- include/configs/aristainetos2.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c index 43670fc..11fef27 100644 --- a/drivers/video/lg4573.c +++ b/drivers/video/lg4573.c @@ -220,7 +220,8 @@ err_claim_bus: static int do_lgset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - lg4573_spi_startup(0, 0, 10000000, SPI_MODE_0); + lg4573_spi_startup(CONFIG_LG4573_BUS, CONFIG_LG4573_CS, 10000000, + SPI_MODE_0); return 0; } diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index faeafe2..dd090c5 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -45,6 +45,8 @@ /* Framebuffer */ #define CONFIG_SYS_LDB_CLOCK 33246000 #define CONFIG_LG4573 +#define CONFIG_LG4573_BUS 0 +#define CONFIG_LG4573_CS 0 #define CONFIG_CMD_BMP -- 2.1.0

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