May 2015 - U-Boot

[U-Boot] [PATCH v1 1/2] cmd_sf: Add command "sf info" to show current device info
by Haikun Wang 07 Aug '15

07 Aug '15

Add command "sf info" to show the information of the current SPI flash device. Signed-off-by: Haikun Wang <haikun.wang(a)freescale.com> --- In current sf driver, we show the debug information during the flash probe period. In case of without DM SPI, we need to run command "sf probe" to get the debug information of the current SPI flash device. "sf probe" will re-identify the device every time and it reduce the efficiency. We can get the debug information without any re-identify process using "sf info". In case of using DM SPI, if we disable CONFIG_DM_DEVICE_REMOVE "sf probe" will only call the flash driver's probe function the first time you run it and no information will show after the first. It is recommended that only call the flash driver's probe function once during u-boot period. You can get the debug information using "sf info" in this case. Changes in v1: None. common/cmd_sf.c | 43 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/common/cmd_sf.c b/common/cmd_sf.c index 6aabf39..38841fa 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -503,6 +503,44 @@ static int do_spi_flash_test(int argc, char * const argv[]) } #endif /* CONFIG_CMD_SF_TEST */ +static int do_spi_flash_info(struct spi_flash *flash, bool dm_column_style) +{ + if (dm_column_style) { + struct udevice *bus; + struct udevice *dev; + struct dm_spi_slave_platdata *plat; + + dev = flash->dev; + bus = dev->parent; + plat = dev_get_parent_platdata(dev); + + printf("Device: %s\n", dev->name); + printf("Chipselect: %d\n", plat->cs); + printf("Bind Driver: %s\n", dev->driver->name); + printf("SPI bus: %s\n", bus->name); + printf("SPI bus number: %d\n", bus->seq); + printf("Flash type: %s\n", flash->name); + printf("Page size: "); + print_size(flash->page_size, "\n"); + printf("Erase size: "); + print_size(flash->erase_size, "\n"); + printf("Total size: "); + print_size(flash->size, "\n"); + if (flash->memory_map) + printf("Mapped at %p\n", flash->memory_map); + } else { + printf("SF: Detected %s with page size ", flash->name); + print_size(flash->page_size, ", erase size "); + print_size(flash->erase_size, ", total "); + print_size(flash->size, ""); + if (flash->memory_map) + printf(", mapped at %p", flash->memory_map); + puts("\n"); + } + + return 0; +} + static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { @@ -537,6 +575,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, else if (!strcmp(cmd, "test")) ret = do_spi_flash_test(argc, argv); #endif + else if (!strcmp(cmd, "info")) + ret = do_spi_flash_info(flash, IS_ENABLED(CONFIG_DM_SPI_FLASH)); else ret = -1; @@ -567,6 +607,7 @@ U_BOOT_CMD( "sf erase offset [+]len - erase `len' bytes from `offset'\n" " `+len' round up `len' to block size\n" "sf update addr offset len - erase and write `len' bytes from memory\n" - " at `addr' to flash at `offset'" + " at `addr' to flash at `offset'\n" + "sf info - display info of the current SPI Flash device\n" SF_TEST_HELP ); -- 2.1.0.27.g96db324

5 12

[U-Boot] [PATCH 0/3] CAAM RNG fixes
by Alex Porosanu 04 Aug '15

04 Aug '15

This set of patches fixes some issues identified with the usage of the RNG block of the CAAM in newer SoCs e.g. T2080. Alex Porosanu (3): crypto/fsl - disable RNG oscillator maximum frequency check crypto/fsl - change starting entropy delay value crypto/fsl - enable raw data instead of von Neumann data drivers/crypto/fsl/jr.c | 15 ++++++++++++--- include/fsl_sec.h | 13 ++++++++++++- 2 files changed, 24 insertions(+), 4 deletions(-) -- 1.9.1

2 6

[U-Boot] [PATCH] arm: ls1021atwr: program the regulator for deep sleep
by Chenhui Zhao 04 Aug '15

04 Aug '15

Program the external regulator to switch off voltage in deep sleep. Signed-off-by: Chenhui Zhao <chenhui.zhao(a)freescale.com> --- board/freescale/ls1021atwr/ls1021atwr.c | 34 +++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 2c8d6d1..37ec0ba 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -578,6 +578,37 @@ struct smmu_stream_id dev_stream_id[] = { { 0x18c, 0x0e, "DEBUG" }, }; +#ifdef CONFIG_DEEP_SLEEP +/* program the regulator (MC34VR500) to support deep sleep */ +void ls1twr_program_regulator(void) +{ + unsigned int i2c_bus; + u8 i2c_device_id; + +#define LS1TWR_I2C_BUS_MC34VR500 1 +#define MC34VR500_ADDR 0x8 +#define MC34VR500_DEVICEID 0x4 +#define MC34VR500_DEVICEID_MASK 0x0f + + i2c_bus = i2c_get_bus_num(); + i2c_set_bus_num(LS1TWR_I2C_BUS_MC34VR500); + i2c_device_id = i2c_reg_read(MC34VR500_ADDR, 0x0) & + MC34VR500_DEVICEID_MASK; + if (i2c_device_id != MC34VR500_DEVICEID) { + printf("The regulator (MC34VR500) does not exist. The device does not support deep sleep.\n"); + return; + } + + i2c_reg_write(MC34VR500_ADDR, 0x31, 0x4); + i2c_reg_write(MC34VR500_ADDR, 0x4d, 0x4); + i2c_reg_write(MC34VR500_ADDR, 0x6d, 0x38); + i2c_reg_write(MC34VR500_ADDR, 0x6f, 0x37); + i2c_reg_write(MC34VR500_ADDR, 0x71, 0x30); + + i2c_set_bus_num(i2c_bus); +} +#endif + int board_init(void) { #ifndef CONFIG_SYS_FSL_NO_SERDES @@ -600,6 +631,9 @@ int board_init(void) u_qe_init(); #endif +#ifdef CONFIG_DEEP_SLEEP + ls1twr_program_regulator(); +#endif return 0; } -- 1.9.1

3 2

[U-Boot] [PATCH] ls1021atwr: added deep sleep support in uboot
by Yuantian.Tang＠freescale.com 04 Aug '15

04 Aug '15

From: Tang Yuantian <Yuantian.Tang(a)freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang(a)freescale.com> --- arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 4 ++ board/freescale/ls1021atwr/ls1021atwr.c | 68 ++++++++++++++++++++++- include/configs/ls1021atwr.h | 7 ++- 3 files changed, 75 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index a8122c1..bbd5955 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -370,6 +370,10 @@ struct ccsr_serdes { #define DDR_DDR_ZQ_CNTL 0x89080600 #define DDR_CS0_CONFIG_2 0 #define DDR_SDRAM_CFG_MEM_EN 0x80000000 +#define SDRAM_CFG2_D_INIT 0x00000010 +#define DDR_CDR2_VREF_TRAIN_EN 0x00000080 +#define SDRAM_CFG2_FRC_SR 0x80000000 +#define SDRAM_CFG_BI 0x00000001 /* DDR memory controller registers */ struct ccsr_ddr { diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index ed5bd27..2c8d6d1 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -21,6 +21,7 @@ #include <tsec.h> #include <fsl_sec.h> #include <spl.h> +#include "../common/sleep.h" #ifdef CONFIG_U_QE #include "../../../drivers/qe/qe.h" #endif @@ -147,6 +148,7 @@ unsigned int get_soc_major_rev(void) void ddrmc_init(void) { struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR; + u32 temp_sdram_cfg; out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); @@ -160,7 +162,22 @@ void ddrmc_init(void) out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4); out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5); - out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); +#ifdef CONFIG_DEEP_SLEEP + if (is_warm_boot()) { + out_be32(&ddr->sdram_cfg_2, + DDR_SDRAM_CFG_2 & ~SDRAM_CFG2_D_INIT); + out_be32(&ddr->init_addr, CONFIG_SYS_SDRAM_BASE); + out_be32(&ddr->init_ext_addr, (1 << 31)); + + /* DRAM VRef will not be trained */ + out_be32(&ddr->ddr_cdr2, + DDR_DDR_CDR2 & ~DDR_CDR2_VREF_TRAIN_EN); + } else +#endif + { + out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); + out_be32(&ddr->ddr_cdr2, DDR_DDR_CDR2); + } out_be32(&ddr->sdram_mode, DDR_SDRAM_MODE); out_be32(&ddr->sdram_mode_2, DDR_SDRAM_MODE_2); @@ -173,14 +190,35 @@ void ddrmc_init(void) out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); out_be32(&ddr->ddr_cdr1, DDR_DDR_CDR1); - out_be32(&ddr->ddr_cdr2, DDR_DDR_CDR2); out_be32(&ddr->sdram_clk_cntl, DDR_SDRAM_CLK_CNTL); out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL); out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2); udelay(1); - out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | DDR_SDRAM_CFG_MEM_EN); + +#ifdef CONFIG_DEEP_SLEEP + if (is_warm_boot()) { + /* enter self-refresh */ + temp_sdram_cfg = in_be32(&ddr->sdram_cfg_2); + temp_sdram_cfg |= SDRAM_CFG2_FRC_SR; + out_be32(&ddr->sdram_cfg_2, temp_sdram_cfg); + + temp_sdram_cfg = (DDR_SDRAM_CFG_MEM_EN | SDRAM_CFG_BI); + } else +#endif + temp_sdram_cfg = (DDR_SDRAM_CFG_MEM_EN & ~SDRAM_CFG_BI); + + out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | temp_sdram_cfg); + +#ifdef CONFIG_DEEP_SLEEP + if (is_warm_boot()) { + /* exit self-refresh */ + temp_sdram_cfg = in_be32(&ddr->sdram_cfg_2); + temp_sdram_cfg &= ~SDRAM_CFG2_FRC_SR; + out_be32(&ddr->sdram_cfg_2, temp_sdram_cfg); + } +#endif } int dram_init(void) @@ -190,6 +228,11 @@ int dram_init(void) #endif gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + +#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD) + fsl_dp_resume(); +#endif + return 0; } @@ -384,6 +427,11 @@ int board_early_init_f(void) out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); } +#if defined(CONFIG_DEEP_SLEEP) + if (is_warm_boot()) + fsl_dp_disable_console(); +#endif + return 0; } @@ -395,6 +443,11 @@ void board_init_f(ulong dummy) get_clocks(); +#if defined(CONFIG_DEEP_SLEEP) + if (is_warm_boot()) + fsl_dp_disable_console(); +#endif + preloader_console_init(); dram_init(); @@ -563,6 +616,15 @@ int misc_init_r(void) } #endif +#if defined(CONFIG_DEEP_SLEEP) +void board_sleep_prepare(void) +{ +#ifdef CONFIG_LS102XA_NS_ACCESS + enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev)); +#endif +} +#endif + int ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 729205f..4b96feb 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -18,6 +18,10 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DEEP_SLEEP +#ifdef CONFIG_DEEP_SLEEP +#define CONFIG_SILENT_CONSOLE +#endif /* * Size of malloc() pool @@ -60,7 +64,8 @@ #define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_TEXT_BASE 0x82000000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ + CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 -- 2.1.0.27.g96db324

3 2

[U-Boot] [PATCH] LS1021atwr: Enable bootscript for secure boot
by Gaurav Rana 04 Aug '15

04 Aug '15

Enable bootscript support in secure boot for establishing chain of trust on LS1021atwr. Signed-off-by: Gaurav Rana <gaurav.rana(a)freescale.com> --- include/configs/ls1021atwr.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 729205f..f637b59 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -444,6 +444,7 @@ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB +#include <asm/fsl_secure_boot.h> #endif #endif -- 1.8.1.4

2 1

[U-Boot] [PATCH 1/2] qe: transform parameter to compatible type
by Zhao Qiang 04 Aug '15

04 Aug '15

when using printf, the parameter type need to be compatible type, so transform them to compatible type Signed-off-by: Zhao Qiang <B45475(a)freescale.com> --- drivers/qe/qe.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 84e1433..f1df0a4 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -313,9 +313,10 @@ static void qe_upload_microcode(const void *base, if (ucode->major || ucode->minor || ucode->revision) printf("QE: uploading microcode '%s' version %u.%u.%u\n", - ucode->id, ucode->major, ucode->minor, ucode->revision); + (char *)ucode->id, (u16)ucode->major, (u16)ucode->minor, + (u16)ucode->revision); else - printf("QE: uploading microcode '%s'\n", ucode->id); + printf("QE: uploading microcode '%s'\n", (char *)ucode->id); /* Use auto-increment */ out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) | -- 2.1.0.27.g96db324

4 10

[U-Boot] [PATCH] arm:ls1021a: Reserve secure code into RAM instead of OCRAM
by Zhuoyu Zhang 04 Aug '15

04 Aug '15

For ls1021a, Reserve secure code in to memory in case OCRAM is needed by other usage. Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang(a)freescale.com> --- include/configs/ls1021aqds.h | 1 - include/configs/ls1021atwr.h | 1 - 2 files changed, 2 deletions(-) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 3dc4da3..42439a4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -554,7 +554,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_LS102XA_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_TIMER_CLK_FREQ 12500000 -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a13876b..dccc661 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -347,7 +347,6 @@ #define CONFIG_LS102XA_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_TIMER_CLK_FREQ 12500000 -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -- 2.1.0.27.g96db324

4 5

[U-Boot] MinnowBoard Max uboot
by Beaman, Thomas 03 Aug '15

03 Aug '15

Hi Simon, I see you have put support for the MinnowBoard Max in the u-boot mainline. Thanks this is a very useful addition. I have been able to follow your readme and build a working bare metal uboot. Using the built uboot I can load and bring up a Linux Kernel. What I noticed from the running kernel is that only one of the two cores on the E3825 is running. In the power PC uboots I usually see a section for the multiple cores in the .dts file. My questions is how do I get both CPUs running on this board. Is it a uboot .dts file setup that will enable this, or is something in the kernel start up that does this. As a test I boot the same kernel using the EFI BIOS on the minnow board and both CPUs are running. Any suggestions or comments you have would be welcomed. Thanks, Tom Beaman

3 17

[U-Boot] [PATCH U-Boot] ARM: rpi_b: detect board revision
by Stephen Warren 02 Aug '15

02 Aug '15

Detect the board revision early during boot, and print the decoded model name. Eventually, this information can be used for tasks such as: - Allowing/preventing USB device mode; some models have a USB device on- board so only host mode makes sense. Others connect the SoC directly to the USB connector, so device-mode might make sense. - The on-board USB hub/Ethernet requires different GPIOs to enable it, although luckily the default appears to be fine so far. - The compute module contains an on-board eMMC device, so we could store the environment there. Other models use an SD card and so don't support saving the environment (unless we store it in a file on the FAT boot partition...) Set $fdtfile based on this information. At present, the mainline Linux kernel doesn't contain a separate DTB for most models, but I hope that will change soon. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- I'm considering renaming rpi_b -> rpi in U-Boot since it supports many models. Hopefully I can persuade U-Boot to load the environment from different places at run-time, so we won't need different builds based on whether the environment is in eMMC or not for example. arch/arm/include/asm/arch-bcm2835/mbox.h | 33 +++++++++ board/raspberrypi/rpi_b/rpi_b.c | 122 ++++++++++++++++++++++++++++++- include/configs/rpi_b.h | 1 - 3 files changed, 152 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h index 61f427d914cd..0289ba6a917e 100644 --- a/arch/arm/include/asm/arch-bcm2835/mbox.h +++ b/arch/arm/include/asm/arch-bcm2835/mbox.h @@ -119,6 +119,39 @@ struct bcm2835_mbox_tag_hdr { * }; */ +#define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002 + +/* + * 0x2..0xf from: + * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-r… + * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733 + * 0x10, 0x11 from swarren's testing + */ +#define BCM2835_BOARD_REV_B_I2C0_2 0x2 +#define BCM2835_BOARD_REV_B_I2C0_3 0x3 +#define BCM2835_BOARD_REV_B_I2C1_4 0x4 +#define BCM2835_BOARD_REV_B_I2C1_5 0x5 +#define BCM2835_BOARD_REV_B_I2C1_6 0x6 +#define BCM2835_BOARD_REV_A_7 0x7 +#define BCM2835_BOARD_REV_A_8 0x8 +#define BCM2835_BOARD_REV_A_9 0x9 +#define BCM2835_BOARD_REV_B_REV2_d 0xd +#define BCM2835_BOARD_REV_B_REV2_e 0xe +#define BCM2835_BOARD_REV_B_REV2_f 0xf +#define BCM2835_BOARD_REV_B_PLUS 0x10 +#define BCM2835_BOARD_REV_CM 0x11 + +struct bcm2835_mbox_tag_get_board_rev { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 rev; + } resp; + } body; +}; + #define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003 struct bcm2835_mbox_tag_get_mac_address { diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c index 7445f5318ad2..aaded88b4ba0 100644 --- a/board/raspberrypi/rpi_b/rpi_b.c +++ b/board/raspberrypi/rpi_b/rpi_b.c @@ -42,6 +42,12 @@ struct msg_get_arm_mem { u32 end_tag; }; +struct msg_get_board_rev { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_get_board_rev get_board_rev; + u32 end_tag; +}; + struct msg_get_mac_address { struct bcm2835_mbox_hdr hdr; struct bcm2835_mbox_tag_get_mac_address get_mac_address; @@ -60,6 +66,67 @@ struct msg_get_clock_rate { u32 end_tag; }; +/* See comments in mbox.h for data source */ +static const struct { + const char *name; + const char *fdtfile; +} models[] = { + [BCM2835_BOARD_REV_B_I2C0_2] = { + "Model B (no P5)", + "bcm2835-rpi-b-i2c0.dtb", + }, + [BCM2835_BOARD_REV_B_I2C0_3] = { + "Model B (no P5)", + "bcm2835-rpi-b-i2c0.dtb", + }, + [BCM2835_BOARD_REV_B_I2C1_4] = { + "Model B", + "bcm2835-rpi-b.dtb", + }, + [BCM2835_BOARD_REV_B_I2C1_5] = { + "Model B", + "bcm2835-rpi-b.dtb", + }, + [BCM2835_BOARD_REV_B_I2C1_6] = { + "Model B", + "bcm2835-rpi-b.dtb", + }, + [BCM2835_BOARD_REV_A_7] = { + "Model A", + "bcm2835-rpi-a.dtb", + }, + [BCM2835_BOARD_REV_A_8] = { + "Model A", + "bcm2835-rpi-a.dtb", + }, + [BCM2835_BOARD_REV_A_9] = { + "Model A", + "bcm2835-rpi-a.dtb", + }, + [BCM2835_BOARD_REV_B_REV2_d] = { + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", + }, + [BCM2835_BOARD_REV_B_REV2_e] = { + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", + }, + [BCM2835_BOARD_REV_B_REV2_f] = { + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", + }, + [BCM2835_BOARD_REV_B_PLUS] = { + "Model B+", + "bcm2835-rpi-b-plus.dtb", + }, + [BCM2835_BOARD_REV_CM] = { + "Compute Module", + "bcm2835-rpi-cm.dtb", + }, +}; + +u32 rpi_board_rev = 0; + int dram_init(void) { ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16); @@ -79,13 +146,27 @@ int dram_init(void) return 0; } -int misc_init_r(void) +static void set_fdtfile(void) +{ + const char *fdtfile; + + if (getenv("fdtfile")) + return; + + fdtfile = models[rpi_board_rev].fdtfile; + if (!fdtfile) + fdtfile = "bcm2835-rpi-other.dtb"; + + setenv("fdtfile", fdtfile); +} + +static void set_usbethaddr(void) { ALLOC_ALIGN_BUFFER(struct msg_get_mac_address, msg, 1, 16); int ret; if (getenv("usbethaddr")) - return 0; + return; BCM2835_MBOX_INIT_HDR(msg); BCM2835_MBOX_INIT_TAG(&msg->get_mac_address, GET_MAC_ADDRESS); @@ -94,11 +175,18 @@ int misc_init_r(void) if (ret) { printf("bcm2835: Could not query MAC address\n"); /* Ignore error; not critical */ - return 0; + return; } eth_setenv_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac); + return; +} + +int misc_init_r(void) +{ + set_fdtfile(); + set_usbethaddr(); return 0; } @@ -126,8 +214,36 @@ static int power_on_module(u32 module) return 0; } +static void get_board_rev(void) +{ + ALLOC_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1, 16); + int ret; + const char *name; + + BCM2835_MBOX_INIT_HDR(msg); + BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV); + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); + if (ret) { + printf("bcm2835: Could not query board revision\n"); + /* Ignore error; not critical */ + return; + } + + rpi_board_rev = msg->get_board_rev.body.resp.rev; + if (rpi_board_rev >= ARRAY_SIZE(models)) + rpi_board_rev = 0; + + name = models[rpi_board_rev].name; + if (!name) + name = "Unknown model"; + printf("RPI model: %s\n", name); +} + int board_init(void) { + get_board_rev(); + gd->bd->bi_boot_params = 0x100; return power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD); diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h index 7bf2bfe09a0b..841169cb6c97 100644 --- a/include/configs/rpi_b.h +++ b/include/configs/rpi_b.h @@ -176,7 +176,6 @@ "pxefile_addr_r=0x00100000\0" \ "kernel_addr_r=0x01000000\0" \ "fdt_addr_r=0x02000000\0" \ - "fdtfile=bcm2835-rpi-b.dtb\0" \ "ramdisk_addr_r=0x02100000\0" \ #define BOOT_TARGET_DEVICES(func) \ -- 1.9.1

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[U-Boot] [PATCH] env_mmc: avoid stack allocation for env
by Tim Harvey 02 Aug '15

02 Aug '15

Allocating space for temporary env on the stack makes env_relocate_spec() unsuitable for SPL environments which have very little stack. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- common/env_mmc.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/common/env_mmc.c b/common/env_mmc.c index 6c4ce2f..19a28da 100644 --- a/common/env_mmc.c +++ b/common/env_mmc.c @@ -213,13 +213,19 @@ void env_relocate_spec(void) u32 offset1, offset2; int read1_fail = 0, read2_fail = 0; int crc1_ok = 0, crc2_ok = 0; - env_t *ep; + env_t *ep, *tmp_env1, *tmp_env2; int ret; int dev = CONFIG_SYS_MMC_ENV_DEV; const char *errmsg = NULL; - ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1); - ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1); + tmp_env1 = memalign(CONFIG_SYS_CACHELINE_SIZE, CONFIG_ENV_SIZE); + tmp_env2 = memalign(CONFIG_SYS_CACHELINE_SIZE, CONFIG_ENV_SIZE); + if (tmp_env1 == NULL || tmp_env2 == NULL) { + puts("Can't allocate buffers for environment\n"); + ret = 1; + errmsg = "!malloc() failed"; + goto err; + } #ifdef CONFIG_SPL_BUILD dev = 0; @@ -287,6 +293,8 @@ void env_relocate_spec(void) ret = 0; fini: + free(tmp_env1); + free(tmp_env2); fini_mmc_for_env(mmc); err: if (ret) -- 1.9.1

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