May 2015 - U-Boot

[U-Boot] [PATCH v2 0/9] Collected fixes and improvements
by Simon Glass 04 Jul '15

04 Jul '15

This series contains a hodge-podge of minor fixes and improvements in various areas. They were found while adjusting mainline Nyan-big to work with Chrome OS verified boot. Rather than send a large number of individual patches I decide to collect them into a series. They should all be independent so can be applied without coordination. Sample of areas covered: - Detect a USB device being connected/disconnected - TPM support with CONFIG_DM_I2C - Detect when U-Boot is started from SPL - ARM binary output and boot tweaks - Small LCD BMP-drawing improvement - Tegra removable MMC support - Various small nits in driver model, sandbox, etc. Changes in v2: - Fix use of 'hub' instead of 'dev' in usb_detect_change() - Clarify that this commit provides only the API, not the implementation - Rename constant to UBOOT_NOT_LOADED_FROM_SPL - Add new patch to remove typedefs from bmp_layout.h - Rename constant to UBOOT_NOT_LOADED_FROM_SPL - Use tegra-pinmux-scripts to update the pinmux - Drop applied patches from the series Simon Glass (9): dm: usb: Implement usb_detect_change() for driver model arm: spl: Add an API to detect when U-Boot is started from SPL arm: Allow cleanup_before_linux() without disabling caches sandbox: Add an implementation for cleanup_before_linux_select() Remove typedefs from bmp_layout.h lcd: Support colour lookup table on 16bpp display in BMP images tegra124: Implement spl_was_boot_source() tegra: nyan-big: Allow TPM on I2C tegra124: Expand SPL space by 8KB arch/arm/cpu/armv7/cpu.c | 47 ++++++++++++++++---------- arch/arm/mach-tegra/board.c | 16 +++++++++ arch/sandbox/cpu/cpu.c | 5 +++ board/nvidia/nyan-big/pinmux-config-nyan-big.h | 8 ++--- common/cmd_bmp.c | 16 ++++----- common/lcd.c | 33 +++++++++++++----- drivers/usb/host/usb-uclass.c | 43 +++++++++++++++++++++++ drivers/video/atmel_lcdfb.c | 4 +-- drivers/video/bus_vcxk.c | 4 +-- drivers/video/cfb_console.c | 10 +++--- include/bmp_layout.h | 17 +++++----- include/common.h | 15 ++++++++ include/configs/tegra124-common.h | 2 +- include/spl.h | 13 +++++++ 14 files changed, 176 insertions(+), 57 deletions(-) -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH] ARM: enable CONFIG_USE_PRIVATE_LIBGCC by default
by Masahiro Yamada 03 Jul '15

03 Jul '15

Use the library code in the U-Boot source tree so we do not depend on specific tool-chains. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- arch/arm/Kconfig | 3 +++ arch/arm/cpu/armv7/tegra-common/Kconfig | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 986b4c5..4d73530 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -51,6 +51,9 @@ config SYS_CPU default "sa1100" if CPU_SA1100 default "armv8" if ARM64 +config USE_PRIVATE_LIBGCC + default y + config SEMIHOSTING bool "support boot from semihosting" help diff --git a/arch/arm/cpu/armv7/tegra-common/Kconfig b/arch/arm/cpu/armv7/tegra-common/Kconfig index 1446452..a5ab872 100644 --- a/arch/arm/cpu/armv7/tegra-common/Kconfig +++ b/arch/arm/cpu/armv7/tegra-common/Kconfig @@ -17,9 +17,6 @@ config TEGRA124 endchoice -config USE_PRIVATE_LIBGCC - default y if SPL_BUILD - source "arch/arm/cpu/armv7/tegra20/Kconfig" source "arch/arm/cpu/armv7/tegra30/Kconfig" source "arch/arm/cpu/armv7/tegra114/Kconfig" -- 1.9.1

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[U-Boot] [PATCH 1/6] armv8/cache: Fix page table creation
by Thierry Reding 03 Jul '15

03 Jul '15

From: Thierry Reding <treding(a)nvidia.com> While generating the page tables, a running integer index is shifted by SECTION_SHIFT (29) and causes overflow for any integer bigger than 7. The page tables therefore alias to the same 8 sections and cause U-Boot to hang once the MMU is enabled. Fix this by making the index a 64-bit unsigned integer and so avoid the overflow. Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Marc Zyngier <marc.zyngier(a)arm.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> --- arch/arm/cpu/armv8/cache_v8.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index c5ec5297cd39..254a629a3b8c 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -25,9 +25,9 @@ void set_pgtable_section(u64 *page_table, u64 index, u64 section, /* to activate the MMU we need to set up virtual memory */ static void mmu_setup(void) { - int i, j, el; bd_t *bd = gd->bd; - u64 *page_table = (u64 *)gd->arch.tlb_addr; + u64 *page_table = (u64 *)gd->arch.tlb_addr, i, j; + int el; /* Setup an identity-mapping for all spaces */ for (i = 0; i < (PGTABLE_SIZE >> 3); i++) { -- 2.3.2

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[U-Boot] [PATCH] arm: dcc: Add uart dcc support for armv8
by Michal Simek 02 Jul '15

02 Jul '15

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Added UART DCC support for armv8 Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Not sure if CONFIG_CPU_ARMV8 is the right symbol but we are following pattern above. Maybe CONFIG_ARM64? --- drivers/serial/arm_dcc.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index e77773740fb0..df7eb05e8246 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -61,6 +61,22 @@ #define status_dcc(x) \ __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x)) +#elif defined(CONFIG_CPU_ARMV8) +/* + * ARMV8 + */ +#define DCC_RBIT (1 << 30) +#define DCC_WBIT (1 << 29) + +#define write_dcc(x) \ + __asm__ volatile ("msr dbgdtrtx_el0, %0\n" : : "r" (x)) + +#define read_dcc(x) \ + __asm__ volatile ("mrs %0, dbgdtrrx_el0\n" : "=r" (x)) + +#define status_dcc(x) \ + __asm__ volatile ("mrs %0, mdccsr_el0\n" : "=r" (x)) + #else #define DCC_RBIT (1 << 0) #define DCC_WBIT (1 << 1) -- 2.3.5

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[U-Boot] [PATCH] ARM: cache-cp15: Make sure EAE is not enabled
by Tomeu Vizoso 02 Jul '15

02 Jul '15

This could happen if we are being chainloaded by Coreboot with LPAE enabled, as is the case on the Tegra-based Chromebooks. Signed-off-by: Tomeu Vizoso <tomeu.vizoso(a)collabora.com> --- arch/arm/lib/cache-cp15.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0291afa..78fb429 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -96,6 +96,10 @@ static inline void mmu_setup(void) dram_bank_mmu_setup(i); } + /* Make sure EAE is not enabled */ + asm volatile("mcr p15, 0, %0, c2, c0, 2" + : : "r" (0) : "memory"); + /* Copy the page table address to cp15 */ asm volatile("mcr p15, 0, %0, c2, c0, 0" : : "r" (gd->arch.tlb_addr) : "memory"); -- 2.3.6

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[U-Boot] [PATCH 0/7] Add Cavium ThunderX support
by Sergey Temerkhanov 02 Jul '15

02 Jul '15

This patch series adds support for Cavium ThunderX 88xx SoC family (http://www.cavium.com/ThunderX_ARM_Processors.html).

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[U-Boot] [RFC PATCH] ARMv8: add Kconfig and CPU_V8 option
by fenghua＠phytium.com.cn 02 Jul '15

02 Jul '15

From: David Feng <fenghua(a)phytium.com.cn> This patch add Kconfig to armv8. Signed-off-by: David Feng <fenghua(a)phytium.com.cn> --- arch/arm/Kconfig | 16 +++++++++++----- arch/arm/cpu/armv8/Kconfig | 10 ++++++++++ 2 files changed, 21 insertions(+), 5 deletions(-) create mode 100644 arch/arm/cpu/armv8/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 986b4c5..a01cb3c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -33,6 +33,10 @@ config CPU_V7 bool select HAS_VBAR +config CPU_V8 + bool + select ARM64 + config CPU_PXA bool @@ -729,24 +733,24 @@ config TEGRA config TARGET_VEXPRESS64_AEMV8A bool "Support vexpress_aemv8a" - select ARM64 + select CPU_V8 config TARGET_VEXPRESS64_BASE_FVP bool "Support Versatile Express ARMv8a FVP BASE model" - select ARM64 + select CPU_V8 select SEMIHOSTING config TARGET_VEXPRESS64_JUNO bool "Support Versatile Express Juno Development Platform" - select ARM64 + select CPU_V8 config TARGET_LS2085A_EMU bool "Support ls2085a_emu" - select ARM64 + select CPU_V8 config TARGET_LS2085A_SIMU bool "Support ls2085a_simu" - select ARM64 + select CPU_V8 config TARGET_LS1021AQDS bool "Support ls1021aqds" @@ -855,6 +859,8 @@ source "arch/arm/cpu/armv7/zynq/Kconfig" source "arch/arm/cpu/armv7/Kconfig" +source "arch/arm/cpu/armv8/Kconfig" + source "board/aristainetos/Kconfig" source "board/BuR/kwb/Kconfig" source "board/BuR/tseries/Kconfig" diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig new file mode 100644 index 0000000..5953848 --- /dev/null +++ b/arch/arm/cpu/armv8/Kconfig @@ -0,0 +1,10 @@ +if CPU_V8 + +menu "ARMv8" + +config ARMV8_SWITCH_TO_EL1 + boolean "Switch to exception level 1 when loading OS" + +endmenu + +endif -- 1.7.9.5

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[U-Boot] [PATCH] powerpc/mpc85xx:Add GCC flag -fno-delete-null-pointer-checks
by Prabhakar Kushwaha 01 Jul '15

01 Jul '15

-fdelete-null-pointer-checks flag controls global dataflow analyses and eliminate useless checks for null pointers; It assume that if a pointer is checked after it has already been dereferenced, it cannot be null. This flag is enabled by default. gcc v4.9 has more optimizations added to this option. Hence it is very aggressive with GCC v4.9 series. Add -fno-delete-null-pointer-checks to disable the optimization Signed-off-by: Rohit Dharmakan <rohitarulraj(a)freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- arch/powerpc/cpu/mpc85xx/config.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/config.mk b/arch/powerpc/cpu/mpc85xx/config.mk index 72c964c..2aedd24 100644 --- a/arch/powerpc/cpu/mpc85xx/config.mk +++ b/arch/powerpc/cpu/mpc85xx/config.mk @@ -5,7 +5,8 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_CPPFLAGS += -Wa,-me500 -msoft-float -mno-string +PLATFORM_CPPFLAGS += -Wa,-me500 -msoft-float -mno-string \ + -fno-delete-null-pointer-checks # -mspe=yes is needed to have -mno-spe accepted by a buggy GCC; # see "[PATCH,rs6000] make -mno-spe work as expected" on -- 1.9.1

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[U-Boot] [PATCH] net: designware: fix driver name
by Masahiro Yamada 30 Jun '15

30 Jun '15

It is working, but not nice... Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/net/designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index ae51cf3..bfce218 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -605,7 +605,7 @@ static const struct udevice_id designware_eth_ids[] = { { } }; -U_BOOT_DRIVER(eth_sandbox) = { +U_BOOT_DRIVER(eth_designware) = { .name = "eth_designware", .id = UCLASS_ETH, .of_match = designware_eth_ids, -- 1.9.1

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[U-Boot] [PATCH v2 00/16] tegra: Expand Nyan-big support
by Simon Glass 30 Jun '15

30 Jun '15

This series expands Nyan-big support: - Enable Chrome OS EC, so that the keyboard works - Add some extra clock and pre-kernel init required for reliable operation - Add Chrome OS environment variables, including 'run nvboot' to allow booting Chrome OS more easily Still missing are audio and USB. Changes in v2: - Use spi-max-frequency in both the bus and slave nodes - Remove unnecessary ODMDATA mangling - Use existing __stringify() macro - Drop tegra timer patch as it is not needed - Drop a few patches that have already been applied Doug Anderson (1): Add Chrome OS config header Simon Glass (15): tegra: cros_ec: Add tegra support for Chrome OS EC tegra: spi: Drop the claim_bus() method to correct delays dm: tegra: cros_ec: Enable Chrome OS EC on Nyan-big tegra: spi: Support slow SPI rates tegra: clock: Support enabling external clocks tegra: clock: Adjust PLL access to avoid a warning tegra: Introduce SRAM repair on tegra124 tegra: Add missing tegra124 peripherals tegra: Increase maximum arguments to 32 tegra: lcd: Tidy up clock init tegra: Allow board-specific init tegra: nyan-big: Add additional clock and kernel init tegra: config: Allow Chrome OS environment settings to be included tegra: Replace 'Norrin' with 'Nyan-big' and fix typo tegra: config: nyan-big: Add options required by Chrome OS boot arch/arm/dts/tegra124-nyan-big.dts | 3 + arch/arm/include/asm/arch-tegra/clock.h | 8 + arch/arm/include/asm/arch-tegra/sys_proto.h | 7 + arch/arm/include/asm/arch-tegra124/clock-tables.h | 12 +- arch/arm/include/asm/arch-tegra124/flow.h | 12 + arch/arm/mach-tegra/clock.c | 24 +- arch/arm/mach-tegra/powergate.c | 20 +- arch/arm/mach-tegra/tegra124/Kconfig | 2 +- arch/arm/mach-tegra/tegra124/clock.c | 2 +- board/nvidia/common/board.c | 8 +- board/nvidia/nyan-big/MAINTAINERS | 2 +- board/nvidia/nyan-big/nyan-big.c | 69 ++++ configs/nyan-big_defconfig | 5 + drivers/spi/tegra114_spi.c | 40 +- drivers/video/tegra124/tegra124-lcd.c | 4 +- include/configs/chromeos.h | 457 ++++++++++++++++++++++ include/configs/nyan-big.h | 9 + include/configs/tegra-common-post.h | 15 +- include/configs/tegra-common.h | 2 +- 19 files changed, 663 insertions(+), 38 deletions(-) create mode 100644 include/configs/chromeos.h -- 2.2.0.rc0.207.ga3a616c

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