May 2015 - U-Boot

[U-Boot] [PATCH v2 00/18] dm: Introduce device tree support in SPL (for Rockchip)
by Simon Glass 11 Jun '15

11 Jun '15

With driver model SPL support in place the remaining driver difference between U-Boot proper and SPL is that SPL does not support device tree. This series adds this support, using a Rockchip board as an example. One problem with device tree is that U-Boot has no way of dropping features it does not need or use. For SPL this problem needs to be solved and this series uses a new 'fdtgrep' tool for this. The 45KB Firefly device tree reduces to 558 bytes when unused material is removed. This series includes some changes aimed at reduce code size in SPL, including: - dropping alias sequence support (the aliases node) since many boards just use a single UART in SPL - adding a smaller panic() function that does not support printf()-format strings - removing device unbind code which will never be used in SPL Overall the resulting SPL binary is 8694 bytes with my Linaro 4.8.2 compiler, including the device tree, using Thumb-2 and with a hacked build so that CONFIG_USE_PRIVATE_LIBGCC is enabled. Of this: 1768 bytes is driver model core code 1556 bytes is device tree code 558 bytes is the device tree itself 4756 is other code, including serial drivers, rodata and data The last figure includes rodata incorrectly added by the tool chain [1]. With a bug-fixed gcc 4.9.2 the total size is 6758 bytes including device tree. Approximately 750 bytes is used for strings and driver data (root device and serial) associated with driver model and device tree. This adds up an overhead of around 4750 bytes for driver model and device tree, including the code, rodata and device tree itself. It should therefore be possible to use driver model and device tree in SPL for board that have enough SRAM. Clearly 4KB is impossible without further work (perhaps removing some error strings). I suspect 8KB would be tricky, allowing only 3KB for stack and other code. But 16KB should work OK. SRAM sizes for recent SoCs I am aware of are: Rockchip RK3288: 96KB Tegra 124: 128KB Samsung Exynos 5420: 384KB The Rockchip Firefly was chosen for this work since it is a fairly recent board and is readily available. Rockchip engineers have been actively upstreaming code to Linux in the past year and there is a very full-featured U-Boot available. But it is invisible to most U-Boot people - mainline Rockchip support seems well overdue. This series does not make a serious start on that, since it only prints a message in SPL and then hangs, but additional work should get it booting to a prompt. This series has not yet been tested on a Radxa Rock Pro but is likely to work there also, using the Firefly config. Future work will add support for this board also. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303 Changes in v2: - Simplify the support for CONFIG_SYS_NS16550_MEM32 - Also drop the memory table space - Add a new patch for memalign_simple() - Add new patch to remove unused strings from a device tree - Add new patch with fdt_first/next_region() functions - Add new patch with fdtgrep tool - Add new patch to reduce SPL device tree size with fdtgrep - Tidy up license headers and remove SPL #ifdefs - Tidy up license headers - Tidy up license headers and remove SPL #ifdefs - Drop use of CONFIG_USE_PRIVATE_LIBGCC=y - Tidy up license headers and remove SPL #ifdefs Simon Glass (18): dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model fdt: arm: Drop device tree padding dts: Disable device tree for SPL on all boards dm: serial: Don't support CONFIG_CONS_INDEX with device tree Add a simple version of memalign() Remove SPL undefine of CONFIG_OF_CONTROL mkimage: Display a better list of available image types fdt: Add a function to remove unused strings from a device tree fdt: Add fdt_first/next_region() functions fdt: Add fdtgrep tool dm: Reduce SPL device tree size dm: rockchip: Add serial support rockchip: Bring in RK3288 device tree file includes and bindings rockchip: Add base SoC files rockchip: Add basic support for firefly-rk3288 rockchip: Add the beginnings of an image tool rockchip: Add a simple README rockchip: Add basic support for jerry Makefile | 2 +- arch/arm/Kconfig | 18 + arch/arm/Makefile | 1 + arch/arm/cpu/armv7/exynos/Kconfig | 8 + arch/arm/cpu/armv7/s5pc1xx/Kconfig | 2 + arch/arm/cpu/u-boot-spl.lds | 2 +- arch/arm/dts/Makefile | 6 +- arch/arm/dts/cros-ec-sbs.dtsi | 16 + arch/arm/dts/rk3288-firefly.dts | 44 + arch/arm/dts/rk3288-firefly.dtsi | 454 ++++++ arch/arm/dts/rk3288-jerry.dts | 203 +++ arch/arm/dts/rk3288-thermal.dtsi | 88 ++ arch/arm/dts/rk3288-veyron-chromebook.dtsi | 200 +++ arch/arm/dts/rk3288-veyron.dtsi | 808 +++++++++++ arch/arm/dts/rk3288.dtsi | 1458 ++++++++++++++++++++ arch/arm/include/asm/arch-rockchip/clock.h | 12 + arch/arm/include/asm/arch-rockchip/gpio.h | 5 + arch/arm/include/asm/arch-rockchip/grf.h | 181 +++ arch/arm/mach-rockchip/Kconfig | 23 + arch/arm/mach-rockchip/Makefile | 12 + arch/arm/mach-rockchip/board-spl.c | 54 + arch/arm/mach-rockchip/board.c | 17 + arch/arm/mach-rockchip/common.c | 11 + arch/arm/mach-rockchip/rk3288/Kconfig | 26 + arch/arm/mach-tegra/Kconfig | 3 + board/firefly/firefly-rk3288/Kconfig | 15 + board/firefly/firefly-rk3288/MAINTAINERS | 6 + board/firefly/firefly-rk3288/Makefile | 7 + board/firefly/firefly-rk3288/firefly-rk3288.c | 7 + board/google/chromebook_jerry/Kconfig | 15 + board/google/chromebook_jerry/MAINTAINERS | 6 + board/google/chromebook_jerry/Makefile | 7 + board/google/chromebook_jerry/jerry.c | 7 + board/google/common/Makefile | 2 +- common/image.c | 59 +- common/malloc_simple.c | 14 + configs/am335x_boneblack_vboot_defconfig | 1 + configs/arches_defconfig | 1 + configs/canyonlands_defconfig | 1 + configs/chromebook_jerry_defconfig | 10 + configs/firefly-rk3288_defconfig | 10 + configs/galileo_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/odroid_defconfig | 1 + configs/origen_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/socfpga_socrates_defconfig | 1 + configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + configs/zynq_microzed_defconfig | 1 + configs/zynq_zc70x_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + configs/zynq_zybo_defconfig | 1 + doc/README.rockchip | 83 ++ .../clock/rockchip,rk3288-cru.txt | 61 + doc/device-tree-bindings/clock/rockchip.txt | 77 ++ .../pinctrl/rockchip,pinctrl.txt | 157 +++ .../thermal/rockchip-thermal.txt | 68 + drivers/core/Makefile | 2 + drivers/serial/Kconfig | 9 + drivers/serial/Makefile | 1 + drivers/serial/ns16550.c | 4 + drivers/serial/serial-uclass.c | 69 +- drivers/serial/serial_rockchip.c | 41 + dts/Kconfig | 12 + include/config_uncmd_spl.h | 2 + include/configs/chromebook_jerry.h | 50 + include/configs/firefly-rk3288.h | 50 + include/dt-bindings/clock/rk3288-cru.h | 370 +++++ include/dt-bindings/clock/rockchip,rk808.h | 11 + include/dt-bindings/pinctrl/rockchip.h | 26 + include/dt-bindings/power-domain/rk3288.h | 11 + include/image.h | 12 + include/libfdt.h | 256 +++- include/ns16550.h | 2 +- lib/libfdt/Makefile | 2 +- lib/libfdt/fdt_region.c | 492 +++++++ lib/libfdt/fdt_rw.c | 32 + scripts/Makefile.spl | 28 + scripts/Makefile.uncmd_spl | 2 + tools/Makefile | 7 +- tools/fdtgrep.c | 1234 +++++++++++++++++ tools/mkimage.c | 59 +- tools/rkimage.c | 63 + 87 files changed, 7057 insertions(+), 73 deletions(-) create mode 100644 arch/arm/dts/cros-ec-sbs.dtsi create mode 100644 arch/arm/dts/rk3288-firefly.dts create mode 100644 arch/arm/dts/rk3288-firefly.dtsi create mode 100644 arch/arm/dts/rk3288-jerry.dts create mode 100644 arch/arm/dts/rk3288-thermal.dtsi create mode 100644 arch/arm/dts/rk3288-veyron-chromebook.dtsi create mode 100644 arch/arm/dts/rk3288-veyron.dtsi create mode 100644 arch/arm/dts/rk3288.dtsi create mode 100644 arch/arm/include/asm/arch-rockchip/clock.h create mode 100644 arch/arm/include/asm/arch-rockchip/gpio.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf.h create mode 100644 arch/arm/mach-rockchip/Kconfig create mode 100644 arch/arm/mach-rockchip/Makefile create mode 100644 arch/arm/mach-rockchip/board-spl.c create mode 100644 arch/arm/mach-rockchip/board.c create mode 100644 arch/arm/mach-rockchip/common.c create mode 100644 arch/arm/mach-rockchip/rk3288/Kconfig create mode 100644 board/firefly/firefly-rk3288/Kconfig create mode 100644 board/firefly/firefly-rk3288/MAINTAINERS create mode 100644 board/firefly/firefly-rk3288/Makefile create mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c create mode 100644 board/google/chromebook_jerry/Kconfig create mode 100644 board/google/chromebook_jerry/MAINTAINERS create mode 100644 board/google/chromebook_jerry/Makefile create mode 100644 board/google/chromebook_jerry/jerry.c create mode 100644 configs/chromebook_jerry_defconfig create mode 100644 configs/firefly-rk3288_defconfig create mode 100644 doc/README.rockchip create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt create mode 100644 doc/device-tree-bindings/clock/rockchip.txt create mode 100644 doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt create mode 100644 doc/device-tree-bindings/thermal/rockchip-thermal.txt create mode 100644 drivers/serial/serial_rockchip.c create mode 100644 include/configs/chromebook_jerry.h create mode 100644 include/configs/firefly-rk3288.h create mode 100644 include/dt-bindings/clock/rk3288-cru.h create mode 100644 include/dt-bindings/clock/rockchip,rk808.h create mode 100644 include/dt-bindings/pinctrl/rockchip.h create mode 100644 include/dt-bindings/power-domain/rk3288.h create mode 100644 lib/libfdt/fdt_region.c create mode 100644 tools/fdtgrep.c create mode 100644 tools/rkimage.c -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH] dm: tegra: usb: Move USB to driver model
by Simon Glass 11 Jun '15

11 Jun '15

Somehow this change was dropped in the various merges. I noticed when I came to turn off the non-driver-model support for Tegra. We need to make this change (and deal with any problems) before going further. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- arch/arm/mach-tegra/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 8bab594..4a8c814 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -23,6 +23,9 @@ config SYS_MALLOC_F_LEN config USE_PRIVATE_LIBGCC default y +config DM_USB + default y + config SPL_DM default y -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH] dm: i2c: Add compatibility functions for dm_i2c_reg_read/write()
by Simon Glass 11 Jun '15

11 Jun '15

Add the legacy i2c_reg_read/write() functions to the compatibility layer so that they can be used when CONFIG_DM_I2C_COMPAT is defined. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- drivers/i2c/i2c-uclass-compat.c | 21 +++++++++++++++++++++ include/i2c.h | 6 ++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/i2c/i2c-uclass-compat.c b/drivers/i2c/i2c-uclass-compat.c index 223f238..5606d1f 100644 --- a/drivers/i2c/i2c-uclass-compat.c +++ b/drivers/i2c/i2c-uclass-compat.c @@ -106,3 +106,24 @@ void board_i2c_init(const void *blob) { /* Nothing to do here - the init happens through driver model */ } + +uint8_t i2c_reg_read(uint8_t chip_addr, uint8_t offset) +{ + struct udevice *dev; + int ret; + + ret = i2c_compat_get_device(chip_addr, 1, &dev); + if (ret) + return 0xff; + return dm_i2c_reg_read(dev, offset); +} + +void i2c_reg_write(uint8_t chip_addr, uint8_t offset, uint8_t val) +{ + struct udevice *dev; + int ret; + + ret = i2c_compat_get_device(chip_addr, 1, &dev); + if (!ret) + dm_i2c_reg_write(dev, offset, val); +} diff --git a/include/i2c.h b/include/i2c.h index ddfebc4..9300d97 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -284,6 +284,12 @@ void i2c_init(int speed, int slaveaddr); */ void board_i2c_init(const void *blob); +/* + * Compatibility functions for driver model. + */ +uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); +void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); + #endif /* -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 0/22] x86: Add bare support for Intel Minnowboard Max
by Simon Glass 11 Jun '15

11 Jun '15

This series adds support for the Intel Minnowboard Max (called Minnowmax for short). Along the way a few refactors and additions are made: - The Intel Firmware Support Package support is moved from queensbay to a common location - PCI support for XHCI is added - A few tweaks are made to the PCI support - Support for the debug UART (early debug output) is provided - The microcode tool now also supports reading in header files This board has been lightly tested. The following seem to work: - USB2 on the blue port (not USB3), e.g. for keyboard - Ethernet - HDMI out and console - UART - uSD card - SPI SATA is detected but I have not attached a drive to try it. USB3 shows signs of life but does not detect a USB stick, and crashes when trying to use a USB Ethernet adaptor. For SPI some parts cannot be read and others cannot be written. This seems to be a feature of the Intel hardware configuration. It may be possible to fix this using the SPI registers but I cannot work out how / lost interest trying. So far, addresses from 500000 to 700000 can be used. I have not tried the ICH GPIO driver but it likely needs work before it will function. I2C is not supported as there is currently no U-Boot driver for this. The zboot command can be used to start a bzImage kernel. Verified boot is supported - use mkimage to sign images as described in this walk-through: doc/uImage.FIT/beaglebone_vboot.txt Boot time is grim: - 1423ms to set up display (Intel FSP) - 454ms to scan AHCI (when no devices are connected) - ~1000ms to power up and start cache-as-RAM init (Intel FSP) (this is not benchmarked, may be inaccurate) - ~950ms to set up memory and initial machine configuration (Intel FSP) (this is not benchmarked, may be inaccurate) So it takes over 4 seconds to get to booting a kernel. Implementing the Memory Reference Code (MRC) cache should improve this slightly (perhaps a reduction of 500-1000ms). This cache is implemented for ivybridge so that code needs to be moved into a generic x86 directory and plumbed into the FSP code. This has not been done in this series. Also the video and SATA/AHCI can be disabled if preferred. It is also possible to run as a coreboot payload. See the instructions in README.x86 for this. In this case video does not work since coreboot does not pass through the VESA display information. To support the single-core 1GB variant, changes would need to be made to arch/x86/cpu/baytrail/fsp_configs.c to select different values for the memory. The microcode update may need to change also. This series is available at u-boot-x86 branch minnow-working. Changes in v2: - Fix missing spaces (code style nit) - Add another comment in pci_find_class() - Fix README typos - Rename MMCONF_BASE_ADDRESS to PCIE_ECAM_BASE - Adjust the Kconfig help according to Bin's comments - Rename pci_rom_emul_t to pci_rom_emul - Move MMC code into a new pci_mmc.c file - Remove setup_early_uart() function prototype - Remove duplicate prototype of setup_early_uart() - Document how to change the SPI speed with ifdtool - Move CONFIG_SYS_CACHELINE_SIZE to the board CONFIG file - Add comment about FSP setting PCIE_ECAM_BASE - Put baytrail Kconfig in alphabetical order - Remove superfluous check for CONFIG_DEBUG_UART in setup_early_uart() - Fix compatible string for SPI flash - Remove commented-out DEBUG_UART_CLOCK baud rate - Rename 'Coreboot' to 'coreboot' in README.x86 Simon Glass (22): x86: Enhance the microcode tool to support header files as input pci: Add a function to find a device by class x86: pci: Add PCI IDs for Minnowboard Max x86: video: Enable video for Minnowboard Max usb: pci: Use pci_find_class() to find the device usb: pci: Add XHCI driver for PCI x86: Add an option to enabling building a ROM file x86: Rename MMCONF_BASE_ADDRESS and make it common across x86 x86: video: Allow video ROM execution to fall back to the other method x86: bootstage: Add time measurement for vesa start-up x86: Move common FSP code into a common location x86: Adjust the FSP types slightly x86: Make CAR and DRAM FSP code common x86: mmc: Move common FSP functions into a common file x86: Remove unnecessary casts and fix comment typos x86: Allow FSP Kconfig settings for all x86 x86: Allow a UART to be set up before the FSP is ready x86: spi: Support ValleyView in ICH SPI driver scsi: bootstage: Measure time taken to scan the bus x86: Enable bootstage features x86: Add some documentation on how to port U-Boot on x86 x86: Add support for Intel Minnowboard Max Makefile | 5 +- arch/x86/Kconfig | 67 + arch/x86/cpu/Makefile | 1 + arch/x86/cpu/baytrail/Kconfig | 9 + arch/x86/cpu/baytrail/Makefile | 10 + arch/x86/cpu/baytrail/early_uart.c | 78 + arch/x86/cpu/baytrail/fsp_configs.c | 156 + arch/x86/cpu/baytrail/pci.c | 47 + arch/x86/cpu/baytrail/valleyview.c | 38 + arch/x86/cpu/ivybridge/gma.c | 3 +- arch/x86/cpu/ivybridge/sdram.c | 2 +- arch/x86/cpu/queensbay/Kconfig | 38 - arch/x86/cpu/queensbay/Makefile | 4 +- arch/x86/cpu/queensbay/fsp_configs.c | 2 +- arch/x86/cpu/queensbay/tnc.c | 29 +- arch/x86/cpu/queensbay/tnc_pci.c | 17 +- arch/x86/cpu/queensbay/topcliff.c | 33 +- arch/x86/dts/Makefile | 3 +- arch/x86/dts/microcode/m0130673322.dtsi | 3284 ++++++++++++++++++++ arch/x86/dts/minnowmax.dts | 45 + arch/x86/dts/serial.dtsi | 2 +- arch/x86/include/asm/arch-baytrail/fsp/azalia.h | 39 + arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 95 + arch/x86/include/asm/arch-baytrail/gpio.h | 13 + arch/x86/include/asm/arch-ivybridge/sandybridge.h | 2 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h | 2 - .../include/asm/{arch-queensbay => }/fsp/fsp_api.h | 6 +- .../asm/{arch-queensbay => }/fsp/fsp_bootmode.h | 0 .../include/asm/{arch-queensbay => }/fsp/fsp_ffs.h | 0 .../include/asm/{arch-queensbay => }/fsp/fsp_fv.h | 0 .../include/asm/{arch-queensbay => }/fsp/fsp_hob.h | 0 .../asm/{arch-queensbay => }/fsp/fsp_infoheader.h | 0 .../asm/{arch-queensbay => }/fsp/fsp_platform.h | 0 .../asm/{arch-queensbay => }/fsp/fsp_support.h | 6 +- .../asm/{arch-queensbay => }/fsp/fsp_types.h | 0 arch/x86/include/asm/u-boot-x86.h | 3 + arch/x86/lib/Makefile | 1 + arch/x86/lib/cmd_hob.c | 2 +- arch/x86/lib/fsp/Makefile | 10 + .../{cpu/queensbay/tnc_car.S => lib/fsp/fsp_car.S} | 0 arch/x86/lib/fsp/fsp_common.c | 55 + .../queensbay/tnc_dram.c => lib/fsp/fsp_dram.c} | 2 +- arch/x86/{cpu/queensbay => lib/fsp}/fsp_support.c | 20 +- board/google/chromebook_link/Kconfig | 3 +- board/intel/minnowmax/Kconfig | 30 + board/intel/minnowmax/MAINTAINERS | 6 + board/intel/minnowmax/Makefile | 7 + board/intel/minnowmax/minnowmax.c | 32 + board/intel/minnowmax/start.S | 9 + common/cmd_scsi.c | 2 + configs/minnowmax_defconfig | 13 + doc/README.x86 | 121 +- drivers/mmc/Makefile | 1 + drivers/mmc/pci_mmc.c | 42 + drivers/pci/pci.c | 43 + drivers/pci/pci_rom.c | 32 +- drivers/spi/ich.c | 56 +- drivers/spi/ich.h | 11 +- drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-pci.c | 53 +- drivers/usb/host/xhci-pci.c | 60 + drivers/video/vesa_fb.c | 9 +- include/bootstage.h | 1 + include/configs/minnowmax.h | 72 + include/configs/x86-common.h | 3 + include/mmc.h | 14 + include/pci.h | 3 +- include/pci_ids.h | 5 + include/pci_rom.h | 15 +- tools/microcode-tool.py | 90 +- 70 files changed, 4608 insertions(+), 255 deletions(-) create mode 100644 arch/x86/cpu/baytrail/Kconfig create mode 100644 arch/x86/cpu/baytrail/Makefile create mode 100644 arch/x86/cpu/baytrail/early_uart.c create mode 100644 arch/x86/cpu/baytrail/fsp_configs.c create mode 100644 arch/x86/cpu/baytrail/pci.c create mode 100644 arch/x86/cpu/baytrail/valleyview.c create mode 100644 arch/x86/dts/microcode/m0130673322.dtsi create mode 100644 arch/x86/dts/minnowmax.dts create mode 100644 arch/x86/include/asm/arch-baytrail/fsp/azalia.h create mode 100644 arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-baytrail/gpio.h rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_api.h (88%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_bootmode.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_ffs.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_fv.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_hob.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_infoheader.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_platform.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_support.h (98%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_types.h (100%) create mode 100644 arch/x86/lib/fsp/Makefile rename arch/x86/{cpu/queensbay/tnc_car.S => lib/fsp/fsp_car.S} (100%) create mode 100644 arch/x86/lib/fsp/fsp_common.c rename arch/x86/{cpu/queensbay/tnc_dram.c => lib/fsp/fsp_dram.c} (98%) rename arch/x86/{cpu/queensbay => lib/fsp}/fsp_support.c (96%) create mode 100644 board/intel/minnowmax/Kconfig create mode 100644 board/intel/minnowmax/MAINTAINERS create mode 100644 board/intel/minnowmax/Makefile create mode 100644 board/intel/minnowmax/minnowmax.c create mode 100644 board/intel/minnowmax/start.S create mode 100644 configs/minnowmax_defconfig create mode 100644 drivers/mmc/pci_mmc.c create mode 100644 drivers/usb/host/xhci-pci.c create mode 100644 include/configs/minnowmax.h -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v3] armv8: caches: Added routine to set non cacheable region
by Siva Durga Prasad Paladugu 11 Jun '15

11 Jun '15

Added routine mmu_set_region_dcache_behaviour() to set a particular region as non cacheable. Define dummy routine for mmu_set_region_dcache_behaviour() to handle incase of dcache off. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Acked-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v3: - Removed board depenedency to calculate the page table address to start with looking into the entry. Now, get the page table address from the board specific code. - Updated flush dcache with actual Page address instead of MMU entry. Changes in v2: - Fix patch subject (remove addional zzz from v1) - Remove armv8: caches: Disable dcache after flush patch from this series based on the talk with Mark Rutland (patch is not needed anymore) --- arch/arm/cpu/armv8/cache_v8.c | 32 ++++++++++++++++++++++++++++++++ arch/arm/include/asm/system.h | 29 +++++++++++++++++++---------- 2 files changed, 51 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index c5ec529..1c6b4b4 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -139,6 +139,33 @@ int dcache_status(void) return (get_sctlr() & CR_C) != 0; } +u64 *__weak arch_get_page_table(void) { + puts("No page table offset defined\n"); + + return NULL; +} + +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ + u64 *page_table = arch_get_page_table(); + u64 upto, end; + + if (page_table == NULL) + return; + + end = ALIGN(start + size, (1 << MMU_SECTION_SHIFT)) >> + MMU_SECTION_SHIFT; + start = start >> MMU_SECTION_SHIFT; + for (upto = start; upto < end; upto++) { + page_table[upto] &= ~PMD_ATTRINDX_MASK; + page_table[upto] |= PMD_ATTRINDX(option); + } + + start = start << MMU_SECTION_SHIFT; + end = end << MMU_SECTION_SHIFT; + flush_dcache_range(start, end); +} #else /* CONFIG_SYS_DCACHE_OFF */ void invalidate_dcache_all(void) @@ -170,6 +197,11 @@ int dcache_status(void) return 0; } +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ +} + #endif /* CONFIG_SYS_DCACHE_OFF */ #ifndef CONFIG_SYS_ICACHE_OFF diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 760e8ab..868ea54 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -15,9 +15,15 @@ #define CR_EE (1 << 25) /* Exception (Big) Endian */ #define PGTABLE_SIZE (0x10000) +/* 2MB granularity */ +#define MMU_SECTION_SHIFT 21 #ifndef __ASSEMBLY__ +enum dcache_option { + DCACHE_OFF = 0x3, +}; + #define isb() \ ({asm volatile( \ "isb" : : : "memory"); \ @@ -265,16 +271,6 @@ enum { #endif /** - * Change the cache settings for a region. - * - * \param start start address of memory region to change - * \param size size of memory region to change - * \param option dcache option to select - */ -void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, - enum dcache_option option); - -/** * Register an update to the page tables, and flush the TLB * * \param start start address of update in page table @@ -295,4 +291,17 @@ phys_addr_t noncached_alloc(size_t size, size_t align); #endif /* CONFIG_ARM64 */ +#ifndef __ASSEMBLY__ +/** + * Change the cache settings for a region. + * + * \param start start address of memory region to change + * \param size size of memory region to change + * \param option dcache option to select + */ +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option); + +#endif /* __ASSEMBLY__ */ + #endif -- 1.7.1

2 3

Re: [U-Boot] Regarding learning reference of uboot loading secondary uboot
by Simon Glass 11 Jun '15

11 Jun '15

Hi, On 23 May 2015 at 13:02, Maddimsetty Pratap <pratapnaidu(a)gmail.com> wrote: > Hi Simon, > Thanks for you quick reply and sorry for the confusion over > forum,here is my request for help > > 1) Do you know any repository which had already did it > "verify second u-boot signature" over beaglebone. I'm not sure if this was done or not. You could look in cros/amxx here: https://chromium.googlesource.com/chromiumos/third_party/u-boot/+/chromeos-… or a newer version that doesn't currently support beaglebone. https://chromium.googlesource.com/chromiumos/third_party/u-boot/+/chromeos-… The Chrome OS implementation uses the same crypto but has custom binary data structures. I'm working a bit on trying to bridge the gap but we are not there yet. So the easiest way to make this work is probably to use the FIT signature verification and put your second U-Boot into the FIT. That should handle the verification and then after it loads you can turn off the cache and jump to it. It already works on Beaglebone and the only difference is that it is currently set up to load a kernel, but you want to load U-Boot. > > 2) Please verify and confirm the following link, if i was going > in the right direction. > > http://git.chromium.org/gitweb/?p=chromiumos/third_party/u-boot.git;a=commi… > > Thanks, > pratap > Regards, Simon > > Thanks, > pratap > > On Thu, May 21, 2015 at 6:32 PM, Simon Glass <sjg(a)chromium.org> wrote: >> >> Hi, >> >> It's here: >> >> https://chromium.googlesource.com/chromiumos/third_party/u-boot >> >> in branch chromeos-v2013.06. It is implemented for chromeos_peach. >> >> If you have further questions, please send them to the U-Boot mailing list >> and cc me. >> >> Regards, >> Simon >> >> >> On 21 May 2015 at 17:25, Maddimsetty Pratap <pratapnaidu(a)gmail.com> wrote: >>> >>> Hi Simon, >>> I am apologize to e-mail you directly. In one of your >>> presentations regarding FIT, you had stated uboot loading a signed secondary >>> uboot loader in chromium. I would be glad if you provide me with any >>> reference regarding the same. >>> >>> >>> Here is the statement from LWN.net. >>> >>> >>> "Chrome OS starts up U-Boot, loads and verifies a second U-Boot, loads >>> and verifies a kernel and jumps to it all in under 700ms on a modern SoC" >>> >>> Thanks, >>> pratap >>> >>> >>> >>> >>> >> >> > > > > -- > pratap naidu

2 2

[U-Boot] [PATCH 0/6] Remove sh boards that we have no tool-chain for.
by Joe Hershberger 10 Jun '15

10 Jun '15

These 6 boards are the last that cannot be built with a public configuration of tool-chains. Remove them. This includes the SH2 and SH3 cpus, which are the actual cause for not being able to build these boards. They can always be added back if the situation changes. Joe Hershberger (6): sh: Remove rsk7264 board sh: Remove rsk7269 board sh: Remove rsk7203 board sh: Remove mpr2 board sh: Remove ms7720se board sh: Remove shmin board MAKEALL | 2 - README | 2 - arch/sh/Kconfig | 42 ------- arch/sh/cpu/sh2/Makefile | 12 -- arch/sh/cpu/sh2/config.mk | 17 --- arch/sh/cpu/sh2/cpu.c | 85 -------------- arch/sh/cpu/sh2/interrupts.c | 23 ---- arch/sh/cpu/sh2/start.S | 65 ----------- arch/sh/cpu/sh2/watchdog.c | 24 ---- arch/sh/cpu/sh3/Makefile | 15 --- arch/sh/cpu/sh3/cache.c | 96 ---------------- arch/sh/cpu/sh3/config.mk | 14 --- arch/sh/cpu/sh3/cpu.c | 68 ----------- arch/sh/cpu/sh3/interrupts.c | 26 ----- arch/sh/cpu/sh3/start.S | 64 ----------- arch/sh/cpu/sh3/watchdog.c | 27 ----- arch/sh/include/asm/cpu_sh2.h | 31 ----- arch/sh/include/asm/cpu_sh3.h | 31 ----- arch/sh/include/asm/cpu_sh7264.h | 41 ------- arch/sh/include/asm/cpu_sh7706.h | 50 -------- arch/sh/include/asm/cpu_sh7710.h | 61 ---------- arch/sh/include/asm/cpu_sh7720.h | 207 --------------------------------- arch/sh/include/asm/processor.h | 6 +- arch/sh/lib/Makefile | 5 - arch/sh/lib/time_sh2.c | 88 -------------- board/mpr2/Kconfig | 9 -- board/mpr2/MAINTAINERS | 6 - board/mpr2/Makefile | 19 --- board/mpr2/lowlevel_init.S | 118 ------------------- board/mpr2/mpr2.c | 148 ------------------------ board/ms7720se/Kconfig | 9 -- board/ms7720se/MAINTAINERS | 6 - board/ms7720se/Makefile | 16 --- board/ms7720se/lowlevel_init.S | 185 ------------------------------ board/ms7720se/ms7720se.c | 46 -------- board/renesas/rsk7203/Kconfig | 12 -- board/renesas/rsk7203/MAINTAINERS | 7 -- board/renesas/rsk7203/Makefile | 10 -- board/renesas/rsk7203/lowlevel_init.S | 200 -------------------------------- board/renesas/rsk7203/rsk7203.c | 70 ------------ board/renesas/rsk7264/Kconfig | 12 -- board/renesas/rsk7264/MAINTAINERS | 6 - board/renesas/rsk7264/Makefile | 7 -- board/renesas/rsk7264/lowlevel_init.S | 210 ---------------------------------- board/renesas/rsk7264/rsk7264.c | 71 ------------ board/renesas/rsk7269/Kconfig | 12 -- board/renesas/rsk7269/MAINTAINERS | 6 - board/renesas/rsk7269/Makefile | 8 -- board/renesas/rsk7269/lowlevel_init.S | 180 ----------------------------- board/renesas/rsk7269/rsk7269.c | 72 ------------ board/shmin/Kconfig | 9 -- board/shmin/MAINTAINERS | 7 -- board/shmin/Makefile | 10 -- board/shmin/lowlevel_init.S | 22 ---- board/shmin/shmin.c | 101 ---------------- configs/mpr2_defconfig | 2 - configs/ms7720se_defconfig | 2 - configs/rsk7203_defconfig | 2 - configs/rsk7264_defconfig | 2 - configs/rsk7269_defconfig | 2 - configs/shmin_defconfig | 2 - doc/README.sh | 16 +-- drivers/serial/serial_sh.h | 39 +------ include/configs/mpr2.h | 75 ------------ include/configs/ms7720se.h | 109 ------------------ include/configs/rsk7203.h | 94 --------------- include/configs/rsk7264.h | 74 ------------ include/configs/rsk7269.h | 73 ------------ include/configs/shmin.h | 110 ------------------ include/sh_tmu.h | 22 ---- 70 files changed, 9 insertions(+), 3311 deletions(-) delete mode 100644 arch/sh/cpu/sh2/Makefile delete mode 100644 arch/sh/cpu/sh2/config.mk delete mode 100644 arch/sh/cpu/sh2/cpu.c delete mode 100644 arch/sh/cpu/sh2/interrupts.c delete mode 100644 arch/sh/cpu/sh2/start.S delete mode 100644 arch/sh/cpu/sh2/watchdog.c delete mode 100644 arch/sh/cpu/sh3/Makefile delete mode 100644 arch/sh/cpu/sh3/cache.c delete mode 100644 arch/sh/cpu/sh3/config.mk delete mode 100644 arch/sh/cpu/sh3/cpu.c delete mode 100644 arch/sh/cpu/sh3/interrupts.c delete mode 100644 arch/sh/cpu/sh3/start.S delete mode 100644 arch/sh/cpu/sh3/watchdog.c delete mode 100644 arch/sh/include/asm/cpu_sh2.h delete mode 100644 arch/sh/include/asm/cpu_sh3.h delete mode 100644 arch/sh/include/asm/cpu_sh7264.h delete mode 100644 arch/sh/include/asm/cpu_sh7706.h delete mode 100644 arch/sh/include/asm/cpu_sh7710.h delete mode 100644 arch/sh/include/asm/cpu_sh7720.h delete mode 100644 arch/sh/lib/time_sh2.c delete mode 100644 board/mpr2/Kconfig delete mode 100644 board/mpr2/MAINTAINERS delete mode 100644 board/mpr2/Makefile delete mode 100644 board/mpr2/lowlevel_init.S delete mode 100644 board/mpr2/mpr2.c delete mode 100644 board/ms7720se/Kconfig delete mode 100644 board/ms7720se/MAINTAINERS delete mode 100644 board/ms7720se/Makefile delete mode 100644 board/ms7720se/lowlevel_init.S delete mode 100644 board/ms7720se/ms7720se.c delete mode 100644 board/renesas/rsk7203/Kconfig delete mode 100644 board/renesas/rsk7203/MAINTAINERS delete mode 100644 board/renesas/rsk7203/Makefile delete mode 100644 board/renesas/rsk7203/lowlevel_init.S delete mode 100644 board/renesas/rsk7203/rsk7203.c delete mode 100644 board/renesas/rsk7264/Kconfig delete mode 100644 board/renesas/rsk7264/MAINTAINERS delete mode 100644 board/renesas/rsk7264/Makefile delete mode 100644 board/renesas/rsk7264/lowlevel_init.S delete mode 100644 board/renesas/rsk7264/rsk7264.c delete mode 100644 board/renesas/rsk7269/Kconfig delete mode 100644 board/renesas/rsk7269/MAINTAINERS delete mode 100644 board/renesas/rsk7269/Makefile delete mode 100644 board/renesas/rsk7269/lowlevel_init.S delete mode 100644 board/renesas/rsk7269/rsk7269.c delete mode 100644 board/shmin/Kconfig delete mode 100644 board/shmin/MAINTAINERS delete mode 100644 board/shmin/Makefile delete mode 100644 board/shmin/lowlevel_init.S delete mode 100644 board/shmin/shmin.c delete mode 100644 configs/mpr2_defconfig delete mode 100644 configs/ms7720se_defconfig delete mode 100644 configs/rsk7203_defconfig delete mode 100644 configs/rsk7264_defconfig delete mode 100644 configs/rsk7269_defconfig delete mode 100644 configs/shmin_defconfig delete mode 100644 include/configs/mpr2.h delete mode 100644 include/configs/ms7720se.h delete mode 100644 include/configs/rsk7203.h delete mode 100644 include/configs/rsk7264.h delete mode 100644 include/configs/rsk7269.h delete mode 100644 include/configs/shmin.h -- 1.7.11.5

5 12

[U-Boot] [PATCH 0/7] avr32: remove non-generic boards
by Andreas Bießmann 10 Jun '15

10 Jun '15

This series deletes avr32-boards that are still using the ancient arch/avr32/lib/board.c code. If one would like his board to stay in u-boot there is a last chance to convert it to generic board _now_. It should be as easy as defining these three values in the board config: |/* generic board */ |#define CONFIG_SYS_GENERIC_BOARD |#define CONFIG_BOARD_EARLY_INIT_F |#define CONFIG_BOARD_EARLY_INIT_R The patch 'avr32: delete non generic board favr-32-ezkit' has an checkpatch warning which will not be fixed. ---8<--- 0 errors, 1 warnings, 0 checks for 0002-avr32-delete-non-generic-board-favr-32-ezkit.patch: warning: arch/avr32/Kconfig,22: please write a paragraph that describes the config symbol fully --->8--- The patch 'avr32: delete non generic board's atstk100{3,4,6}' has a checkpatch warning wich will not be fixed. ---8<--- 0 errors, 1 warnings, 0 checks for 0005-avr32-delete-non-generic-board-s-atstk100-3-4-6.patch: warning: arch/avr32/Kconfig,13: please write a paragraph that describes the config symbol fully --->8--- Andreas Bießmann (7): avr32: delete non generic board atngw100 avr32: delete non generic board favr-32-ezkit avr32: delete non generic board hammerhead avr32: delete non generic board mimc200 avr32: delete non generic board's atstk100{3,4,6} avr32: take maintainership for atstk1002 avr32: delete ancient board.c arch/avr32/Kconfig | 25 --- arch/avr32/lib/Makefile | 3 - arch/avr32/lib/board.c | 256 --------------------------- board/atmel/atngw100/Kconfig | 15 -- board/atmel/atngw100/MAINTAINERS | 6 - board/atmel/atngw100/Makefile | 6 - board/atmel/atngw100/atngw100.c | 109 ------------ board/atmel/atstk1000/Kconfig | 48 ----- board/atmel/atstk1000/MAINTAINERS | 10 +- board/atmel/atstk1000/atstk1000.c | 23 +-- board/earthlcd/favr-32-ezkit/Kconfig | 15 -- board/earthlcd/favr-32-ezkit/MAINTAINERS | 6 - board/earthlcd/favr-32-ezkit/Makefile | 9 - board/earthlcd/favr-32-ezkit/favr-32-ezkit.c | 81 --------- board/earthlcd/favr-32-ezkit/flash.c | 216 ---------------------- board/mimc/mimc200/Kconfig | 15 -- board/mimc/mimc200/MAINTAINERS | 6 - board/mimc/mimc200/Makefile | 6 - board/mimc/mimc200/mimc200.c | 197 --------------------- board/miromico/hammerhead/Kconfig | 15 -- board/miromico/hammerhead/MAINTAINERS | 6 - board/miromico/hammerhead/Makefile | 6 - board/miromico/hammerhead/hammerhead.c | 91 ---------- configs/atngw100_defconfig | 2 - configs/atstk1003_defconfig | 2 - configs/atstk1004_defconfig | 2 - configs/atstk1006_defconfig | 2 - configs/favr-32-ezkit_defconfig | 2 - configs/hammerhead_defconfig | 2 - configs/mimc200_defconfig | 2 - include/configs/atngw100.h | 163 ----------------- include/configs/atstk1003.h | 161 ----------------- include/configs/atstk1004.h | 161 ----------------- include/configs/atstk1006.h | 178 ------------------- include/configs/favr-32-ezkit.h | 181 ------------------- include/configs/hammerhead.h | 157 ---------------- include/configs/mimc200.h | 177 ------------------ 37 files changed, 3 insertions(+), 2359 deletions(-) delete mode 100644 arch/avr32/lib/board.c delete mode 100644 board/atmel/atngw100/Kconfig delete mode 100644 board/atmel/atngw100/MAINTAINERS delete mode 100644 board/atmel/atngw100/Makefile delete mode 100644 board/atmel/atngw100/atngw100.c delete mode 100644 board/earthlcd/favr-32-ezkit/Kconfig delete mode 100644 board/earthlcd/favr-32-ezkit/MAINTAINERS delete mode 100644 board/earthlcd/favr-32-ezkit/Makefile delete mode 100644 board/earthlcd/favr-32-ezkit/favr-32-ezkit.c delete mode 100644 board/earthlcd/favr-32-ezkit/flash.c delete mode 100644 board/mimc/mimc200/Kconfig delete mode 100644 board/mimc/mimc200/MAINTAINERS delete mode 100644 board/mimc/mimc200/Makefile delete mode 100644 board/mimc/mimc200/mimc200.c delete mode 100644 board/miromico/hammerhead/Kconfig delete mode 100644 board/miromico/hammerhead/MAINTAINERS delete mode 100644 board/miromico/hammerhead/Makefile delete mode 100644 board/miromico/hammerhead/hammerhead.c delete mode 100644 configs/atngw100_defconfig delete mode 100644 configs/atstk1003_defconfig delete mode 100644 configs/atstk1004_defconfig delete mode 100644 configs/atstk1006_defconfig delete mode 100644 configs/favr-32-ezkit_defconfig delete mode 100644 configs/hammerhead_defconfig delete mode 100644 configs/mimc200_defconfig delete mode 100644 include/configs/atngw100.h delete mode 100644 include/configs/atstk1003.h delete mode 100644 include/configs/atstk1004.h delete mode 100644 include/configs/atstk1006.h delete mode 100644 include/configs/favr-32-ezkit.h delete mode 100644 include/configs/hammerhead.h delete mode 100644 include/configs/mimc200.h -- 2.1.4

3 20

[U-Boot] [PATCH] atngw100: convert to generic board
by Andreas Bießmann 10 Jun '15

10 Jun '15

Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> --- Tested on an atngw100 thankfully provided by Waldemar. Thus http://patchwork.ozlabs.org/patch/470705/ is not required. include/configs/atngw100.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 540e86a..ef4e2fc 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -14,6 +14,10 @@ #define CONFIG_AT32AP7000 #define CONFIG_ATNGW100 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_EARLY_INIT_R + /* * Set up the PLL to run at 140 MHz, the CPU to run at the PLL * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency -- 1.7.10.4

1 1

[U-Boot] [PATCH] odroid: dts: cleanup of MAX77686 regulators
by Przemyslaw Marczak 10 Jun '15

10 Jun '15

This commit cleanup MAX77686 regulator node by: - remove the sub-nodes of unconnected regulators - remove the "regulator-compatible" properties of all regulators This prevents printing init errors for the regulators, with duplicated name strings. Signed-off-by: Przemyslaw Marczak <p.marczak(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- arch/arm/dts/exynos4412-odroid.dts | 80 +------------------------------------- 1 file changed, 2 insertions(+), 78 deletions(-) diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index 415dfea..d572f1e 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -43,140 +43,102 @@ voltage-regulators { ldo1_reg: ldo1 { - regulator-compatible = "LDO1"; regulator-name = "VDD_ALIVE_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; ldo2_reg: ldo2 { - regulator-compatible = "LDO2"; regulator-name = "VDDQ_VM1M2_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; ldo3_reg: ldo3 { - regulator-compatible = "LDO3"; regulator-name = "VCC_1.8V_AP"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo4_reg: ldo4 { - regulator-compatible = "LDO4"; regulator-name = "VDDQ_MMC2_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; }; ldo5_reg: ldo5 { - regulator-compatible = "LDO5"; regulator-name = "VDDQ_MMC0/1/3_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo6_reg: ldo6 { - regulator-compatible = "LDO6"; regulator-name = "VMPLL_1.0V"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; ldo7_reg: ldo7 { - regulator-compatible = "LDO7"; regulator-name = "VPLL_1.1V"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; }; ldo8_reg: ldo8 { - regulator-compatible = "LDO8"; regulator-name = "VDD_MIPI/HDMI_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; - ldo9_reg: ldo9 { - regulator-compatible = "LDO9"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - ldo10_reg: ldo10 { - regulator-compatible = "LDO10"; regulator-name = "VDD_MIPI/HDMI_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo11_reg: ldo11 { - regulator-compatible = "LDO11"; regulator-name = "VDD_ABB1_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo12_reg: ldo12 { - regulator-compatible = "LDO12"; regulator-name = "VDD_UOTG_3.0V"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; }; ldo13_reg: ldo13 { - regulator-compatible = "LDO13"; regulator-name = "VDD_C2C_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo14_reg: ldo14 { - regulator-compatible = "LDO14"; regulator-name = "VDD_ABB02_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo15_reg: ldo15 { - regulator-compatible = "LDO15"; regulator-name = "VDD_HSIC/OTG_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; ldo16_reg: ldo16 { - regulator-compatible = "LDO16"; regulator-name = "VDD_HSIC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; ldo17_reg: ldo17 { - regulator-compatible = "LDO17"; regulator-name = "VDDQ_CAM_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - ldo18_reg: ldo18 { - regulator-compatible = "LDO18"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo19_reg: ldo19 { - regulator-compatible = "LDO19"; - regulator-name = "nc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - ldo20_reg: ldo20 { - regulator-compatible = "LDO20"; regulator-name = "VDDQ_EMMC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -185,7 +147,6 @@ }; ldo21_reg: ldo21 { - regulator-compatible = "LDO21"; regulator-name = "TFLASH_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -194,7 +155,6 @@ }; ldo22_reg: ldo22 { - regulator-compatible = "LDO22"; regulator-name = "VDDQ_EMMC_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; @@ -202,20 +162,6 @@ regulator-boot-on; }; - ldo23_reg: ldo23 { - regulator-compatible = "LDO23"; - regulator-name = "nc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - ldo24_reg: ldo24 { - regulator-compatible = "LDO24"; - regulator-name = "nc"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - ldo25_reg: ldo25 { regulator-compatible = "LDO25"; regulator-name = "VDDQ_LCD_3.0V"; @@ -223,75 +169,53 @@ regulator-max-microvolt = <3000000>; }; - ldo26_reg: ldo26 { - regulator-compatible = "LDO26"; - regulator-name = "nc"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - - buck1_reg: buck@1 { - regulator-compatible = "BUCK1"; + buck1_reg: buck1 { regulator-name = "VDD_MIF_1.0V"; regulator-min-microvolt = <8500000>; regulator-max-microvolt = <1100000>; }; - buck2_reg: buck@2 { - regulator-compatible = "BUCK2"; + buck2_reg: buck2 { regulator-name = "VDD_ARM_1.0V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1500000>; }; buck3_reg: buck3 { - regulator-compatible = "BUCK3"; regulator-name = "VDD_INT_1.1V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; }; buck4_reg: buck4 { - regulator-compatible = "BUCK4"; regulator-name = "VDD_G3D_1.0V"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; }; buck5_reg: buck5 { - regulator-compatible = "BUCK5"; regulator-name = "VDDQ_AP_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; buck6_reg: buck6 { - regulator-compatible = "BUCK6"; regulator-name = "VCC_INL1/7_1.35V"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; }; buck7_reg: buck7 { - regulator-compatible = "BUCK7"; regulator-name = "VCC_INL2/3/5_2.0V"; regulator-min-microvolt = <2000000>; regulator-max-microvolt = <2000000>; }; buck8_reg: buck8 { - regulator-compatible = "BUCK8"; regulator-name = "VCC_P3V3_2.85V"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <3300000>; }; - - buck9_reg: buck9 { - regulator-compatible = "BUCK9"; - regulator-name = "nc"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; }; }; }; -- 1.9.1

2 2