May 2015 - U-Boot

[U-Boot] [PATCH v3 1/3] sunxi: Create helper function veryfing valid boot signature on MMC
by Daniel Kochmański 06 Jun '15

06 Jun '15

This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski(a)turtle-solutions.eu> CC: Roy Spliet <r.spliet(a)ultimaker.com> Cc: Ian Campbell <ijc(a)hellion.org.uk> Cc: Hans De Goede <hdegoede(a)redhat.com> --- arch/arm/include/asm/arch-sunxi/mmc.h | 1 + board/sunxi/board.c | 8 ++------ drivers/mmc/sunxi_mmc.c | 17 +++++++++++++++++ 3 files changed, 20 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h b/arch/arm/include/asm/arch-sunxi/mmc.h index cb52e64..3da360b 100644 --- a/arch/arm/include/asm/arch-sunxi/mmc.h +++ b/arch/arm/include/asm/arch-sunxi/mmc.h @@ -127,4 +127,5 @@ struct sunxi_mmc { #define SUNXI_MMC_COMMON_RESET (1 << 18) struct mmc *sunxi_mmc_init(int sdc_no); +int sunxi_mmc_has_egon_boot_signature(struct mmc *mmc); #endif /* _SUNXI_MMC_H */ diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 3f23f26..dc95431 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -302,12 +302,8 @@ int board_mmc_init(bd_t *bis) * Both mmc0 and mmc2 are bootable, figure out where we're booting * from. Try mmc0 first, just like the brom does. */ - if (mmc_getcd(mmc0) && mmc_init(mmc0) == 0 && - mmc0->block_dev.block_read(0, 16, 1, buf) == 1) { - buf[12] = 0; - if (strcmp(&buf[4], "eGON.BT0") == 0) - return 0; - } + if (sunxi_mmc_has_egon_boot_signature(mmc0)) + return 0; /* no bootable card in mmc0, so we must be booting from mmc2, swap */ mmc0->block_dev.dev = 1; diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index bb08147..ef3e84c 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -431,6 +431,23 @@ static int sunxi_mmc_getcd(struct mmc *mmc) return !gpio_get_value(cd_pin); } +int sunxi_mmc_has_egon_boot_signature(struct mmc *mmc) +{ + char *buf = malloc(512); + int valid_signature = 0; + + if (buf == NULL) + panic("Failed to allocate memory\n"); + + if (mmc_getcd(mmc) && mmc_init(mmc) == 0 && + mmc->block_dev.block_read(0, 16, 1, buf) == 1 && + strncmp(&buf[4], "eGON.BT0", 8) == 0) + valid_signature = 1; + + free(buf); + return valid_signature; +} + static const struct mmc_ops sunxi_mmc_ops = { .send_cmd = sunxi_mmc_send_cmd, .set_ios = sunxi_mmc_set_ios, -- 2.4.1

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[U-Boot] [PATCH] image-fit: Fix compiler warning in fit_conf_print()
by Hans de Goede 06 Jun '15

06 Jun '15

This fixes the following compiler warning: In file included from tools/common/image-fit.c:1:0: ./tools/../common/image-fit.c: In function ‘fit_conf_print’: ./tools/../common/image-fit.c:1470:27: warning: logical not is only applied to the left hand side of comparison [-Wlogical-not-parentheses] (const char **)&uname) > 0; Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- common/image-fit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/common/image-fit.c b/common/image-fit.c index 4bd8fea..28f7aa8 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -1464,10 +1464,10 @@ void fit_conf_print(const void *fit, int noffset, const char *p) /* Print out all of the specified loadables */ for (loadables_index = 0; - !fdt_get_string_index(fit, noffset, + fdt_get_string_index(fit, noffset, FIT_LOADABLE_PROP, loadables_index, - (const char **)&uname) > 0; + (const char **)&uname) == 0; loadables_index++) { if (loadables_index == 0) { -- 2.4.1

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Re: [U-Boot] Building u-boot.rom for Minnowboard
by Bin Meng 04 Jun '15

04 Jun '15

Hi Saket, On Sun, May 31, 2015 at 2:19 PM, Saket Sinha <saket.sinha89(a)gmail.com> wrote: > Hi Bin, > > If you can have a look at this issue. > > I am currently stuck on this issue with u-boot.rom not giving me any > output on the serial. > > When I am flashing MinnowBoard.MAX.X64.080.D01.bin I get the all the > UEFI prompt and the booting messages but when I flash u-boot.rom, I do > not get anything on the serial port. > > Let me know if I am missing out something in the build process of u-boot.rom > > While running the following commands, I seem to get the errors- > >>> c) ./tools/ifdtool -x BayleyBay/SPI.bin >>> root@saket-HP-PC:# /u-boot-x86/tools/ifdtool -x BayleyBay/SPI.bin >>> Flash Region 0 (Flash Descriptor): 00000000 - 00000fff >>> Flash Region 1 (BIOS): 00500000 - 007fffff >>> Flash Region 2 (Intel ME): 00001000 - 004fffff >>> Flash Region 3 (GbE): 00fff000 - 00000fff (unused) >>> Error while writing: Bad address >>> Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused) >>> Error while writing: Bad address > > AND > >> >>> a)./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin >>> root@saket-PC:# /u-boot-x86/tools/ifdtool -x >>> MNW2MAX1.X64.0073.R02.1409160934.bin >>> Flash Region 0 (Flash Descriptor): 00000000 - 00000fff >>> Flash Region 1 (BIOS): 00500000 - 007fffff >>> Flash Region 2 (Intel ME): 00001000 - 004fffff >>> Flash Region 3 (GbE): 00000000 - 00000fff >>> Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused) >>> Error while writing: Bad address >>> > > > These may be the reason for the u-boot.rom not getting built properly. > > I have described the entire build process for u-boot.rom int my > previous mail below - > >> >> I am building u-boot.rom for MinnowboardMax as per the steps mentioned >> in the README.x86. >> >> 1. Downloading BAY_TRAIL_FSP_KIT_GOLD3.tgz >> >> a) copying BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd as >> board/intel/minnowmax/fsp.bin >> >> b) copying Vga.dat as board/intel/minnowmax/vga.bin >> >> c) ./tools/ifdtool -x BayleyBay/SPI.bin >> >> From the generted files, copying flashregion_2_intel_me.bin as >> board/intel/minnowmax/me.bin >> >> Though the o/p files are generated, I get the following error after >> this command - >> root@saket-HP-PC:# /u-boot-x86/tools/ifdtool -x BayleyBay/SPI.bin >> Flash Region 0 (Flash Descriptor): 00000000 - 00000fff >> Flash Region 1 (BIOS): 00500000 - 007fffff >> Flash Region 2 (Intel ME): 00001000 - 004fffff >> Flash Region 3 (GbE): 00fff000 - 00000fff (unused) >> Error while writing: Bad address >> Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused) >> Error while writing: Bad address I've seen this error before. It is a bug of the ifdtool, but I think it can be ignored. I have a patch sent out. Please check http://patchwork.ozlabs.org/patch/478590/ >> >> 2. Downloading 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip >> >> a)./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin >> From the generted files, copying flashregion_0_flashdescriptor.bin as >> board/intel/minnowmax/descriptor.bin >> >> Though the o/p files are generated, I get the following error after >> this command - >> root@saket-PC:# /u-boot-x86/tools/ifdtool -x >> MNW2MAX1.X64.0073.R02.1409160934.bin >> Flash Region 0 (Flash Descriptor): 00000000 - 00000fff >> Flash Region 1 (BIOS): 00500000 - 007fffff >> Flash Region 2 (Intel ME): 00001000 - 004fffff >> Flash Region 3 (GbE): 00000000 - 00000fff >> Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused) >> Error while writing: Bad address >> >> 3. Building u-boot.rom >> export BUILD_ROM=y >> make minnowmax_defconfig >> make all >> Looks that your instructions are correct according to README.x86 >> 4. Flashing u-boot.rom to Minnowmax by desiprog sf100 >> ./flashrom -p dediprog -w u-boot.rom >> Can you confirm that you have setup the flashrom tool correctly? I don't use flashrom on Linux as I normally do the SPI flash programming on a Windows machine. Can you dump the whole SPI flash image back after you program the u-boot.rom and compare the dumped file with the u-boot.rom you generated to see whether they are exactly the same? >> 5. Now when I am powering Minnowmax and collecting the output on serial - >> Nothing appears. >> >> Kindly let me know, if I am missing something here. >> Sorry but I don't have a MinnowMax board here, so cannot try it on my side. Regards, Bin

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[U-Boot] [PATCH] gpio: fix typos in GPIO header
by Masahiro Yamada 04 Jun '15

04 Jun '15

Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- I also noticed British English spelling "standardise" and "behaviour", but I kept them. I am not sure if it is justified to fix them... include/asm-generic/gpio.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 519bb0b..de91e57 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -42,7 +42,7 @@ * Note: With driver model, the label is allocated so there is no need for * the caller to preserve it. * - * @param gp GPIO number + * @param gpio GPIO number * @param label User label for this GPIO * @return 0 if ok, -1 on error */ @@ -127,7 +127,7 @@ struct gpio_desc { }; /** - * dm_gpio_is_valid() - Check if a GPIO is gpio_is_valie + * dm_gpio_is_valid() - Check if a GPIO is valid * * @desc: GPIO description containing device, offset and flags, * previously returned by gpio_request_by_name() @@ -167,7 +167,7 @@ int gpio_get_status(struct udevice *dev, int offset, char *buf, int buffsize); * * @dev: Device to check * @offset: Offset of device GPIO to check - * @namep: If non-NULL, this is set to the nane given when the GPIO + * @namep: If non-NULL, this is set to the name given when the GPIO * was requested, or -1 if it has not been requested * @return -ENODATA if the driver returned an unknown function, * -ENODEV if the device is not active, -EINVAL if the offset is invalid. @@ -186,7 +186,7 @@ int gpio_get_function(struct udevice *dev, int offset, const char **namep); * * @dev: Device to check * @offset: Offset of device GPIO to check - * @namep: If non-NULL, this is set to the nane given when the GPIO + * @namep: If non-NULL, this is set to the name given when the GPIO * was requested, or -1 if it has not been requested * @return -ENODATA if the driver returned an unknown function, * -ENODEV if the device is not active, -EINVAL if the offset is invalid. @@ -219,7 +219,7 @@ struct fdtdec_phandle_args; * Also it would be useful to standardise additional functions like * pullup, slew rate and drive strength. * - * gpio_request)( and gpio_free() are optional - if NULL then they will + * gpio_request() and gpio_free() are optional - if NULL then they will * not be called. * * Note that @offset is the offset from the base GPIO of the device. So @@ -271,7 +271,7 @@ struct dm_gpio_ops { * * @dev: GPIO device * @desc: Place to put GPIO description - * @args: Arguments provided in descripion + * @args: Arguments provided in description * @return 0 if OK, -ve on error */ int (*xlate)(struct udevice *dev, struct gpio_desc *desc, @@ -398,7 +398,7 @@ int gpio_request_by_name(struct udevice *dev, const char *list_name, /** * gpio_request_list_by_name() - Request a list of GPIOs * - * Reads all the GPIOs from a list and requetss them. See + * Reads all the GPIOs from a list and requests them. See * gpio_request_by_name() for additional details. Lists should not be * misused to hold unrelated or optional GPIOs. They should only be used * for things like parallel data lines. A zero phandle terminates the list @@ -533,7 +533,7 @@ int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags); /** * gpio_get_number() - Get the global GPIO number of a GPIO * - * This should only be used for debugging or interest. It returns the nummber + * This should only be used for debugging or interest. It returns the number * that should be used for gpio_get_value() etc. to access this GPIO. * * @desc: GPIO description containing device, offset and flags, -- 1.9.1

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[U-Boot] [PATCH 0/4] x86: support of pin-muxing from device tree
by Gabriel Huau 04 Jun '15

04 Jun '15

This serie of patches adds the support of pin-muxing from the device tree through different properties. I have put two example to enable the USB Host on the minnowboard max. The support of the call to 'setup_pch_gpios' is still supported and only the minnowboard has been tested with the device tree implementation. Because the GPIO and IO base register ares different, I have also defined some proxy function to set the function/value and direction of the GPIO as the GPIO register can override some registers in the IO. Gabriel Huau (4): x86: baytrail: fix the GPIOBASE address x86: minnowmax: add GPIO banks in the device tree x86: gpio: add pinctrl support from the device tree x86: minnowmax: initialize the pin-muxing from device tree arch/x86/dts/minnowmax.dts | 63 +++++++++ arch/x86/include/asm/arch-baytrail/gpio.h | 3 +- arch/x86/include/asm/gpio.h | 1 + board/intel/minnowmax/minnowmax.c | 9 ++ drivers/gpio/intel_ich6_gpio.c | 222 ++++++++++++++++++++++++++---- include/configs/minnowmax.h | 1 + include/dt-bindings/gpio/gpio.h | 20 +++ 7 files changed, 292 insertions(+), 27 deletions(-) -- 2.1.4

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[U-Boot] [PATCH] x86: baytrail: PCI is not always mapped to end of ram
by andrew＠bradfordembedded.com 04 Jun '15

04 Jun '15

From: Andrew Bradford <andrew.bradford(a)kodakalaris.com> PCI on Intel Baytrail is mapped to 0x80000000, which is not always at the end of SDRAM, such as when running with 4 GiB of SDRAM. The PCI bus memory mapping must stay within low memory and so when running with > 2 GiB of SDRAM, there is a hole in the SDRAM between 2 GiB and 4 GiB for memory mapped IO, such as PCI. Signed-off-by: Andrew Bradford <andrew.bradford(a)kodakalaris.com> --- arch/x86/cpu/baytrail/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/cpu/baytrail/pci.c b/arch/x86/cpu/baytrail/pci.c index 6c291f9..0a87890 100644 --- a/arch/x86/cpu/baytrail/pci.c +++ b/arch/x86/cpu/baytrail/pci.c @@ -39,7 +39,7 @@ void board_pci_setup_hose(struct pci_controller *hose) pci_set_region(hose->regions + 3, 0, 0, - gd->ram_size, + 0x80000000, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); hose->region_count = 4; -- 1.9.1

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[U-Boot] [PATCH] tools: ifdtool: Do not write region while its size is negative
by Bin Meng 04 Jun '15

04 Jun '15

We should ignore those regions whose size is negative. These are typically optional and unused regions (like GbE and platform data). Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- tools/ifdtool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 590ccc9..1d61df1 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -462,7 +462,7 @@ static int write_regions(char *image, int size) if (ret) return ret; dump_region(i, frba); - if (region.size == 0) + if (region.size <= 0) continue; region_fd = open(region_filename(i), O_WRONLY | O_CREAT | O_TRUNC, S_IRUSR | -- 1.8.2.1

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Re: [U-Boot] [PATCH v3 4/4] x86: minnowmax: initialize the pin-muxing from device tree
by Gabriel Huau 04 Jun '15

04 Jun '15

Hi Andy, On 05/26/2015 01:01 AM, Andy Pont wrote: > Hi Gabriel, > >> soc_gpio_s5_0@0 { >> gpio-offset = <0x80 0>; >> pad-offset = <0x1d0>; >> mode-gpio; >> output-value = <0>; >> direction = <PIN_OUTPUT>; >> }; >> >> soc_gpio_s5_1@0 { >> gpio-offset = <0x80 1>; >> pad-offset = <0x210>; >> mode-gpio; >> output-value = <0>; >> direction = <PIN_OUTPUT>; >> }; >> >> soc_gpio_s5_2@0 { >> gpio-offset = <0x80 2>; >> pad-offset = <0x1e0>; >> mode-gpio; >> output-value = <0>; >> direction = <PIN_OUTPUT>; >> }; >> >> And after, you can use the GPIO commands: >> >> => gpio set E0 >> gpio: pin E0 (gpio 128) value is 1 >> => gpio clear E0 >> gpio: pin E0 (gpio 128) value is 0 >> => gpio set E2 >> gpio: pin E2 (gpio 130) value is 1 >> => gpio clear E2 >> gpio: pin E2 (gpio 130) value is 0 >> >> E0 E1 and E2 correspond to the GPIO0 1 and 2. > Is there, or can someone add, some documentation somewhere as to how to > convert between the device tree definition and the value used for "pin" in > the gpio commands as it doesn't seem intuitive or obvious to me that what > you have defined translates to E0, E1 and E2. I agree, but I think the documentation should be part of another patch, especially as this is the case for all the x86 platform. The naming is not specific to the minnowboard max (baytrail). > Thanks, > > Andy. > Regards, Gabriel

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[U-Boot] [patch] armv7: better comment in start.S
by Pavel Machek 03 Jun '15

03 Jun '15

Fix big/small letters in comment. Signed-off-by: Pavel Machek <pavel(a)denx.de> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 5ed0f45..1c7e6f0 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -22,10 +22,9 @@ * * Startup Code (reset vector) * - * do important init only if we don't start from memory! - * setup Memory and board specific bits prior to relocation. - * relocate armboot to ram - * setup stack + * Do important init only if we don't start from memory! + * Setup memory and board specific bits prior to relocation. + * Relocate armboot to ram. Setup stack. * *************************************************************************/ -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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[U-Boot] [PATCH v2] gpio: lpc32xx: Use priv_data instead of platdata
by Axel Lin 03 Jun '15

03 Jun '15

The LPC32XX GPIO driver platdata currently contains GPIO state information, which should go into priv_data. Thus rename lpc32xx_gpio_platdata to lpc32xx_gpio_priv and convert to use dev_get_priv() instead. Signed-off-by: Axel Lin <axel.lin(a)ingics.com> --- v2: Update commit log to mention that using priv_data for runtime state which was stored in platdata. drivers/gpio/lpc32xx_gpio.c | 39 +++++++++++++++++++-------------------- 1 file changed, 19 insertions(+), 20 deletions(-) diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c index 96b3125..8a9826e 100644 --- a/drivers/gpio/lpc32xx_gpio.c +++ b/drivers/gpio/lpc32xx_gpio.c @@ -37,7 +37,7 @@ #define LPC32XX_GPIOS 128 -struct lpc32xx_gpio_platdata { +struct lpc32xx_gpio_priv { struct gpio_regs *regs; /* GPIO FUNCTION: SEE WARNING #2 */ signed char function[LPC32XX_GPIOS]; @@ -60,8 +60,8 @@ struct lpc32xx_gpio_platdata { static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset) { int port, mask; - struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev); - struct gpio_regs *regs = gpio_platdata->regs; + struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev); + struct gpio_regs *regs = gpio_priv->regs; port = GPIO_TO_PORT(offset); mask = GPIO_TO_MASK(offset); @@ -83,7 +83,7 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset) } /* GPIO FUNCTION: SEE WARNING #2 */ - gpio_platdata->function[offset] = GPIOF_INPUT; + gpio_priv->function[offset] = GPIOF_INPUT; return 0; } @@ -95,8 +95,8 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset) static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset) { int port, rank, mask, value; - struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev); - struct gpio_regs *regs = gpio_platdata->regs; + struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev); + struct gpio_regs *regs = gpio_priv->regs; port = GPIO_TO_PORT(offset); @@ -130,8 +130,8 @@ static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset) static int gpio_set(struct udevice *dev, unsigned gpio) { int port, mask; - struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev); - struct gpio_regs *regs = gpio_platdata->regs; + struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev); + struct gpio_regs *regs = gpio_priv->regs; port = GPIO_TO_PORT(gpio); mask = GPIO_TO_MASK(gpio); @@ -162,8 +162,8 @@ static int gpio_set(struct udevice *dev, unsigned gpio) static int gpio_clr(struct udevice *dev, unsigned gpio) { int port, mask; - struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev); - struct gpio_regs *regs = gpio_platdata->regs; + struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev); + struct gpio_regs *regs = gpio_priv->regs; port = GPIO_TO_PORT(gpio); mask = GPIO_TO_MASK(gpio); @@ -208,8 +208,8 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset, int value) { int port, mask; - struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev); - struct gpio_regs *regs = gpio_platdata->regs; + struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev); + struct gpio_regs *regs = gpio_priv->regs; port = GPIO_TO_PORT(offset); mask = GPIO_TO_MASK(offset); @@ -231,7 +231,7 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset, } /* GPIO FUNCTION: SEE WARNING #2 */ - gpio_platdata->function[offset] = GPIOF_OUTPUT; + gpio_priv->function[offset] = GPIOF_OUTPUT; return lpc32xx_gpio_set_value(dev, offset, value); } @@ -251,8 +251,8 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset, static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset) { - struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev); - return gpio_platdata->function[offset]; + struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev); + return gpio_priv->function[offset]; } static const struct dm_gpio_ops gpio_lpc32xx_ops = { @@ -265,7 +265,7 @@ static const struct dm_gpio_ops gpio_lpc32xx_ops = { static int lpc32xx_gpio_probe(struct udevice *dev) { - struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev); + struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev); struct gpio_dev_priv *uc_priv = dev->uclass_priv; if (dev->of_offset == -1) { @@ -274,12 +274,11 @@ static int lpc32xx_gpio_probe(struct udevice *dev) } /* set base address for GPIO registers */ - gpio_platdata->regs = (struct gpio_regs *)GPIO_BASE; + gpio_priv->regs = (struct gpio_regs *)GPIO_BASE; /* all GPIO functions are unknown until requested */ /* GPIO FUNCTION: SEE WARNING #2 */ - memset(gpio_platdata->function, GPIOF_UNKNOWN, - sizeof(gpio_platdata->function)); + memset(gpio_priv->function, GPIOF_UNKNOWN, sizeof(gpio_priv->function)); return 0; } @@ -289,5 +288,5 @@ U_BOOT_DRIVER(gpio_lpc32xx) = { .id = UCLASS_GPIO, .ops = &gpio_lpc32xx_ops, .probe = lpc32xx_gpio_probe, - .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_platdata), + .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_priv), }; -- 1.9.1

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