April 2015 - U-Boot

[U-Boot] [PULL] u-boot-socfpga/master
by Marek Vasut 29 Apr '15

29 Apr '15

The following changes since commit 1733259d25015c28c47990ec11af99b3f62f811c: Merge branch 'master' of git://git.denx.de/u-boot-video (2015-04-20 09:13:52 -0400) are available in the git repository at: git://git.denx.de/u-boot-socfpga.git HEAD for you to fetch changes up to e5c57eea4f4ac8c27343bde137b069ef816e69d7: socfpga: implement arria V socdk SPI flash config in dts (2015-04-27 03:08:43 +0200) ---------------------------------------------------------------- Dinh Nguyen (15): arm: socfpga: spl: Add CONFIG_SPL_MAX_SIZE to be 64KB arm: socfpga: add functions to bring sdram, timer, and uart out of reset arm: socfpga: spl: enable sdram, timer and uart arm: socfpga: spl: Add call to timer_init arm: socfpga: spl: allow bootrom to enable IOs after warm reset arm: socfpga: spl: add sdram init and calibration arm: socfpga: spl: printout sdram size arm: socfpga: spl: Use common lowlevel_init arm: socfpga: spl: add CONFIG_SPL_STACK to socfpga_common.h arm: socfpga: spl: Adjust the SYS_INIT_RAM_SIZE to have room for the spl malloc arm: socfpga: spl: Add SDRAM check arm: socfpga: fix uart0 pin mux configuration arm: socfpga: spl: Add s_init stub arm: socfpga: spl: add board_init_f to SPL arm: socfpga: spl: update peripheral pll for dev kit Marek Vasut (3): spi: Add Designware SPI controller Kconfig entry spi: Add Cadence QSPI controller Kconfig entry arm: socfpga: spl: Add stub sdram.h Pavel Machek (2): socfpga: implement socdk SPI flash config in dts socfpga: implement arria V socdk SPI flash config in dts arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/socfpga/Makefile | 1 - arch/arm/cpu/armv7/socfpga/lowlevel_init.S | 45 --------------------------------------------- arch/arm/cpu/armv7/socfpga/reset_manager.c | 24 ++++++++++++++++++++++++ arch/arm/cpu/armv7/socfpga/spl.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/socfpga/system_manager.c | 9 +++++++++ arch/arm/dts/socfpga_arria5_socdk.dts | 24 ++++++++++++++++++++++++ arch/arm/dts/socfpga_cyclone5_socdk.dts | 24 ++++++++++++++++++++++++ arch/arm/include/asm/arch-socfpga/reset_manager.h | 6 ++++++ arch/arm/include/asm/arch-socfpga/sdram.h | 19 +++++++++++++++++++ arch/arm/include/asm/arch-socfpga/system_manager.h | 1 + board/altera/socfpga/pinmux_config.c | 4 ++-- board/altera/socfpga/pll_config.h | 2 +- board/altera/socfpga/socfpga.c | 2 ++ drivers/spi/Kconfig | 16 ++++++++++++++++ include/configs/socfpga_common.h | 8 +++++++- 16 files changed, 197 insertions(+), 51 deletions(-) delete mode 100644 arch/arm/cpu/armv7/socfpga/lowlevel_init.S create mode 100644 arch/arm/include/asm/arch-socfpga/sdram.h

2 1

[U-Boot] Please pull u-boot-dm
by Simon Glass 29 Apr '15

29 Apr '15

Hi Tom, A few bug fixes. The following changes since commit cc555bd4f40a652471df4a3621d45ee57df0ca11: Merge branch 'master' of git://git.denx.de/u-boot-spi (2015-04-28 07:28:43 -0400) are available in the git repository at: http://git.denx.de/u-boot-dm.git for you to fetch changes up to f66529f998e59acbd64ccce3adfce8eedfa52da8: dm: core: Correct bug introduced in uclass_first/next_device() (2015-04-28 16:49:03 -0600) ---------------------------------------------------------------- Axel Lin (1): serial: ns16550: Remove hard-coded baud_divisor setting Masahiro Yamada (1): dm: core: drop device removal error path correctly Simon Glass (1): dm: core: Correct bug introduced in uclass_first/next_device() drivers/core/device.c | 6 +++--- drivers/core/uclass.c | 5 +++++ drivers/serial/ns16550.c | 1 - 3 files changed, 8 insertions(+), 4 deletions(-) Regards, Simon

2 1

[U-Boot] [PULL] Please pull u-boot-imx
by Stefano Babic 29 Apr '15

29 Apr '15

Hi Tom, please pull from u-boot-imx, thanks ! The following changes since commit f33cdaa4c3da4a8fd35aa2f9a3172f31cc887b35: Prepare v2015.04 (2015-04-13 10:53:03 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to 205d58699b157df75f1aa0b363ea9c21add21a0c: mx6cuboxi: Load the correct 'fdtfile' variable (2015-04-27 13:13:58 +0200) ---------------------------------------------------------------- Eric Nelson (1): nitrogen6x: allow gzipped bitmap display Fabio Estevam (9): mx6: Add initial SPL support for HummingBoard-i2eX mx6sabresd: Fix SPL memory description mx6sabresd: Remove uneeded ifdef mx6cuboxi: Fix the defconfig name mx6cuboxi: Prepare for multi SoC support mx6cuboxi: Introduce multi-SoC support mx6cuboxi: Differentiate Cubox-i and Hummingboard mx6cuboxi: Use more standard namings for fdt variables mx6cuboxi: Load the correct 'fdtfile' variable Jörg Krause (1): ARM: mxs: Get boot mode from OCRAM Pushpal Sidhu (3): imx: ventana: add DT fixup for GW522x to change PCIE_RST# GPIO imx: ventana: Add new memory configuration imx: ventana: Update missing memory/calib handling Stefan Roese (1): arm: mx6: tqma6: Extract baseboard configs into separate config file Tim Harvey (34): arm: mx6: ddr: add pd_fast_exit flag to system information fdt: add new fdt_fixup_display function to configure display imx: ventana: disable 4k tftp/nfs packets imx: ventana: add i210 support imx: ventana: assign default ethprime dynamically imx: ventana: remove unused GPIO configuration imx: ventana: add usb_pcisel hwconfig support imx: ventana: enable precharge power-down fast-exit mode imx: ventana: add support for 4Gb density mem devices with IMX6DL imx: ventana: set LTC3676 PMIC to appropriate values per datasheet imx: ventana: config: add USB Mass Storage (ums) support imx: ventana: config: Support ramdisk imx: ventana: config: enable edid support imx: ventana: config: enable EXT4 filesystem read/write support imx: ventana: fix various sparse warnings imx: ventana: disable IMX6 watchdogs on GW51xx RevA and RevB imx: ventana: Add support for GW551x imx: ventana: add usb_pgood_delay 2sec default imx: ventana: add wdis config for GW5520 imx: ventana: only pinmux FEC enet signals for boards using it imx: ventana: update boot scripts to support ubifs boot vol imx: ventana: remove GSC hwmon voltage rail min/max test imx: ventana: add mem_mb dynamic env var imx: ventana: gsc: add new hwmon rails imx: ventana: added DT fixup for GW551x-A video input imx: ventana: updated 16bit DDR calibration imx: ventana: remove 128x16 calibration (share with 128x32) imx: ventana: add DT fixup for GW54xx compatibility with older kernels imx: ventana: add support for DLC-700JMGT4 and DLC-800FIGT3 LCD displays imx: ventana: added device-tree display configuration for LVDS displays imx: ventana: add 'gsc wd' command for enabling and disabling GSC watchdog imx: ventana: use hdmiinfmt env var to override HDMI capture format imx: ventana: set HDMI video in to yuv422bt656 for GW551x-A power: pfuze100: fix LDO_EN bit value gaurav rana (1): iMX: Fix compilation error when enabling SECURE_BOOT arch/arm/Kconfig | 6 ++ arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 29 ++-------- arch/arm/cpu/armv7/mx6/ddr.c | 7 ++- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 1 + board/freescale/common/Makefile | 3 +- board/freescale/mx6sabresd/mx6sabresd.c | 13 ++--- board/gateworks/gw_ventana/eeprom.c | 10 +++- board/gateworks/gw_ventana/gsc.c | 130 +++++++++++++++++++++++++++++------------ board/gateworks/gw_ventana/gsc.h | 10 +++- board/gateworks/gw_ventana/gw_ventana.c | 367 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------- board/gateworks/gw_ventana/gw_ventana_spl.c | 129 ++++++++++++++++++++++++++++++++++++----- board/gateworks/gw_ventana/ventana_eeprom.h | 1 + board/solidrun/mx6cuboxi/Kconfig | 15 +++++ board/solidrun/mx6cuboxi/MAINTAINERS | 6 ++ board/solidrun/mx6cuboxi/Makefile | 9 +++ board/solidrun/mx6cuboxi/README | 21 +++++++ board/solidrun/mx6cuboxi/mx6cuboxi.c | 510 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ common/fdt_support.c | 29 ++++++++++ configs/mx6cuboxi_defconfig | 6 ++ include/configs/gw_ventana.h | 68 ++++++++++++++-------- include/configs/mx6cuboxi.h | 218 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/configs/nitrogen6x.h | 3 + include/configs/tqma6.h | 57 ++++++------------ include/configs/tqma6_mba6.h | 30 ++++++++++ include/fdt_support.h | 13 +++++ include/power/pfuze100_pmic.h | 2 +- 26 files changed, 1480 insertions(+), 213 deletions(-) create mode 100644 board/solidrun/mx6cuboxi/Kconfig create mode 100644 board/solidrun/mx6cuboxi/MAINTAINERS create mode 100644 board/solidrun/mx6cuboxi/Makefile create mode 100644 board/solidrun/mx6cuboxi/README create mode 100644 board/solidrun/mx6cuboxi/mx6cuboxi.c create mode 100644 configs/mx6cuboxi_defconfig create mode 100644 include/configs/mx6cuboxi.h create mode 100644 include/configs/tqma6_mba6.h -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

2 1

Re: [U-Boot] Intel Galileo on u-boot
by Bin Meng 29 Apr '15

29 Apr '15

Hi Fei, On Wed, Apr 29, 2015 at 4:42 PM, WANG FEI <wangfei.jimei(a)gmail.com> wrote: > Thanks, Meng Bin, for your big help. > > I'm not familiar with u-boot, so I even don't realize the BUILD_ROM flag > need to be changed, I just downloaded the u-boot-2015.04 source code and > build it with following instruction. > > $ make galileo_defconfig > $ make all > > > maybe I should do it again with BUILD_ROM flag. > Yes, you need export BUILD_ROM=y before building u-boot.rom. > Back to the compiler issue, I just use the latest coreboot source code, I > don't know the details of the GCC compiler flag, but I think I should have a > close look into it, I do realize Quark SoC does not support MMX/SSE etc, so > maybe the default coreboot compiler should be modified for this special SoC. > Did you do any GCC compiler change when developing it on u-boot? What is > your Host O/S(Fedora/Ubuntu 32/64 bit?)? What is the GCC version you are > using? I don't think GCC compiler version matters. I've tested a GCC 4.7.2 compiler from a 64-bit host (cross-compiling) and a GCC 4.6.1 from a 32-bit host (native build). Both work fine. > -Fei > > On Tue, Apr 28, 2015 at 10:40 AM, Bin Meng <bmeng.cn(a)gmail.com> wrote: >> >> Hi Fei, >> >> On Tue, Apr 28, 2015 at 7:36 AM, WANG FEI <wangfei.jimei(a)gmail.com> wrote: >> > Meng Bin, >> > >> > I remember few weeks I've built a u-boot binary for Galileo, but I >> > remember >> > the generated u-boot.bin is not 256/512/1024/2048K, it possible is about >> > 384K, is it correct? I want to use the u-boot you built as a reference. >> > >> >> No, it should be 1MB. Did you turn on BUILD_ROM as documented in >> README.x86? >> >> > I've successfully built a coreboot image with CAR enabled, console >> > function >> > only enabled partly due to some issue, it looks the "va_arg" in printf() >> > has >> > something wrong, I guess it's a compiler issue - maybe Quark SoC does >> > not >> > support some special instruments. Did you get the similar issue when >> > porting >> > u-boot? >> > >> >> The Quark integrates a CPU which has the 486 ISA. What compiler flag >> did you pass when you build coreboot? Regards, Bin

1 0

[U-Boot] [PATCH] zynq: Use system timer implementation instead of our
by Michal Simek 29 Apr '15

29 Apr '15

Use error-prone system timer implementation to simplify our code. The generic code is proven and it is easier to maintain. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/mach-zynq/include/mach/hardware.h | 1 - arch/arm/mach-zynq/timer.c | 83 +----------------------------- include/configs/zynq-common.h | 5 ++ 3 files changed, 6 insertions(+), 83 deletions(-) diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h index e2e0b7321ad4..9a51d6ba3b5e 100644 --- a/arch/arm/mach-zynq/include/mach/hardware.h +++ b/arch/arm/mach-zynq/include/mach/hardware.h @@ -12,7 +12,6 @@ #define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000 #define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000 #define ZYNQ_SCU_BASEADDR 0xF8F00000 -#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 #define ZYNQ_GEM_BASEADDR0 0xE000B000 #define ZYNQ_GEM_BASEADDR1 0xE000C000 #define ZYNQ_SDHCI_BASEADDR0 0xE0100000 diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 5ed9642df9b3..8ff82dc9306e 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -78,91 +78,10 @@ int timer_init(void) } /* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -ulong get_timer_masked(void) -{ - ulong now; - - now = readl(&timer_base->counter) / - (gd->arch.timer_rate_hz / CONFIG_SYS_HZ); - - if (gd->arch.lastinc >= now) { - /* Normal mode */ - gd->arch.tbl += gd->arch.lastinc - now; - } else { - /* We have an overflow ... */ - gd->arch.tbl += gd->arch.lastinc + (TIMER_LOAD_VAL / - (gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - - now + 1; - } - gd->arch.lastinc = now; - - return gd->arch.tbl; -} - -void __udelay(unsigned long usec) -{ - u32 countticks; - u32 timeend; - u32 timediff; - u32 timenow; - - if (usec == 0) - return; - - countticks = lldiv(((unsigned long long)gd->arch.timer_rate_hz * usec), - 1000000); - - /* decrementing timer */ - timeend = readl(&timer_base->counter) - countticks; - -#if TIMER_LOAD_VAL != 0xFFFFFFFF - /* do not manage multiple overflow */ - if (countticks >= TIMER_LOAD_VAL) - countticks = TIMER_LOAD_VAL - 1; -#endif - - do { - timenow = readl(&timer_base->counter); - - if (timenow >= timeend) { - /* normal case */ - timediff = timenow - timeend; - } else { - if ((TIMER_LOAD_VAL - timeend + timenow) <= - countticks) { - /* overflow */ - timediff = TIMER_LOAD_VAL - timeend + timenow; - } else { - /* missed the exact match */ - break; - } - } - } while (timediff > 0); -} - -/* Timer without interrupts */ -ulong get_timer(ulong base) -{ - return get_timer_masked() - base; -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* * This function is derived from PowerPC code (timebase clock frequency). * On ARM it returns the number of timer ticks per second. */ ulong get_tbclk(void) { - return CONFIG_SYS_HZ; + return gd->arch.timer_rate_hz; } diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b83e037f6f59..5297e6bcc8ff 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -25,6 +25,11 @@ # define CONFIG_SYS_PL310_BASE 0xf8f02000 #endif +#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 +#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR +#define CONFIG_SYS_TIMER_COUNTS_DOWN +#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) + /* Serial drivers */ #define CONFIG_BAUDRATE 115200 /* The following table includes the supported baudrates */ -- 2.3.5

2 1

[U-Boot] [PATCH 1/1] ARM: mxs: Get boot mode from OCRAM
by Jörg Krause 29 Apr '15

29 Apr '15

Reading the boot mode pins after power-up does not necessarily represent the boot mode used by the ROM loader. For example the state of a pin may have changed because a recovery switch which was pressed to enter USB mode is already released after plugging in USB. The ROM loader stores the value a fixed address in OCRAM. Use this value instead of reading the boot map pins. The GLOBAL_BOOT_MODE_ADDR for i.MX28 is taken from an U-Boot patch for the MX28EVK: http://repository.timesys.com/buildsources/u/u-boot/u-boot-2009.08/u-boot-2… Leave the boot mode detection for the i.MX23 untouched. Someone has to test whether the i.MX ROM loader does also store the boot mode in OCRAM and if the address match. This patch superseeds my incorrect patch: ARM: mxs: get boot mode from OTP http://patchwork.ozlabs.org/patch/454930/ Signed-off-by: Jörg Krause <joerg.krause(a)embedded.rocks> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 29 ++++++----------------------- 1 file changed, 6 insertions(+), 23 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index d7956e5..eb8669b 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -49,13 +49,6 @@ static const iomux_cfg_t iomux_boot[] = { MX23_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD, MX23_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD, MX23_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD, -#elif defined(CONFIG_MX28) - MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD, #endif }; @@ -65,10 +58,10 @@ static uint8_t mxs_get_bootmode_index(void) int i; uint8_t masked; +#if defined(CONFIG_MX23) /* Setup IOMUX of bootmode pads to GPIO */ mxs_iomux_setup_multiple_pads(iomux_boot, ARRAY_SIZE(iomux_boot)); -#if defined(CONFIG_MX23) /* Setup bootmode pins as GPIO input */ gpio_direction_input(MX23_PAD_LCD_D00__GPIO_1_0); gpio_direction_input(MX23_PAD_LCD_D01__GPIO_1_1); @@ -83,21 +76,11 @@ static uint8_t mxs_get_bootmode_index(void) bootmode |= (gpio_get_value(MX23_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3; bootmode |= (gpio_get_value(MX23_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5; #elif defined(CONFIG_MX28) - /* Setup bootmode pins as GPIO input */ - gpio_direction_input(MX28_PAD_LCD_D00__GPIO_1_0); - gpio_direction_input(MX28_PAD_LCD_D01__GPIO_1_1); - gpio_direction_input(MX28_PAD_LCD_D02__GPIO_1_2); - gpio_direction_input(MX28_PAD_LCD_D03__GPIO_1_3); - gpio_direction_input(MX28_PAD_LCD_D04__GPIO_1_4); - gpio_direction_input(MX28_PAD_LCD_D05__GPIO_1_5); - - /* Read bootmode pads */ - bootmode |= (gpio_get_value(MX28_PAD_LCD_D00__GPIO_1_0) ? 1 : 0) << 0; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D01__GPIO_1_1) ? 1 : 0) << 1; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D02__GPIO_1_2) ? 1 : 0) << 2; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D04__GPIO_1_4) ? 1 : 0) << 4; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5; + /* The global boot mode will be detected by ROM code and its value + * is stored at the fixed address 0x00019BF0 in OCRAM. + */ +#define GLOBAL_BOOT_MODE_ADDR 0x00019BF0 + bootmode = __raw_readl(GLOBAL_BOOT_MODE_ADDR); #endif for (i = 0; i < ARRAY_SIZE(mxs_boot_modes); i++) { -- 2.3.4

3 2

[U-Boot] [PATCH] dm: usb: Copy over usb_device values from usb_scan_device() to final usb_device
by Hans de Goede 29 Apr '15

29 Apr '15

Currently we copy over a number of usb_device values stored in the on stack struct usb_device probed in usb_scan_device() to the final driver-model managed struct usb_device in usb_child_pre_probe() through usb_device_platdata, and then call usb_select_config() to fill in the rest. There are 2 problems with this approach: 1) It does not fill in enough fields before calling usb_select_config(), specifically it does not fill in ep0's maxpacketsize causing a div by zero exception in the ehci driver. 2) It unnecessarily redoes a number of usb requests making usb probing slower, and potentially upsetting some devices. This commit fixes both issues by removing the usb_select_config() call from usb_child_pre_probe(), and instead of copying over things field by field through usb_device_platdata, store a pointer to the in stack usb_device (which is still valid when usb_child_pre_probe() gets called) and copy over the entire struct. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- drivers/usb/host/usb-uclass.c | 23 ++++++++--------------- include/usb.h | 5 +---- 2 files changed, 9 insertions(+), 19 deletions(-) diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c index 714bc0e..0adc271 100644 --- a/drivers/usb/host/usb-uclass.c +++ b/drivers/usb/host/usb-uclass.c @@ -535,12 +535,7 @@ int usb_scan_device(struct udevice *parent, int port, } plat = dev_get_parent_platdata(dev); debug("%s: Probing '%s', plat=%p\n", __func__, dev->name, plat); - plat->devnum = udev->devnum; - plat->speed = udev->speed; - plat->slot_id = udev->slot_id; - plat->portnr = port; - debug("** device '%s': stashing slot_id=%d\n", dev->name, - plat->slot_id); + plat->udev = udev; priv->next_addr++; ret = device_probe(dev); if (ret) { @@ -607,17 +602,15 @@ int usb_child_pre_probe(struct udevice *dev) ret = usb_get_bus(dev, &bus); if (ret) return ret; + + /* + * Copy over all the values set in the on stack struct usb_device in + * usb_scan_device() to our final struct usb_device for this dev. + */ + *udev = *(plat->udev); + udev->controller_dev = bus; udev->dev = dev; - udev->devnum = plat->devnum; - udev->slot_id = plat->slot_id; - udev->portnr = plat->portnr; - udev->speed = plat->speed; - debug("** device '%s': getting slot_id=%d\n", dev->name, plat->slot_id); - - ret = usb_select_config(udev); - if (ret) - return ret; return 0; } diff --git a/include/usb.h b/include/usb.h index 1984e8f..1b667ff 100644 --- a/include/usb.h +++ b/include/usb.h @@ -581,10 +581,7 @@ struct usb_platdata { */ struct usb_dev_platdata { struct usb_device_id id; - enum usb_device_speed speed; - int devnum; - int slot_id; - int portnr; /* Hub port number, 1..n */ + struct usb_device *udev; #ifdef CONFIG_SANDBOX struct usb_string *strings; /* NULL-terminated list of descriptor pointers */ -- 2.3.6

1 0

[U-Boot] [UBOOT PATCH] ci_udc: Update the ci_udc driver to support bulk transfers
by Siva Durga Prasad Paladugu 29 Apr '15

29 Apr '15

Update the ci_udc driver to support bulk transfer and also added capability of having multiple dtds if requested data is more thank 16K. These changes are tested for both the DFU and lthor. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- drivers/usb/gadget/ci_udc.c | 135 +++++++++++++++++++++++++++++++++++++------ drivers/usb/gadget/ci_udc.h | 1 + 2 files changed, 117 insertions(+), 19 deletions(-) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 2572b34..d1d19dc 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -50,6 +50,8 @@ /* For each endpoint, we need 2 QTDs, one for each of IN and OUT */ #define ILIST_SZ (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ) +#define EP_MAX_LENGTH_TRANSFER 0x4000 + #ifndef DEBUG #define DBG(x...) do {} while (0) #else @@ -102,13 +104,28 @@ static struct usb_ep_ops ci_ep_ops = { }; /* Init values for USB endpoints. */ -static const struct usb_ep ci_ep_init[2] = { +static const struct usb_ep ci_ep_init[5] = { [0] = { /* EP 0 */ .maxpacket = 64, .name = "ep0", .ops = &ci_ep_ops, }, - [1] = { /* EP 1..n */ + [1] = { + .maxpacket = 512, + .name = "ep1in-bulk", + .ops = &ci_ep_ops, + }, + [2] = { + .maxpacket = 512, + .name = "ep2out-bulk", + .ops = &ci_ep_ops, + }, + [3] = { + .maxpacket = 512, + .name = "ep3in-int", + .ops = &ci_ep_ops, + }, + [4] = { .maxpacket = 512, .name = "ep-", .ops = &ci_ep_ops, @@ -197,6 +214,19 @@ static void ci_flush_qtd(int ep_num) } /** + * ci_flush_td - flush cache over queue item + * @td: td pointer + * + * This function flushes cache for particular transfer descriptor. + */ +static void ci_flush_td(struct ept_queue_item *td) +{ + const uint32_t start = (uint32_t)td; + const uint32_t end = (uint32_t) td + ILIST_ENT_SZ; + flush_dcache_range(start, end); +} + +/** * ci_invalidate_qtd - invalidate cache over queue item * @ep_num: Endpoint number * @@ -211,6 +241,19 @@ static void ci_invalidate_qtd(int ep_num) invalidate_dcache_range(start, end); } +/** + * ci_invalidate_td - invalidate cache over queue item + * @td: td pointer + * + * This function invalidates cache for particular transfer descriptor. + */ +static void ci_invalidate_td(struct ept_queue_item *td) +{ + const uint32_t start = (uint32_t)td; + const uint32_t end = start + ILIST_ENT_SZ; + invalidate_dcache_range(start, end); +} + static struct usb_request * ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) { @@ -376,6 +419,9 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) struct ept_queue_head *head; int bit, num, len, in; struct ci_req *ci_req; + u8 *buf; + uint32_t length, actlen; + struct ept_queue_item *dtd, *qtd; ci_ep->req_primed = true; @@ -387,16 +433,41 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); len = ci_req->req.length; - item->info = INFO_BYTES(len) | INFO_ACTIVE; - item->page0 = (uint32_t)ci_req->hw_buf; - item->page1 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x1000; - item->page2 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x2000; - item->page3 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x3000; - item->page4 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x4000; - head->next = (unsigned) item; head->info = 0; + ci_req->dtd_count = 0; + buf = ci_req->hw_buf; + actlen = 0; + dtd = item; + + do { + length = min(ci_req->req.length - actlen, + (unsigned)EP_MAX_LENGTH_TRANSFER); + + dtd->info = INFO_BYTES(length) | INFO_ACTIVE; + dtd->page0 = (uint32_t)buf; + dtd->page1 = ((uint32_t)buf & 0xfffff000) + 0x1000; + dtd->page2 = ((uint32_t)buf & 0xfffff000) + 0x2000; + dtd->page3 = ((uint32_t)buf & 0xfffff000) + 0x3000; + dtd->page4 = ((uint32_t)buf & 0xfffff000) + 0x4000; + + len -= length; + actlen += length; + buf += length; + + if (len) { + qtd = (struct ept_queue_item *) + memalign(ILIST_ALIGN, ILIST_ENT_SZ); + dtd->next = (uint32_t)qtd; + dtd = qtd; + memset(dtd, 0, ILIST_ENT_SZ); + } + + ci_req->dtd_count++; + } while (len); + + item = dtd; /* * When sending the data for an IN transaction, the attached host * knows that all data for the IN is sent when one of the following @@ -432,6 +503,12 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_flush_qtd(num); + item = (struct ept_queue_item *)head->next; + while (item->next != TERMINATE) { + ci_flush_td((struct ept_queue_item *)item->next); + item = (struct ept_queue_item *)item->next; + } + DBG("ept%d %s queue len %x, req %p, buffer %p\n", num, in ? "in" : "out", len, ci_req, ci_req->hw_buf); ci_flush_qh(num); @@ -497,21 +574,31 @@ static void flip_ep0_direction(void) static void handle_ep_complete(struct ci_ep *ci_ep) { - struct ept_queue_item *item; - int num, in, len; + struct ept_queue_item *item, *next_td; + int num, in, len, j; struct ci_req *ci_req; num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; item = ci_get_qtd(num, in); ci_invalidate_qtd(num); + ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); - len = (item->info >> 16) & 0x7fff; - if (item->info & 0xff) - printf("EP%d/%s FAIL info=%x pg0=%x\n", - num, in ? "in" : "out", item->info, item->page0); + next_td = item; + len = 0; + for (j = 0; j < ci_req->dtd_count; j++) { + ci_invalidate_td(next_td); + item = next_td; + len += (item->info >> 16) & 0x7fff; + if (item->info & 0xff) + printf("EP%d/%s FAIL info=%x pg0=%x\n", + num, in ? "in" : "out", item->info, item->page0); + if (j != ci_req->dtd_count - 1) + next_td = (struct ept_queue_item *)item->next; + if (j != 0) + free(item); + } - ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); list_del_init(&ci_req->queue); ci_ep->req_primed = false; @@ -847,9 +934,19 @@ static int ci_udc_probe(void) controller.gadget.ep0 = &controller.ep[0].ep; INIT_LIST_HEAD(&controller.gadget.ep0->ep_list); - /* Init EP 1..n */ - for (i = 1; i < NUM_ENDPOINTS; i++) { - memcpy(&controller.ep[i].ep, &ci_ep_init[1], + /* Init EP 1..3 */ + for (i = 1; i < 4; i++) { + memcpy(&controller.ep[i].ep, &ci_ep_init[i], + sizeof(*ci_ep_init)); + INIT_LIST_HEAD(&controller.ep[i].queue); + controller.ep[i].req_primed = false; + list_add_tail(&controller.ep[i].ep.ep_list, + &controller.gadget.ep_list); + } + + /* Init EP 4..n */ + for (i = 4; i < NUM_ENDPOINTS; i++) { + memcpy(&controller.ep[i].ep, &ci_ep_init[4], sizeof(*ci_ep_init)); INIT_LIST_HEAD(&controller.ep[i].queue); controller.ep[i].req_primed = false; diff --git a/drivers/usb/gadget/ci_udc.h b/drivers/usb/gadget/ci_udc.h index 346164a..95cc079 100644 --- a/drivers/usb/gadget/ci_udc.h +++ b/drivers/usb/gadget/ci_udc.h @@ -86,6 +86,7 @@ struct ci_req { /* Buffer for the current transfer. Either req.buf/len or b_buf/len */ uint8_t *hw_buf; uint32_t hw_len; + uint32_t dtd_count; }; struct ci_ep { -- 1.7.4

4 5

[U-Boot] [PATCH 00/20] x86: Add CPU uclass and multi-core support for Minnowboard MAX
by Simon Glass 29 Apr '15

29 Apr '15

This series adds a new CPU uclass which is intended to be useful on any architecture. So far it has a very simple interface and a command to show CPU details. This series also introduces multi-core init for x86. It is implemented and enabled on Minnowboard MAX, a single/dual-core Atom board. A CPU driver is implemented for generic x86 and Baytrail. The Simple Firmware Interface is used to provide these details to the kernel, since ACPI is not yet available. With these changes Minnowboard MAX can boot into Linux with both cores enabled. This series is available at u-boot-x86 branch 'cpu-working'. Simon Glass (20): Fix comment nits in board_f.c dm: core: Add a function to bind a driver for a device tree node x86: Remove unwanted MMC debugging x86: Disable -Werror Move display_options functions to their own header Add print_freq() to display frequencies nicely x86: Add support for the Simple Firmware Interface (SFI) dm: Implement a CPU uclass Add a 'cpu' command to print CPU information x86: Add atomic operations x86: Add defines for fixed MTRRs x86: Add an mfence macro x86: Store the GDT pointer in global_data x86: Provide access to the IDT x86: Add multi-processor init x86: Add functions to set and clear bits on MSRs x86: Allow CPUs to be set up after relocation x86: Add a CPU driver for baytrail x86: Tidy up the LAPIC init code x86: Enable multi-core init for Minnowboard MAX arch/x86/Kconfig | 53 ++++ arch/x86/cpu/Makefile | 2 + arch/x86/cpu/baytrail/Makefile | 1 + arch/x86/cpu/baytrail/cpu.c | 206 +++++++++++++ arch/x86/cpu/baytrail/valleyview.c | 1 - arch/x86/cpu/config.mk | 2 +- arch/x86/cpu/cpu.c | 38 +++ arch/x86/cpu/interrupts.c | 5 + arch/x86/cpu/ivybridge/model_206ax.c | 4 +- arch/x86/cpu/lapic.c | 20 +- arch/x86/cpu/mp_init.c | 507 +++++++++++++++++++++++++++++++ arch/x86/cpu/sipi.S | 217 +++++++++++++ arch/x86/dts/minnowmax.dts | 20 ++ arch/x86/include/asm/arch-baytrail/msr.h | 30 ++ arch/x86/include/asm/atomic.h | 115 +++++++ arch/x86/include/asm/cpu.h | 19 ++ arch/x86/include/asm/global_data.h | 1 + arch/x86/include/asm/interrupt.h | 2 + arch/x86/include/asm/lapic.h | 7 - arch/x86/include/asm/mp.h | 94 ++++++ arch/x86/include/asm/msr.h | 19 ++ arch/x86/include/asm/mtrr.h | 14 + arch/x86/include/asm/sipi.h | 79 +++++ arch/x86/include/asm/smm.h | 14 + arch/x86/include/asm/u-boot-x86.h | 2 + arch/x86/lib/Makefile | 1 + arch/x86/lib/sfi.c | 171 +++++++++++ arch/x86/lib/zimage.c | 7 + common/Kconfig | 8 + common/Makefile | 1 + common/board_f.c | 9 +- common/board_r.c | 2 +- common/cmd_cpu.c | 113 +++++++ configs/minnowmax_defconfig | 4 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/core/lists.c | 9 +- drivers/cpu/Kconfig | 8 + drivers/cpu/Makefile | 7 + drivers/cpu/cpu-uclass.c | 61 ++++ include/common.h | 16 +- include/cpu.h | 84 +++++ include/display_options.h | 59 ++++ include/dm/lists.h | 16 + include/dm/uclass-id.h | 1 + include/linux/sfi.h | 139 +++++++++ lib/display_options.c | 54 +++- 47 files changed, 2191 insertions(+), 54 deletions(-) create mode 100644 arch/x86/cpu/baytrail/cpu.c create mode 100644 arch/x86/cpu/mp_init.c create mode 100644 arch/x86/cpu/sipi.S create mode 100644 arch/x86/include/asm/arch-baytrail/msr.h create mode 100644 arch/x86/include/asm/atomic.h create mode 100644 arch/x86/include/asm/mp.h create mode 100644 arch/x86/include/asm/sipi.h create mode 100644 arch/x86/include/asm/smm.h create mode 100644 arch/x86/lib/sfi.c create mode 100644 common/cmd_cpu.c create mode 100644 drivers/cpu/Kconfig create mode 100644 drivers/cpu/Makefile create mode 100644 drivers/cpu/cpu-uclass.c create mode 100644 include/cpu.h create mode 100644 include/display_options.h create mode 100644 include/linux/sfi.h -- 2.2.0.rc0.207.ga3a616c

2 35

[U-Boot] [PATCH 1/4] x86: Implement reset_cpu() correctly for modern CPUs
by Simon Glass 29 Apr '15

29 Apr '15

The existing code is pretty ancient and is unreliable on modern hardware. Generally it will hang. We can use port 0xcf9 to initiate reset on more modern hardware (say in the last 10 years). Update the reset_cpu() function to do this, and add a new 'full reset' function to perform a full power cycle. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- arch/x86/cpu/cpu.c | 22 +++++++++------------- arch/x86/include/asm/processor.h | 11 +++++++++++ 2 files changed, 20 insertions(+), 13 deletions(-) diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index c9614f1..13b3baa 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -380,21 +380,17 @@ void flush_cache(unsigned long dummy1, unsigned long dummy2) asm("wbinvd\n"); } -void __attribute__ ((regparm(0))) generate_gpf(void); - -/* segment 0x70 is an arbitrary segment which does not exist */ -asm(".globl generate_gpf\n" - ".hidden generate_gpf\n" - ".type generate_gpf, @function\n" - "generate_gpf:\n" - "ljmp $0x70, $0x47114711\n"); - __weak void reset_cpu(ulong addr) { - printf("Resetting using x86 Triple Fault\n"); - set_vector(13, generate_gpf); /* general protection fault handler */ - set_vector(8, generate_gpf); /* double fault handler */ - generate_gpf(); /* start the show */ + /* Do a hard reset through the chipset's reset control register */ + outb(SYS_RST | RST_CPU, PORT_RESET); + for (;;) + cpu_hlt(); +} + +void x86_full_reset(void) +{ + outb(FULL_RST, PORT_RESET); } int dcache_status(void) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 3e26202..a24028d 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -27,6 +27,17 @@ #define PORT_RESET 0xcf9 +enum { + SYS_RST = 1 << 1, /* clear for soft reset, set for hard */ + RST_CPU = 1 << 2, /* initiate reset */ + FULL_RST = 1 << 3, /* full power cycle */ +}; + +/** + * x86_full_reset() - reset everything: perform a full power cycle + */ +void x86_full_reset(void); + static inline __attribute__((always_inline)) void cpu_hlt(void) { asm("hlt"); -- 2.2.0.rc0.207.ga3a616c

2 9