December 2015 - U-Boot

[U-Boot] [PATCH v2 00/11] Moving Axi emac to DM
by Michal Simek 17 Dec '15

17 Dec '15

Hi, This patch series depends on microblaze cleanup series. All these patches will be available in git://git.denx.de/u-boot-microblaze.git also with patches which I am going to send now. Thanks, Michal Changes in v2: - Change commit message - Joe - Remove additional blank line - Joe - Remove one comment - Joe - new patch is this series Michal Simek (11): net: axi_emac: Fix parentheses around operand ! net: axi_emac: Show phy address instead of register content net: axi_emac: Pass directly pointer to register space net: axi_emac: Put iobase to private structure net: axi_emac: Pass private structure to phyread/phywrite net: axi_emac: Pass private structure where possible net: axi_emac: Move driver to DM net: axi_emac: Enable access to MDIO in probe net: axi_emac: Split recv from free_pkt net: axi_emac: Rename start, stop, write_hwaddr functions net: Add axi emac to Kconfig .../xilinx/microblaze-generic/microblaze-generic.c | 5 - board/xilinx/zynq/board.c | 4 - drivers/net/Kconfig | 8 + drivers/net/xilinx_axi_emac.c | 280 +++++++++++++-------- include/netdev.h | 2 - 5 files changed, 183 insertions(+), 116 deletions(-) -- 1.9.1

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[U-Boot] [PATCH v2 1/5] net: gem: Setup default phy address to -1
by Michal Simek 17 Dec '15

17 Dec '15

Undefined phy address is -1 not 0. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> Acked-by: Joe Hershberger <joe.hershberger(a)ni.com> --- Changes in v2: None drivers/net/zynq_gem.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 0a41281e901d..b0755f5e3b48 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -666,11 +666,12 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) priv->iobase = (struct zynq_gem_regs *)pdata->iobase; /* Hardcode for now */ priv->emio = 0; + priv->phyaddr = -1; offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset, "phy-handle"); if (offset > 0) - priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0); + priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1); phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "phy-mode", NULL); if (phy_mode) -- 1.9.1

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[U-Boot] [PATCH 00/12] Moving Emaclite to DM + MDIO support
by Michal Simek 17 Dec '15

17 Dec '15

Hi, The first part of this series is about adding MDIO support to driver which was out of mainline and it was much easier to merge it before move to DM. Then driver didn't use indirect register access. In the middle of moving this driver I have fixed logic in some functions which doesn't affect performance of this driver. All these changes were tested on HW design with emaclite with and without pong buffers. This patch series depends on microblaze cleanup series. All these patches will be available in git://git.denx.de/u-boot-microblaze.git also with patches which I am going to send now. Thanks, Michal Michal Simek (12): net: emaclite: Remove ancient OF probe function net: emaclite: Add MDIO support to driver net: emaclite: Convert MDIO to use register offset net: emaclite: Use indirect register access for tx_ping/pong net: emaclite: Use indirect register access for tx_ping/pong net: emaclite: Use indirect register access for TX reset net: emaclite: Fix logic around available TX buffers net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flag net: emaclite: Use indirect reg access in send net: emaclite: Use indirect access in emaclite_recv net: emaclite: Move driver to DM net: emaclite: Move emaclite to Kconfig .../xilinx/microblaze-generic/microblaze-generic.c | 21 - board/xilinx/microblaze-generic/xparameters.h | 3 - board/xilinx/zynq/board.c | 20 - configs/microblaze-generic_defconfig | 3 +- drivers/net/Kconfig | 8 + drivers/net/xilinx_emaclite.c | 570 +++++++++++++++------ include/configs/microblaze-generic.h | 3 +- include/netdev.h | 3 - 8 files changed, 412 insertions(+), 219 deletions(-) -- 1.9.1

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[U-Boot] [PATCH 0/3] QIXIS related patches
by Gong Qianyu 17 Dec '15

17 Dec '15

Hi all, Here are three QIXIS related patches. I have tested on LS1043AQDS board. Please help to review. Thanks! Regards, Qianyu

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[U-Boot] p1020rdb/p2020rdb-pa
by Bryan Hundven 17 Dec '15

17 Dec '15

Hello, I was digging through my garage and found my freescale p1020rdb-pa board. I noticed in commit: http://git.denx.de/?p=u-boot.git;a=commit;h=743d48151d2df4215b90310dc422db8… ...that these boards were removed because were not generic, and possibly no longer maintained by freescale. If I were to help re-add these boards as generic boards, and maintained them, would that code be accepted? Cheers, -Bryan

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[U-Boot] [PATCH] arm: socfpga: Fixed Phy not found error. Fixed QSPI flash not found error Disabled Hardware watch dog by default. Updated MMC clock.
by ShengjiangWu 17 Dec '15

17 Dec '15

arm: socfpga: Fixed Phy not found error. Fixed QSPI flash not found error Disabled Hardware watch dog by default. Updated MMC clock. Updated pinmux and clock for EMAC1 and QSPI flash. U-BOOT-2015-10 can run on Cyclone V SoC Development Kit (SoCDK) with this fix. Signed-off-by: swu <shengjiangwu(a)gmail.com> Cc: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Pavel Machek <pavel(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de>

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[U-Boot] [PATCH v2 0/7] dm: x86: Convert ICH driver fully to driver model PCI API
by Simon Glass 17 Dec '15

17 Dec '15

This is a small series to move the ICH driver over to use the driver model PCI API. It involves creating PCH drivers which the ICH driver can use to find out its base address. At present irq-router is the 'PCH' node in most device tree files. This is not really correct since the router is just one of the functions of the PCH. Another is the SPI bus. So this series also moves irq-router down a level. This still works with the same irq-router driver, since it just searches for the first compatible node it can find. A driver-model-compatible irq-router driver should be written but that is left for later. This series unfortunately needs testing on each board since each has a separate change. I have tested minnowmax and chromebook_link so far. Changes in v2: - Add more detail to the function comment - Rename the last parameter to 'addr' - Update the comment to explain usable of this function - Update the commit message and header file comments - Use an enum for the PCH version - Replace SBASE with SPI base - Add a TODO to check if the init() method can be removed later - Rename the PCH functions - Update the get_version() handle to use an enum - Add a function to obtain the SPI base address - Rename the PCH functions - Update the get_version() handle to use an enum - Adjust code for earlier commits - Move the SPI base code into the PCH drivers Simon Glass (7): dm: pci: Move pci_bus_to_hose() to compatibility dm: pci: Add a function to write a BAR dm: pci: Avoid using pci_bus_to_hose() in the uclass dm: Expand the uclass for Platform Controller Hubs (PCH) dm: x86: Add a driver for Intel PCH7 dm: x86: Add a driver for Intel PCH9 dm: x86: spi: Convert ICH SPI driver to driver model PCI API arch/x86/cpu/coreboot/pci.c | 3 +- arch/x86/cpu/irq.c | 7 +- arch/x86/cpu/ivybridge/bd82x6x.c | 25 +++++ arch/x86/dts/bayleybay.dts | 160 +++++++++++++++-------------- arch/x86/dts/broadwell_som-6896.dts | 23 +++-- arch/x86/dts/chromebook_link.dts | 5 +- arch/x86/dts/chromebox_panther.dts | 33 +++--- arch/x86/dts/crownbay.dts | 150 ++++++++++++++------------- arch/x86/dts/galileo.dts | 98 +++++++++--------- arch/x86/dts/minnowmax.dts | 158 ++++++++++++++-------------- arch/x86/dts/qemu-x86_i440fx.dts | 26 +++-- arch/x86/dts/qemu-x86_q35.dts | 38 ++++--- arch/x86/lib/Makefile | 1 - drivers/Makefile | 1 + drivers/pch/Makefile | 7 ++ {arch/x86/lib => drivers/pch}/pch-uclass.c | 32 ++++++ drivers/pch/pch7.c | 43 ++++++++ drivers/pch/pch9.c | 43 ++++++++ drivers/pci/pci-uclass.c | 24 ++--- drivers/pci/pci_auto.c | 14 +-- drivers/pci/pci_compat.c | 15 +++ drivers/pci/pci_internal.h | 12 +++ drivers/spi/ich.c | 143 ++++++-------------------- include/pch.h | 80 +++++++++++++++ include/pci.h | 17 ++- 25 files changed, 699 insertions(+), 459 deletions(-) create mode 100644 drivers/pch/Makefile rename {arch/x86/lib => drivers/pch}/pch-uclass.c (53%) create mode 100644 drivers/pch/pch7.c create mode 100644 drivers/pch/pch9.c create mode 100644 include/pch.h -- 2.6.0.rc2.230.g3dd15c0

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[U-Boot] [PATCH] video: Typo cleanup in drivers/video/da8xx-fb.c
by Robert P. J. Day 16 Dec '15

16 Dec '15

Signed-off-by: Robert P. J. Day <rpjday(a)crashcourse.ca> --- more tidying up as i run across it ... diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index e2b2144..468f385d 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -379,7 +379,7 @@ static void lcd_cfg_ac_bias(int period, int transitions_per_int) { u32 reg; - /* Set the AC Bias Period and Number of Transisitons per Interrupt */ + /* Set the AC Bias Period and Number of Transitions per Interrupt */ reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2) & 0xFFF00000; reg |= LCD_AC_BIAS_FREQUENCY(period) | LCD_AC_BIAS_TRANSITIONS_PER_INT(transitions_per_int); @@ -487,7 +487,7 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height, /* Pixels per line = (PPL + 1)*16 */ if (lcd_revision == LCD_VERSION_1) { /* - * 0x3F in bits 4..9 gives max horisontal resolution = 1024 + * 0x3F in bits 4..9 gives max horizontal resolution = 1024 * pixels */ width &= 0x3f0; @@ -695,7 +695,7 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp); lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp); - /* Configure for disply */ + /* Configure for display */ ret = lcd_cfg_display(cfg); if (ret < 0) return ret; @@ -761,7 +761,7 @@ static u32 lcdc_irq_handler_rev01(void) lcdc_write(stat, &da8xx_fb_reg_base->stat); - /* Disable PL completion inerrupt */ + /* Disable PL completion interrupt */ reg_ras = lcdc_read(&da8xx_fb_reg_base->raster_ctrl); reg_ras &= ~LCD_V1_PL_INT_ENA; lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl); @@ -810,7 +810,7 @@ static u32 lcdc_irq_handler_rev02(void) lcdc_write(stat, &da8xx_fb_reg_base->masked_stat); - /* Disable PL completion inerrupt */ + /* Disable PL completion interrupt */ reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_clr) | (LCD_V2_PL_INT_ENA); lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr); rday -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

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[U-Boot] [PATCH] video: Clean up formatting, spelling mistakes in exynos_dp*
by Robert P. J. Day 16 Dec '15

16 Dec '15

Aesthetic cleanup in drivers/video/exynos_dp*.[ch] files. Signed-off-by: Robert P. J. Day <rpjday(a)crashcourse.ca> --- noticed a couple spelling mistakes in those files so figured i might as well do a thorough cleaning. not compile-tested as everything here is aesthetic. diff --git a/drivers/video/exynos_dp.c b/drivers/video/exynos_dp.c index 5b6fc14..0d5d090 100644 --- a/drivers/video/exynos_dp.c +++ b/drivers/video/exynos_dp.c @@ -207,7 +207,7 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info) return -EINVAL; } - /*Refer VESA Display Port Stnadard Ver1.1a Page 120 */ + /* Refer VESA Display Port Standard Ver1.1a Page 120 */ if (edp_info->dpcd_rev == DP_DPCD_REV_11) { temp = buf[DPCD_MAX_LANE_COUNT] & 0x1f; if (buf[DPCD_MAX_LANE_COUNT] & 0x80) @@ -270,7 +270,7 @@ static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info) return ret; } - /* Set link rate and count as you want to establish*/ + /* Set link rate and count as you want to establish */ exynos_dp_set_link_bandwidth(edp_info->lane_bw); exynos_dp_set_lane_count(edp_info->lane_cnt); @@ -322,7 +322,7 @@ static unsigned int exynos_dp_training_pattern_dis(void) ret = exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET, DPCD_TRAINING_PATTERN_DISABLED); if (ret != EXYNOS_DP_SUCCESS) { - printf("DP requst_link_traninig_req failed\n"); + printf("DP request_link_training_req failed\n"); return -EAGAIN; } @@ -412,7 +412,7 @@ static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num, unsigned int dpcd_addr; unsigned char shift_val[DP_LANE_CNT_4] = {0, 4, 0, 4}; - /*lane_num value is used as arry index, so this range 0 ~ 3 */ + /* lane_num value is used as array index, so this range 0 ~ 3 */ dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2); ret = exynos_dp_read_byte_from_dpcd(dpcd_addr, &buf); @@ -433,7 +433,7 @@ static int exynos_dp_equalizer_err_link(struct edp_device_info *edp_info) ret = exynos_dp_training_pattern_dis(); if (ret != EXYNOS_DP_SUCCESS) { - printf("DP training_patter_disable() failed\n"); + printf("DP training_pattern_disable() failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; } @@ -523,7 +523,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info ret = exynos_dp_write_bytes_to_dpcd( DPCD_TRAINING_PATTERN_SET, 5, buf); if (ret != EXYNOS_DP_SUCCESS) { - printf("DP write traning pattern1 failed\n"); + printf("DP write training pattern1 failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; return ret; } else @@ -567,7 +567,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info ret = exynos_dp_write_bytes_to_dpcd( DPCD_TRAINING_LANE0_SET, 4, lt_ctl_val); if (ret != EXYNOS_DP_SUCCESS) { - printf("DP write traning pattern2 failed\n"); + printf("DP write training pattern2 failed\n"); edp_info->lt_info.lt_status = DP_LT_FAIL; return ret; } @@ -738,7 +738,7 @@ static unsigned int exynos_dp_set_link_train(struct edp_device_info *edp_info) ret = exynos_dp_sw_link_training(edp_info); if (ret != EXYNOS_DP_SUCCESS) - printf("DP dp_sw_link_traning() failed\n"); + printf("DP dp_sw_link_training() failed\n"); return ret; } diff --git a/drivers/video/exynos_dp_lowlevel.c b/drivers/video/exynos_dp_lowlevel.c index e9b461a..acb5bc8 100644 --- a/drivers/video/exynos_dp_lowlevel.c +++ b/drivers/video/exynos_dp_lowlevel.c @@ -44,7 +44,7 @@ static void exynos_dp_enable_video_input(unsigned int enable) reg = readl(&dp_regs->video_ctl1); reg &= ~VIDEO_EN_MASK; - /* enable video input*/ + /* enable video input */ if (enable) reg |= VIDEO_EN_MASK; @@ -55,13 +55,13 @@ static void exynos_dp_enable_video_input(unsigned int enable) void exynos_dp_enable_video_bist(unsigned int enable) { - /*enable video bist*/ + /* enable video bist */ unsigned int reg; reg = readl(&dp_regs->video_ctl4); reg &= ~VIDEO_BIST_MASK; - /*enable video bist*/ + /* enable video bist */ if (enable) reg |= VIDEO_BIST_MASK; @@ -112,7 +112,7 @@ static void exynos_dp_init_analog_param(void) /* * Set AUX TX terminal resistor to 102 ohm * Set AUX channel amplitude control - */ + */ reg = PD_RING_OSC | AUX_TERMINAL_CTRL_52_OHM | TX_CUR1_2X | TX_CUR_4_MA; writel(reg, &dp_regs->pll_filter_ctl1); @@ -146,7 +146,7 @@ static void exynos_dp_init_interrupt(void) */ writel(INT_POL, &dp_regs->int_ctl); - /* Clear pending regisers */ + /* Clear pending registers */ writel(0xff, &dp_regs->common_int_sta1); writel(0xff, &dp_regs->common_int_sta2); writel(0xff, &dp_regs->common_int_sta3); @@ -165,7 +165,7 @@ void exynos_dp_reset(void) { unsigned int reg_func_1; - /*dp tx sw reset*/ + /* dp tx sw reset */ writel(RESET_DP_TX, &dp_regs->tx_sw_reset); exynos_dp_enable_video_input(DP_DISABLE); @@ -287,7 +287,7 @@ int exynos_dp_init_analog_func(void) unsigned int retry_cnt = 10; unsigned int reg; - /*Power On All Analog block */ + /* Power On All Analog block */ exynos_dp_set_analog_power_down(POWER_ALL, DP_DISABLE); reg = PLL_LOCK_CHG; @@ -297,14 +297,14 @@ int exynos_dp_init_analog_func(void) reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL); writel(reg, &dp_regs->debug_ctl); - /*Assert DP PLL Reset*/ + /* Assert DP PLL Reset */ reg = readl(&dp_regs->pll_ctl); reg |= DP_PLL_RESET; writel(reg, &dp_regs->pll_ctl); mdelay(1); - /*Deassert DP PLL Reset*/ + /* Deassert DP PLL Reset */ reg = readl(&dp_regs->pll_ctl); reg &= ~(DP_PLL_RESET); writel(reg, &dp_regs->pll_ctl); @@ -336,7 +336,7 @@ void exynos_dp_init_hpd(void) { unsigned int reg; - /* Clear interrupts releated to Hot Plug Dectect */ + /* Clear interrupts related to Hot Plug Detect */ reg = HOTPLUG_CHG | HPD_LOST | PLUG; writel(reg, &dp_regs->common_int_sta4); @@ -366,7 +366,7 @@ void exynos_dp_init_aux(void) { unsigned int reg; - /* Clear inerrupts related to AUX channel */ + /* Clear interrupts related to AUX channel */ reg = RPLY_RECEIV | AUX_ERR; writel(reg, &dp_regs->int_sta); @@ -377,7 +377,7 @@ void exynos_dp_init_aux(void) AUX_HW_RETRY_INTERVAL_600_MICROSECONDS; writel(reg, &dp_regs->aux_hw_retry_ctl); - /* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */ + /* Receive AUX Channel DEFER commands equal to DEFER_COUNT*64 */ reg = DEFER_CTRL_EN | DEFER_COUNT(1); writel(reg, &dp_regs->aux_ch_defer_ctl); @@ -1040,7 +1040,7 @@ void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info) reg |= (video_info->h_sync_polarity << H_S_POLARITY_CFG_SHIFT); writel(reg, &dp_regs->video_ctl10); - /*Set video mode to slave mode */ + /* Set video mode to slave mode */ reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE; writel(reg, &dp_regs->soc_general_ctl); } rday -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

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[U-Boot] [PATCH] usb: add support of generic OHCI devices
by Alexey Brodkin 16 Dec '15

16 Dec '15

This driver is meant to be used with any OHCI-compatible host controller in case if there's no need for platform-specific glue such as setup of controller or PHY's power mode via GPIOs etc. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Marek Vasut <marex(a)denx.de> --- drivers/usb/host/Kconfig | 8 ++++++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ohci-generic.c | 45 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 54 insertions(+) create mode 100644 drivers/usb/host/ohci-generic.c diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 0096a2f..39f7185 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -26,6 +26,14 @@ config USB_XHCI_UNIPHIER endif +config USB_OHCI_GENERIC + bool "Support for generic OHCI USB controller" + depends on OF_CONTROL + depends on DM_USB + default n + ---help--- + Enables support for generic OHCI controller. + config USB_EHCI_HCD bool "EHCI HCD (USB 2.0) support" ---help--- diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 0b4b458..6183b80 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o +obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o # echi obj-$(CONFIG_USB_EHCI) += ehci-hcd.o diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c new file mode 100644 index 0000000..f3307f4 --- /dev/null +++ b/drivers/usb/host/ohci-generic.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Alexey Brodkin <abrodkin(a)synopsys.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include "ohci.h" + +#if !defined(CONFIG_USB_OHCI_NEW) +# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW" +#endif + +struct generic_ohci { + ohci_t ohci; +}; + +static int ohci_usb_probe(struct udevice *dev) +{ + struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev); + + return ohci_register(dev, regs); +} + +static int ohci_usb_remove(struct udevice *dev) +{ + return ohci_deregister(dev); +} + +static const struct udevice_id ohci_usb_ids[] = { + { .compatible = "generic-ohci" }, + { } +}; + +U_BOOT_DRIVER(ohci_generic) = { + .name = "ohci_generic", + .id = UCLASS_USB, + .of_match = ohci_usb_ids, + .probe = ohci_usb_probe, + .remove = ohci_usb_remove, + .ops = &ohci_usb_ops, + .priv_auto_alloc_size = sizeof(struct generic_ohci), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; -- 2.4.3

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