December 2015 - U-Boot

[U-Boot] [PATCH 1/3] usb: host: ehci-vf: Remove hardcoded USB host client configuration
by Sanchayan Maity 08 Jan '16

08 Jan '16

The current ehci-vf USB driver for Vybrid hardcodes the USB host and client functionality. Remove this. Reported-by: Santhosh Kumar Janardhanam <santhosh.kj(a)hcl.com> Signed-off-by: Sanchayan Maity <maitysanchayan(a)gmail.com> --- drivers/usb/host/ehci-vf.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c index 98e0fc6..351e0fb 100644 --- a/drivers/usb/host/ehci-vf.c +++ b/drivers/usb/host/ehci-vf.c @@ -134,11 +134,6 @@ int ehci_hcd_init(int index, enum usb_init_type init, if (index >= ARRAY_SIZE(nc_reg_bases)) return -EINVAL; - if (init == USB_INIT_DEVICE && index == 1) - return -ENODEV; - if (init == USB_INIT_HOST && index == 0) - return -ENODEV; - ehci = (struct usb_ehci *)nc_reg_bases[index]; /* Do board specific initialisation */ -- 2.6.2

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[U-Boot] [PATCH] powerpc, mpc5xxx: fix missing bootflag init
by Heiko Schocher 08 Jan '16

08 Jan '16

since: commit: f05ad9ba "Add a way to skip relocation" tqm5200s board fails to boot. Reason is that board_init_f has a function parameter bootflag, which is not setup in in arch/powerpc/cpu/mpc5xxx/start.S _start So board_init_f gets a undefined bootflag, currently the gd pointer address. Unfortunately this address sets the GD_FLG_SKIP_RELOC bit, so u-boot code gets not relocated and u-boot does not boot ... Init bootflag with 0, and tqm5200 boots fine again. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- I added a nightly build to: http://xeidos.ddns.net/buildbot/waterfall http://xeidos.ddns.net/buildbot/builders/tqm5200s_ml_ub What does this nightly build: - checkout current u-boot mainline code - compile u-boot for tqm5200s board - install u-boot image on the board with bdi - run the image, and look if u-boot boots ToDo: - add more tbot [1] tests for this board Currently failing, as this patch is not in mainline, but it should go to green, if this patch is applied, cross your fingers ;-) [1] https://github.com/hsdenx/tbot arch/powerpc/cpu/mpc5xxx/start.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index 94eb0d3..54793f0 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -91,6 +91,7 @@ _start: li r5,GD_SIZE /* parameter 3: count */ bl memset + li r3, 0 /* parameter 1: bootflag */ bl board_init_f /* run 1st part of board init code (in Flash)*/ /* NOTREACHED - board_init_f() does not return */ #else @@ -169,6 +170,7 @@ lowboot_reentry: /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ + li r3, 0 /* parameter 1: bootflag */ bl board_init_f /* run 1st part of board init code (in Flash)*/ /* NOTREACHED - board_init_f() does not return */ -- 2.1.0

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[U-Boot] [Patch V2 4/4] dm: env_sf: fix saveenv() to use driver model
by Gong Qianyu 08 Jan '16

08 Jan '16

It might be missed when converting spi_flash_probe() in cmd_sf.c. This commit refers to fbb099183e3a53f77a975964cdf2e73d11e565af. Signed-off-by: Gong Qianyu <Qianyu.Gong(a)freescale.com> --- V2: - New Patch. common/env_sf.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/common/env_sf.c b/common/env_sf.c index 9409831..31d96a7 100644 --- a/common/env_sf.c +++ b/common/env_sf.c @@ -16,6 +16,7 @@ #include <spi_flash.h> #include <search.h> #include <errno.h> +#include <dm/device-internal.h> #ifndef CONFIG_ENV_SPI_BUS # define CONFIG_ENV_SPI_BUS 0 @@ -51,6 +52,29 @@ int saveenv(void) char *saved_buffer = NULL, flag = OBSOLETE_FLAG; u32 saved_size, saved_offset, sector = 1; int ret; +#ifdef CONFIG_DM_SPI_FLASH + struct udevice *new, *bus_dev; + unsigned int bus = CONFIG_SF_DEFAULT_BUS; + unsigned int cs = CONFIG_SF_DEFAULT_CS; + unsigned int speed = CONFIG_SF_DEFAULT_SPEED; + unsigned int mode = CONFIG_SF_DEFAULT_MODE; + + /* Remove the old device, otherwise probe will just be a nop */ + ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); + if (!ret) { + device_remove(new); + device_unbind(new); + } + env_flash = NULL; + ret = spi_flash_probe_bus_cs(bus, cs, speed, mode, &new); + if (ret) { + printf("Failed to initialize SPI flash at %u:%u (error %d)\n", + bus, cs, ret); + return 1; + } + + env_flash = dev_get_uclass_priv(new); +#else if (!env_flash) { env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, @@ -61,6 +85,7 @@ int saveenv(void) return 1; } } +#endif ret = env_export(&env_new); if (ret) @@ -227,6 +252,29 @@ int saveenv(void) char *saved_buffer = NULL; int ret = 1; env_t env_new; +#ifdef CONFIG_DM_SPI_FLASH + struct udevice *new, *bus_dev; + unsigned int bus = CONFIG_SF_DEFAULT_BUS; + unsigned int cs = CONFIG_SF_DEFAULT_CS; + unsigned int speed = CONFIG_SF_DEFAULT_SPEED; + unsigned int mode = CONFIG_SF_DEFAULT_MODE; + + /* Remove the old device, otherwise probe will just be a nop */ + ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); + if (!ret) { + device_remove(new); + device_unbind(new); + } + env_flash = NULL; + ret = spi_flash_probe_bus_cs(bus, cs, speed, mode, &new); + if (ret) { + printf("Failed to initialize SPI flash at %u:%u (error %d)\n", + bus, cs, ret); + return 1; + } + + env_flash = dev_get_uclass_priv(new); +#else if (!env_flash) { env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, @@ -237,6 +285,7 @@ int saveenv(void) return 1; } } +#endif /* Is the sector larger than the env (i.e. embedded) */ if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) { -- 2.1.0.27.g96db324

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[U-Boot] [PATCH 00/10] Add support for Rockchip RK3288 Ethernet
by Sjoerd Simons 08 Jan '16

08 Jan '16

This series adds support for the GMAC Ethernet interface on RK3288 SoCs. To add support I've taken a slightly different approach then some of the other boards with a designware IP block, by creating a new driver to take care of the platfrom glue which subclasses the main designware driver instead of adding the compatibility string the designware driver directly and doing the SoC specific setup in the board files. This seems quite a bit more elegant in a device model based world. As the pinctrl and clock drivers are quite simple at the moment (hardcoded settings rather then retrieved from device-tree) the pinctrl and clock settings added in this series assume the setup for the ethernet interface used is for Firefly and Radxa Rock 2. Specifically It assumes the gmac is driven by an external clock, GPIO4B0 is the phy reset and the phy interface mode is RGMII. I've only tested this series on a Radxa Rock 2 board, it would be great if someone could test this on other boards with the designware IP especially for those with the reset GPIO in devicetree (e.g. some of the Allwinner boards). Sjoerd Simons (10): rockchip: rk3288: Add pinctrl support for the gmac ethernet interface rockchip: rk3288: Add clock support for the gmac ethernet interface net: designware: support phy reset device-tree bindings net: designware: Export various functions/struct to allow subclassing net: designware: Add a post-started hook net: gmac_rk3288: Add RK3288 GMAC driver rockchip: rk3288-firefly: Add gmac definition rockchip: firefly: Enable networking support rockchip: Add PXE and DHCP to the default boot targets rockchip: Drop Ethernet from the TODO arch/arm/dts/rk3288-firefly.dtsi | 16 ++ arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 17 ++ arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 228 ++++++++++++++++++++++++ arch/arm/include/asm/arch-rockchip/periph.h | 1 + configs/firefly-rk3288_defconfig | 5 + doc/README.rockchip | 1 - drivers/clk/clk_rk3288.c | 16 ++ drivers/net/Kconfig | 7 + drivers/net/Makefile | 1 + drivers/net/designware.c | 91 ++++++++-- drivers/net/designware.h | 19 ++ drivers/net/gmac_rk3288.c | 140 +++++++++++++++ drivers/pinctrl/rockchip/pinctrl_rk3288.c | 102 +++++++++++ include/configs/firefly-rk3288.h | 3 + include/configs/rk3288_common.h | 4 +- 15 files changed, 639 insertions(+), 12 deletions(-) create mode 100644 drivers/net/gmac_rk3288.c -- 2.5.3

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[U-Boot] [PATCH] net: Fix delay in net_retry test
by Joe Hershberger 07 Jan '16

07 Jan '16

Introduced in 45b4773 (net/arp: account for ARP delay, avoid duplicate packets on timeout) Check the arp timeout and adjust the timeout start time before the call to eth_recv() so that the sandbox driver has the opportunity to adjust the sandbox timer after the new start time has been recorded. Also, change the adjustment amount by 11 seconds instead of exactly the 10 seconds that the ping timout is expecting since the timeout check is looking for the time elapsed to be greater than but not equal to the specified delay. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- drivers/net/sandbox.c | 2 +- net/net.c | 7 +++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c index 6763a24..d538d37 100644 --- a/drivers/net/sandbox.c +++ b/drivers/net/sandbox.c @@ -157,7 +157,7 @@ static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp) struct eth_sandbox_priv *priv = dev_get_priv(dev); if (skip_timeout) { - sandbox_timer_add_offset(10000UL); + sandbox_timer_add_offset(11000UL); skip_timeout = false; } diff --git a/net/net.c b/net/net.c index 4d5746a..fba111e 100644 --- a/net/net.c +++ b/net/net.c @@ -542,6 +542,9 @@ restart: #ifdef CONFIG_SHOW_ACTIVITY show_activity(1); #endif + if (arp_timeout_check() > 0) + time_start = get_timer(0); + /* * Check the ethernet for a new packet. The ethernet * receive routine will process it. @@ -570,10 +573,6 @@ restart: goto done; } - if (arp_timeout_check() > 0) { - time_start = get_timer(0); - } - /* * Check for a timeout, and run the timeout handler * if we have one. -- 2.5.0

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[U-Boot] [PATCH] imx_watchdog: always set minimal timeout in reset_cpu
by Andrey Skvortsov 07 Jan '16

07 Jan '16

The problem is that timeout bits in WCR register were leaved unchanged. So previously set timeout value was applied and therefore 'reset' command takes any value up to two minutes, depending on previous watchdog settings, instead of minimal 0.5 seconds. Signed-off-by: Andrey Skvortsov <andrej.skvortzov(a)gmail.com> --- drivers/watchdog/imx_watchdog.c | 2 +- include/fsl_wdog.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 0d77595..f9f8175 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -43,7 +43,7 @@ void reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - clrsetbits_le16(&wdog->wcr, 0, WCR_WDE); + clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE); writew(0x5555, &wdog->wsr); writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ diff --git a/include/fsl_wdog.h b/include/fsl_wdog.h index d15a70c..f698d4d 100644 --- a/include/fsl_wdog.h +++ b/include/fsl_wdog.h @@ -16,3 +16,4 @@ struct watchdog_regs { #define WCR_WDT 0x08 #define WCR_SRS 0x10 #define SET_WCR_WT(x) (x << 8) +#define WCR_WT_MSK SET_WCR_WT(0xFF) -- 2.6.4

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[U-Boot] [PATCH 1/3] spi: fsl_qspi: fix an error of using GENMASK
by Gong Qianyu 07 Jan '16

07 Jan '16

This commit fixes the change of bad490a24212c068c5b718b9189f47ea4075d078. Signed-off-by: Gong Qianyu <Qianyu.Gong(a)freescale.com> --- drivers/spi/fsl_qspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index ed39114..d8d37cd 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -24,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR; #define TX_BUFFER_SIZE 0x40 #endif -#define OFFSET_BITS_MASK GENMASK(24, 0) +#define OFFSET_BITS_MASK GENMASK(23, 0) #define FLASH_STATUS_WEL 0x02 -- 2.1.0.27.g96db324

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[U-Boot] [PATCH 0/3] dm: add dev_get_reg() for getting device node's reg
by Przemyslaw Marczak 07 Jan '16

07 Jan '16

commit: dm: core: Enable optional use of fdt_translate_address() enables device's bus/child address translation method, depending on bus 'ranges' property and including child 'reg' property. This change makes impossible to decode the 'reg' for node with '#size-cells' equal to 0. Such case is possible by the specification and is also used in U-Boot, e.g. by I2C uclass or S5P GPIO - the last one is broken at present. For this purpose this patch set introduces new core function: fdt_addr_t dev_get_reg(struct udevice *dev) which returns the 'reg' value in the same way as previously dev_get_addr(). This fixes s5p gpio driver and booting issue on few Exynos based boards: - Trats2 - Odroid U3/X2 As an example of use, this patch set also modifies i2c uclass driver by using the new function for getting chip address. Przemyslaw Marczak (3): dm: core: extend API by new function: dev_get_reg() gpio: s5p: use dev_get_reg() instead of dev_get_addr() dm: i2c: get chip address with dev_get_reg() drivers/core/device.c | 17 +++++++++++++---- drivers/gpio/s5p_gpio.c | 2 +- drivers/i2c/i2c-uclass.c | 17 ++++++++--------- include/dm/device.h | 23 +++++++++++++++++++++++ include/i2c.h | 11 ++++------- 5 files changed, 49 insertions(+), 21 deletions(-) -- 1.9.1

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[U-Boot] [PATCH] cmd_pci: Check for VendorID earlier
by Fabio Estevam 06 Jan '16

06 Jan '16

From: Fabio Estevam <fabio.estevam(a)freescale.com> Since commit ff3e077bd2 ("dm: pci: Add a uclass for PCI") the following error message is seen: => pci 0 Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.01.00 0x16c3 0xabcd Bridge device 0x04 Cannot read bus configuration: -1 => pci 1 Scanning PCI devices on bus 1 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 01.00.00 0x8086 0x08b1 Network controller 0x80 Cannot read bus configuration: -1 When we are done scanning the PCI devices pci_read_config_word() will return -1 and VendorID will contain 0xFFFF. The original code would exit the 'for' loop in this condition. Keep the same original behaviour by first testing the VendorID value and then checking and propagating the pci_read_config_word() error afterwards. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- common/cmd_pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/common/cmd_pci.c b/common/cmd_pci.c index dcecef8..92dc643 100644 --- a/common/cmd_pci.c +++ b/common/cmd_pci.c @@ -77,10 +77,10 @@ void pciinfo(int BusNum, int ShortPCIListing) ret = pci_read_config_word(dev, PCI_VENDOR_ID, &VendorID); - if (ret) - goto error; if ((VendorID == 0xFFFF) || (VendorID == 0x0000)) continue; + if (ret) + goto error; if (!Function) pci_read_config_byte(dev, PCI_HEADER_TYPE, &HeaderType); -- 1.9.1

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[U-Boot] dm: Introduce SPI-NOR framework
by Jagan Teki 06 Jan '16

06 Jan '16

Hi Simon, I re-phrase all the question from previous thread and continue in this for more discussion on spi-nor development. > Is it intended that SPI flash should be a driver for the MTD uclass? > Others would be NAND and CFI. From what I can tell MTD has the same > operations as SPI flash (erase, read, write) and adds a lot more. > > Or is SPI flash really a separate uclass from MTD, with SPI flash > being at a higher level? Based on my "sf: MTD support" series SPI flash is a separate uclass from MTD and it uses mtd_info operations. >> cmd_sf >> ======= >> MTD >> ======= >> spi-nor or spi-flash >> =============== >> "spi-nor to spi drivers" and spi-nor controller driver >> ======================================= > Your diagram above suggests that MTD calls into SPI NOR or SPI flash, > but when I look at (for exampe) spi_flash_erase(), it is calling > mtd_erase(), suggesting that it is above MTD in the software stack, > the opposite of your diagram above. > Will explain this clearly in below description. > Conceptually this seems problematic. > > SPI flash is a uclass and supports driver model. It has operations, > etc. Your patches remove the operations in favour of calling MTD. But > MTD does not support driver model. This is getting really messy. > Will explain this clearly in below description. Introducing SPI-NOR: ******************** Some of the spi drivers or spi controllers at drivers/spi/* not a real spi controllers, unlike normal spi controllers those operates varienty of spi devices among spi-nor flash is one of them but instead these were specially designed for to operate spi-nor flash devices - these are spi-nor controllers. example: drivers/spi/fsl_qspi.c The problem with these were sitting at drivers/spi is entire spi layer becomes spi-nor flash oriented which is absolutely wrong indication where spi layer gets effected more with flash operations - So this SPI-NOR will resolve this issue by separating all spi-nor flash operations from spi layer and by creating a generic layer called SPI-NOR core where it deals with all SPI-NOR flash activities. The basic idea is taken from Linux spi-nor framework. SPI-NOR Block diagram: ********************* ========= cmd_sf.c =========== spi_flash.h =========== mtdcore.c =========== spi-nor.c ======================== m25p80.c fsl_qspi.c ========== =========== spi-uclass spi-nor hw ========== =========== spi_drivers =========== spi-bus hw ========== Note: - spi-nor.c is a common core for m25p80.c which is a spi-nor to spi driver interface layer and for fsl_qspi.c which is a typical spi-nor controller driver. - Challenging task is about probe. SPI-NOR Development plan: ************************* a) Adding MTD core support: From command point of view the spi-flash is like a mtd device having erase/write/read ops with offset, addr and size, but from lower layers the spi-flash becomes either spi-nor or spi-nand so they have their own specific features like struct spi_nor {}. This is the reason for calling MTD from command layer and the lower layer as SPI_NOR uclass. b) Drop spi_flash uclass: Since spi_flash is a generic term for serial flash devices among these spi-nor and spi-nand are the real device categories so add driver model to these categories. I sent the series [1] for above a) and b) c) Add spi-nor support (mean Adding SPI-NOR dm drivers) the next step. Detailed SPI-NOR with examples: ****************************** include/spi_flash.h ------------------- struct spi_flash { struct spi_nor *nor; }; include/linux/mtd/spi-nor.h --------------------------- struct spi_nor { struct udevice *dev; struct mtd_info *info; // spi-nor hooks int (*read_reg)(struct udevice *dev, u8 cmd, u8 *val, int len); int (*write_reg)(struct udevice *dev, u8 cmd, u8 *data, int len); int (*read_mmap)(struct udevice *dev, void *data, void *offset, size_t len); int (*read)(struct udevice *dev, const u8 *opcode, size_t cmd_len, void *data, size_t data_len); int (*write)(struct udevice *dev, const u8 *cmd, size_t cmd_len, const void *data, size_t data_len); }; drivers/mtd/spi-nor/spi-nor.c ----------------------------- static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) { // call to spi-nor erase nor->erase() } static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) { // call to spi-nor erase nor->read() } static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf) { // call to spi-nor erase nor->erase() } int spi_nor_scan(struct spi_nor *nor) { struct mtd_info *mtd = nor->mtd; // read_jedec // assign mtd hooks // other spi-nor stuff } drivers/mtd/spi-nor/m25p80.c ---------------------------- struct m25p80 { struct spi_slave *spi; struct mtd_info mtd; }; static int m25p80_probe(struct udevice *dev) { struct spi_slave *spi = dev_get_parentdata(dev); struct spi_nor *nor = dev_get_uclass_priv(dev); struct m25p80 *flash = dev_get_priv(dev); struct spi_flash *sflash; spi_nor_scan(nor); add_mtd_device(&flash->mtd); } // spi-nor hooks static const struct dm_spi_flash_ops m25p80_ops = { .read = m25p80_read, .write = m25p80_write, .erase = m25p80_erase, }; static const struct udevice_id m25p80_ids[] = { { .compatible = "jedec,spi-nor" }, { } }; U_BOOT_DRIVER(m25p80) = { .name = "m25p80", .id = UCLASS_SPI_NOR, .of_match = m25p80_ids, .probe = m25p80_probe, .priv_auto_alloc_size = sizeof(struct m25p80), .ops = &m25p80_ops, }; drivers/mtd/spi-nor/fsl-qspi.c ------------------------------ struct fsl_qspi { struct mtd_info mtd; }; static int fsl_probe(struct udevice *dev) { struct spi_nor *nor = dev_get_uclass_priv(dev); struct fsl_qspi *q = dev_get_priv(dev); struct spi_flash *sflash; spi_nor_scan(nor); add_mtd_device(&q->mtd); } // spi-nor hooks static const struct dm_spi_nor_ops fsl_qspi_ops = { .read = fsl_qspi_read, .write = fsl_qspi_write, .erase = fsl_qspi_erase, }; static const struct udevice_id fsl_qspi_ids[] = { { .compatible = "fsl,vf610-qspi" }, { } }; U_BOOT_DRIVER(fsl_qspi) = { .name = "fsl_qspi", .id = UCLASS_SPI_NOR, .of_match = fsl_qspi_ids, .probe = fsl_qspi_probe, .priv_auto_alloc_size = sizeof(struct fsl_qspi), ops = &fsl_qspi_ops, }; About non-dm handling ********************* We still maintain the driver similar to m25p80.c for non-dm interface till all spi-drivers converted into dm. [1] https://www.mail-archive.com/u-boot@lists.denx.de/msg193802.html

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