May 2014 - U-Boot

[U-Boot] [PATCH 1/3] usb: tegra: fix PHY selection code
by Stephen Warren 15 May '14

15 May '14

From: Stephen Warren <swarren(a)nvidia.com> The TRM for Tegra30 and later all state that USBMODE_CM_HC must be set before writing to hostpc1_devlc to select which PHY to use for a USB controller. However, neither init_{utmi,ulpi}_usb_controller() do this today, so the register writes they perform for PHY selection do not work. For the UTMI case, this was hacked around in commit 7e44d9320ed4 "ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114" by adding code to ehci_hcd_init() which sets USBMODE_CM_HC and duplicates the PHY selection register write. This code doesn't cover the ULPI case, so I wouldn't be surprised if ULPI doesn't work with the current code, unless the ordering requirement only ends up being an issue in HW for UTMI not ULPI. This patch fixes init_{utmi,ulpi}_usb_controller() to correctly set USBMODE_CM_HC before selecting the PHY. Now that this works, we can remove the duplicate UTMI-specific code in ehci_hcd_init(), thus simplifying that function. Cc: Jim Lin <jilin(a)nvidia.com> Cc: Stefan Agner <stefan(a)agner.ch> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- drivers/usb/host/ehci-tegra.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 38db18e2c9ea..9a9a1277d160 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -496,6 +496,10 @@ static int init_utmi_usb_controller(struct fdt_usb *config) clrbits_le32(&usbctlr->port_sc1, STS); } #else + /* Set to Host mode after Controller Reset was done */ + clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC, + USBMODE_CM_HC); + /* Select PHY interface after setting host mode */ clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK, PTS_UTMI << PTS_SHIFT); clrbits_le32(&usbctlr->hostpc1_devlc, STS); @@ -561,6 +565,10 @@ static int init_ulpi_usb_controller(struct fdt_usb *config) clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK, PTS_ULPI << PTS_SHIFT); #else + /* Set to Host mode after Controller Reset was done */ + clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC, + USBMODE_CM_HC); + /* Select PHY interface after setting host mode */ clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK, PTS_ULPI << PTS_SHIFT); #endif @@ -788,19 +796,6 @@ success: *hccr = (struct ehci_hccr *)&usbctlr->cap_length; *hcor = (struct ehci_hcor *)&usbctlr->usb_cmd; - if (controller->has_hostpc) { - /* Set to Host mode after Controller Reset was done */ - clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC, - USBMODE_CM_HC); - /* Select UTMI parallel interface after setting host mode */ - if (config->utmi) { - clrsetbits_le32((char *)&usbctlr->usb_cmd + - HOSTPC1_DEVLC, PTS_MASK, - PTS_UTMI << PTS_SHIFT); - clrbits_le32((char *)&usbctlr->usb_cmd + - HOSTPC1_DEVLC, STS); - } - } return 0; } -- 1.8.1.5

3 9

[U-Boot] [PATCH V2] usb: ci_udc: parse QTD before over-writing it
by Stephen Warren 15 May '14

15 May '14

From: Stephen Warren <swarren(a)nvidia.com> ci_udc only allocates a single QTD structure per EP. All data needs to be extracted from the DTD prior to calling ci_ep_submit_next_request(), since that fills the QTD with next transaction's parameters. Fix handle_ep_complete() to extract the transaction (remaining) length before kicking off the next transaction. In practice, this only causes writes to UMS devices to fail for me. I may have tested the final versions of my previous ci_udc patch only with reads. More recently, I had patches applied locally that allocated a QTD per USB request rather than per USB EP, although since that doesn't give any performance benefit, I'm dropping those. Fixes: 2813006fecda ("usb: ci_udc: allow multiple buffer allocs per ep") Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v2: Fix typo in commit description. --- drivers/usb/gadget/ci_udc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 290863d61fc9..9cd003636a44 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -424,6 +424,7 @@ static void handle_ep_complete(struct ci_ep *ep) item = ci_get_qtd(num, in); ci_invalidate_qtd(num); + len = (item->info >> 16) & 0x7fff; if (item->info & 0xff) printf("EP%d/%s FAIL info=%x pg0=%x\n", num, in ? "in" : "out", item->info, item->page0); @@ -435,7 +436,6 @@ static void handle_ep_complete(struct ci_ep *ep) if (!list_empty(&ep->queue)) ci_ep_submit_next_request(ep); - len = (item->info >> 16) & 0x7fff; ci_req->req.actual = ci_req->req.length - len; ci_debounce(ci_req, in); -- 1.8.1.5

2 1

[U-Boot] [RFC PATCH v0 0/4] Improve arm64 support
by Tom Rini 14 May '14

14 May '14

After talking with some folks at ELC and getting a feel for some things, here is a series to start addressing some issues with the ARM64 port. The following RFC series corrects our passing of args to the Linux kernel and cleans up the vexpress_aemv8a config a bit (and corrects some values too). This also adds support for Image booting. This isn't 100% ready to merge in that it exposes an issue which will be addressed in the kernel soon. The Image format doesn't say how big it is, so for now I hack in a value of 16MB. I've been told this will change in the future (and one of the reserved fields will be unreserved), so I'll adapt when we can adapt. The other thing not yet handled is automatic detection of a compressed image. We should be able to tell if the address passed is a gzip archive and if so, uncompress a block so we can tell where to decompress to. This however will open up the possibility of decompression overwriting ourselves unless we get loaded into a high enough location to start with. Coming up with a good default there will in turn require knowing how far another future change (randomization of text_offset, ala CONFIG_RANDOMIZE_BASE for x86 I imagine) can push where things may be. It's possible we'll just have to say for safety to do it as two steps, but we'll see. Note that we also need do a fix in arch/arm/cpu/armv8/transition.S wrt cnthctl_el2 in that we shouldn't rely on a valid value to be in there at reset to orr against but instead set the values directly. -- Tom

2 8

[U-Boot] [PATCH] am335x: pepper: Add Gumstix Pepper AM335x-based machine
by Ash Charles 14 May '14

14 May '14

This adds the Gumstix Pepper[1] single-board computer based on the TI AM335x processor. Schematics are available [2]. [1] https://store.gumstix.com/index.php/products/344/ [2] https://pubs.gumstix.com/boards/PEPPER/ Signed-off-by: Ash Charles <ash(a)gumstix.com> Cc: Tom Rini <trini(a)ti.com> --- board/gumstix/pepper/Makefile | 13 +++ board/gumstix/pepper/board.c | 226 ++++++++++++++++++++++++++++++++++++++++++ board/gumstix/pepper/board.h | 19 ++++ board/gumstix/pepper/mux.c | 78 +++++++++++++++ boards.cfg | 1 + include/configs/pepper.h | 100 +++++++++++++++++++ 6 files changed, 437 insertions(+) create mode 100644 board/gumstix/pepper/Makefile create mode 100644 board/gumstix/pepper/board.c create mode 100644 board/gumstix/pepper/board.h create mode 100644 board/gumstix/pepper/mux.c create mode 100644 include/configs/pepper.h diff --git a/board/gumstix/pepper/Makefile b/board/gumstix/pepper/Makefile new file mode 100644 index 0000000..ecb1d61 --- /dev/null +++ b/board/gumstix/pepper/Makefile @@ -0,0 +1,13 @@ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifdef CONFIG_SPL_BUILD +obj-y += mux.o +endif + +obj-y += board.o diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c new file mode 100644 index 0000000..0faf315 --- /dev/null +++ b/board/gumstix/pepper/board.c @@ -0,0 +1,226 @@ +/* + * Board functions for Gumstix Pepper and AM335x-based boards + * + * Copyright (C) 2014, Gumstix, Incorporated - http://www.gumstix.com/ + * Based on board/ti/am335x/board.c from Texas Instruments, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <spl.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/ddr_defs.h> +#include <asm/arch/clock.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mem.h> +#include <asm/io.h> +#include <asm/emif.h> +#include <asm/gpio.h> +#include <i2c.h> +#include <miiphy.h> +#include <cpsw.h> +#include <power/tps65217.h> +#include <environment.h> +#include <watchdog.h> +#include "board.h" + +DECLARE_GLOBAL_DATA_PTR; + +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + +#ifdef CONFIG_SPL_BUILD +static const struct ddr_data ddr2_data = { + .datardsratio0 = ((MT47H128M16RT25E_RD_DQS<<30) | + (MT47H128M16RT25E_RD_DQS<<20) | + (MT47H128M16RT25E_RD_DQS<<10) | + (MT47H128M16RT25E_RD_DQS<<0)), + .datawdsratio0 = ((MT47H128M16RT25E_WR_DQS<<30) | + (MT47H128M16RT25E_WR_DQS<<20) | + (MT47H128M16RT25E_WR_DQS<<10) | + (MT47H128M16RT25E_WR_DQS<<0)), + .datawiratio0 = ((MT47H128M16RT25E_PHY_WRLVL<<30) | + (MT47H128M16RT25E_PHY_WRLVL<<20) | + (MT47H128M16RT25E_PHY_WRLVL<<10) | + (MT47H128M16RT25E_PHY_WRLVL<<0)), + .datagiratio0 = ((MT47H128M16RT25E_PHY_GATELVL<<30) | + (MT47H128M16RT25E_PHY_GATELVL<<20) | + (MT47H128M16RT25E_PHY_GATELVL<<10) | + (MT47H128M16RT25E_PHY_GATELVL<<0)), + .datafwsratio0 = ((MT47H128M16RT25E_PHY_FIFO_WE<<30) | + (MT47H128M16RT25E_PHY_FIFO_WE<<20) | + (MT47H128M16RT25E_PHY_FIFO_WE<<10) | + (MT47H128M16RT25E_PHY_FIFO_WE<<0)), + .datawrsratio0 = ((MT47H128M16RT25E_PHY_WR_DATA<<30) | + (MT47H128M16RT25E_PHY_WR_DATA<<20) | + (MT47H128M16RT25E_PHY_WR_DATA<<10) | + (MT47H128M16RT25E_PHY_WR_DATA<<0)), +}; + +static const struct cmd_control ddr2_cmd_ctrl_data = { + .cmd0csratio = MT47H128M16RT25E_RATIO, + .cmd0iclkout = MT47H128M16RT25E_INVERT_CLKOUT, + + .cmd1csratio = MT47H128M16RT25E_RATIO, + .cmd1iclkout = MT47H128M16RT25E_INVERT_CLKOUT, + + .cmd2csratio = MT47H128M16RT25E_RATIO, + .cmd2iclkout = MT47H128M16RT25E_INVERT_CLKOUT, +}; + +static const struct emif_regs ddr2_emif_reg_data = { + .sdram_config = MT47H128M16RT25E_EMIF_SDCFG, + .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF, + .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1, + .sdram_tim2 = MT47H128M16RT25E_EMIF_TIM2, + .sdram_tim3 = MT47H128M16RT25E_EMIF_TIM3, + .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY, +}; + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; +} +#endif + +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + +void set_uart_mux_conf(void) +{ + enable_uart0_pin_mux(); +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +const struct ctrl_ioregs ioregs = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; + +void sdram_init(void) +{ + config_ddr(266, &ioregs, &ddr2_data, + &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); +} +#endif + +int board_init(void) +{ +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gpmc_init(); + + return 0; +} + +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) +static void cpsw_control(int enabled) +{ + /* VTP can be added here */ + + return; +} + +static struct cpsw_slave_data cpsw_slaves[] = { + { + .slave_reg_ofs = 0x208, + .sliver_reg_ofs = 0xd80, + .phy_addr = 0, + .phy_if = PHY_INTERFACE_MODE_RGMII, + }, +}; + +static struct cpsw_platform_data cpsw_data = { + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, + .mdio_div = 0xff, + .channels = 8, + .cpdma_reg_ofs = 0x800, + .slaves = 1, + .slave_data = cpsw_slaves, + .ale_reg_ofs = 0xd00, + .ale_entries = 1024, + .host_port_reg_ofs = 0x108, + .hw_stats_reg_ofs = 0x900, + .bd_ram_ofs = 0x2000, + .mac_control = (1 << 5), + .control = cpsw_control, + .host_port_num = 0, + .version = CPSW_CTRL_VERSION_2, +}; + +int board_eth_init(bd_t *bis) +{ + int rv, n = 0; + uint8_t mac_addr[6]; + uint32_t mac_hi, mac_lo; + const char *devname; + + if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + if (is_valid_ether_addr(mac_addr)) + eth_setenv_enetaddr("ethaddr", mac_addr); + } + + writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); + + rv = cpsw_register(&cpsw_data); + if (rv < 0) + printf("Error %d registering CPSW switch\n", rv); + else + n += rv; + + /* + * + * CPSW RGMII Internal Delay Mode is not supported in all PVT + * operating points. So we must set the TX clock delay feature + * in the KSZ9021 PHY. Since we only support a single ethernet + * device in U-Boot, we only do this for the current instance. + */ + devname = miiphy_get_current_dev(); + /* max rx/tx clock delay, min rx/tx control delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8104); + miiphy_write(devname, 0x0, 0xc, 0xa0a0); + + /* min rx data delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8105); + miiphy_write(devname, 0x0, 0x0c, 0x0000); + + /* min tx data delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8106); + miiphy_write(devname, 0x0, 0x0c, 0x0000); + + return n; +} +#endif diff --git a/board/gumstix/pepper/board.h b/board/gumstix/pepper/board.h new file mode 100644 index 0000000..0512735 --- /dev/null +++ b/board/gumstix/pepper/board.h @@ -0,0 +1,19 @@ +/* + * Gumstix Pepper and AM335x-based boards information header + * + * Copyright (C) 2014, Gumstix, Inc. - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * We must be able to enable uart0, for initial output. We then have a + * main pinmux function that can be overridden to enable all other pinmux that + * is required on the board. + */ +void enable_uart0_pin_mux(void); +void enable_board_pin_mux(void); +#endif diff --git a/board/gumstix/pepper/mux.c b/board/gumstix/pepper/mux.c new file mode 100644 index 0000000..50b1266 --- /dev/null +++ b/board/gumstix/pepper/mux.c @@ -0,0 +1,78 @@ +/* + * Muxing for Gumstix Pepper and AM335x-based boards + * + * Copyright (C) 2014, Gumstix, Incorporated - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <i2c.h> +#include "board.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; + +static struct module_pin_mux i2c0_pin_mux[] = { + /* I2C_DATA */ + {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, + /* I2C_SCLK */ + {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, + {-1}, +}; + +static struct module_pin_mux rgmii1_pin_mux[] = { + {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */ + {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */ + {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */ + {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */ + {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */ + {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */ + {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */ + {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */ + {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */ + {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */ + {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */ + {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {OFFSET(rmii1_refclk), MODE(7) | RXACTIVE}, /* ETH_INT */ + {OFFSET(mii1_col), MODE(7) | PULLUP_EN}, /* PHY_NRESET */ + {OFFSET(xdma_event_intr1), MODE(3)}, + {-1}, +}; + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +/* + * Do board-specific muxes. + */ +void enable_board_pin_mux(void) +{ + /* I2C0 */ + configure_module_pin_mux(i2c0_pin_mux); + /* SD Card */ + configure_module_pin_mux(mmc0_pin_mux); + /* Ethernet pinmux. */ + configure_module_pin_mux(rgmii1_pin_mux); +} diff --git a/boards.cfg b/boards.cfg index 983c657..1059342 100644 --- a/boards.cfg +++ b/boards.cfg @@ -257,6 +257,7 @@ Active arm armv7 am33xx BuR tseries Active arm armv7 am33xx BuR tseries tseries_nand tseries:SERIAL1,CONS_INDEX=1,NAND Hannes Petermaier <hannes.petermaier(a)br-automation.com> Active arm armv7 am33xx BuR tseries tseries_spi tseries:SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT Hannes Petermaier <hannes.petermaier(a)br-automation.com> Active arm armv7 am33xx compulab cm_t335 cm_t335 - Igor Grinberg <grinberg(a)compulab.co.il> +Active arm armv7 am33xx gumstix pepper pepper - Ash Charles <ash(a)gumstix.com> Active arm armv7 am33xx isee igep0033 am335x_igep0033 - Enric Balletbo i Serra <eballetbo(a)iseebcn.com> Active arm armv7 am33xx phytec pcm051 pcm051_rev1 pcm051:REV1 Lars Poeschel <poeschel(a)lemonage.de> Active arm armv7 am33xx phytec pcm051 pcm051_rev3 pcm051:REV3 Lars Poeschel <poeschel(a)lemonage.de> diff --git a/include/configs/pepper.h b/include/configs/pepper.h new file mode 100644 index 0000000..31c2cf8 --- /dev/null +++ b/include/configs/pepper.h @@ -0,0 +1,100 @@ +/* + * Copyright (C) 2013 Gumstix, Inc. - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_PEPPER_H +#define __CONFIG_PEPPER_H + +#define CONFIG_MMC +#include <configs/ti_am335x_common.h> + +#undef CONFIG_BOARD_LATE_INIT +#undef CONFIG_SPL_OS_BOOT + +/* Clock defines */ +#define V_OSCK 24000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +#undef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "pepper# " + +/* Mach type */ +#define MACH_TYPE_PEPPER 4207 /* Until the next sync */ +#define CONFIG_MACH_TYPE MACH_TYPE_PEPPER + +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_IS_NOWHERE +/* Display cpuinfo */ +#define CONFIG_DISPLAY_CPUINFO + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x80F80000\0" \ + "dtbaddr=0x80200000\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "dtbfile=am335x-pepper.dtb\0" \ + "console=ttyO0,115200n8\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 rw\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "bootenv=uEnv.txt\0" \ + "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t ${loadaddr} ${filesize}\0" \ + "mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \ + "load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \ + "loaduimage=fatload mmc ${mmcdev}:1 ${loadaddr} uImage\0" \ + "uimageboot=echo Booting from mmc${mmcdev} ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootz ${loadaddr} - ${dtbaddr}\0" \ + "ubiboot=echo Booting from nand (ubifs) ...; " \ + "run ubiargs; run ubiload; " \ + "bootz ${loadaddr} - ${dtbaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run mmcload; then " \ + "run mmcboot;" \ + "fi;" \ + "if run loaduimage; then " \ + "run uimageboot;" \ + "fi;" \ + "fi;" \ + +/* Serial console configuration */ +#define CONFIG_CONS_INDEX 1 /* UART0 */ +#define CONFIG_SERIAL1 1 +#define CONFIG_SYS_NS16550_COM1 0x44e09000 + +/* Ethernet support */ +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_PHY_ADDR 0 +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 +#define CONFIG_PHY_RESET_DELAY 1000 + +/* SPL */ +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" + +#endif /* __CONFIG_PEPPER_H */ -- 1.8.3.2

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[U-Boot] [i2c] Pull request
by Heiko Schocher 14 May '14

14 May '14

Hello Tom, please pull from u-boot-i2c.git, thanks! The following changes since commit 557a3319089499aa0e55d65a6b43b7137f362003: Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2014-05-13 17:09:28 -0400) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to 2072e7262965bb48d7fffb1e283101e6ed8b21a8: mvtwsi: Remove unnecessary twsi_baud_rate and twsi_slave_address globals (2014-05-14 12:59:12 +0200) ---------------------------------------------------------------- Hans de Goede (2): mvtwsi: Fix clock programming mvtwsi: Remove unnecessary twsi_baud_rate and twsi_slave_address globals drivers/i2c/mvtwsi.c | 28 +++++----------------------- 1 file changed, 5 insertions(+), 23 deletions(-) bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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[U-Boot] imximage: MAX_HW_CFG_SIZE_V2 too small for i.MX6D?
by Arne Rovet 14 May '14

14 May '14

MAX_HW_CFG_SIZE_V2 is defined as 121 in tools/imximage.h, but I think the processor reference manual implies it can be larger (i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 1, 04/2013). In the section labelled "8.6.2 Device Configuration Data (DCD)" it says the DCD can be a maximum of 1768 bytes: "The maximum size of the DCD limited to 1768 bytes." Have I misunderstood the link between the DCD size and MAX_HW_CFG_SIZE_V2? If so, where did the value of 121 for MAX_HW_CFG_SIZE_V2 come from?

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[U-Boot] [PATCH v2 2/2] net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN
by Ian Campbell 14 May '14

14 May '14

This is required at least on ARM. When sending instead of simply invalidating the entire descriptor, flush as little as possible while still respecting ARCH_DMA_MINALIGN, as requested by Alexey. Signed-off-by: Ian Campbell <ijc(a)hellion.org.uk> Cc: Alexey Brodkin <abrodkin(a)synopsys.com> --- v2: - collapsed "net/designware: align cache invalidation on rx" and "net/designware: invalidate entire descriptor in dw_eth_send" into one. - roundup sizeof(txrx_status) to ARCH_DMA_MINALIGN instead of just invalidating the entire descriptor. --- drivers/net/designware.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index b70df82..02ceb91 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -280,10 +280,18 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length) u32 desc_num = priv->tx_currdescnum; struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num]; - /* Invalidate only "status" field for the following check */ - invalidate_dcache_range((unsigned long)&desc_p->txrx_status, - (unsigned long)&desc_p->txrx_status + - sizeof(desc_p->txrx_status)); + /* + * Strictly we only need to invalidate the "txrx_status" field + * for the following check, but on some platforms we cannot + * invalidate only 4 bytes, so roundup to + * ARCH_DMA_MINALIGN. This is safe because the individual + * descriptors in the array are each aligned to + * ARCH_DMA_MINALIGN. + */ + invalidate_dcache_range( + (unsigned long)desc_p, + (unsigned long)desc_p + + roundup(sizeof(desc_p->txrx_status), ARCH_DMA_MINALIGN)); /* Check if the descriptor is owned by CPU */ if (desc_p->txrx_status & DESC_TXSTS_OWNBYDMA) { @@ -351,7 +359,7 @@ static int dw_eth_recv(struct eth_device *dev) /* Invalidate received data */ invalidate_dcache_range((unsigned long)desc_p->dmamac_addr, (unsigned long)desc_p->dmamac_addr + - length); + roundup(length, ARCH_DMA_MINALIGN)); NetReceive(desc_p->dmamac_addr, length); -- 1.9.0

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[U-Boot] SMSC LAN9500 u-boot drivers
by Raghunath Pol 14 May '14

14 May '14

Hi we are interfacing SMSC LAN9500 to TI OMAP 4460  i.e USB Ethernet we want enable ethernet in U-boot where can we get drivers OR u-boot source having SMSC LAN9500 drivers. Thanks in advance. Regards, Raghunath

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[U-Boot] [PATCH v2] Because sandbox is not a real hardware, setting vendor=sandbox is almost meaningless.
by Simon Glass 14 May '14

14 May '14

From: Masahiro Yamada <yamada.m(a)jp.panasonic.com> This commit sets sandbox's vendor field to '-'. It is a good thing that it reduces one level directory hierarchy. The files board/sandbox/sandbox/* have been moved to board/sandbox/*. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> Signed-off-by: Simon Glass <sjg(a)chromium.org> (modified to apply to latest upstream) --- Changes in v2: - Update to apply on current master arch/sandbox/lib/Makefile | 2 +- board/sandbox/Makefile | 7 +++++++ {doc => board/sandbox}/README.sandbox | 0 {arch/sandbox/lib => board/sandbox}/sandbox.c | 0 boards.cfg | 2 +- 5 files changed, 9 insertions(+), 2 deletions(-) create mode 100644 board/sandbox/Makefile rename {doc => board/sandbox}/README.sandbox (100%) rename {arch/sandbox/lib => board/sandbox}/sandbox.c (100%) diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index 6480ebf..4c1a38d 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -8,4 +8,4 @@ # -obj-y += interrupts.o sandbox.o +obj-y += interrupts.o diff --git a/board/sandbox/Makefile b/board/sandbox/Makefile new file mode 100644 index 0000000..a0b9880 --- /dev/null +++ b/board/sandbox/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := sandbox.o diff --git a/doc/README.sandbox b/board/sandbox/README.sandbox similarity index 100% rename from doc/README.sandbox rename to board/sandbox/README.sandbox diff --git a/arch/sandbox/lib/sandbox.c b/board/sandbox/sandbox.c similarity index 100% rename from arch/sandbox/lib/sandbox.c rename to board/sandbox/sandbox.c diff --git a/boards.cfg b/boards.cfg index 9d90550..59b5c4c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -1182,7 +1182,7 @@ Active powerpc ppc4xx - xilinx ppc405-generic Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic_flash xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda <ricardo.ribalda(a)uam.es> Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 Ricardo Ribalda <ricardo.ribalda(a)uam.es> Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda <ricardo.ribalda(a)uam.es> -Active sandbox sandbox - - <none> sandbox - Simon Glass <sjg(a)chromium.org> +Active sandbox sandbox - - sandbox sandbox - Simon Glass <sjg(a)chromium.org> Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com>:Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy <phil.edworthy(a)renesas.com> Active sh sh2 - renesas rsk7269 rsk7269 - - -- 1.9.1.423.g4596e3a

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[U-Boot] [PATCH] sandbox: move source files from board/ to arch/sandbox/
by Masahiro Yamada 14 May '14

14 May '14

Prior to commit 33a02da0, all boards must have board/${BOARD}/ or board/${VENDOR}/${BOARD}/ directory. Now this rule is obsolete. It looks weird that sandbox defines "vendor" and "board" just for meeting the old U-Boot directory structure. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> Cc: Simon Glass <sjg(a)chromium.org> --- Simon, I moved board/sandbox/sandbox/sandbox.c to arch/sandbox/lib/sandbox.c But if there is a more suitable place or file-name, please move. arch/sandbox/lib/Makefile | 2 +- {board/sandbox/sandbox => arch/sandbox/lib}/sandbox.c | 0 board/sandbox/sandbox/Makefile | 7 ------- boards.cfg | 2 +- {board/sandbox/sandbox => doc}/README.sandbox | 0 5 files changed, 2 insertions(+), 9 deletions(-) rename {board/sandbox/sandbox => arch/sandbox/lib}/sandbox.c (100%) delete mode 100644 board/sandbox/sandbox/Makefile rename {board/sandbox/sandbox => doc}/README.sandbox (100%) diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index 4c1a38d..6480ebf 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -8,4 +8,4 @@ # -obj-y += interrupts.o +obj-y += interrupts.o sandbox.o diff --git a/board/sandbox/sandbox/sandbox.c b/arch/sandbox/lib/sandbox.c similarity index 100% rename from board/sandbox/sandbox/sandbox.c rename to arch/sandbox/lib/sandbox.c diff --git a/board/sandbox/sandbox/Makefile b/board/sandbox/sandbox/Makefile deleted file mode 100644 index a0b9880..0000000 --- a/board/sandbox/sandbox/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# Copyright (c) 2011 The Chromium OS Authors. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := sandbox.o diff --git a/boards.cfg b/boards.cfg index c83aff3..fc002f6 100644 --- a/boards.cfg +++ b/boards.cfg @@ -1158,7 +1158,7 @@ Active powerpc ppc4xx - xilinx ppc405-generic Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic_flash xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda <ricardo.ribalda(a)uam.es> Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 Ricardo Ribalda <ricardo.ribalda(a)uam.es> Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda <ricardo.ribalda(a)uam.es> -Active sandbox sandbox - sandbox sandbox sandbox - Simon Glass <sjg(a)chromium.org> +Active sandbox sandbox - - <none> sandbox - Simon Glass <sjg(a)chromium.org> Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu <iwamatsu.nobuhiro(a)renesas.com>:Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy <phil.edworthy(a)renesas.com> Active sh sh2 - renesas rsk7269 rsk7269 - - diff --git a/board/sandbox/sandbox/README.sandbox b/doc/README.sandbox similarity index 100% rename from board/sandbox/sandbox/README.sandbox rename to doc/README.sandbox -- 1.8.3.2

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