December 2014 - U-Boot

[U-Boot] [UBOOT PATCH] usb: gadget: f_thor: Allocate request up to THOR_PACKET_SIZE
by Siva Durga Prasad Paladugu 15 Apr '15

15 Apr '15

Allocate request up to THOR_PACKET_SIZE not the ep0->maxpacket as the descriptors data depend on the number of descriptors and this 64 bytes were not enough and the buffer might overflow which results in memalign failures later. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- drivers/usb/gadget/f_thor.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index c85b0fb..98d2d8c 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -766,7 +766,7 @@ static int thor_func_bind(struct usb_configuration *c, struct usb_function *f) goto fail; } dev->req->buf = memalign(CONFIG_SYS_CACHELINE_SIZE, - gadget->ep0->maxpacket); + THOR_PACKET_SIZE); if (!dev->req->buf) { status = -ENOMEM; goto fail; -- 1.7.4

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Re: [U-Boot] Regarding patch: http://patchwork.ozlabs.org/patch/373593/
by Marek Vasut 07 Apr '15

07 Apr '15

On Thursday, December 18, 2014 at 09:32:56 AM, Ramneek Mehresh wrote: > Hi Marex, > > Following u-boot patch is pending for your review for some time. Please let > me know if you have any concerns. fsl/usb: Add USB XHCI support: > http://patchwork.ozlabs.org/patch/373593/ I missed the patch completely, sorry. Next time, please keep me on CC when submitting the patches, that helps a lot. As for the board_usb_init, you can drop the inline and the __board_usb_init() and do: __weak int board_usb_init(int index, enum usb_init_type init) { return 0; } The static void fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci) must shut down the controller, which I don't see happening. Why? Thanks! Best regards, Marek Vasut

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[U-Boot] [PATCH 0/6] ARM: at91: SAMA5: extract the common sama5 chip configurations to a common header
by Josh Wu 30 Mar '15

30 Mar '15

This patch series reorganized the configurations for SAMA5 chips. Make the common part into one file. That way we don't need to have many copy of the same configurations. Josh Wu (6): ARM: at91: sama5d3_xplained: spl: enable PMECC header generation ARM: at91: sama5: move the common part of configurations to at91-sama5_common.h ARM: at91: sama5d3_xplained: set ENV_FAT_DEVICE_AND_PART intead of using number ARM: at91: sama5d3: mmc: save enviroment as a fat file (uboot.env) ARM: at91: sama5: move the bootcmd definition to the common header ARM: at91: at91sam9x5: mmc: save environment as a file in FAT partition. include/configs/at91-sama5_common.h | 126 ++++++++++++++++++++++++++++++++++++ include/configs/at91sam9x5ek.h | 12 ++-- include/configs/sama5d3_xplained.h | 100 ++-------------------------- include/configs/sama5d3xek.h | 114 ++------------------------------ include/configs/sama5d4_xplained.h | 116 ++------------------------------- include/configs/sama5d4ek.h | 116 ++------------------------------- 6 files changed, 153 insertions(+), 431 deletions(-) create mode 100644 include/configs/at91-sama5_common.h -- 1.9.1

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[U-Boot] How do I use AM335x eth1 rather than eth0 ?
by Mark Jackson 17 Mar '15

17 Mar '15

We have a dual Ethernet board (based on the BeagelBone) but with both Ethernet ports connected. I'm wanting to use eth1 (rather than eth0), so in my board.c file, I changed:- static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, .phy_id = 0, }, { .slave_reg_ofs = 0x308, .sliver_reg_ofs = 0xdc0, .phy_id = 1, }, }; ... to ... static struct cpsw_slave_data cpsw_slaves[] = { { .slave_reg_ofs = 0x308, .sliver_reg_ofs = 0xdc0, .phy_id = 1, }, { .slave_reg_ofs = 0x208, .sliver_reg_ofs = 0xd80, .phy_id = 0, }, }; ... assuming that eth0 would now be ignored (as only 1 slave is configured). But (eg) dhcp still only responds on eth0 !?! What else do I have to change ? Cheers Mark J.

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Re: [U-Boot] Hi Simon, Problems about RSA public exponents for verified boot
by Simon Glass 05 Mar '15

05 Mar '15

(sorry, forgot to cc list) On 9 December 2014 at 07:17, Simon Glass <sjg(a)chromium.org> wrote: > Hi, > > On 8 December 2014 at 01:54, Duxiaoqiang <duxiaoqiang(a)huawei.com> wrote: >> Hi Michael, >> >> Thanks for your information. >> >> My working result show that public exponent is not the only problem caused by 64bit alignment, there are also some other problems caused by it, for example: load image after verify step. > > If you post your console output then perhaps we might be able to suggest a fix. > >> >> May be we should add a patch to cover all 64 bit platform's alignment. >> >> For we need verified boot feature to solve some problems, I also spent some time trying to solve the problem. >> >> But I am not very familiar with uboot FDT'S design, it may spend me long time so not very convenient for me to solve this problem. >> >> So I want to know do you have time to fix this problem recently, and what's your plan. > > I haven't tried this on 64-bit ARM. I may be able to do so later in the month. > >> >> Thanks very much. >> >> Sincerely >> Jason >>>Hi All, >>> >>>Apologies for the delayed response, I’ve been on vacation. >> >>>Since this was working for you (Duxiaoqiang) previously it suggests that you are using the default public exponent. If this is still the case you could, as a temporary workaround, remove the public exponent from your public key data to avoid executing the code causing the abort. >>> >>>Simon: Yes, we’ll need an alignment-safe version of fdt64_to_cpu. >>> >>>Michael >> >>>> On 02 Dec 2014, at 12:31 AM, Simon Glass <sjg(a)chromium.org> wrote: >>>> >>>> +Michael, U-Boot mailing list >>>> >>>> Hi, >>>> >>>> On 30 November 2014 at 19:26, Duxiaoqiang <duxiaoqiang(a)huawei.com> wrote: >>>>> >>>>> Hi Simon >>>>> >>>>> >>>>> >>>>> When I test verified boot with new version of U-boot and new version of mkimage, I encountered a alignment problem about RSA public key exponents. >>>>> >>>>> >>>>> >>>>> I tested verified boot successful few months ago with version of 2014.07-rc4, but failed with the same configuration and operations this time. >>>>> >>>>> >>>>> >>>>> Problem logs as below: >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> I debug this problem and noticed that the problem was caused by pulic_exponent’s address: 0xff78a04c, this address was not aligned to 8 byte, but this address was pointed by a uint64 * type of pointer. >>>>> >>>>> Panic happened in function rsa_verify_with_keynode, just as below: >>>>> >>>>> >>>>> >>>>> By compared the u-boot.dtb file that signed with RSA public key, I noticed that there are differences about PUBLIC_EXPONENT. >>>>> >>>>> With the older version of mkimage, there’s no public exponent section. And this problem only happens when I use the new version of mkimage tool. >>>>> >>>>> >>>>> >>>>> I also checked uboot’s code, it seems that there’s lack of mechanism to guarantee the alignment about public exponent section. >>>>> >>>>> >>>>> >>>>> Can you give some suggestions about this problem. Appreciate your time. >>>> >>> >Copying Michael. Perhaps we need a safer version of fdt64_to_cpu()? >>>> >>>> But you might be the first to run this on aarch64. I have not tried it >>>> yet, but I do now have a platform. > > REgards, > Simon

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[U-Boot] [PATCH 0/5] peach_pi: Add support for FIMD and DP
by Ajay Kumar 02 Mar '15

02 Mar '15

Add support for the eDP panel supported on peach_pi. Sjoerd Simons(1): [PATCH 1/5] Exynos5800: The Peach-Pi board does not have a Parade video bridge Ajay Kumar (4): [PATCH 2/5] arm: exynos: add display clocks for Exynos5800 [PATCH 3/5] Exynos5: Fix rpll_sdiv to support both peach-pit and peach-pi panels [PATCH 4/5] exynos5420: Add LCD and LED powerup settings for peach-pi [PATCH 5/5] peach_pi: dts: Add lcd poweron delay arch/arm/cpu/armv7/exynos/clock.c | 63 +++++++++++++++++++++++- arch/arm/cpu/armv7/exynos/clock_init_exynos5.c | 4 +- arch/arm/dts/exynos5800-peach-pi.dts | 6 +-- arch/arm/include/asm/arch-exynos/clk.h | 3 ++ board/samsung/smdk5420/smdk5420.c | 32 +++++++----- 5 files changed, 88 insertions(+), 20 deletions(-) -- 1.7.9.5

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[U-Boot] [PATCH] configs: LS1012XA: Modify CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS for LS102XA
by Nikhil Badola 24 Feb '15

24 Feb '15

Change CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS value to 2 for LS102XAQDS and LS102XATWR. The XHCI controller has 2 ports; one for 2.0 and the other for 3.0 USB transactions Signed-off-by: Nikhil Badola <nikhil.badola(a)freescale.com> --- Depends on patch https://patchwork.ozlabs.org/patch/401448/ and https://patchwork.ozlabs.org/patch/401449/ include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atwr.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 1389b00..3cd4a9f 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -298,7 +298,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_FSL #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 2b23cc9..4098214 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -46,7 +46,7 @@ #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_FSL #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) -- 1.7.11.7

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[U-Boot] [PATCH v3 00/13] ARMv7: add PSCI support to u-boot
by Marc Zyngier 19 Feb '15

19 Feb '15

PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management - CPU hotplug - big.LITTLE migration models - System shutdown and reset It basically allows the kernel to offload these tasks to the firmware, and rely on common kernel side code. More importantly, it gives a way to ensure that CPUs enter the kernel at the appropriate exception level (ie HYP mode, to allow the use of the virtualization extensions), even across events like CPUs being powered off/on or suspended. The main idea here is to turn some of the existing u-boot code into a separate section that can live in secure RAM (or a reserved page of memory), containing a secure monitor that will implement the PSCI operations. This code will still be alive when u-boot is long gone, hence the need for a piece of memory that will not be touched by the OS. This patch series contains 4 parts: - the first four patches are just bug fixes - the next two refactor the HYP/non-secure code to allow relocation in secure memory - the next four contain the generic PSCI code and DT infrastructure - the last three implement the CPU_ON method of the Allwinner A20 (aka sun7i). I realize the A20 u-boot code is not upstream yet (BTW is anyone actively working on that?), but hopefully that should give a good idea of how things are structured so far. The patches are against the mainline u-boot tree as of today, merged with the sunxi u-boot tree of the day and the first 10 patches will directly apply to mainline u-boot. As for using this code, it goes like this: sun7i# ext2load mmc 0:1 0x40008000 zImage ; ext2load mmc 0:1 0x60000000 sun7i-a20-cubietruck.dtb 2270120 bytes read in 117 ms (18.5 MiB/s) 9138 bytes read in 3 ms (2.9 MiB/s) sun7i# fdt addr 0x60000000 ; fdt resize ; fdt set ethernet0 mac-address "[5a fe b0 07 b0 07]" sun7i# setenv bootargs console=ttyS0,115200 earlyprintk ip=dhcp root=/dev/nfs nfsroot=/backup/a20_root,tcp sun7i# bootz 0x40008000 - 0x60000000 The kernel now boots in HYP mode, finds its secondary CPU without any SMP code present in the kernel, and runs KVM out of the box. I've been told the Xen/ARM guys managed to do the same fairly easily. This code has also been tested on a VExpress TC2, running KVM with all 5 CPUs, in order to make sure there was no obvious regression. I'm wildly cross-posting this patch series, including to lists I'm not subscribed to. Please keep me on Cc for any comment you may have. The code is also available at: git://git.kernel.org/pub/scm/linux/kernel/git/maz/u-boot.git wip/psci Cheers, M. Ma Haijun (1): ARM: convert arch_fixup_memory_node to a generic FDT fixup function Marc Zyngier (12): ARM: HYP/non-sec: move switch to non-sec to the last boot phase ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 ARM: non-sec: reset CNTVOFF to zero ARM: add missing HYP mode constant ARM: HYP/non-sec: add separate section for secure code ARM: HYP/non-sec: allow relocation to secure RAM ARM: HYP/non-sec: add generic ARMv7 PSCI code ARM: HYP/non-sec: add the option for a second-stage monitor ARM: HYP/non-sec/PSCI: emit DT nodes sunxi: fix SRAM_B/SRAM_D memory map sunxi: HYP/non-sec: add sun7i PSCI backend sunxi: HYP/non-sec: configure CNTFRQ on all CPUs arch/arm/config.mk | 2 +- arch/arm/cpu/armv7/Makefile | 5 + arch/arm/cpu/armv7/nonsec_virt.S | 168 +++++++++++++++++--------------- arch/arm/cpu/armv7/psci.S | 105 ++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/Makefile | 3 + arch/arm/cpu/armv7/sunxi/psci.S | 162 ++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/virt-dt.c | 100 +++++++++++++++++++ arch/arm/cpu/armv7/virt-v7.c | 59 ++++------- arch/arm/cpu/u-boot.lds | 30 ++++++ arch/arm/include/asm/arch-sunxi/cpu.h | 4 +- arch/arm/include/asm/armv7.h | 11 ++- arch/arm/include/asm/proc-armv/ptrace.h | 2 + arch/arm/include/asm/psci.h | 35 +++++++ arch/arm/include/asm/secure.h | 26 +++++ arch/arm/lib/bootm-fdt.c | 13 ++- arch/arm/lib/bootm.c | 27 +++-- arch/arm/lib/interrupts.c | 2 +- arch/arm/lib/sections.c | 2 + common/image-fdt.c | 7 +- include/common.h | 6 +- include/configs/sun7i.h | 7 ++ 21 files changed, 627 insertions(+), 149 deletions(-) create mode 100644 arch/arm/cpu/armv7/psci.S create mode 100644 arch/arm/cpu/armv7/sunxi/psci.S create mode 100644 arch/arm/cpu/armv7/virt-dt.c create mode 100644 arch/arm/include/asm/psci.h create mode 100644 arch/arm/include/asm/secure.h -- 1.8.5.1

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[U-Boot] [PATCH] mtd: nand: mxs: fix PIO_WORD number
by Luca Ellero 10 Feb '15

10 Feb '15

There is only one pio_word in this DMA transaction so data field must be 1. Signed-off-by: Luca Ellero <luca.ellero(a)brickedbrain.com> --- drivers/mtd/nand/mxs_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 7a064ab..616c9ca 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -305,7 +305,7 @@ static void mxs_nand_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) d->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ | MXS_DMA_DESC_IRQ | MXS_DMA_DESC_CHAIN | MXS_DMA_DESC_DEC_SEM | - MXS_DMA_DESC_WAIT4END | (3 << MXS_DMA_DESC_PIO_WORDS_OFFSET) | + MXS_DMA_DESC_WAIT4END | (1 << MXS_DMA_DESC_PIO_WORDS_OFFSET) | (nand_info->cmd_queue_len << MXS_DMA_DESC_BYTES_OFFSET); d->cmd.address = (dma_addr_t)nand_info->cmd_buf; -- 1.7.10.4

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[U-Boot] [PATCH v2 0/13] ARM: atmel: enable spl for sama5d4 related boards
by Bo Shen 07 Feb '15

07 Feb '15

This patch enable SPL support for both sama5d4ek and sama5d4 xplained board which are based on SAMA5D4 SoC. These two boards both support boot up from NAND flash, SD/MMC card and also serial flash. This patch series based on the "ARM: atmel: enable usb ethernet gadget" Changes in v2: - change CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION to CONFIG_SYS_MMCSD_FS_BOOT_PARTITION - change CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION to CONFIG_SYS_MMCSD_FS_BOOT_PARTITION Bo Shen (13): ARM: atmel: clock: make it possible to configure HMX32 ARM: atmel: sama5: add bus matrix header file ARM: atmel: sama5: add sfr register header file ARM: atmel: spl: add weak bus matrix init function ARM: atmel: spl: add saic to aic redirect function ARM: atmel: spl: can not disable osc for sama5d4 ARM: atmel: sama5d4: add matrix1 base addr definition ARM: atmel: sama5d4: add bus matrix init function ARM: atmel: sama5d4: add interrupt redirec function ARM: atmel: sama5d4: can access DDR in interleave mode ARM: atmel: sama5d4: build related file when enable SPL ARM: atmel: sama5d4ek: enable SPL support ARM: atmel: sama5d4_xplained: enable spl support arch/arm/Kconfig | 2 + arch/arm/cpu/armv7/at91/clock.c | 8 +++ arch/arm/cpu/armv7/at91/sama5d4_devices.c | 47 ++++++++++++++ arch/arm/cpu/at91-common/Makefile | 1 + arch/arm/cpu/at91-common/mpddrc.c | 2 +- arch/arm/cpu/at91-common/spl_atmel.c | 16 +++++ arch/arm/include/asm/arch-at91/at91_common.h | 1 + arch/arm/include/asm/arch-at91/sama5_matrix.h | 37 +++++++++++ arch/arm/include/asm/arch-at91/sama5_sfr.h | 38 +++++++++++ arch/arm/include/asm/arch-at91/sama5d4.h | 2 + board/atmel/sama5d4_xplained/sama5d4_xplained.c | 85 +++++++++++++++++++++++++ board/atmel/sama5d4ek/sama5d4ek.c | 85 +++++++++++++++++++++++++ configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 1 + configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 1 + configs/sama5d4ek_spiflash_defconfig | 1 + include/configs/sama5d4_xplained.h | 56 ++++++++++++++++ include/configs/sama5d4ek.h | 56 ++++++++++++++++ 20 files changed, 441 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-at91/sama5_matrix.h create mode 100644 arch/arm/include/asm/arch-at91/sama5_sfr.h -- 2.1.0.24.g4109c28

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