December 2014 - U-Boot

[U-Boot] Recommended SH toolchain
by Vasili Galka 08 May '15

08 May '15

Hi Nobuhiro, I'm trying to verify the correct build of all SH boards in U-Boot. What is the recommended toolchain to use? I tried the one from kernel.org [1], but it does not work for all the boards, I get build errors like this one: Building rsk7203 board... sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration make[3]: *** [include/autoconf.mk] Error 1 make[3]: *** [include/autoconf.mk.dep] Error 1 make[2]: *** [silentoldconfig] Error 1 make: *** [sub-make] Error 2 sh4-linux-size: '/home/lab/dev/u-boot/out/all_sh/u-boot': No such file sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration sh4-linux-gcc: error: command line option '-m3e' is not supported by this configuration make[3]: *** [include/autoconf.mk] Error 1 make[3]: *** Waiting for unfinished jobs.... make[3]: *** [include/autoconf.mk.dep] Error 1 'make -f /home/lab/dev/u-boot/scripts/Makefile.autoconf obj=include include/autoconf.mk include/autoconf.mk.dep' Failed make[2]: *** [silentoldconfig] Error 1 make[1]: *** No rule to make target `include/config/auto.conf', needed by `include/config/uboot.release'. Stop. make: *** [sub-make] Error 2 I'll appreciate your help. [1] https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/ Regards, Vasili

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[U-Boot] [PATCH] drivers: usb: fsl: Workaround for Erratum A004477
by Nikhil Badola 05 May '15

05 May '15

Add a delay of 1 microsecond before issuing soft reset to the controller to let ongoing ULPI transaction complete. This prevents corruption of ULPI Function Control Register which eventually prevents phy clock from entering to low power mode Signed-off-by: Nikhil Badola <nikhil.badola(a)freescale.com> --- Depends on patch https://patchwork.ozlabs.org/patch/404879/ arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 ++++ arch/powerpc/include/asm/config_mpc85xx.h | 6 ++++++ drivers/usb/host/ehci-fsl.c | 10 ++++++++++ include/fsl_usb.h | 29 +++++++++++++++++++++++++++++ 4 files changed, 49 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index fe3eb06..bc59352 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -298,6 +298,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (has_erratum_a007798()) puts("Work-around for Erratum A007798 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A004477 + if (has_erratum_a004477()) + puts("Work-around for Erratum A004477 enabled\n"); +#endif #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447 if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) || (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV)) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 7860b40..fe9e9c1 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -161,6 +161,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A007075 #define CONFIG_SYS_FSL_ERRATUM_A006261 +#define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 #define CONFIG_ESDHC_HC_BLK_ADDR @@ -292,6 +293,7 @@ #define CONFIG_FSL_SATA_ERRATUM_A001 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#define CONFIG_SYS_FSL_ERRATUM_A004477 #elif defined(CONFIG_P1023) #define CONFIG_MAX_CPUS 2 @@ -372,6 +374,7 @@ #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ @@ -589,6 +592,7 @@ #define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_ESDHC_HC_BLK_ADDR #elif defined(CONFIG_BSC9132) @@ -613,6 +617,7 @@ #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_A005434 +#define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 #define CONFIG_ESDHC_HC_BLK_ADDR @@ -712,6 +717,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A006475 #define CONFIG_SYS_FSL_ERRATUM_A006384 #define CONFIG_SYS_FSL_ERRATUM_A007212 +#define CONFIG_SYS_FSL_ERRATUM_A004477 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #define CONFIG_SYS_FSL_SFP_VER_3_0 diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 5d4288d..41ff1a7 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -138,6 +138,16 @@ int ehci_hcd_init(int index, enum usb_init_type init, if (has_erratum_a007798()) set_txfifothresh(ehci, TXFIFOTHRESH); + if (has_erratum_a004477()) { + /* + * When reset is issued while any ULPI transaction is ongoing + * then it may result to corruption of ULPI Function Control + * Register which eventually causes phy clock to enter low + * power mode which stops the clock. Thus delay is required + * before reset to let ongoing ULPI transaction complete. + */ + udelay(1); + } return 0; } diff --git a/include/fsl_usb.h b/include/fsl_usb.h index d251f5d..88d8a8b 100644 --- a/include/fsl_usb.h +++ b/include/fsl_usb.h @@ -164,6 +164,30 @@ static inline bool has_erratum_a007792(void) return false; } +static inline bool has_erratum_a004477(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { + case SVR_P1010: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P1022: + case SVR_9131: + case SVR_9132: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); + case SVR_P2020: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) || + IS_SVR_REV(svr, 2, 1); + case SVR_B4860: + case SVR_B4420: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P4080: + return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0); + } + + return false; +} #else static inline bool has_erratum_a006261(void) { @@ -184,5 +208,10 @@ static inline bool has_erratum_a007792(void) { return false; } + +static inline bool has_erratum_a004477(void) +{ + return false; +} #endif #endif /*_ASM_FSL_USB_H_ */ -- 1.7.11.7

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[U-Boot] [UBOOT PATCH] ci_udc: Update the ci_udc driver to support bulk transfers
by Siva Durga Prasad Paladugu 29 Apr '15

29 Apr '15

Update the ci_udc driver to support bulk transfer and also added capability of having multiple dtds if requested data is more thank 16K. These changes are tested for both the DFU and lthor. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- drivers/usb/gadget/ci_udc.c | 135 +++++++++++++++++++++++++++++++++++++------ drivers/usb/gadget/ci_udc.h | 1 + 2 files changed, 117 insertions(+), 19 deletions(-) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 2572b34..d1d19dc 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -50,6 +50,8 @@ /* For each endpoint, we need 2 QTDs, one for each of IN and OUT */ #define ILIST_SZ (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ) +#define EP_MAX_LENGTH_TRANSFER 0x4000 + #ifndef DEBUG #define DBG(x...) do {} while (0) #else @@ -102,13 +104,28 @@ static struct usb_ep_ops ci_ep_ops = { }; /* Init values for USB endpoints. */ -static const struct usb_ep ci_ep_init[2] = { +static const struct usb_ep ci_ep_init[5] = { [0] = { /* EP 0 */ .maxpacket = 64, .name = "ep0", .ops = &ci_ep_ops, }, - [1] = { /* EP 1..n */ + [1] = { + .maxpacket = 512, + .name = "ep1in-bulk", + .ops = &ci_ep_ops, + }, + [2] = { + .maxpacket = 512, + .name = "ep2out-bulk", + .ops = &ci_ep_ops, + }, + [3] = { + .maxpacket = 512, + .name = "ep3in-int", + .ops = &ci_ep_ops, + }, + [4] = { .maxpacket = 512, .name = "ep-", .ops = &ci_ep_ops, @@ -197,6 +214,19 @@ static void ci_flush_qtd(int ep_num) } /** + * ci_flush_td - flush cache over queue item + * @td: td pointer + * + * This function flushes cache for particular transfer descriptor. + */ +static void ci_flush_td(struct ept_queue_item *td) +{ + const uint32_t start = (uint32_t)td; + const uint32_t end = (uint32_t) td + ILIST_ENT_SZ; + flush_dcache_range(start, end); +} + +/** * ci_invalidate_qtd - invalidate cache over queue item * @ep_num: Endpoint number * @@ -211,6 +241,19 @@ static void ci_invalidate_qtd(int ep_num) invalidate_dcache_range(start, end); } +/** + * ci_invalidate_td - invalidate cache over queue item + * @td: td pointer + * + * This function invalidates cache for particular transfer descriptor. + */ +static void ci_invalidate_td(struct ept_queue_item *td) +{ + const uint32_t start = (uint32_t)td; + const uint32_t end = start + ILIST_ENT_SZ; + invalidate_dcache_range(start, end); +} + static struct usb_request * ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) { @@ -376,6 +419,9 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) struct ept_queue_head *head; int bit, num, len, in; struct ci_req *ci_req; + u8 *buf; + uint32_t length, actlen; + struct ept_queue_item *dtd, *qtd; ci_ep->req_primed = true; @@ -387,16 +433,41 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); len = ci_req->req.length; - item->info = INFO_BYTES(len) | INFO_ACTIVE; - item->page0 = (uint32_t)ci_req->hw_buf; - item->page1 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x1000; - item->page2 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x2000; - item->page3 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x3000; - item->page4 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x4000; - head->next = (unsigned) item; head->info = 0; + ci_req->dtd_count = 0; + buf = ci_req->hw_buf; + actlen = 0; + dtd = item; + + do { + length = min(ci_req->req.length - actlen, + (unsigned)EP_MAX_LENGTH_TRANSFER); + + dtd->info = INFO_BYTES(length) | INFO_ACTIVE; + dtd->page0 = (uint32_t)buf; + dtd->page1 = ((uint32_t)buf & 0xfffff000) + 0x1000; + dtd->page2 = ((uint32_t)buf & 0xfffff000) + 0x2000; + dtd->page3 = ((uint32_t)buf & 0xfffff000) + 0x3000; + dtd->page4 = ((uint32_t)buf & 0xfffff000) + 0x4000; + + len -= length; + actlen += length; + buf += length; + + if (len) { + qtd = (struct ept_queue_item *) + memalign(ILIST_ALIGN, ILIST_ENT_SZ); + dtd->next = (uint32_t)qtd; + dtd = qtd; + memset(dtd, 0, ILIST_ENT_SZ); + } + + ci_req->dtd_count++; + } while (len); + + item = dtd; /* * When sending the data for an IN transaction, the attached host * knows that all data for the IN is sent when one of the following @@ -432,6 +503,12 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_flush_qtd(num); + item = (struct ept_queue_item *)head->next; + while (item->next != TERMINATE) { + ci_flush_td((struct ept_queue_item *)item->next); + item = (struct ept_queue_item *)item->next; + } + DBG("ept%d %s queue len %x, req %p, buffer %p\n", num, in ? "in" : "out", len, ci_req, ci_req->hw_buf); ci_flush_qh(num); @@ -497,21 +574,31 @@ static void flip_ep0_direction(void) static void handle_ep_complete(struct ci_ep *ci_ep) { - struct ept_queue_item *item; - int num, in, len; + struct ept_queue_item *item, *next_td; + int num, in, len, j; struct ci_req *ci_req; num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; item = ci_get_qtd(num, in); ci_invalidate_qtd(num); + ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); - len = (item->info >> 16) & 0x7fff; - if (item->info & 0xff) - printf("EP%d/%s FAIL info=%x pg0=%x\n", - num, in ? "in" : "out", item->info, item->page0); + next_td = item; + len = 0; + for (j = 0; j < ci_req->dtd_count; j++) { + ci_invalidate_td(next_td); + item = next_td; + len += (item->info >> 16) & 0x7fff; + if (item->info & 0xff) + printf("EP%d/%s FAIL info=%x pg0=%x\n", + num, in ? "in" : "out", item->info, item->page0); + if (j != ci_req->dtd_count - 1) + next_td = (struct ept_queue_item *)item->next; + if (j != 0) + free(item); + } - ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); list_del_init(&ci_req->queue); ci_ep->req_primed = false; @@ -847,9 +934,19 @@ static int ci_udc_probe(void) controller.gadget.ep0 = &controller.ep[0].ep; INIT_LIST_HEAD(&controller.gadget.ep0->ep_list); - /* Init EP 1..n */ - for (i = 1; i < NUM_ENDPOINTS; i++) { - memcpy(&controller.ep[i].ep, &ci_ep_init[1], + /* Init EP 1..3 */ + for (i = 1; i < 4; i++) { + memcpy(&controller.ep[i].ep, &ci_ep_init[i], + sizeof(*ci_ep_init)); + INIT_LIST_HEAD(&controller.ep[i].queue); + controller.ep[i].req_primed = false; + list_add_tail(&controller.ep[i].ep.ep_list, + &controller.gadget.ep_list); + } + + /* Init EP 4..n */ + for (i = 4; i < NUM_ENDPOINTS; i++) { + memcpy(&controller.ep[i].ep, &ci_ep_init[4], sizeof(*ci_ep_init)); INIT_LIST_HEAD(&controller.ep[i].queue); controller.ep[i].req_primed = false; diff --git a/drivers/usb/gadget/ci_udc.h b/drivers/usb/gadget/ci_udc.h index 346164a..95cc079 100644 --- a/drivers/usb/gadget/ci_udc.h +++ b/drivers/usb/gadget/ci_udc.h @@ -86,6 +86,7 @@ struct ci_req { /* Buffer for the current transfer. Either req.buf/len or b_buf/len */ uint8_t *hw_buf; uint32_t hw_len; + uint32_t dtd_count; }; struct ci_ep { -- 1.7.4

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[U-Boot] fatload from eMMC general purpose partition
by Andreas Naumann 24 Apr '15

24 Apr '15

Hi, using an eMMC I want to load uImage and dtb from a general purpose partition (since these can be configured as pSLC independent of the user data area). From the kernel I can format and access the GP-partition, in my case mkfs.vfat. However, U-Boots fatload/extload on the GP-partition do not work or maybe I just give the wrong parameters. Is this implemented at all, any hints? Regards Andreas

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[U-Boot] [PATCH 00/19] [RFC] Power(full) framework based on Driver Model
by Przemyslaw Marczak 24 Apr '15

24 Apr '15

Hello, This piece of code was a base for prepare my presentation talk for the U-Boot Mini Summit, which taking place at ELCE2014 conference, 13-th October 2014 Dusseldorf, Germany. The tittle of talk: "Power(full) framework based on Driver Model" The presentation will be shared after the Summit. This patchset introduces the new one PMIC framework for the U-Boot. It is still under the construction, but the basic functionality was achieved and tested. Please feel free to comment and share the opinion. I think that each patch is described full enough, but for some more design details, please look into the documentation file. It includes some basic examples for the PMIC drivers. Quick summary of: Framework: - The new approach - UCLASS_PMIC - simple and designed for device I/O only - Add new uclass types: UCLASS_PMIC and UCLASS_PMIC_REGULATOR - Two uclass drivers for above types - A common regulator operations - will easy cover the real devices design Drivers: - Introduce new PMIC API for drivers - now everything base on "struct udevice" - Introduce Regulator Voltage descriptors and Operation Mode descriptors which are usually taken from the device tree (board dependent data) - Two uclass device drivers for MAX77686(PMIC+REGULATOR) User Interface: - command pmic, unchanged functionality and ported to the driver model - command regulator(NEW) for safe regulator setup from commandline, - now can check output Voltage and operation mode of the regulators, - also can check the board Voltage limits and driver available modes The future plans: - Wait for the I2c Driver Model implementation - Introduce a common way to bind pmic devices - now done by alias "pmic" - Add additional uclass types: MUIC, CHARGER, BATTERY, MFD and maybe more. - Introduce optimal operations for new uclasses - Port all U-Boot drivers to the new Framework - Remove the old drivers and the old PMIC Framework code The assumptions of this work is: - Add new code to independent files - Keep two Frameworks as independent and without conflicts - Don't mix OLD/NEW Framework code - for the readability - Port all drivers using new API - Remove the old Framework and the old drivers A disadvantage: - some parts of the present code is duplicated Need help: - After merge this, it is welcome to help with driver porting. - Everything should be tested The extra feature: The first commit introduces errno_str() function. It is a common function which I hope will be usefull for commands and not only. If any visible error says: -19 or some other magic number, then it means that this function should be used. U-Boot Mini Summit members: This code is maybe not as good as it could be, but the time was limited, and the conference is comming soon. I don't expects a code review of this now, but it would be nice if you take a look of this piece of code before our U-Boot Mini Summit. Of course it depends on you. Best Regards and see you in Dusseldorf! Przemyslaw Marczak Przemyslaw Marczak (19): lib: errno: introduce errno_str(): returns errno related message exynos: config-common: enable errno_str() function exynos: config-common: enable generic fs command dm: pmic: add implementation of driver model pmic uclass dm: pmic: add implementation of driver model regulator uclass dm: common: board_r: add call and weak of power_init_dm() dm: pmic: add max77686 pmic driver dm: regulator: add max77686 regulator driver dm: pmic: new commands: pmic and regulator dm: board:samsung: power_init_board: add requirement of CONFIG_DM_PMIC doc: driver-model: pmic and regulator uclass documentation samsung: board: lcd menu: check if any power framework is enabled samsung: misc: power_key_pressed: add support to dm pmic framework trats2: board: add support to dm pmic api trats2: dts: max77686: add pmic alias and names cleanup trats2: config: enable dm pmic, dm regulator api, dm max77686 odroid: board: add support to dm pmic api odroid: dts: add 'voltage-regulators' description to max77686 node odroid: config: enable dm pmic, dm regulator and max77686 driver Makefile | 1 + arch/arm/dts/exynos4412-odroid.dts | 250 +++++++++- arch/arm/dts/exynos4412-trats2.dts | 17 +- board/samsung/common/board.c | 5 +- board/samsung/common/misc.c | 21 +- board/samsung/odroid/odroid.c | 31 +- board/samsung/trats2/trats2.c | 208 ++------ common/board_r.c | 8 + doc/driver-model/dm-pmic-framework.txt | 450 ++++++++++++++++++ drivers/power/Makefile | 6 +- drivers/power/cmd_pmic.c | 845 +++++++++++++++++++++++++++++++++ drivers/power/pmic-uclass.c | 255 ++++++++++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/max77686.c | 89 ++++ drivers/power/pmic_i2c.c | 136 ++++++ drivers/power/pmic_spi.c | 137 ++++++ drivers/power/regulator-uclass.c | 250 ++++++++++ drivers/power/regulator/Makefile | 8 + drivers/power/regulator/max77686.c | 749 +++++++++++++++++++++++++++++ include/configs/exynos-common.h | 3 + include/configs/odroid.h | 8 +- include/configs/trats2.h | 14 +- include/dm/uclass-id.h | 4 + include/errno.h | 3 + include/power/max77686_pmic.h | 28 +- include/power/pmic.h | 82 ++++ include/power/regulator.h | 267 +++++++++++ lib/Makefile | 1 + lib/errno_str.c | 147 ++++++ 29 files changed, 3823 insertions(+), 201 deletions(-) create mode 100644 doc/driver-model/dm-pmic-framework.txt create mode 100644 drivers/power/cmd_pmic.c create mode 100644 drivers/power/pmic-uclass.c create mode 100644 drivers/power/pmic/max77686.c create mode 100644 drivers/power/pmic_i2c.c create mode 100644 drivers/power/pmic_spi.c create mode 100644 drivers/power/regulator-uclass.c create mode 100644 drivers/power/regulator/Makefile create mode 100644 drivers/power/regulator/max77686.c create mode 100644 include/power/regulator.h create mode 100644 lib/errno_str.c -- 1.9.1

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[U-Boot] [PATCH] Revert "spi: add config option to enable the WP pin function on st micron flashes"
by Jagannadha Sutradharudu Teki 23 Apr '15

23 Apr '15

This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d. Never see the issue with N25Q128 flash without need of W#/Vpp signal during probe. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com> Cc: Heiko Schocher <hs(a)denx.de> --- README | 11 ----------- drivers/mtd/spi/sf_internal.h | 4 ---- drivers/mtd/spi/sf_probe.c | 30 ------------------------------ 3 files changed, 45 deletions(-) diff --git a/README b/README index 4ca04d0..908646f 100644 --- a/README +++ b/README @@ -3090,17 +3090,6 @@ CBFS (Coreboot Filesystem) support memories can be connected with a given cs line. currently Xilinx Zynq qspi support these type of connections. - CONFIG_SYS_SPI_ST_ENABLE_WP_PIN - enable the W#/Vpp signal to disable writing to the status - register on ST MICRON flashes like the N25Q128. - The status register write enable/disable bit, combined with - the W#/VPP signal provides hardware data protection for the - device as follows: When the enable/disable bit is set to 1, - and the W#/VPP signal is driven LOW, the status register - nonvolatile bits become read-only and the WRITE STATUS REGISTER - operation will not execute. The only way to exit this - hardware-protected mode is to drive W#/VPP HIGH. - - SystemACE Support: CONFIG_SYSTEMACE diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 785f7a9..bd834dc 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -97,10 +97,6 @@ enum { #define STATUS_QEB_MXIC (1 << 6) #define STATUS_PEC (1 << 7) -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN -#define STATUS_SRWD (1 << 7) /* SR write protect */ -#endif - /* Flash timeout values */ #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index ce9987f..3b0e652 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -287,34 +287,6 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) } #endif /* CONFIG_OF_CONTROL */ -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN -/* enable the W#/Vpp signal to disable writing to the status register */ -static int spi_enable_wp_pin(struct spi_flash *flash) -{ - u8 status; - int ret; - - ret = spi_flash_cmd_read_status(flash, &status); - if (ret < 0) - return ret; - - ret = spi_flash_cmd_write_status(flash, STATUS_SRWD); - if (ret < 0) - return ret; - - ret = spi_flash_cmd_write_disable(flash); - if (ret < 0) - return ret; - - return 0; -} -#else -static int spi_enable_wp_pin(struct spi_flash *flash) -{ - return 0; -} -#endif - /** * spi_flash_probe_slave() - Probe for a SPI flash device on a bus * @@ -393,8 +365,6 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); } #endif - if (spi_enable_wp_pin(flash)) - puts("Enable WP pin failed\n"); /* Release spi bus */ spi_release_bus(spi); -- 1.9.1

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[U-Boot] [PATCH 1/3] sf: ops: Add spi_flash_copy_mmap function
by Tom Rini 22 Apr '15

22 Apr '15

When doing a memory mapped copy we may have DMA available and thus need to have this copy abstracted so that the driver can do it, rather than a simple memcpy. Cc: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Signed-off-by: Tom Rini <trini(a)ti.com> --- drivers/mtd/spi/sf_ops.c | 8 +++++++- include/spi.h | 3 +++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index ef91b92..2c7b890 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -14,6 +14,7 @@ #include <spi.h> #include <spi_flash.h> #include <watchdog.h> +#include <linux/compiler.h> #include "sf_internal.h" @@ -359,6 +360,11 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, return ret; } +void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len) +{ + memcpy(data, offset, len); +} + int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, size_t len, void *data) { @@ -375,7 +381,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, return ret; } spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP); - memcpy(data, flash->memory_map + offset, len); + spi_flash_copy_mmap(data, flash->memory_map + offset, len); spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END); spi_release_bus(flash->spi); return 0; diff --git a/include/spi.h b/include/spi.h index ffd6647..eecb9ad 100644 --- a/include/spi.h +++ b/include/spi.h @@ -220,6 +220,9 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags); +/* Copy memory mapped data */ +void spi_flash_copy_mmap(void *data, void *offset, size_t len); + /** * Determine if a SPI chipselect is valid. * This function is provided by the board if the low-level SPI driver -- 1.7.9.5

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[U-Boot] [PATCH v3 0/9] sf: Update flash params for supported read commands and sector size
by Bin Meng 22 Apr '15

22 Apr '15

This series update SPI flash supported read commands per datasheet in the flash params table, and change flash sector size to 4KiB as long as flash supports sector erase (20h) command, to ensure 'sf erase offset +len' work on 4KiB boundary instead of 64KiB when given SECT_4K. Changes in v3: - Rebase with Jagan's patch series @ http://patchwork.ozlabs.org/patch/419154/ Bin Meng (9): sf: Update SST flash params sf: Update Atmel flash params sf: Update EON flash params sf: Update GigaDevice flash params sf: Update Macronix flash params sf: Update Spansion flash params sf: Update Micron flash params sf: Update Winbond flash params sf: Give proper spacing between flash table params drivers/mtd/spi/sf_internal.h | 5 ++ drivers/mtd/spi/sf_params.c | 185 ++++++++++++++++++++++-------------------- drivers/mtd/spi/sf_probe.c | 4 + 3 files changed, 104 insertions(+), 90 deletions(-) -- 1.8.2.1

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[U-Boot] [PATCH 0/4] dm: rpi: Move Raspberry Pi to use driver model
by Simon Glass 21 Apr '15

21 Apr '15

This series adds driver model support to the GPIO and serial drivers used by Raspberry Pi, and moves Raspberry Pi over to driver model. This requires adding driver model support to the pl01x serial driver, and replacing the bcm2835 GPIO driver with a driver model version (since there are no longer clients that don't use driver model). See u-boot-dm.git branch rpi-working for the tree this is based on. Simon Glass (4): dm: rpi: Convert GPIO driver to driver model dm: serial: Tidy up the pl01x driver dm: serial: Support driver model in pl01x driver dm: rpi: Move serial to driver model arch/arm/include/asm/arch-bcm2835/gpio.h | 9 + board/raspberrypi/rpi_b/rpi_b.c | 23 ++ drivers/gpio/bcm2835_gpio.c | 180 ++++++++-- drivers/serial/Makefile | 5 +- drivers/serial/serial_pl01x.c | 373 +++++++++++++-------- .../{serial_pl01x.h => serial_pl01x_internal.h} | 0 include/configs/rpi_b.h | 11 +- include/serial_pl01x.h | 27 ++ 8 files changed, 462 insertions(+), 166 deletions(-) rename drivers/serial/{serial_pl01x.h => serial_pl01x_internal.h} (100%) create mode 100644 include/serial_pl01x.h -- 2.1.0.rc2.206.gedb03e5

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[U-Boot] [UBOOT PATCH] f_thor: Dont perform reset at the end of thor
by Siva Durga Prasad Paladugu 15 Apr '15

15 Apr '15

Dont perform reset at the end of thor download if configured to do reset off. Reset may not be required in all cases and hence provided an option to do so. Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- drivers/usb/gadget/f_thor.c | 7 +++++++ drivers/usb/gadget/f_thor.h | 3 +++ 2 files changed, 10 insertions(+), 0 deletions(-) diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index c85b0fb..8cf0718 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -123,6 +123,9 @@ static int process_rqt_cmd(const struct rqt_box *rqt) send_rsp(rsp); g_dnl_unregister(); dfu_free_entities(); +#ifdef CONFIG_THOR_RESET_OFF + return RESET_DONE; +#endif run_command("reset", 0); break; case RQT_CMD_POWEROFF: @@ -726,6 +729,10 @@ int thor_handle(void) if (ret > 0) { ret = process_data(); +#ifdef CONFIG_THOR_RESET_OFF + if (ret == RESET_DONE) + break; +#endif if (ret < 0) return ret; } else { diff --git a/drivers/usb/gadget/f_thor.h b/drivers/usb/gadget/f_thor.h index 833a9d2..8341285 100644 --- a/drivers/usb/gadget/f_thor.h +++ b/drivers/usb/gadget/f_thor.h @@ -121,4 +121,7 @@ struct f_thor { #define F_NAME_BUF_SIZE 32 #define THOR_PACKET_SIZE SZ_1M /* 1 MiB */ #define THOR_STORE_UNIT_SIZE SZ_32M /* 32 MiB */ +#ifdef CONFIG_THOR_RESET_OFF +#define RESET_DONE 0xFFFFFFFF +#endif #endif /* _USB_THOR_H_ */ -- 1.7.4

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