December 2014 - U-Boot

[U-Boot] fatwrite problem
by Ruud Commandeur 12 Oct '15

12 Oct '15

Hi Everyone, Sinced a few days I noticed some problems writing the uimage to a FAT partition on my SD-card. At first I was afraid of some (physical) SD-card problems, but it appears to be related to he size of the uImage. With some further testing (and adding some debug printing), I could easily reproduce the problem: //4K file, result OK fatwrite mmc 0:1 42000000 testfile 1000 writing testfile set_cluster; clustnum: 5, startsect: 176, size 2048 set_cluster; clustnum: 6, startsect: 180, size 2048 set_cluster; clustnum: -6, startsect: 132, size 2048 4096 bytes written //512 bytes file, timeout error, file not written fatwrite mmc 0:1 42000000 testfile 200 writing testfile set_cluster; clustnum: 5, startsect: 176, size 0 MMC0: Bus busy timeout! MMC0: Bus busy timeout! MMC0: Bus busy timeout! MMC0: Bus busy timeout! MMC0: Bus busy timeout! MMC0: Bus busy timeout! set_cluster; clustnum: 5, startsect: 176, size 512 MMC0: Bus busy timeout! MMC0: Bus busy timeout! MMC0: Bus busy timeout! set_cluster; clustnum: -6, startsect: 132, size 2048 MMC0: Bus busy timeout! 512 bytes written It seems to be related to he problem reported here: http://www.mail-archive.com/u-boot@lists.denx.de/msg107212.html Once the size of the set_cluster call equals 0, the mmc command is incomplete and times out. In the earlier reported problem, a patch is mentioned, but not available for dowload here. Also in the latest versions of the git repository I could not find a patch for this problem. Can anyone tell me if there is a fix for this problem? Regards, Ruud

7 23

[U-Boot] [PATCH 1/4] dfu: defer parsing of device string to IO backend
by Stephen Warren 22 Sep '15

22 Sep '15

From: Stephen Warren <swarren(a)nvidia.com> Devices are not all identified by a single integer. To support this, defer the parsing of the device string to the IO backed, so that it can apply the appropriate rules. SPI devices are specified as controller:chip_select. SPI/SF support will be added soon. MMC devices can also be specified as controller[.hwpart][:partition] in many commands, although we don't support that syntax in DFU. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- common/cmd_dfu.c | 3 +-- drivers/dfu/dfu.c | 20 ++++++++++---------- drivers/dfu/dfu_mmc.c | 21 ++++++++++++--------- drivers/dfu/dfu_nand.c | 2 +- drivers/dfu/dfu_ram.c | 2 +- include/dfu.h | 22 +++++++++++++--------- 6 files changed, 38 insertions(+), 32 deletions(-) diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c index 433bddd5d2bd..2633b30e556f 100644 --- a/common/cmd_dfu.c +++ b/common/cmd_dfu.c @@ -24,8 +24,7 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int ret, i = 0; - ret = dfu_init_env_entities(interface, simple_strtoul(devstring, - NULL, 10)); + ret = dfu_init_env_entities(interface, devstring); if (ret) goto done; diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 1bf66d0613c9..26d3b44e40f5 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -44,7 +44,7 @@ static int dfu_find_alt_num(const char *s) return ++i; } -int dfu_init_env_entities(char *interface, int dev) +int dfu_init_env_entities(char *interface, char *devstr) { const char *str_env; char *env_bkp; @@ -57,7 +57,7 @@ int dfu_init_env_entities(char *interface, int dev) } env_bkp = strdup(str_env); - ret = dfu_config_entities(env_bkp, interface, dev); + ret = dfu_config_entities(env_bkp, interface, devstr); if (ret) { error("DFU entities configuration failed!\n"); return ret; @@ -389,26 +389,25 @@ int dfu_read(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num) } static int dfu_fill_entity(struct dfu_entity *dfu, char *s, int alt, - char *interface, int num) + char *interface, char *devstr) { char *st; - debug("%s: %s interface: %s num: %d\n", __func__, s, interface, num); + debug("%s: %s interface: %s dev: %s\n", __func__, s, interface, devstr); st = strsep(&s, " "); strcpy(dfu->name, st); - dfu->dev_num = num; dfu->alt = alt; /* Specific for mmc device */ if (strcmp(interface, "mmc") == 0) { - if (dfu_fill_entity_mmc(dfu, s)) + if (dfu_fill_entity_mmc(dfu, devstr, s)) return -1; } else if (strcmp(interface, "nand") == 0) { - if (dfu_fill_entity_nand(dfu, s)) + if (dfu_fill_entity_nand(dfu, devstr, s)) return -1; } else if (strcmp(interface, "ram") == 0) { - if (dfu_fill_entity_ram(dfu, s)) + if (dfu_fill_entity_ram(dfu, devstr, s)) return -1; } else { printf("%s: Device %s not (yet) supported!\n", @@ -434,7 +433,7 @@ void dfu_free_entities(void) alt_num_cnt = 0; } -int dfu_config_entities(char *env, char *interface, int num) +int dfu_config_entities(char *env, char *interface, char *devstr) { struct dfu_entity *dfu; int i, ret; @@ -457,7 +456,8 @@ int dfu_config_entities(char *env, char *interface, int num) for (i = 0; i < dfu_alt_num; i++) { s = strsep(&env, ";"); - ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface, num); + ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface, + devstr); if (ret) return -1; diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index 322bd8c5d2de..72fa03eedaec 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -27,7 +27,7 @@ static int mmc_access_part(struct dfu_entity *dfu, struct mmc *mmc, int part) if (part == mmc->part_num) return 0; - ret = mmc_switch_part(dfu->dev_num, part); + ret = mmc_switch_part(dfu->data.mmc.dev_num, part); if (ret) { error("Cannot switch to partition %d\n", part); return ret; @@ -40,7 +40,7 @@ static int mmc_access_part(struct dfu_entity *dfu, struct mmc *mmc, int part) static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void *buf, long *len) { - struct mmc *mmc = find_mmc_device(dfu->dev_num); + struct mmc *mmc = find_mmc_device(dfu->data.mmc.dev_num); u32 blk_start, blk_count, n = 0; int ret, part_num_bkp = 0; @@ -67,15 +67,15 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, } debug("%s: %s dev: %d start: %d cnt: %d buf: 0x%p\n", __func__, - op == DFU_OP_READ ? "MMC READ" : "MMC WRITE", dfu->dev_num, - blk_start, blk_count, buf); + op == DFU_OP_READ ? "MMC READ" : "MMC WRITE", + dfu->data.mmc.dev_num, blk_start, blk_count, buf); switch (op) { case DFU_OP_READ: - n = mmc->block_dev.block_read(dfu->dev_num, blk_start, + n = mmc->block_dev.block_read(dfu->data.mmc.dev_num, blk_start, blk_count, buf); break; case DFU_OP_WRITE: - n = mmc->block_dev.block_write(dfu->dev_num, blk_start, + n = mmc->block_dev.block_write(dfu->data.mmc.dev_num, blk_start, blk_count, buf); break; default: @@ -270,7 +270,7 @@ int dfu_read_medium_mmc(struct dfu_entity *dfu, u64 offset, void *buf, * 4th (optional): * mmcpart <num> (access to HW eMMC partitions) */ -int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s) +int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) { const char *entity_type; size_t second_arg; @@ -281,6 +281,8 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s) const char *argv[3]; const char **parg = argv; + dfu->data.mmc.dev_num = simple_strtoul(devstr, NULL, 10); + for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) { *parg = strsep(&s, " "); if (*parg == NULL) { @@ -297,9 +299,10 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s) second_arg = simple_strtoul(argv[1], NULL, 0); third_arg = simple_strtoul(argv[2], NULL, 0); - mmc = find_mmc_device(dfu->dev_num); + mmc = find_mmc_device(dfu->data.mmc.dev_num); if (mmc == NULL) { - error("Couldn't find MMC device no. %d.\n", dfu->dev_num); + error("Couldn't find MMC device no. %d.\n", + dfu->data.mmc.dev_num); return -ENODEV; } diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c index e1c9a8849246..f9ee18999ab7 100644 --- a/drivers/dfu/dfu_nand.c +++ b/drivers/dfu/dfu_nand.c @@ -179,7 +179,7 @@ unsigned int dfu_polltimeout_nand(struct dfu_entity *dfu) return DFU_DEFAULT_POLL_TIMEOUT; } -int dfu_fill_entity_nand(struct dfu_entity *dfu, char *s) +int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s) { char *st; int ret, dev, part; diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c index b6c6e60c443c..e094a946f6be 100644 --- a/drivers/dfu/dfu_ram.c +++ b/drivers/dfu/dfu_ram.c @@ -52,7 +52,7 @@ static int dfu_read_medium_ram(struct dfu_entity *dfu, u64 offset, return dfu_transfer_medium_ram(DFU_OP_READ, dfu, offset, buf, len); } -int dfu_fill_entity_ram(struct dfu_entity *dfu, char *s) +int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s) { char *st; diff --git a/include/dfu.h b/include/dfu.h index df720310f2cc..21390aa9b7b3 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -39,6 +39,8 @@ enum dfu_op { }; struct mmc_internal_data { + int dev_num; + /* RAW programming */ unsigned int lba_start; unsigned int lba_size; @@ -87,7 +89,6 @@ struct dfu_entity { char name[DFU_NAME_SIZE]; int alt; void *dev_private; - int dev_num; enum dfu_device_type dev_type; enum dfu_layout layout; @@ -125,7 +126,7 @@ struct dfu_entity { unsigned int inited:1; }; -int dfu_config_entities(char *s, char *interface, int num); +int dfu_config_entities(char *s, char *interface, char *devstr); void dfu_free_entities(void); void dfu_show_entities(void); int dfu_get_alt_number(void); @@ -136,7 +137,7 @@ char *dfu_extract_token(char** e, int *n); void dfu_trigger_reset(void); int dfu_get_alt(char *name); bool dfu_reset(void); -int dfu_init_env_entities(char *interface, int dev); +int dfu_init_env_entities(char *interface, char *devstr); unsigned char *dfu_get_buf(void); unsigned char *dfu_free_buf(void); unsigned long dfu_get_buf_size(void); @@ -146,9 +147,10 @@ int dfu_write(struct dfu_entity *de, void *buf, int size, int blk_seq_num); int dfu_flush(struct dfu_entity *de, void *buf, int size, int blk_seq_num); /* Device specific */ #ifdef CONFIG_DFU_MMC -extern int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s); +extern int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s); #else -static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s) +static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, + char *s) { puts("MMC support not available!\n"); return -1; @@ -156,9 +158,10 @@ static inline int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s) #endif #ifdef CONFIG_DFU_NAND -extern int dfu_fill_entity_nand(struct dfu_entity *dfu, char *s); +extern int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s); #else -static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *s) +static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, + char *s) { puts("NAND support not available!\n"); return -1; @@ -166,9 +169,10 @@ static inline int dfu_fill_entity_nand(struct dfu_entity *dfu, char *s) #endif #ifdef CONFIG_DFU_RAM -extern int dfu_fill_entity_ram(struct dfu_entity *dfu, char *s); +extern int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s); #else -static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *s) +static inline int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, + char *s) { puts("RAM support not available!\n"); return -1; -- 1.8.1.5

3 15

[U-Boot] Can't start Linux if U-Boot built with CONFIG_WATCHDOG
by Matthew Lear 26 Aug '15

26 Aug '15

Hello all, I've added watchdog support based on U-Boot (git) for the m68k coldfire mcf54455evb platform. I've fed the patch to the maintainer to help in development. However, I am unable to start my m68k w/MMU coldfire Linux kernel from U-Boot if U-Boot is built with CONFIG_WATCHDOG regardless if the watchdog_enable(), watchdog_reset() and watchdog_disable() functions touch hardware or not. I initially thought this was a problem with enabling the watchdog somehow (ie when Linux started, some hw configuration in the device was getting upset or corrupted etc resulting in the failure), but when I commented out the code from the above functions that actually accesses the hw (ie to enable, kick and disable the watchdog timer hw block), Linux is still unable to start. In fact, I don't think Linux actually gets started! That's the problem. If I rebuild the same U-Boot code base with CONFIG_WATCHDOG undefined, Linux can start just fine. As far as I can tell, there are no functional differences in building U-Boot with or without CONFIG_WATCHDOG enabled when the functions above are stubs and do absolutely nothing at all. If I build U-Boot with debug, what I see is as follows: ## Transferring control to Linux (at address 40020000) ... BIV ...and then the board is dead. I occasionally see something like the following from U-Boot: *** Unexpected exception *** Vector Number: 4 Format: 04 Fault Status: 0 PC: 4fdbfdc8 SR: 00002700 SP: 4fd72a64 D0: 00000004 D1: 000003f9 D2: 4fdb4202 D3: 004fa3da D4: 00000000 D5: 4fdc7c8c D6: 122c0034 D7: 4fd82f76 A0: 4033cb98 A1: 4025aa39 A2: 40020000 A3: 4fdbfdc8 A4: 00000000 A5: 4fdc5800 A6: 4fd72afb *** Please Reset Board! *** The 'BIV' is relevant because in my 2.6.29 kernel src arch/m68k/include/asm/bootinfo_mm.h, BOOTINFOV_MAGIC is defined to be 0x4249561A which is BIV^Z. This ascii text is located in the kernel image header info: >From arch/m68k/coldfire/head.S: .section ".text.head","ax" ENTRY(_stext) bras 1f /* Jump over bootinfo version numbers */ .long BOOTINFOV_MAGIC .long 0 And from U-Boot itself: -> md ${loadaddr} 40010000: 27051956 97342d7d 4a54afd5 00300000 '..V.4-}JT...0.. 40010010: 40020000 40020000 8a006fc1 050c0200 @...@.....o..... 40010020: 4c696e75 78204b65 726e656c 20496d61 Linux Kernel Ima 40010030: 67650000 00000000 00000000 00000000 ge.............. 40010040: 60084249 561a0000 00004ef9 40304000 `.BIV.....N.@0@. I suspect that the failure of starting Linux is caused by some mismatch in data structures (or versions there of) shared/copied between Linux and U-Boot and that this data has somehow changed when U-Boot is built with CONFIG_WATCHDOG #defined. However, I can't find any evidence of this in the U-Boot code base. The bras instruction above must be key and I suspect that this is the area causing the problem. Can anybody offer any advice / explanation of what exactly could be going on and why? I wouldn't have expected that defining CONFIG_WATCHDOG would change anything as fundamental as this. Apologies for the cross-post (U-Boot and m68k kernel dev) but I hope to get opinions/feedback/help from both communities. Any assistance very much appreciated indeed. Many thanks, -- Matt

2 1

[U-Boot] [PATCH 0/3] DM9000 support for multiple interfaces
by Andrew Ruder 11 Aug '15

11 Aug '15

This is a rework of the DM9000 driver to support registering interfaces dynamically (i.e. determine how many ethernet chips we have at boot and register 0, 1, 2, or more). It was tested on a yet-to-be-submitted board which is based on the PXA270 + 0, 1, or 2 DM9000 chips. To maintain backwards compatibility with older board files, we add a new initialize function taking the io address, data address, and availability of a SROM chip. The old initialize function is now a shim around this new initialize function but provides the parameters based on the old DM9000 preprocessor symbols. I have compile-tested this on all the arm-based boards. Cc: Joe Hershberger <joe.hershberger(a)gmail.com> Andrew Ruder (3): dm9000: mark dump_regs() function as unused dm9000: Add struct eth_device * to SROM functions dm9000: rework dm9000 to support multiple devices board/trizepsiv/eeprom.c | 5 +- drivers/net/dm9000x.c | 382 +++++++++++++++++++++++++++-------------------- include/dm9000.h | 8 +- include/netdev.h | 1 + 4 files changed, 224 insertions(+), 172 deletions(-) -- 2.1.1

5 14

[U-Boot] [PATCH v1 0/3] sparc: Add support for Gaisler GR712RC-BOARD Development Kit
by Francois Retief 11 Aug '15

11 Aug '15

This patch series add support for the Aeroflex Gaisler GR712RC-BOARD Development Kit. It builds on top of the previous SPARC architecture update series. Francois Retief (3): sparc: Make LEON serial drivers use readl/writel macros sparc: Add MDIO support to GRETH driver sparc: Add support for gr712rc-board arch/sparc/Kconfig | 8 + arch/sparc/cpu/leon2/serial.c | 121 +++++----- arch/sparc/cpu/leon3/serial.c | 93 ++++---- arch/sparc/include/asm/io.h | 43 ++-- board/gaisler/gr712rc_board/Kconfig | 9 + board/gaisler/gr712rc_board/MAINTAINERS | 6 + board/gaisler/gr712rc_board/Makefile | 8 + board/gaisler/gr712rc_board/README | 24 ++ board/gaisler/gr712rc_board/gr712rc_board.c | 68 ++++++ common/cmd_bdinfo.c | 4 + configs/gr712rc_board_defconfig | 3 + drivers/net/greth.c | 57 +++++ include/configs/gr712rc_board.h | 333 ++++++++++++++++++++++++++++ include/configs/gr_cpci_ax2000.h | 4 - include/configs/gr_ep2s60.h | 4 - include/configs/gr_xc3s_1500.h | 4 - include/configs/grsim.h | 3 - 17 files changed, 650 insertions(+), 142 deletions(-) create mode 100644 board/gaisler/gr712rc_board/Kconfig create mode 100644 board/gaisler/gr712rc_board/MAINTAINERS create mode 100644 board/gaisler/gr712rc_board/Makefile create mode 100644 board/gaisler/gr712rc_board/README create mode 100644 board/gaisler/gr712rc_board/gr712rc_board.c create mode 100644 configs/gr712rc_board_defconfig create mode 100644 include/configs/gr712rc_board.h -- 1.9.3 ________________________________ Disclaimer and confidentiality note – refer to our website for further details: www.spaceteq.co.za <http://www.spaceteq.co.za/home/emaildisclaimer/>

3 5

[U-Boot] [PATCH U-Boot] ARM: rpi_b: detect board revision
by Stephen Warren 02 Aug '15

02 Aug '15

Detect the board revision early during boot, and print the decoded model name. Eventually, this information can be used for tasks such as: - Allowing/preventing USB device mode; some models have a USB device on- board so only host mode makes sense. Others connect the SoC directly to the USB connector, so device-mode might make sense. - The on-board USB hub/Ethernet requires different GPIOs to enable it, although luckily the default appears to be fine so far. - The compute module contains an on-board eMMC device, so we could store the environment there. Other models use an SD card and so don't support saving the environment (unless we store it in a file on the FAT boot partition...) Set $fdtfile based on this information. At present, the mainline Linux kernel doesn't contain a separate DTB for most models, but I hope that will change soon. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- I'm considering renaming rpi_b -> rpi in U-Boot since it supports many models. Hopefully I can persuade U-Boot to load the environment from different places at run-time, so we won't need different builds based on whether the environment is in eMMC or not for example. arch/arm/include/asm/arch-bcm2835/mbox.h | 33 +++++++++ board/raspberrypi/rpi_b/rpi_b.c | 122 ++++++++++++++++++++++++++++++- include/configs/rpi_b.h | 1 - 3 files changed, 152 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h index 61f427d914cd..0289ba6a917e 100644 --- a/arch/arm/include/asm/arch-bcm2835/mbox.h +++ b/arch/arm/include/asm/arch-bcm2835/mbox.h @@ -119,6 +119,39 @@ struct bcm2835_mbox_tag_hdr { * }; */ +#define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002 + +/* + * 0x2..0xf from: + * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-r… + * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733 + * 0x10, 0x11 from swarren's testing + */ +#define BCM2835_BOARD_REV_B_I2C0_2 0x2 +#define BCM2835_BOARD_REV_B_I2C0_3 0x3 +#define BCM2835_BOARD_REV_B_I2C1_4 0x4 +#define BCM2835_BOARD_REV_B_I2C1_5 0x5 +#define BCM2835_BOARD_REV_B_I2C1_6 0x6 +#define BCM2835_BOARD_REV_A_7 0x7 +#define BCM2835_BOARD_REV_A_8 0x8 +#define BCM2835_BOARD_REV_A_9 0x9 +#define BCM2835_BOARD_REV_B_REV2_d 0xd +#define BCM2835_BOARD_REV_B_REV2_e 0xe +#define BCM2835_BOARD_REV_B_REV2_f 0xf +#define BCM2835_BOARD_REV_B_PLUS 0x10 +#define BCM2835_BOARD_REV_CM 0x11 + +struct bcm2835_mbox_tag_get_board_rev { + struct bcm2835_mbox_tag_hdr tag_hdr; + union { + struct { + } req; + struct { + u32 rev; + } resp; + } body; +}; + #define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003 struct bcm2835_mbox_tag_get_mac_address { diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c index 7445f5318ad2..aaded88b4ba0 100644 --- a/board/raspberrypi/rpi_b/rpi_b.c +++ b/board/raspberrypi/rpi_b/rpi_b.c @@ -42,6 +42,12 @@ struct msg_get_arm_mem { u32 end_tag; }; +struct msg_get_board_rev { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_get_board_rev get_board_rev; + u32 end_tag; +}; + struct msg_get_mac_address { struct bcm2835_mbox_hdr hdr; struct bcm2835_mbox_tag_get_mac_address get_mac_address; @@ -60,6 +66,67 @@ struct msg_get_clock_rate { u32 end_tag; }; +/* See comments in mbox.h for data source */ +static const struct { + const char *name; + const char *fdtfile; +} models[] = { + [BCM2835_BOARD_REV_B_I2C0_2] = { + "Model B (no P5)", + "bcm2835-rpi-b-i2c0.dtb", + }, + [BCM2835_BOARD_REV_B_I2C0_3] = { + "Model B (no P5)", + "bcm2835-rpi-b-i2c0.dtb", + }, + [BCM2835_BOARD_REV_B_I2C1_4] = { + "Model B", + "bcm2835-rpi-b.dtb", + }, + [BCM2835_BOARD_REV_B_I2C1_5] = { + "Model B", + "bcm2835-rpi-b.dtb", + }, + [BCM2835_BOARD_REV_B_I2C1_6] = { + "Model B", + "bcm2835-rpi-b.dtb", + }, + [BCM2835_BOARD_REV_A_7] = { + "Model A", + "bcm2835-rpi-a.dtb", + }, + [BCM2835_BOARD_REV_A_8] = { + "Model A", + "bcm2835-rpi-a.dtb", + }, + [BCM2835_BOARD_REV_A_9] = { + "Model A", + "bcm2835-rpi-a.dtb", + }, + [BCM2835_BOARD_REV_B_REV2_d] = { + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", + }, + [BCM2835_BOARD_REV_B_REV2_e] = { + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", + }, + [BCM2835_BOARD_REV_B_REV2_f] = { + "Model B rev2", + "bcm2835-rpi-b-rev2.dtb", + }, + [BCM2835_BOARD_REV_B_PLUS] = { + "Model B+", + "bcm2835-rpi-b-plus.dtb", + }, + [BCM2835_BOARD_REV_CM] = { + "Compute Module", + "bcm2835-rpi-cm.dtb", + }, +}; + +u32 rpi_board_rev = 0; + int dram_init(void) { ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16); @@ -79,13 +146,27 @@ int dram_init(void) return 0; } -int misc_init_r(void) +static void set_fdtfile(void) +{ + const char *fdtfile; + + if (getenv("fdtfile")) + return; + + fdtfile = models[rpi_board_rev].fdtfile; + if (!fdtfile) + fdtfile = "bcm2835-rpi-other.dtb"; + + setenv("fdtfile", fdtfile); +} + +static void set_usbethaddr(void) { ALLOC_ALIGN_BUFFER(struct msg_get_mac_address, msg, 1, 16); int ret; if (getenv("usbethaddr")) - return 0; + return; BCM2835_MBOX_INIT_HDR(msg); BCM2835_MBOX_INIT_TAG(&msg->get_mac_address, GET_MAC_ADDRESS); @@ -94,11 +175,18 @@ int misc_init_r(void) if (ret) { printf("bcm2835: Could not query MAC address\n"); /* Ignore error; not critical */ - return 0; + return; } eth_setenv_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac); + return; +} + +int misc_init_r(void) +{ + set_fdtfile(); + set_usbethaddr(); return 0; } @@ -126,8 +214,36 @@ static int power_on_module(u32 module) return 0; } +static void get_board_rev(void) +{ + ALLOC_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1, 16); + int ret; + const char *name; + + BCM2835_MBOX_INIT_HDR(msg); + BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV); + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); + if (ret) { + printf("bcm2835: Could not query board revision\n"); + /* Ignore error; not critical */ + return; + } + + rpi_board_rev = msg->get_board_rev.body.resp.rev; + if (rpi_board_rev >= ARRAY_SIZE(models)) + rpi_board_rev = 0; + + name = models[rpi_board_rev].name; + if (!name) + name = "Unknown model"; + printf("RPI model: %s\n", name); +} + int board_init(void) { + get_board_rev(); + gd->bd->bi_boot_params = 0x100; return power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD); diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h index 7bf2bfe09a0b..841169cb6c97 100644 --- a/include/configs/rpi_b.h +++ b/include/configs/rpi_b.h @@ -176,7 +176,6 @@ "pxefile_addr_r=0x00100000\0" \ "kernel_addr_r=0x01000000\0" \ "fdt_addr_r=0x02000000\0" \ - "fdtfile=bcm2835-rpi-b.dtb\0" \ "ramdisk_addr_r=0x02100000\0" \ #define BOOT_TARGET_DEVICES(func) \ -- 1.9.1

4 8

[U-Boot] [PATCH v2 00/40] ARM: tegra: Add PCIe support
by Thierry Reding 15 Jul '15

15 Jul '15

From: Thierry Reding <treding(a)nvidia.com> This series adds PCIe support for Tegra20, Tegra30 and Tegra124. The size is mostly due to the large number of infrastructure that's added (libfdt, Tegra specific drivers required by the PCIe driver). In this version I've included all patches that were previously split into three separate series. Spreading them over multiple series is probably not worth it since there might be some dependencies between them and only the end result gives a completely working setup. Patch 1 adds a %pa modifier to printf() to print physical addresses. This is required to allow code to output such addresses irrespective of whether a 64 bit or 32 bit architecture is built for. Patches 2-7 add various FDT helpers to make it easier to parse complex device trees. Patch 8 is a minor cleanup to the PCI command that prevents a spew of error messages if a bus does not exist. Patch 9 modifies the PCI enumeration code to honor theh restrictions encoded within a host controller driver's pci_ski_dev() implementation. This is required to prevent exceptions from the NVIDIA Tegra PCIe controller. Patch 10 imports the pr_fmt() macro used within the Linux kernel to reduce the number of characters consumed by literal strings by allowing a source file to specify a prefix or suffix that should be applied to all format strings in the file. It is currently used by the debug() and error() macros. Patches 11-14 are some cleanup and refactoring of I2C core code, the addition of a higher level API that makes it easier for I2C client drivers to talk to devices. The Tegra I2C driver now implements i2c_get_bus_num_fdt() to obtain bus numbers corresponding to a DT node. Patch 15 implements a driver for the AS3722 PMIC used on the Venice2 and Jetson TK1 boards. Patches 16-21 are preparatory work for the Tegra PCIe controller. They add missing clock driver functionality as well as drivers for the Tegra powergate and XUSB pad controller blocks. Patch 22 adds the PCIe controller driver for Tegra20, Tegra30 and Tegra124. Device tree nodes and configurations options to enable PCIe on the TrimSlice (Tegra20), Beaver, Cardhu (Tegra30) and Jetson TK1 (Tegra124) boards are added in patches 23-31. Patches 32-35 implement non-cached memory support that will be used in the last batch of patches to implement more reliable packet transfers in the r8169 driver. Patch 36 enables non-cached memory support on Tegra. Finally, patches 37-40 implement non-cached memory support and various fixes in the r8169 driver and add support for the revision of the NIC found on the Jetson TK1. The above boards all have an ethernet NIC connected to PCIe, which is what I tested with. Thierry Reding (40): vsprintf: Add modifier for phys_addr_t fdt: Add a function to count strings fdt: Add a function to get the index of a string fdt: Add functions to retrieve strings fdt: Add resource parsing functions fdt: Add a function to return PCI BDF triplet fdt: Add a subnodes iterator macro pci: Abort early if bus does not exist pci: Honour pci_skip_dev() Add pr_fmt() macro i2c: Initialize the correct bus i2c: Refactor adapter initialization i2c: Add high-level API i2c: tegra: Implement i2c_get_bus_num_fdt() power: Add AMS AS3722 PMIC support ARM: tegra: Implement tegra_plle_enable() ARM: tegra: Provide PCIEXCLK reset ID ARM: tegra: Implement powergate support ARM: tegra: Implement XUSB pad controller ARM: tegra: Add XUSB pad controller on Tegra124 ARM: tegra: Enable XUSB pad controller on Jetson TK1 pci: tegra: Add Tegra PCIe driver ARM: tegra: Add Tegra20 PCIe device tree node ARM: tegra: Enable PCIe on TrimSlice ARM: tegra: Add GIC for Tegra30 ARM: tegra: Add Tegra30 PCIe device tree node ARM: tegra: Enable PCIe on Cardhu ARM: tegra: Enable PCIe on Beaver ARM: tegra: Add GIC for Tegra124 ARM: tegra: Add Tegra124 PCIe device tree node ARM: tegra: Enable PCIe on Jetson TK1 ARM: cache_v7: Various minor cleanups ARM: cache-cp15: Use more accurate types malloc: Output region when debugging ARM: Implement non-cached memory support ARM: tegra: Enable non-cached memory net: rtl8169: Honor CONFIG_SYS_RX_ETH_BUFFER net: rtl8169: Properly align buffers net: rtl8169: Use non-cached memory if available net: rtl8169: Add support for RTL-8168/8111g README | 19 + arch/arm/cpu/armv7/cache_v7.c | 14 +- arch/arm/cpu/tegra-common/Makefile | 2 + arch/arm/cpu/tegra-common/powergate.c | 102 ++ arch/arm/cpu/tegra-common/xusb-padctl.c | 39 + arch/arm/cpu/tegra124-common/Makefile | 1 + arch/arm/cpu/tegra124-common/clock.c | 109 +++ arch/arm/cpu/tegra124-common/xusb-padctl.c | 716 ++++++++++++++ arch/arm/cpu/tegra20-common/clock.c | 141 ++- arch/arm/cpu/tegra30-common/clock.c | 155 +++ arch/arm/dts/tegra124-jetson-tk1.dts | 373 +++++++ arch/arm/dts/tegra124.dtsi | 90 ++ arch/arm/dts/tegra20-trimslice.dts | 69 ++ arch/arm/dts/tegra20.dtsi | 60 ++ arch/arm/dts/tegra30-beaver.dts | 245 +++++ arch/arm/dts/tegra30-cardhu.dts | 362 +++++++ arch/arm/dts/tegra30.dtsi | 84 ++ arch/arm/include/asm/arch-tegra/powergate.h | 38 + arch/arm/include/asm/arch-tegra/xusb-padctl.h | 24 + arch/arm/include/asm/arch-tegra114/powergate.h | 6 + arch/arm/include/asm/arch-tegra124/clock.h | 2 + arch/arm/include/asm/arch-tegra124/powergate.h | 6 + arch/arm/include/asm/arch-tegra20/clock-tables.h | 2 +- arch/arm/include/asm/arch-tegra20/clock.h | 2 + arch/arm/include/asm/arch-tegra20/powergate.h | 6 + arch/arm/include/asm/arch-tegra30/clock.h | 2 + arch/arm/include/asm/arch-tegra30/powergate.h | 6 + arch/arm/include/asm/system.h | 7 +- arch/arm/lib/cache-cp15.c | 6 +- arch/arm/lib/cache.c | 42 + board/compulab/trimslice/trimslice.c | 8 + board/nvidia/cardhu/cardhu.c | 56 ++ board/nvidia/common/board.c | 3 + board/nvidia/jetson-tk1/jetson-tk1.c | 52 + common/board_r.c | 11 + common/cmd_pci.c | 7 + common/dlmalloc.c | 3 + drivers/i2c/i2c_core.c | 80 +- drivers/i2c/tegra_i2c.c | 13 + drivers/net/rtl8169.c | 127 ++- drivers/pci/Makefile | 1 + drivers/pci/pci.c | 3 + drivers/pci/pci_tegra.c | 1143 ++++++++++++++++++++++ drivers/power/Makefile | 1 + drivers/power/as3722.c | 300 ++++++ include/common.h | 14 +- include/configs/beaver.h | 10 + include/configs/cardhu.h | 10 + include/configs/jetson-tk1.h | 13 + include/configs/tegra-common.h | 1 + include/configs/trimslice.h | 10 + include/dt-bindings/clock/tegra124-car.h | 341 +++++++ include/dt-bindings/clock/tegra20-car.h | 158 +++ include/dt-bindings/clock/tegra30-car.h | 265 +++++ include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h | 7 + include/fdtdec.h | 69 ++ include/i2c.h | 96 ++ include/libfdt.h | 72 ++ include/pci.h | 1 + include/power/as3722.h | 27 + lib/fdtdec.c | 76 ++ lib/libfdt/fdt_ro.c | 76 ++ lib/vsprintf.c | 16 +- 63 files changed, 5736 insertions(+), 64 deletions(-) create mode 100644 arch/arm/cpu/tegra-common/powergate.c create mode 100644 arch/arm/cpu/tegra-common/xusb-padctl.c create mode 100644 arch/arm/cpu/tegra124-common/xusb-padctl.c create mode 100644 arch/arm/include/asm/arch-tegra/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra/xusb-padctl.h create mode 100644 arch/arm/include/asm/arch-tegra114/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra124/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra20/powergate.h create mode 100644 arch/arm/include/asm/arch-tegra30/powergate.h create mode 100644 drivers/pci/pci_tegra.c create mode 100644 drivers/power/as3722.c create mode 100644 include/dt-bindings/clock/tegra124-car.h create mode 100644 include/dt-bindings/clock/tegra20-car.h create mode 100644 include/dt-bindings/clock/tegra30-car.h create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h create mode 100644 include/power/as3722.h -- 2.0.4

7 103

[U-Boot] [PATCH v10 02/14] patman: Fix indentation in terminal.py
by Simon Glass 14 Jul '15

14 Jul '15

This code came from a different project with 2-character indentation. Fix it for U-Boot. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - Add new patch to fix indentation in teminal.py Changes in v5: None tools/patman/terminal.py | 108 ++++++++++++++++++++++++----------------------- 1 file changed, 55 insertions(+), 53 deletions(-) diff --git a/tools/patman/terminal.py b/tools/patman/terminal.py index 597d526..11f80d8 100644 --- a/tools/patman/terminal.py +++ b/tools/patman/terminal.py @@ -15,66 +15,68 @@ import sys COLOR_IF_TERMINAL, COLOR_ALWAYS, COLOR_NEVER = range(3) class Color(object): - """Conditionally wraps text in ANSI color escape sequences.""" - BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8) - BOLD = -1 - BRIGHT_START = '\033[1;%dm' - NORMAL_START = '\033[22;%dm' - BOLD_START = '\033[1m' - RESET = '\033[0m' + """Conditionally wraps text in ANSI color escape sequences.""" + BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8) + BOLD = -1 + BRIGHT_START = '\033[1;%dm' + NORMAL_START = '\033[22;%dm' + BOLD_START = '\033[1m' + RESET = '\033[0m' - def __init__(self, colored=COLOR_IF_TERMINAL): - """Create a new Color object, optionally disabling color output. + def __init__(self, colored=COLOR_IF_TERMINAL): + """Create a new Color object, optionally disabling color output. - Args: - enabled: True if color output should be enabled. If False then this - class will not add color codes at all. - """ - self._enabled = (colored == COLOR_ALWAYS or - (colored == COLOR_IF_TERMINAL and os.isatty(sys.stdout.fileno()))) + Args: + enabled: True if color output should be enabled. If False then this + class will not add color codes at all. + """ + self._enabled = (colored == COLOR_ALWAYS or + (colored == COLOR_IF_TERMINAL and os.isatty(sys.stdout.fileno()))) - def Start(self, color, bright=True): - """Returns a start color code. + def Start(self, color, bright=True): + """Returns a start color code. - Args: - color: Color to use, .e.g BLACK, RED, etc. + Args: + color: Color to use, .e.g BLACK, RED, etc. - Returns: - If color is enabled, returns an ANSI sequence to start the given color, - otherwise returns empty string - """ - if self._enabled: - base = self.BRIGHT_START if bright else self.NORMAL_START - return base % (color + 30) - return '' + Returns: + If color is enabled, returns an ANSI sequence to start the given + color, otherwise returns empty string + """ + if self._enabled: + base = self.BRIGHT_START if bright else self.NORMAL_START + return base % (color + 30) + return '' - def Stop(self): - """Retruns a stop color code. + def Stop(self): + """Retruns a stop color code. - Returns: - If color is enabled, returns an ANSI color reset sequence, otherwise - returns empty string - """ - if self._enabled: - return self.RESET - return '' + Returns: + If color is enabled, returns an ANSI color reset sequence, + otherwise returns empty string + """ + if self._enabled: + return self.RESET + return '' - def Color(self, color, text, bright=True): - """Returns text with conditionally added color escape sequences. + def Color(self, color, text, bright=True): + """Returns text with conditionally added color escape sequences. - Keyword arguments: - color: Text color -- one of the color constants defined in this class. - text: The text to color. + Keyword arguments: + color: Text color -- one of the color constants defined in this + class. + text: The text to color. - Returns: - If self._enabled is False, returns the original text. If it's True, - returns text with color escape sequences based on the value of color. - """ - if not self._enabled: - return text - if color == self.BOLD: - start = self.BOLD_START - else: - base = self.BRIGHT_START if bright else self.NORMAL_START - start = base % (color + 30) - return start + text + self.RESET + Returns: + If self._enabled is False, returns the original text. If it's True, + returns text with color escape sequences based on the value of + color. + """ + if not self._enabled: + return text + if color == self.BOLD: + start = self.BOLD_START + else: + base = self.BRIGHT_START if bright else self.NORMAL_START + start = base % (color + 30) + return start + text + self.RESET -- 2.1.0.rc2.206.gedb03e5

6 42

[U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support
by Stefan Roese 15 May '15

15 May '15

Hi! So this is my 3rd posting regarding the Candence SPI driver on SoCFPGA. The current status is, that SPI NOR flash works now without problems. And dcache is still enabled. The previous disabling was not needed. And only caused problems while booting into Linux. No cache flush or invalidate is needed. As no DMA engine is involved in this transfer. The "solution" I used to get SPI NOR flash support working now is implemented in patch 0004 (still marked as RFC). Here a software reset is issued on the Micron N25Q256A SPI NOR flash. This seems to solve all problems and reading / writing to the SPI NOR flash seems to work now just fine. Even rebooting via pushbutton-reset or reset command works. I think this version is now in much better state. Thats why I removed the WIP from the subject lines. Again, this is tested on the EBV SoCrates eval board. Thanks, Stefan Cc: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)altera.com> Cc: Vince Bridgers <vbridger(a)altera.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Pavel Machek <pavel(a)denx.de> Cc: Michael Trimarchi <michael(a)amarulasolutions.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com>

5 45

[U-Boot] [PATCH V2] sf: Add support for flag status register on Micron chips
by Hou Zhiqiang 09 May '15

09 May '15

Enter 3 Byte address mode at first, because it may change to 4 Byte address mode in kernel driver and not reset to 3 Byte address mode after reboot. Add clear flag status register operation that some Micron SPI flash chips required after reading the flag status register to check some operations completion. Signed-off-by: Hou Zhiqiang <B48286(a)freescale.com> Signed-off-by: Mingkai.Hu <Mingkai.Hu(a)freescale.com> --- V1: Based on git://git.denx.de/u-boot.git. Also can be applied to git://www.denx.de/git/u-boot-mpc85xx.git. Tested on board T2080QDS and T2080RDB. V2: Add the operation of enter 3 Byte address mode in probe. drivers/mtd/spi/sf_internal.h | 17 ++++++++++++ drivers/mtd/spi/sf_ops.c | 64 +++++++++++++++++++++++++++++++++++++------ drivers/mtd/spi/sf_probe.c | 5 ++++ 3 files changed, 78 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 19d4914..49e5a2c 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -36,6 +36,11 @@ #define CMD_WRITE_ENABLE 0x06 #define CMD_READ_CONFIG 0x35 #define CMD_FLAG_STATUS 0x70 +#define CMD_CLEAR_FLAG_STATUS 0x50 + +/* Used for Macronix and Winbond flashes */ +#define CMD_ENTER_4B_ADDR 0xB7 +#define CMD_EXIT_4B_ADDR 0xE9 /* Read commands */ #define CMD_READ_ARRAY_SLOW 0x03 @@ -59,6 +64,8 @@ #define STATUS_QEB_WINSPAN (1 << 1) #define STATUS_QEB_MXIC (1 << 6) #define STATUS_PEC (1 << 7) +#define STATUS_PROT (1 << 1) +#define STATUS_ERASE (1 << 5) #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN #define STATUS_SRWD (1 << 7) /* SR write protect */ @@ -124,6 +131,12 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0); } +/* Clear flag status register */ +static inline int spi_flash_cmd_clear_flag_status(struct spi_flash *flash) +{ + return spi_flash_cmd(flash->spi, CMD_CLEAR_FLAG_STATUS, NULL, 0); +} + /* * Send the read status command to the device and wait for the wip * (write-in-progress) bit to clear itself. @@ -160,4 +173,8 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, size_t len, void *data); +#if defined(CONFIG_SPI_FLASH_STMICRO) +int spi_flash_cmd_4B_addr_switch(struct spi_flash *flash, int enable); +#endif + #endif /* _SF_INTERNAL_H_ */ diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 85cf22d..8a532b8 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -93,6 +93,30 @@ int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc) } #endif +#if defined(CONFIG_SPI_FLASH_STMICRO) +int spi_flash_cmd_4B_addr_switch(struct spi_flash *flash, int enable) +{ + int ret; + u8 cmd; + + cmd = enable ? CMD_ENTER_4B_ADDR : CMD_EXIT_4B_ADDR; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: unable to claim SPI bus\n"); + return ret; + } + + ret = spi_flash_cmd_write_enable(flash); + if (ret < 0) { + debug("SF: enabling write failed\n"); + return ret; + } + + return spi_flash_cmd(flash->spi, cmd, NULL, 0); +} +#endif + #ifdef CONFIG_SPI_FLASH_BAR static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) { @@ -160,6 +184,7 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) unsigned long timebase; unsigned long flags = SPI_XFER_BEGIN; int ret; + int out_of_time = 1; u8 status; u8 check_status = 0x0; u8 poll_bit = STATUS_WIP; @@ -186,22 +211,45 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) WATCHDOG_RESET(); ret = spi_xfer(spi, 8, NULL, &status, 0); - if (ret) + if (ret) { + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); return -1; + } - if ((status & poll_bit) == check_status) + if ((status & poll_bit) == check_status) { + out_of_time = 0; break; + } } while (get_timer(timebase) < timeout); spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); - if ((status & poll_bit) == check_status) - return 0; + if (out_of_time) { + /* Timed out */ + debug("SF: time out!\n"); + if (cmd == CMD_FLAG_STATUS) { + if (spi_flash_cmd_clear_flag_status(flash) < 0) + debug("SF: clear flag status failed\n"); + } + ret = -1; + } +#ifdef CONFIG_SPI_FLASH_STMICRO + else if (cmd == CMD_FLAG_STATUS) { + if (!(status & (STATUS_PROT | STATUS_ERASE))) { + ret = 0; + } else { + debug("SF: flag status error"); + ret = -1; + } - /* Timed out */ - debug("SF: time out!\n"); - return -1; + if (spi_flash_cmd_clear_flag_status(flash) < 0) { + debug("SF: clear flag status failed\n"); + ret = -1; + } + } +#endif + return ret; } int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, @@ -234,7 +282,7 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, ret = spi_flash_cmd_wait_ready(flash, timeout); if (ret < 0) { - debug("SF: write %s timed out\n", + debug("SF: write %s failed\n", timeout == SPI_FLASH_PROG_TIMEOUT ? "program" : "page erase"); return ret; diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 4d148d1..79b876d 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -221,6 +221,11 @@ static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, #ifdef CONFIG_SPI_FLASH_STMICRO if (params->flags & E_FSR) flash->poll_cmd = CMD_FLAG_STATUS; + + if (flash->size > SPI_FLASH_16MB_BOUN) { + if (spi_flash_cmd_4B_addr_switch(flash, 0) < 0) + debug("SF: enter 3B address mode failed\n"); + } #endif /* Configure the BAR - discover bank cmds and read current bank */ -- 2.1.0.27.g96db324

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