November 2014 - U-Boot

[U-Boot] [PATCH] arm: imx: make bmode command work with SPL/U-Boot combo
by Nikita Kiryanov 12 Nov '14

12 Nov '14

The bmode command forces the SoC to use a specific boot device by writing its boot mode into SRC_GPR9, and notifying the SoC of the change using SRC_GPR10[28] bit: if the bit is on, bootROM uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine the boot device. SPL on the other hand is oblivious to this distinction, so once the bootROM loads SPL from the device configured in SRC_GPR10, SPL will attempt to load U-Boot from the device configured in SRC_SMBR1, which is not updated by the bootROM to the value in SRC_GPR9. The result is that the selected boot device is not used across all the boot stages. Update spl_boot_device() to look at gpr9 when necessary. Signed-off-by: Nikita Kiryanov <nikita(a)compulab.co.il> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Troy Kisky <troy.kisky(a)boundarydevices.com> Cc: Tim Harvey <tharvey(a)gateworks.com> Cc: Eric Nelson <eric.nelson(a)boundarydevices.com> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> Cc: Heiko Schocher <hs(a)denx.de> --- arch/arm/cpu/armv7/mx6/soc.c | 4 ++-- arch/arm/imx-common/spl.c | 5 +++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index dd5aaa2..07ae79e 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -333,8 +333,8 @@ void boot_mode_apply(unsigned cfg_val) /* * cfg_val will be used for * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0] - * After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0] - * to SBMR1, which will determine the boot device. + * After reset, if GPR10[28] is 1, ROM will use GPR9[25:0] + * instead of SBMR1 to determine the boot device. */ const struct boot_mode soc_boot_modes[] = { {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 9d3c31a..477c38c 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -14,11 +14,12 @@ #include <spl.h> #if defined(CONFIG_MX6) -/* determine boot device from SRC_SBMR1 register (BOOT_CFG[4:1]) */ +/* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned reg = readl(&psrc->sbmr1); + unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28); + unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1); /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ switch ((reg & 0x000000FF) >> 4) { -- 1.9.1

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[U-Boot] [PATCH 0/39] x86: Add support for running on bare hardware
by Simon Glass 12 Nov '14

12 Nov '14

At present U-Boot's x86 support requires Coreboot to run first, starting up the CPU and then setting up SDRAM and video among other tasks. U-Boot then runs as a payload. Notably U-Boot does not handle the ACPI fun on x86 where the kernel can call back into the 'BIOS' to perform certain tasks. This Coreboot + U-Boot method is used for link (Chromebook Pixel) and it works fairly well. However this does not remove the need for all x86-specific init in U-Boot. For each generation of chipset we need to adjust U-Boot to make it work, albeit sometimes not a lot. In any case this work has not been done so the x86 port risks being stranded. There are also a few disadvantages to using two separate boot loaders. When Coreboot decides not set to up the video card, it is not possible for U-Boot to go back and do this. Building an image which has both boot loaders in itis a little tricky, particularly with the binary blobs that are required. After some experimentation prompted by a discussion at ELCE, it was found that while x86 is somewhat different to most of the other architectures that U-Boot supports, it actually fits the model fairly well. There is nothing magic about getting the platform running. Also it turns out that x86 likes running before relocation with no DRAM, using global_data, relocating and then starting up the full U-Boot, all within the same image (Coreboot splits this into three programs which run one after the other). Perhaps this is because U-Boot was conceived before the more modern SoCs with SRAM, FAT file system code in the ROM, etc. This series contains a basic port of U-Boot to a bare x86 environment. It would be targeted at some generally available board, such as the Minnowmax, except that it doesn't seem to be generally available, at least for me. So while that remains a goal, for now the port targets link. It is already supported in U-Boot and the platform is well understood. The following are implemented in this series: - ivybridge support with some peripherals enabled - SDRAM init using a binary blob (Memory Reference Code) - Use of Intel Management Engine via another binary blob - microcode update from device tree - ifttool for creating ROMs of the required format (u-boot.rom) - GPIO Notably missing are: - PCI device support (USB, SATA) - Video support - MTRR setup (for performance) - Real time clock - Chrome OS EC - Documentation - Links to binary blobs These will be addressed in a follow-up series. Things like ACPI and SMI will come later. Unfortunately this series is quite long as it includes basic infrastructure needed on x86. But it is a solid step forward: with this series, link boots to a prompt. This series is available at u-boot-x86/working Simon Glass (39): Move early malloc() to before arch_cpu_init() fdt: Add a function to decode a variable-sized u32 array dm: serial: Move current serial port pointer to global_data dm: gpio: Add a function to read an ID from a list of GPIOs x86: Add ifdtool for working with Intel Flash Descriptor ROM images x86: config: Move common x86 configs to a common file x86: Add processor functions for cpuid and stack pointer x86: Remove REALMODE_BASE which is no longer used x86: Remove board_init16() call which is not used x86: Remove unused early_board_init() call x86: Invalidate TLB as early as possible x86: Tidy up global descriptor table setup x86: Use the standard dram_init() function x86: Use the standard arch_cpu_init() function x86: Remove unnecessary find_fdt() function x86: Fix up some missing prototypes x86: Add chromebook_link board x86: Save the BIST value on reset x86: Build a .rom file which can be flashed to an x86 machine x86: Emit post codes in startup code x86: chromebook_link: Implement CAR support (cache as RAM) x86: Move Coreboot PCI into common cpu area x86: Refactor PCI to permit alternate init x86: ivybridge: Enable PCI in early init x86: pci: Allow configuration before relocation x86: ivybridge: Add early LPC init so that serial works x86: Tidy up coreboot header usage x86: Add clr/setbits functions x86: Add msr read/write functions that use a structure x86: ivybridge: Perform initial CPU setup x86: ivybridge: Check BIST value on boot x86: ivybridge: Perform Intel microcode update on boot RFC: x86: dts: Add microcode updates for ivybridge CPU x86: ivybridge: Add early init for PCH devices x86: ivybridge: Add support for early GPIO init x86: chromebook_link: Enable GPIO support x86: Make show_boot_progress() common x86: ivybridge: Add LAPIC support x86: ivybridge: Implement SDRAM init Makefile | 32 +- arch/x86/Kconfig | 54 ++ arch/x86/config.mk | 1 - arch/x86/cpu/Makefile | 1 + arch/x86/cpu/coreboot/Makefile | 1 - arch/x86/cpu/coreboot/coreboot.c | 44 +- arch/x86/cpu/coreboot/ipchecksum.c | 2 +- arch/x86/cpu/coreboot/pci.c | 49 - arch/x86/cpu/coreboot/sdram.c | 15 +- arch/x86/cpu/coreboot/tables.c | 6 +- arch/x86/cpu/cpu.c | 60 +- arch/x86/cpu/interrupts.c | 2 +- arch/x86/cpu/ivybridge/Kconfig | 157 ++++ arch/x86/cpu/ivybridge/Makefile | 15 + arch/x86/cpu/ivybridge/car.S | 174 ++++ arch/x86/cpu/ivybridge/cpu.c | 356 +++++++ arch/x86/cpu/ivybridge/early_init.c | 145 +++ arch/x86/cpu/ivybridge/early_me.c | 191 ++++ arch/x86/cpu/ivybridge/lpc.c | 48 + arch/x86/cpu/ivybridge/me_status.c | 195 ++++ arch/x86/cpu/ivybridge/microcode_intel.c | 150 +++ arch/x86/cpu/ivybridge/report_platform.c | 98 ++ arch/x86/cpu/ivybridge/sdram.c | 571 +++++++++++ arch/x86/cpu/pci.c | 150 +++ arch/x86/cpu/start.S | 66 +- arch/x86/cpu/start16.S | 18 +- arch/x86/dts/Makefile | 1 + arch/x86/dts/chromebook_link.dts | 1 + arch/x86/dts/link.dts | 127 ++- arch/x86/dts/m12206a7_00000028.dtsi | 622 ++++++++++++ arch/x86/dts/m12306a9_00000017.dtsi | 750 +++++++++++++++ arch/x86/include/asm/arch-coreboot/gpio.h | 5 - arch/x86/include/asm/arch-ivybridge/gpio.h | 10 + arch/x86/include/asm/arch-ivybridge/me.h | 357 +++++++ arch/x86/include/asm/arch-ivybridge/microcode.h | 20 + arch/x86/include/asm/arch-ivybridge/model_206ax.h | 82 ++ arch/x86/include/asm/arch-ivybridge/pch.h | 356 +++++++ arch/x86/include/asm/arch-ivybridge/pei_data.h | 121 +++ arch/x86/include/asm/arch-ivybridge/sandybridge.h | 109 +++ arch/x86/include/asm/config.h | 1 + arch/x86/include/asm/global_data.h | 24 + arch/x86/include/asm/gpio.h | 142 ++- arch/x86/include/asm/init_helpers.h | 1 - arch/x86/include/asm/io.h | 49 + arch/x86/include/asm/lapic.h | 59 ++ arch/x86/include/asm/lapic_def.h | 101 ++ arch/x86/include/asm/msr.h | 19 + arch/x86/include/asm/mtrr.h | 121 +++ arch/x86/include/asm/pci.h | 13 + arch/x86/include/asm/post.h | 50 + arch/x86/include/asm/processor.h | 135 +++ arch/x86/include/asm/u-boot-x86.h | 19 +- arch/x86/lib/Makefile | 1 + arch/x86/lib/ramtest.c | 79 ++ board/chromebook-x86/coreboot/Makefile | 2 +- board/chromebook-x86/coreboot/coreboot_start.S | 13 - board/google/chromebook_link/Kconfig | 31 + board/google/chromebook_link/MAINTAINERS | 6 + board/google/chromebook_link/Makefile | 15 + board/google/chromebook_link/link.c | 124 +++ common/board_f.c | 14 +- configs/chromebook_link_defconfig | 10 + doc/device-tree-bindings/misc/intel-lpc.txt | 23 + drivers/gpio/gpio-uclass.c | 19 + drivers/gpio/intel_ich6_gpio.c | 79 +- drivers/serial/serial-uclass.c | 35 +- include/asm-generic/global_data.h | 1 + include/asm-generic/gpio.h | 11 +- include/configs/chromebook_link.h | 68 ++ include/configs/coreboot.h | 289 +----- include/configs/x86-common.h | 272 ++++++ include/fdtdec.h | 18 + lib/asm-offsets.c | 3 + lib/fdtdec.c | 22 + tools/Makefile | 2 + tools/ifdtool.c | 1039 +++++++++++++++++++++ tools/ifdtool.h | 88 ++ 77 files changed, 7690 insertions(+), 470 deletions(-) delete mode 100644 arch/x86/cpu/coreboot/pci.c create mode 100644 arch/x86/cpu/ivybridge/Kconfig create mode 100644 arch/x86/cpu/ivybridge/Makefile create mode 100644 arch/x86/cpu/ivybridge/car.S create mode 100644 arch/x86/cpu/ivybridge/cpu.c create mode 100644 arch/x86/cpu/ivybridge/early_init.c create mode 100644 arch/x86/cpu/ivybridge/early_me.c create mode 100644 arch/x86/cpu/ivybridge/lpc.c create mode 100644 arch/x86/cpu/ivybridge/me_status.c create mode 100644 arch/x86/cpu/ivybridge/microcode_intel.c create mode 100644 arch/x86/cpu/ivybridge/report_platform.c create mode 100644 arch/x86/cpu/ivybridge/sdram.c create mode 100644 arch/x86/cpu/pci.c create mode 120000 arch/x86/dts/chromebook_link.dts create mode 100644 arch/x86/dts/m12206a7_00000028.dtsi create mode 100644 arch/x86/dts/m12306a9_00000017.dtsi create mode 100644 arch/x86/include/asm/arch-ivybridge/gpio.h create mode 100644 arch/x86/include/asm/arch-ivybridge/me.h create mode 100644 arch/x86/include/asm/arch-ivybridge/microcode.h create mode 100644 arch/x86/include/asm/arch-ivybridge/model_206ax.h create mode 100644 arch/x86/include/asm/arch-ivybridge/pch.h create mode 100644 arch/x86/include/asm/arch-ivybridge/pei_data.h create mode 100644 arch/x86/include/asm/arch-ivybridge/sandybridge.h create mode 100644 arch/x86/include/asm/lapic.h create mode 100644 arch/x86/include/asm/lapic_def.h create mode 100644 arch/x86/include/asm/mtrr.h create mode 100644 arch/x86/include/asm/post.h create mode 100644 arch/x86/lib/ramtest.c delete mode 100644 board/chromebook-x86/coreboot/coreboot_start.S create mode 100644 board/google/chromebook_link/Kconfig create mode 100644 board/google/chromebook_link/MAINTAINERS create mode 100644 board/google/chromebook_link/Makefile create mode 100644 board/google/chromebook_link/link.c create mode 100644 configs/chromebook_link_defconfig create mode 100644 doc/device-tree-bindings/misc/intel-lpc.txt create mode 100644 include/configs/chromebook_link.h create mode 100644 include/configs/x86-common.h create mode 100644 tools/ifdtool.c create mode 100644 tools/ifdtool.h -- 2.1.0.rc2.206.gedb03e5

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[U-Boot] [PATCH] powerpc/t2080: updating rcw for silicon v1.1
by Shengzhou Liu 12 Nov '14

12 Nov '14

T2080 v1.1 requires different MEM_PLL_RAT from previous v1.0, and also update core frequency to 1.8GHz for v1.1. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- board/freescale/t208xqds/t2080_rcw.cfg | 9 +++++---- board/freescale/t208xrdb/t2080_rcw.cfg | 13 +++++++------ 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/board/freescale/t208xqds/t2080_rcw.cfg b/board/freescale/t208xqds/t2080_rcw.cfg index 972dedc..b593a2d 100644 --- a/board/freescale/t208xqds/t2080_rcw.cfg +++ b/board/freescale/t208xqds/t2080_rcw.cfg @@ -1,8 +1,9 @@ +#For T2080 silicon v1.1 on QDS board #PBL preamble and RCW header aa55aa55 010e0100 -#SerDes Protocol: 0x66_0x16 -#Core/DDR: 1533Mhz/2133MT/s -12100017 15000000 00000000 00000000 -66150002 00008400 e8104000 c1000000 +#SerDes Protocol: 0x66_0x15 +#Core:1800Mhz, DDR:1867MT/s +0c070012 0e000000 00000000 00000000 +66150002 00000000 e8104000 c1000000 00000000 00000000 00000000 000307fc 00000000 00000000 00000000 00000004 diff --git a/board/freescale/t208xrdb/t2080_rcw.cfg b/board/freescale/t208xrdb/t2080_rcw.cfg index 15e1bf4..700629a 100644 --- a/board/freescale/t208xrdb/t2080_rcw.cfg +++ b/board/freescale/t208xrdb/t2080_rcw.cfg @@ -1,8 +1,9 @@ -#PBL preamble and RCW header for T2080RDB +#For T2080 silicon v1.1 on RDB board +#PBL preamble and RCW header aa55aa55 010e0100 -#SerDes Protocol: 0x66_0x16 -#Core/DDR: 1533Mhz/1600MT/s -120c0017 15000000 00000000 00000000 -66150002 00008400 ec104000 c1000000 -00000000 00000000 00000000 000307fc +#SerDes Protocol: 0x66_0x15 +#Core:1800MHz, DDR:1600MT/s +1206001b 15000000 00000000 00000000 +66150002 00000000 e8104000 c1000000 +00800000 00000000 00000000 000307fc 00000000 00000000 00000000 00000004 -- 1.8.0

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[U-Boot] [PATCH v5 0/5] iMX6 SabreSD SPL Support
by John Tobias 12 Nov '14

12 Nov '14

This patch is for SPL support for iMX6 SabreSD. The said patches has been tested to work on SD2 and SD3 port of the said board. After applying the following patches, it will produces SPL and u-boot.img binary images. You should run the two commands below to store it in your SD or eMMC. sudo dd if=SPL of=/dev/xxx bs=1K seek=1; sync sudo dd if=u-boot.img of=/dev/xxx bs=1K seek=69 Changes (v2): Merged the SPL support into the main board file Remove the compilation warmings Changes (v3): Removed sp and gd Use imx_ddr_size to set the ram_size Changes (v4): Add a separate board configuration file to enable SPL (mx6sabresd_spl_defconfig). Mapped DCD data to mx6_mmdc_calibration, mx6dq_iomux_grp_regs, mx6dq_iomux_ddr_regs and mx6_ddr3_cfg data structures. Read 11 and 12 bits of BOOT_CFG register to actually determine the active mmc port. Changes (v5): Use the default CONFIG_SPL_STACK Add a macro #ifndef for CONFIG_SYS_TEXT_BASE to avoid compilation warning. John Tobias (5): kconfig: imx6: add SUPPORT_SPL imx6: add spl in the header file imx6: add spl config for mx6sabresd mmc: imx6: call spl_board_mmc_init imx6: SPL support for iMX6 SabreSD arch/arm/Kconfig | 1 + board/freescale/mx6sabresd/mx6sabresd.c | 187 +++++++++++++++++++++++++++++++- configs/mx6sabresd_spl_defconfig | 5 + drivers/mmc/mmc.c | 9 +- include/configs/mx6sabre_common.h | 2 + include/configs/mx6sabresd.h | 6 + include/mmc.h | 3 + 7 files changed, 208 insertions(+), 5 deletions(-) create mode 100644 configs/mx6sabresd_spl_defconfig -- 1.9.1

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[U-Boot] [PATCH] Revert "lib: bootm: add missing include"
by Michal Simek 11 Nov '14

11 Nov '14

This reverts commit 1e96220a5687efae2aed45ce56e143336c40d0a7. Remove duplicated vxworks.h header. The same change was done by "ARM: prevent compiler warnings from bootm.c" (sha1: 8d196e52b58d1e50a80c2f5067b201cda521c75c) Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/lib/bootm.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index cdb197510588..4949d573af8c 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -15,7 +15,6 @@ #include <common.h> #include <command.h> #include <image.h> -#include <vxworks.h> #include <u-boot/zlib.h> #include <asm/byteorder.h> #include <libfdt.h> -- 1.8.2.3

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[U-Boot] Pull request: u-boot-uniphier/master
by Masahiro YAMADA 11 Nov '14

11 Nov '14

Hi Tom, The following changes since commit 9906090f527153afddc5aa64d37cb5f89c6ee129: Prepare v2015.01-rc1 (2014-11-10 16:25:29 -0500) are available in the git repository at: git://git.denx.de/u-boot-uniphier.git master for you to fetch changes up to b67932e3e72b6214cde75c7e2f796d0c70ff3ffb: ARM: UniPhier: call pin_init() also in the normal boot (2014-11-12 00:31:01 +0900) ---------------------------------------------------------------- Masahiro Yamada (12): serial: UniPhier: borrow macros from linux/serial_reg.h ARM: UniPhier: reset on-board devices on start-up ARM: UniPhier: move DDR related configuration to Kconfig ARM: UniPhier: add EHCI host pin settings for PH1-Pro4 usb: add basic USB configs in Kconfig ARM: UniPhier: add MIO register file usb: UniPhier: add UniPhier on-chip EHCI host driver support ARM: UniPhier: enable USB features ARM: UniPhier: add set_pinsel macro for use in assembly code ARM: UniPhier: decrease pre-reloc malloc area size ARM: UniPhier: consolidate board_postclk_init() function ARM: UniPhier: call pin_init() also in the normal boot arch/arm/cpu/armv7/uniphier/Kconfig | 27 +++++++++++++++ arch/arm/cpu/armv7/uniphier/Makefile | 1 + arch/arm/cpu/armv7/uniphier/{ph1-ld4 => }/board_postclk_init.c | 11 +++++-- arch/arm/cpu/armv7/uniphier/dram_init.c | 2 +- arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile | 8 ++--- arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c | 13 ++++++++ arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c | 4 --- arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile | 7 ++-- arch/arm/cpu/armv7/uniphier/ph1-pro4/board_postclk_init.c | 39 ---------------------- arch/arm/cpu/armv7/uniphier/ph1-pro4/pinctrl.c | 7 ++++ arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c | 10 ++++++ arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c | 4 --- arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile | 8 ++--- arch/arm/cpu/armv7/uniphier/ph1-sld8/board_postclk_init.c | 1 - arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c | 13 ++++++++ arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c | 4 --- arch/arm/cpu/armv7/uniphier/reset.c | 3 -- arch/arm/include/asm/arch-uniphier/ehci-uniphier.h | 33 +++++++++++++++++++ arch/arm/include/asm/arch-uniphier/mio-regs.h | 20 ++++++++++++ arch/arm/include/asm/arch-uniphier/platdevice.h | 2 ++ arch/arm/include/asm/arch-uniphier/sg-regs.h | 13 +++++++- configs/ph1_ld4_defconfig | 3 ++ configs/ph1_pro4_defconfig | 3 ++ configs/ph1_sld8_defconfig | 3 ++ drivers/serial/serial_uniphier.c | 15 ++------- drivers/usb/Kconfig | 46 ++++++++++++++++++++++++++ drivers/usb/host/Kconfig | 56 ++++++++++++++++++++++++++++++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-uniphier.c | 39 ++++++++++++++++++++++ include/configs/ph1_ld4.h | 2 -- include/configs/ph1_pro4.h | 2 -- include/configs/ph1_sld8.h | 2 -- include/configs/uniphier-common.h | 13 ++++++-- 33 files changed, 321 insertions(+), 94 deletions(-) rename arch/arm/cpu/armv7/uniphier/{ph1-ld4 => }/board_postclk_init.c (82%) delete mode 100644 arch/arm/cpu/armv7/uniphier/ph1-pro4/board_postclk_init.c delete mode 100644 arch/arm/cpu/armv7/uniphier/ph1-sld8/board_postclk_init.c create mode 100644 arch/arm/include/asm/arch-uniphier/ehci-uniphier.h create mode 100644 arch/arm/include/asm/arch-uniphier/mio-regs.h create mode 100644 drivers/usb/host/Kconfig create mode 100644 drivers/usb/host/ehci-uniphier.c -- Best Regards Masahiro Yamada

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[U-Boot] [PATCH 1/2] sandbox: Fix warnings due to 64-bit printf() strings
by Simon Glass 11 Nov '14

11 Nov '14

Now that we have inttypes.h, use it in a few more places to avoid compiler warnings on sandbox when building on 64-bit machines. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- common/cmd_mem.c | 6 ++++-- common/fdt_support.c | 15 +++++++-------- disk/part_efi.c | 21 +++++++++++---------- 3 files changed, 22 insertions(+), 20 deletions(-) diff --git a/common/cmd_mem.c b/common/cmd_mem.c index 0d50dcf..bcb3ee3 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -19,6 +19,7 @@ #include <dataflash.h> #endif #include <hash.h> +#include <inttypes.h> #include <watchdog.h> #include <asm/io.h> #include <linux/compiler.h> @@ -338,7 +339,8 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (word1 != word2) { ulong offset = buf1 - base; #ifdef CONFIG_SYS_SUPPORT_64BIT_DATA - printf("%s at 0x%p (%#0*llx) != %s at 0x%p (%#0*llx)\n", + printf("%s at 0x%p (%#0*"PRIx64") != %s at 0x%p (%#0*" + PRIx64 ")\n", type, (void *)(addr1 + offset), size, word1, type, (void *)(addr2 + offset), size, word2); #else @@ -1146,7 +1148,7 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) printf(" %08x", *((u32 *)ptr)); #ifdef CONFIG_SYS_SUPPORT_64BIT_DATA else if (size == 8) - printf(" %016llx", *((u64 *)ptr)); + printf(" %016" PRIx64, *((u64 *)ptr)); #endif else if (size == 2) printf(" %04x", *((u16 *)ptr)); diff --git a/common/fdt_support.c b/common/fdt_support.c index 3f64156..9fe7383 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -8,6 +8,7 @@ */ #include <common.h> +#include <inttypes.h> #include <stdio_dev.h> #include <linux/ctype.h> #include <linux/types.h> @@ -930,8 +931,6 @@ void fdt_del_node_and_alias(void *blob, const char *alias) fdt_delprop(blob, off, alias); } -#define PRu64 "%llx" - /* Max address size we deal with */ #define OF_MAX_ADDR_CELLS 4 #define OF_BAD_ADDR ((u64)-1) @@ -994,8 +993,8 @@ static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range, s = of_read_number(range + na + pna, ns); da = of_read_number(addr, na); - debug("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n", - cp, s, da); + debug("OF: default map, cp=%" PRIu64 ", s=%" PRIu64 + ", da=%" PRIu64 "\n", cp, s, da); if (da < cp || da >= (cp + s)) return OF_BAD_ADDR; @@ -1073,7 +1072,7 @@ static int of_translate_one(void * blob, int parent, struct of_bus *bus, finish: of_dump_addr("OF: parent translation for:", addr, pna); - debug("OF: with offset: "PRu64"\n", offset); + debug("OF: with offset: %" PRIu64 "\n", offset); /* Translate it into parent bus space */ return pbus->translate(addr, offset, pna); @@ -1401,9 +1400,9 @@ int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr) dt_addr = fdt_translate_address(fdt, node, reg); if (addr != dt_addr) { - printf("Warning: U-Boot configured device %s at address %llx,\n" - " but the device tree has it address %llx.\n", - alias, addr, dt_addr); + printf("Warning: U-Boot configured device %s at address %" + PRIx64 ",\n but the device tree has it address %" + PRIx64 ".\n", alias, addr, dt_addr); return 0; } diff --git a/disk/part_efi.c b/disk/part_efi.c index 612f092..efed58f 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -14,6 +14,7 @@ #include <common.h> #include <command.h> #include <ide.h> +#include <inttypes.h> #include <malloc.h> #include <part_efi.h> #include <linux/ctype.h> @@ -553,28 +554,28 @@ static int is_gpt_valid(block_dev_desc_t *dev_desc, u64 lba, /* Check that the my_lba entry points to the LBA that contains the GPT */ if (le64_to_cpu(pgpt_head->my_lba) != lba) { - printf("GPT: my_lba incorrect: %llX != %llX\n", - le64_to_cpu(pgpt_head->my_lba), - lba); + printf("GPT: my_lba incorrect: %llX != %" PRIX64 "\n", + le64_to_cpu(pgpt_head->my_lba), + lba); return 0; } /* Check the first_usable_lba and last_usable_lba are within the disk. */ lastlba = (u64)dev_desc->lba; if (le64_to_cpu(pgpt_head->first_usable_lba) > lastlba) { - printf("GPT: first_usable_lba incorrect: %llX > %llX\n", - le64_to_cpu(pgpt_head->first_usable_lba), lastlba); + printf("GPT: first_usable_lba incorrect: %llX > %" PRIX64 "\n", + le64_to_cpu(pgpt_head->first_usable_lba), lastlba); return 0; } if (le64_to_cpu(pgpt_head->last_usable_lba) > lastlba) { - printf("GPT: last_usable_lba incorrect: %llX > %llX\n", - le64_to_cpu(pgpt_head->last_usable_lba), lastlba); + printf("GPT: last_usable_lba incorrect: %llX > %" PRIX64 "\n", + le64_to_cpu(pgpt_head->last_usable_lba), lastlba); return 0; } - debug("GPT: first_usable_lba: %llX last_usable_lba %llX last lba %llX\n", - le64_to_cpu(pgpt_head->first_usable_lba), - le64_to_cpu(pgpt_head->last_usable_lba), lastlba); + debug("GPT: first_usable_lba: %llX last_usable_lba %llX last lba %" + PRIX64 "\n", le64_to_cpu(pgpt_head->first_usable_lba), + le64_to_cpu(pgpt_head->last_usable_lba), lastlba); /* Read and allocate Partition Table Entries */ *pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head); -- 2.1.0.rc2.206.gedb03e5

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[U-Boot] porting u-boot, MMU question
by DaveKucharczyk 11 Nov '14

11 Nov '14

I'm trying to upgrade u-boot-2009.08 to u-boot-2014.07. Our board is loosely based on the Freescale mx53loco board. I used the old board file and config header files and moved them over to new u-boot directory. Then using the new api to make changes. I'm now trying to figure out how to port and turn on the MMU part below. I noticed the below code is not in the new mx53loco board file anymore and MMU_ON() doesn't exist either, since include/asm-arm/mmu.h is not included in new u-boot. So how do I get the same effect? I see arch/arm/cpu/armv8/cache_v8.c and arch/arm/lib/cache-cp15.c are the likely candidates? -- View this message in context: http://u-boot.10912.n7.nabble.com/porting-u-boot-MMU-question-tp194761.html Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [PATCH v2] fs: make it possible to read the filesystem UUID
by Christian Gmeiner 11 Nov '14

11 Nov '14

Some filesystems have a UUID stored in its superblock. To allow using root=UUID=... for the kernel command line we need a way to read-out the filesystem UUID. changes rfc -> v1: - make the environment variable an option parameter. If not given, the UUID is printed out. If given, it is stored in the env variable. - corrected typos - return error codes changes v1 -> v2: - fix return code of do_fs_uuid(..) - document do_fs_uuid(..) - implement fs_uuid_unsuported(..) be more consistent with the way other optional functionality works Hit any key to stop autoboot: 0 => fsuuid fsuuid - Look up a filesystem UUID Usage: fsuuid <interface> <dev>:<part> - print filesystem UUID fsuuid <interface> <dev>:<part> <varname> - set environment variable to filesystem UUID => fsuuid mmc 0:1 d9f9fc05-45ae-4a36-a616-fccce0e4f887 => fsuuid mmc 0:2 eb3db83c-7b28-499f-95ce-9e0bb21cda81 => fsuuid mmc 0:1 uuid1 => fsuuid mmc 0:2 uuid2 => printenv uuid1 uuid1=d9f9fc05-45ae-4a36-a616-fccce0e4f887 => printenv uuid2 uuid2=eb3db83c-7b28-499f-95ce-9e0bb21cda81 => Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com> --- README | 1 + common/Makefile | 1 + common/cmd_fs_uuid.c | 26 ++++++++++++++++++++++++++ fs/ext4/ext4fs.c | 15 +++++++++++++++ fs/fs.c | 43 +++++++++++++++++++++++++++++++++++++++++++ include/ext4fs.h | 1 + include/fs.h | 7 +++++++ 7 files changed, 94 insertions(+) create mode 100644 common/cmd_fs_uuid.c diff --git a/README b/README index 7b5538e..53b84a6 100644 --- a/README +++ b/README @@ -989,6 +989,7 @@ The following options need to be configured: CONFIG_CMD_EXT4 * ext4 command support CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls) that work for multiple fs types + CONFIG_CMD_FS_UUID * Look up a filesystem UUID CONFIG_CMD_SAVEENV saveenv CONFIG_CMD_FDC * Floppy Disk Support CONFIG_CMD_FAT * FAT command support diff --git a/common/Makefile b/common/Makefile index 6cc4de8..508a0b2 100644 --- a/common/Makefile +++ b/common/Makefile @@ -188,6 +188,7 @@ obj-y += usb.o usb_hub.o obj-$(CONFIG_USB_STORAGE) += usb_storage.o endif obj-$(CONFIG_CMD_FASTBOOT) += cmd_fastboot.o +obj-$(CONFIG_CMD_FS_UUID) += cmd_fs_uuid.o obj-$(CONFIG_CMD_USB_MASS_STORAGE) += cmd_usb_mass_storage.o obj-$(CONFIG_CMD_THOR_DOWNLOAD) += cmd_thordown.o diff --git a/common/cmd_fs_uuid.c b/common/cmd_fs_uuid.c new file mode 100644 index 0000000..613f3a4 --- /dev/null +++ b/common/cmd_fs_uuid.c @@ -0,0 +1,26 @@ +/* + * cmd_fs_uuid.c -- fsuuid command + * + * Copyright (C) 2014, Bachmann electronic GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <fs.h> + +static int do_fs_uuid_wrapper(cmd_tbl_t *cmdtp, int flag, + int argc, char * const argv[]) +{ + return do_fs_uuid(cmdtp, flag, argc, argv, FS_TYPE_ANY); +} + +U_BOOT_CMD( + fsuuid, 4, 1, do_fs_uuid_wrapper, + "Look up a filesystem UUID", + "<interface> <dev>:<part>\n" + " - print filesystem UUID\n" + "fsuuid <interface> <dev>:<part> <varname>\n" + " - set environment variable to filesystem UUID\n" +); diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index cbdc220..19757d2 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -231,3 +231,18 @@ int ext4_read_file(const char *filename, void *buf, int offset, int len) return len_read; } + +int ext4fs_uuid(char *uuid_str) +{ + if (ext4fs_root == NULL) + return -1; + +#ifdef CONFIG_LIB_UUID + uuid_bin_to_str((unsigned char *)ext4fs_root->sblock.unique_id, + uuid_str, UUID_STR_FORMAT_STD); + + return 0; +#endif + + return -ENOSYS; +} diff --git a/fs/fs.c b/fs/fs.c index dd680f3..e4ad6bc 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -15,6 +15,7 @@ */ #include <config.h> +#include <errno.h> #include <common.h> #include <part.h> #include <ext4fs.h> @@ -67,6 +68,11 @@ static inline void fs_close_unsupported(void) { } +static inline int fs_uuid_unsupported(char *uuid_str) +{ + return -1; +} + struct fstype_info { int fstype; /* @@ -86,6 +92,7 @@ struct fstype_info { int (*read)(const char *filename, void *buf, int offset, int len); int (*write)(const char *filename, void *buf, int offset, int len); void (*close)(void); + int (*uuid)(char *uuid_str); }; static struct fstype_info fstypes[] = { @@ -100,6 +107,7 @@ static struct fstype_info fstypes[] = { .size = fat_size, .read = fat_read_file, .write = fs_write_unsupported, + .uuid = fs_uuid_unsupported, }, #endif #ifdef CONFIG_FS_EXT4 @@ -113,6 +121,7 @@ static struct fstype_info fstypes[] = { .size = ext4fs_size, .read = ext4_read_file, .write = fs_write_unsupported, + .uuid = ext4fs_uuid, }, #endif #ifdef CONFIG_SANDBOX @@ -126,6 +135,7 @@ static struct fstype_info fstypes[] = { .size = sandbox_fs_size, .read = fs_read_sandbox, .write = fs_write_sandbox, + .uuid = fs_uuid_unsupported, }, #endif { @@ -138,6 +148,7 @@ static struct fstype_info fstypes[] = { .size = fs_size_unsupported, .read = fs_read_unsupported, .write = fs_write_unsupported, + .uuid = fs_uuid_unsupported, }, }; @@ -206,6 +217,13 @@ static void fs_close(void) fs_type = FS_TYPE_ANY; } +int fs_uuid(char *uuid_str) +{ + struct fstype_info *info = fs_get_info(fs_type); + + return info->uuid(uuid_str); +} + int fs_ls(const char *dirname) { int ret; @@ -443,3 +461,28 @@ int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], return 0; } + +int do_fs_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], + int fstype) +{ + int ret; + char uuid[37]; + memset(uuid, 0, sizeof(uuid)); + + if (argc < 3 || argc > 4) + return CMD_RET_USAGE; + + if (fs_set_blk_dev(argv[1], argv[2], fstype)) + return 1; + + ret = fs_uuid(uuid); + if (ret) + return CMD_RET_FAILURE; + + if (argc == 4) + setenv(argv[3], uuid); + else + printf("%s\n", uuid); + + return CMD_RET_SUCCESS; +} diff --git a/include/ext4fs.h b/include/ext4fs.h index 6c419f3..38970e4 100644 --- a/include/ext4fs.h +++ b/include/ext4fs.h @@ -145,4 +145,5 @@ int ext4fs_probe(block_dev_desc_t *fs_dev_desc, disk_partition_t *fs_partition); int ext4_read_file(const char *filename, void *buf, int offset, int len); int ext4_read_superblock(char *buffer); +int ext4fs_uuid(char *uuid_str); #endif diff --git a/include/fs.h b/include/fs.h index 06a45f2..491c60a 100644 --- a/include/fs.h +++ b/include/fs.h @@ -93,4 +93,11 @@ int file_exists(const char *dev_type, const char *dev_part, const char *file, int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], int fstype); +/* + * Determine the UUID of the specified filesystem and print it. Optionally it is + * possible to store the UUID directly in env. + */ +int do_fs_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], + int fstype); + #endif /* _FS_H */ -- 1.9.3

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[U-Boot] [PATCH] spl: Change debug to printf for "Unsupported boot-device"
by Stefan Roese 11 Nov '14

11 Nov '14

We had the problem on an AM33xx platform, that SPL detected an unsupported boot-device. But since this message is a debug message it took a bit of time to really know, where the hangup in SPL resulted from. So let's change this debug message to a printf and also print the detected boot-device that is not supported. This makes debugging of such cases much easier. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Tom Rini <trini(a)ti.com> --- common/spl/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index d85bab3..1e5ee95 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -216,7 +216,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) break; #endif default: - debug("SPL: Un-supported Boot Device\n"); + printf("SPL: Unsupported Boot Device %d\n", boot_device); hang(); } -- 2.1.3

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