June 2013 - U-Boot

[U-Boot] [PATCH] cm_t35: Fix cm_t35 for weak splash_screen_prepare
by Robert Winkler 17 Jun '13

17 Jun '13

Signed-off-by: Robert Winkler <robert.winkler(a)boundarydevices.com> --- board/compulab/cm_t35/cm_t35.c | 2 +- include/configs/cm_t35.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c index b0b80e5..95098af 100644 --- a/board/compulab/cm_t35/cm_t35.c +++ b/board/compulab/cm_t35/cm_t35.c @@ -120,7 +120,7 @@ static inline int splash_load_from_nand(void) } #endif /* CONFIG_CMD_NAND */ -int board_splash_screen_prepare(void) +int splash_screen_prepare(void) { char *env_splashimage_value; u32 bmp_load_addr; diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index c6e357a..b258da9 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -339,6 +339,5 @@ #define CONFIG_SPLASH_SCREEN #define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP -#define CONFIG_SPLASH_SCREEN_PREPARE #endif /* __CONFIG_H */ -- 1.8.3

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[U-Boot] [Patch v2 0/4] ARM: atmel: add sama5d3xek board support
by Bo Shen 17 Jun '13

17 Jun '13

This patch series add sama5d3xek board support. Included features - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector - boot from SPI flash support - boot from SD card support - LCD support - EMAC support - USB support Will do - Add GMAC support - Add of control support Bo Shen (4): USB: ohci-at91: support sama5d3x devices NET: macb: support sama5d3x devices SPI: atmel_spi: support sama5d3x devices ARM: atmel: add sama5d3xek support MAINTAINERS | 1 + arch/arm/cpu/armv7/at91/Makefile | 52 +++++ arch/arm/cpu/armv7/at91/clock.c | 127 ++++++++++++ arch/arm/cpu/armv7/at91/cpu.c | 90 +++++++++ arch/arm/cpu/armv7/at91/reset.c | 47 +++++ arch/arm/cpu/armv7/at91/sama5d3_devices.c | 196 ++++++++++++++++++ arch/arm/cpu/armv7/at91/timer.c | 139 +++++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 1 + arch/arm/include/asm/arch-at91/at91_dbu.h | 4 + arch/arm/include/asm/arch-at91/at91_pmc.h | 23 +++ arch/arm/include/asm/arch-at91/clk.h | 1 + arch/arm/include/asm/arch-at91/hardware.h | 2 + arch/arm/include/asm/arch-at91/sama5d3.h | 212 ++++++++++++++++++++ arch/arm/include/asm/arch-at91/sama5d3_smc.h | 79 ++++++++ board/atmel/sama5d3xek/Makefile | 51 +++++ board/atmel/sama5d3xek/sama5d3xek.c | 277 ++++++++++++++++++++++++++ boards.cfg | 3 + drivers/net/macb.c | 6 +- drivers/spi/atmel_spi.c | 3 +- drivers/usb/host/ohci-at91.c | 14 +- include/configs/sama5d3xek.h | 255 ++++++++++++++++++++++++ 21 files changed, 1578 insertions(+), 5 deletions(-) create mode 100644 arch/arm/cpu/armv7/at91/Makefile create mode 100644 arch/arm/cpu/armv7/at91/clock.c create mode 100644 arch/arm/cpu/armv7/at91/cpu.c create mode 100644 arch/arm/cpu/armv7/at91/reset.c create mode 100644 arch/arm/cpu/armv7/at91/sama5d3_devices.c create mode 100644 arch/arm/cpu/armv7/at91/timer.c create mode 100644 arch/arm/include/asm/arch-at91/sama5d3.h create mode 100644 arch/arm/include/asm/arch-at91/sama5d3_smc.h create mode 100644 board/atmel/sama5d3xek/Makefile create mode 100644 board/atmel/sama5d3xek/sama5d3xek.c create mode 100644 include/configs/sama5d3xek.h -- 1.7.9.5

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[U-Boot] [PATCH V2] MMC: DWMMC: Fix FIFO_DEPTH calculation
by Rajeshwari Shinde 17 Jun '13

17 Jun '13

Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time for mmc rescan command. In current code FIFO_DEPTH is getting calculated after reading the default FIFOTH register and extracting the RX_WMARK bits from it i.e (RX_WMARK = FIFO_DEPTH/2 -1). Instead of storing the correct value, we were recalculating the FIFO_DEPT each time which is not correct. Based on "[PATCH V9 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues" http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/160247 Signed-off-by: Hatim Ali <hatim.rv(a)samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s(a)samsung.com> --- Changes in V2: - remove fifoth_val local variable - Rebased on top of "[PATCH V9 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues". drivers/mmc/dw_mmc.c | 14 ++++++-------- 1 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 1307b12..5da20ed 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -312,7 +312,7 @@ static void dwmci_set_ios(struct mmc *mmc) static int dwmci_init(struct mmc *mmc) { struct dwmci_host *host = (struct dwmci_host *)mmc->priv; - u32 fifo_size, fifoth_val; + u32 fifo_size; dwmci_writel(host, DWMCI_PWREN, 1); @@ -332,15 +332,13 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_IDINTEN, 0); dwmci_writel(host, DWMCI_BMOD, 1); - fifo_size = dwmci_readl(host, DWMCI_FIFOTH); - fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; - if (host->fifoth_val) { - fifoth_val = host->fifoth_val; - } else { - fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | + if (!host->fifoth_val) { + fifo_size = dwmci_readl(host, DWMCI_FIFOTH); + fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; + host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | TX_WMARK(fifo_size / 2); } - dwmci_writel(host, DWMCI_FIFOTH, fifoth_val); + dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); dwmci_writel(host, DWMCI_CLKENA, 0); dwmci_writel(host, DWMCI_CLKSRC, 0); -- 1.7.4.4

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[U-Boot] [ANN] v2013.07-rc1
by Tom Rini 16 Jun '13

16 Jun '13

Hey all, I've tagged and pushed v2013.07-rc1. Lots of things all over the place. If you've got changes outstanding still, please start gently poking custodians with patchwork links. I've got a good bit of stuff I need to deal with myself still, but please prod me all the same. Thanks all! -- Tom

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[U-Boot] [PATCH 00/10] MIPS: unify low-level assembly code
by Gabor Juhos 16 Jun '13

16 Jun '13

The patch-set changes some parts of the low-level assembly code in order to minimize the difference between the mips32, mips64 and xburst implementation. Do it in small steps to make review easier. The series is based on the testing branch of the MIPS custodian tree. Cc: Daniel Schwierzeck <daniel.schwierzeck(a)googlemail.com> Gabor Juhos (10): MIPS: mips32/start.S: use t8 register for dynamic relocation MIPS: mips32/start.S: rework relocation info check MIPS: xburst/start.S: save relocation address in s2 register MIPS: xburst/start.S: save relocation offset in s1 register MIPS: xburst/start.S: save gd in s0 register MIPS: xburst/start.S: use t8 register for dynamic relocation MIPS: xburst/start.S: rework relocation info check MIPS: mips32/cache.S: save return address in t9 register MIPS: mips32/cache.S: store cache line size in t8 register MIPS: mips32/cache.S: use v1 register for indirect function calls arch/mips/cpu/mips32/cache.S | 16 ++++++++-------- arch/mips/cpu/mips32/start.S | 24 ++++++++++++------------ arch/mips/cpu/xburst/start.S | 41 ++++++++++++++++++++++------------------- 3 files changed, 42 insertions(+), 39 deletions(-) -- 1.7.10

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[U-Boot] Please pull u-boot-mmc.git
by Andy Fleming 16 Jun '13

16 Jun '13

The following changes since commit 077becc345717c3cf32e88316298b74d0cff6581: Merge branch 'master' of git://git.denx.de/u-boot-74xx-7xx (2013-06-11 18:11:47 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-mmc.git master for you to fetch changes up to 91171091c6733cd290e18bf25a8aedbe682d2430: ARM: tegra: make use of negative ENV_OFFSET on NVIDIA boards (2013-06-13 16:52:20 -0500) ---------------------------------------------------------------- Andrew Gabbasov (1): fsl_esdhc: Do not clear interrupt status bits until data processed Bo Shen (1): mmc: fix env in mmc with redundant compile error Fabio Estevam (1): mmc: fsl_esdhc: Fix hang after 'save' command Jagannadha Sutradharudu Teki (1): mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwards Ruud Commandeur (1): mmc write bug fix Stephen Warren (4): README: document CONFIG_ENV_IS_IN_MMC mmc: report capacity for the selected partition env_mmc: allow negative CONFIG_ENV_OFFSET ARM: tegra: make use of negative ENV_OFFSET on NVIDIA boards README | 51 +++++++++++++++++++++++++++++ common/env_mmc.c | 12 +++++-- drivers/mmc/fsl_esdhc.c | 9 +++--- drivers/mmc/mmc.c | 76 ++++++++++++++++++++++++++++++++++++++------ drivers/mmc/sdhci.c | 6 ++-- include/configs/beaver.h | 2 +- include/configs/cardhu.h | 2 +- include/configs/dalmore.h | 2 +- include/configs/paz00.h | 2 +- include/configs/seaboard.h | 2 +- include/configs/ventana.h | 2 +- include/configs/whistler.h | 4 +-- include/environment.h | 6 ++++ include/mmc.h | 7 ++++ 14 files changed, 156 insertions(+), 27 deletions(-)

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[U-Boot] [PATCH v2 4/4] sf: Warn to use BAR for > 16MiB flashes
by Jagannadha Sutradharudu Teki 15 Jun '13

15 Jun '13

Warning for > 16MiB flashes to #define CONFIG_SPI_FLASH_BAR Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- Changes for v2: - none drivers/mtd/spi/spi_flash.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f53d001..7e34f6e 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -563,6 +563,12 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, if (flash->memory_map) printf(", mapped at %p", flash->memory_map); puts("\n"); +#ifndef CONFIG_SPI_FLASH_BAR + if (flash->size > SPI_FLASH_16MB_BOUN) { + puts("SF: Warning - Only lower 16MiB accessible,"); + puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); + } +#endif spi_release_bus(spi); -- 1.8.3

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[U-Boot] [PATCH v2 3/4] sf: Add debug messages on spi_flash_read_common
by Jagannadha Sutradharudu Teki 15 Jun '13

15 Jun '13

- Added debug's on spi_flash_read_common() - Added space Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- Changes for v2: - none drivers/mtd/spi/spi_flash.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 492a784..f53d001 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -254,8 +254,18 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, struct spi_slave *spi = flash->spi; int ret; - spi_claim_bus(spi); + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); + if (ret < 0) { + debug("SF: read cmd failed\n"); + return ret; + } + spi_release_bus(spi); return ret; -- 1.8.3

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[U-Boot] [PATCH v2 2/4] sf: Place the sf calls in proper order
by Jagannadha Sutradharudu Teki 15 Jun '13

15 Jun '13

Placed the sf calls in proper order - erase/write/read Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- Changes for v2: - remove timeout arg in spi_flash_write_common drivers/mtd/spi/spi_flash.c | 184 ++++++++++++++++++++++---------------------- 1 file changed, 92 insertions(+), 92 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 80d2fe6..492a784 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -68,6 +68,51 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len); } +int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) +{ + struct spi_slave *spi = flash->spi; + unsigned long timebase; + int ret; + u8 status; + u8 check_status = 0x0; + u8 poll_bit = STATUS_WIP; + u8 cmd = flash->poll_cmd; + + if (cmd == CMD_FLAG_STATUS) { + poll_bit = STATUS_PEC; + check_status = poll_bit; + } + + ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); + if (ret) { + debug("SF: fail to read %s status register\n", + cmd == CMD_READ_STATUS ? "read" : "flag"); + return ret; + } + + timebase = get_timer(0); + do { + WATCHDOG_RESET(); + + ret = spi_xfer(spi, 8, NULL, &status, 0); + if (ret) + return -1; + + if ((status & poll_bit) == check_status) + break; + + } while (get_timer(timebase) < timeout); + + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); + + if ((status & poll_bit) == check_status) + return 0; + + /* Timed out */ + debug("SF: time out!\n"); + return -1; +} + int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, size_t cmd_len, const void *buf, size_t buf_len) { @@ -109,6 +154,53 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, return ret; } +int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + u32 erase_size; + u8 cmd[4]; + int ret = -1; + + erase_size = flash->sector_size; + if (offset % erase_size || len % erase_size) { + debug("SF: Erase offset/length not multiple of erase size\n"); + return -1; + } + + if (erase_size == 4096) + cmd[0] = CMD_ERASE_4K; + else + cmd[0] = CMD_ERASE_64K; + + while (len) { +#ifdef CONFIG_SPI_FLASH_BAR + u8 bank_sel; + + bank_sel = offset / SPI_FLASH_16MB_BOUN; + + ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); + if (ret) { + debug("SF: fail to set bank%d\n", bank_sel); + return ret; + } +#endif + spi_flash_addr(offset, cmd); + + debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], + cmd[2], cmd[3], offset); + + ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0); + if (ret < 0) { + debug("SF: erase failed\n"); + break; + } + + offset += erase_size; + len -= erase_size; + } + + return ret; +} + int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, size_t len, const void *buf) { @@ -218,98 +310,6 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, return ret; } -int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) -{ - struct spi_slave *spi = flash->spi; - unsigned long timebase; - int ret; - u8 status; - u8 check_status = 0x0; - u8 poll_bit = STATUS_WIP; - u8 cmd = flash->poll_cmd; - - if (cmd == CMD_FLAG_STATUS) { - poll_bit = STATUS_PEC; - check_status = poll_bit; - } - - ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); - if (ret) { - debug("SF: fail to read %s status register\n", - cmd == CMD_READ_STATUS ? "read" : "flag"); - return ret; - } - - timebase = get_timer(0); - do { - WATCHDOG_RESET(); - - ret = spi_xfer(spi, 8, NULL, &status, 0); - if (ret) - return -1; - - if ((status & poll_bit) == check_status) - break; - - } while (get_timer(timebase) < timeout); - - spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); - - if ((status & poll_bit) == check_status) - return 0; - - /* Timed out */ - debug("SF: time out!\n"); - return -1; -} - -int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) -{ - u32 erase_size; - u8 cmd[4]; - int ret = -1; - - erase_size = flash->sector_size; - if (offset % erase_size || len % erase_size) { - debug("SF: Erase offset/length not multiple of erase size\n"); - return -1; - } - - if (erase_size == 4096) - cmd[0] = CMD_ERASE_4K; - else - cmd[0] = CMD_ERASE_64K; - - while (len) { -#ifdef CONFIG_SPI_FLASH_BAR - u8 bank_sel; - - bank_sel = offset / SPI_FLASH_16MB_BOUN; - - ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); - if (ret) { - debug("SF: fail to set bank%d\n", bank_sel); - return ret; - } -#endif - spi_flash_addr(offset, cmd); - - debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], - cmd[2], cmd[3], offset); - - ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0); - if (ret < 0) { - debug("SF: erase failed\n"); - break; - } - - offset += erase_size; - len -= erase_size; - } - - return ret; -} - int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) { u8 cmd; -- 1.8.3

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[U-Boot] [PATCH v2 1/4] sf: Unify spi_flash write code
by Jagannadha Sutradharudu Teki 15 Jun '13

15 Jun '13

Move common flash write code into spi_flash_write_common(). Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- Changes for v2: - remove timeout arg in spi_flash_write_common drivers/mtd/spi/spi_flash.c | 122 ++++++++++++++++------------------- drivers/mtd/spi/spi_flash_internal.h | 6 ++ 2 files changed, 60 insertions(+), 68 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index c439601..80d2fe6 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -68,22 +68,57 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len); } -int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, - size_t len, const void *buf) +int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, + size_t cmd_len, const void *buf, size_t buf_len) { - unsigned long byte_addr, page_size; - size_t chunk_len, actual; + struct spi_slave *spi = flash->spi; + unsigned long timeout = SPI_FLASH_PROG_TIMEOUT; int ret; - u8 cmd[4]; - page_size = flash->page_size; + if (buf == NULL) + timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT; ret = spi_claim_bus(flash->spi); if (ret) { - debug("SF: unable to claim SPI bus\n"); + debug("SF: Unable to claim SPI bus\n"); return ret; } + ret = spi_flash_cmd_write_enable(flash); + if (ret < 0) { + debug("SF: enabling write failed\n"); + return ret; + } + + ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len); + if (ret < 0) { + debug("SF: write cmd failed\n"); + return ret; + } + + ret = spi_flash_cmd_wait_ready(flash, timeout); + if (ret < 0) { + debug("SF: write %s timed out\n", + timeout == SPI_FLASH_PROG_TIMEOUT ? + "program" : "page erase"); + return ret; + } + + spi_release_bus(spi); + + return ret; +} + +int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, + size_t len, const void *buf) +{ + unsigned long byte_addr, page_size; + size_t chunk_len, actual; + u8 cmd[4]; + int ret = -1; + + page_size = flash->page_size; + cmd[0] = CMD_PAGE_PROGRAM; for (actual = 0; actual < len; actual += chunk_len) { #ifdef CONFIG_SPI_FLASH_BAR @@ -108,27 +143,16 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); - ret = spi_flash_cmd_write_enable(flash); - if (ret < 0) { - debug("SF: enabling write failed\n"); - break; - } - - ret = spi_flash_cmd_write(flash->spi, cmd, 4, - buf + actual, chunk_len); + ret = spi_flash_write_common(flash, cmd, sizeof(cmd), + buf + actual, chunk_len); if (ret < 0) { debug("SF: write failed\n"); break; } - ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); - if (ret) - break; - offset += chunk_len; } - spi_release_bus(flash->spi); return ret; } @@ -242,8 +266,8 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) { u32 erase_size; - int ret; u8 cmd[4]; + int ret = -1; erase_size = flash->sector_size; if (offset % erase_size || len % erase_size) { @@ -251,12 +275,6 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) return -1; } - ret = spi_claim_bus(flash->spi); - if (ret) { - debug("SF: Unable to claim SPI bus\n"); - return ret; - } - if (erase_size == 4096) cmd[0] = CMD_ERASE_4K; else @@ -279,24 +297,16 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], cmd[2], cmd[3], offset); - ret = spi_flash_cmd_write_enable(flash); - if (ret) - goto out; - - ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0); - if (ret) - goto out; - - ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); - if (ret) - goto out; + ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0); + if (ret < 0) { + debug("SF: erase failed\n"); + break; + } offset += erase_size; len -= erase_size; } - out: - spi_release_bus(flash->spi); return ret; } @@ -305,22 +315,10 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) u8 cmd; int ret; - ret = spi_flash_cmd_write_enable(flash); - if (ret < 0) { - debug("SF: enabling write failed\n"); - return ret; - } - cmd = CMD_WRITE_STATUS; - ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1); - if (ret) { - debug("SF: fail to write status register\n"); - return ret; - } - - ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1); if (ret < 0) { - debug("SF: write status register timed out\n"); + debug("SF: fail to write status register\n"); return ret; } @@ -339,25 +337,13 @@ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) } cmd = flash->bank_cmd[1]; - ret = spi_flash_cmd_write_enable(flash); + ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1); if (ret < 0) { - debug("SF: enabling write failed\n"); - return ret; - } - - ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1); - if (ret) { - debug("SF: fail to write bank addr register\n"); + debug("SF: fail to write bank register\n"); return ret; } flash->bank_curr = bank_sel; - ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); - if (ret < 0) { - debug("SF: write bank addr register timed out\n"); - return ret; - } - return 0; } diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 8147f27..46e0f6c 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -108,6 +108,12 @@ int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0); */ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, size_t cmd_len, void *data, size_t data_len); +/* + * Same as spi_flash_cmd_write() except it also claims/releases the SPI + * bus. Used as common part of the ->write() operation. + */ +int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, + size_t cmd_len, const void *buf, size_t buf_len); /* * Send the read status command to the device and wait for the wip -- 1.8.3

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