June 2013 - U-Boot

[U-Boot] please pull u-boot-samsung master
by Minkyu Kang 19 Jun '13

19 Jun '13

Dear Albert, The following changes since commit d0a51373131c4ba565a2391d5ed78b87c406ce98: at91sam9260ek: move board id setup to config header (2013-05-12 16:49:14 +0200) are available in the git repository at: git://git.denx.de/u-boot-samsung master for you to fetch changes up to ed7bdc03eb516fb698ccc12ec5b4b9f132d05c5f: MMC: DWMMC: Fix FIFO_DEPTH calculation (2013-06-17 11:03:42 +0900) ---------------------------------------------------------------- Akshay Saraswat (2): Exynos5: clock: Update the equation to calculate PLL output frequency Exynos: uart: s5p: enabling the uart tx/rx fifo Amar (9): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolve EMMC read write issues EXYNOS5: DWMMC: Added FDT support for DWMMC EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results. SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT MMC: APIs to support resize of EMMC boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition Arkadiusz Wlodarczyk (1): arm:trats: change auto-booting to boot kernel with separate device tree blob Inderpal Singh (3): exynos: move tzpc_init to armv7/exynos exynos: update tzpc to make it common for exynos4 and exynos5 exynos: Update origen and smdkv310 to use common tzpc_init Naveen Krishna Chatradhi (2): power: exynos-tmu: fix warnings and clean up code power: exynos-tmu: use the mux_addr bit fields in tmu_control register Rajeshwari Shinde (3): SF: Add driver for Gigabyte device GD25LQ and GD25Q64B SMDK5250: Enable SPI Gigabyte device. MMC: DWMMC: Fix FIFO_DEPTH calculation arch/arm/cpu/armv7/exynos/Makefile | 2 +- arch/arm/cpu/armv7/exynos/clock.c | 10 +- .../arm/cpu/armv7/exynos/tzpc.c | 25 +- arch/arm/cpu/armv7/s5p-common/Makefile | 2 + arch/arm/dts/exynos5250.dtsi | 33 ++ arch/arm/include/asm/arch-exynos/cpu.h | 4 + arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +- arch/arm/include/asm/arch-exynos/tmu.h | 58 ++- arch/arm/include/asm/arch-exynos/tzpc.h | 20 + board/samsung/dts/exynos5250-smdk5250.dts | 24 ++ board/samsung/origen/lowlevel_init.S | 44 +- board/samsung/origen/origen_setup.h | 25 -- board/samsung/smdk5250/Makefile | 5 +- board/samsung/smdk5250/clock_init.c | 18 + board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 423 ++++++++++++++++++++ board/samsung/smdk5250/lowlevel_init.S | 2 + board/samsung/smdk5250/setup.h | 25 -- board/samsung/smdk5250/smdk5250.c | 223 +++-------- board/samsung/smdk5250/spl_boot.c | 64 ++- board/samsung/smdkv310/lowlevel_init.S | 60 +-- common/cmd_mmc.c | 109 ++++- doc/device-tree-bindings/exynos/dwmmc.txt | 54 +++ drivers/mmc/dw_mmc.c | 27 +- drivers/mmc/exynos_dw_mmc.c | 127 +++++- drivers/mmc/mmc.c | 134 +++++++ drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/gigadevice.c | 81 ++++ drivers/mtd/spi/spi_flash.c | 3 + drivers/mtd/spi/spi_flash_internal.h | 1 + drivers/power/exynos-tmu.c | 123 +++--- drivers/serial/serial_s5p.c | 13 +- drivers/video/exynos_fb.c | 4 +- include/configs/exynos5250-dt.h | 11 +- include/configs/origen.h | 2 + include/configs/smdkv310.h | 2 + include/configs/trats.h | 17 +- include/dwmmc.h | 3 + include/fdtdec.h | 1 + include/mmc.h | 26 ++ lib/fdtdec.c | 1 + spl/Makefile | 4 + 42 files changed, 1356 insertions(+), 471 deletions(-) rename board/samsung/smdk5250/tzpc_init.c => arch/arm/cpu/armv7/exynos/tzpc.c (69%) create mode 100644 board/samsung/smdk5250/exynos5-dt.c create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt create mode 100644 drivers/mtd/spi/gigadevice.c -- Thanks, Minkyu Kang.

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[U-Boot] [PATCH 1/1] NET: Fix system hanging if NET device is not installed
by Jim Lin 19 Jun '13

19 Jun '13

If we try to boot from NET device, NetInitLoop in net.c will be invoked. If NET device is not installed, eth_get_dev() function will return eth_current value, which is NULL. When NetInitLoop is called, "eth_get_dev->enetaddr" will access restricted memory area and therefore cause hanging. This issue is found on Tegra30 Cardhu platform after adding CONFIG_CMD_NET and CONFIG_CMD_DHCP in config header file. Signed-off-by: Jim Lin <jilin(a)nvidia.com> --- net/net.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/net/net.c b/net/net.c index df94789..7663b9c 100644 --- a/net/net.c +++ b/net/net.c @@ -271,7 +271,8 @@ static void NetInitLoop(void) #endif env_changed_id = env_id; } - memcpy(NetOurEther, eth_get_dev()->enetaddr, 6); + if (eth_get_dev()) + memcpy(NetOurEther, eth_get_dev()->enetaddr, 6); return; } -- 1.7.7

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[U-Boot] dfu: make data buffer size configurable
by Heiko Schocher 19 Jun '13

19 Jun '13

Dfu transfer uses a buffer before writing data to the raw storage device. Make the size (in bytes) of this buffer configurable. Signed-off-by: Heiko Schocher <hs(a)denx.de> Cc: Pantelis Antoniou <panto(a)antoniou-consulting.com> Cc: Tom Rini <trini(a)ti.com> Cc: Lukasz Majewski <l.majewski(a)samsung.com> Cc: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Marek Vasut <marex(a)denx.de> --- README | 5 +++++ drivers/dfu/dfu.c | 2 +- include/dfu.h | 4 +++- 3 Dateien geändert, 9 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-) diff --git a/README b/README index b1b3e17..8550f34 100644 --- a/README +++ b/README @@ -1360,6 +1360,11 @@ The following options need to be configured: CONFIG_DFU_NAND This enables support for exposing NAND devices via DFU. + CONFIG_SYS_DFU_DATA_BUF_SIZE + Dfu transfer uses a buffer before writing data to the + raw storage device. Make the size (in bytes) of this buffer + configurable. + CONFIG_SYS_DFU_MAX_FILE_SIZE When updating files rather than the raw storage device, we use a static buffer to copy the file into and then write diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 6af6890..fe3a36e 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -42,7 +42,7 @@ static int dfu_find_alt_num(const char *s) } static unsigned char __aligned(CONFIG_SYS_CACHELINE_SIZE) - dfu_buf[DFU_DATA_BUF_SIZE]; + dfu_buf[CONFIG_SYS_DFU_DATA_BUF_SIZE]; static int dfu_write_buffer_drain(struct dfu_entity *dfu) { diff --git a/include/dfu.h b/include/dfu.h index a107f4b..124653c 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -68,7 +68,9 @@ static inline unsigned int get_mmc_blk_size(int dev) #define DFU_NAME_SIZE 32 #define DFU_CMD_BUF_SIZE 128 -#define DFU_DATA_BUF_SIZE (1024*1024*8) /* 8 MiB */ +#ifndef CONFIG_SYS_DFU_DATA_BUF_SIZE +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024*1024*8) /* 8 MiB */ +#endif #ifndef CONFIG_SYS_DFU_MAX_FILE_SIZE #define CONFIG_SYS_DFU_MAX_FILE_SIZE (4 << 20) /* 4 MiB */ #endif -- 1.7.11.7

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[U-Boot] [PATCH v4 0/3] Add TI816X EVM support
by TENART Antoine 19 Jun '13

19 Jun '13

This serie introduce the support of the TI816X EVM board. The serie fits into the existing AM33XX SoC support and reuse some definitions from the TI814X. Based on the implementation in the TI-PSP-04.00.02.14 vendor tree: http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary It has been tested booting up a Linux kernel on TI8168 refs F and C cards, with an MMC. SPL is working fine too. Changes for v4: - add arch_cpu_init function - rework the ddr initialization and move it to clock_ti816x.c - move common definitions from clock_ti814x.c to clock_ti81xx.h Changes for v3: - fix a compile error when using DDR2 - rename misspelled CONFIG_EXTRA_ENV_SETTINGS in ti816x_evm.h (was CONFIG_EXTRA_EMV_SETTINGS) Changes for v2: - patches 2-7 squashed into a single patch "Add TI816X support" - removed all unused definitions - removed my definition of DMM_BASE and reworked the DMM initialization using the "common" config_dmm() from emif4.c - fixed coding style problems - now use the fallback CONFIG_SYS_BAUDRATE_TABLE - kept LONGHELP support - removed redefinition of the "device type" section in cpu_ti816x.h Antoine Tenart (3): Prepare for TI816X : reuse existing code from TI814X Add TI816X support Add TI816X evm board support MAINTAINERS | 4 + Makefile | 2 +- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/am33xx/Makefile | 1 + arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 95 ---- arch/arm/cpu/armv7/am33xx/clock_ti816x.c | 529 ++++++++++++++++++++ arch/arm/cpu/armv7/am33xx/emif4.c | 2 + arch/arm/cpu/armv7/omap-common/Makefile | 2 +- arch/arm/include/asm/arch-am33xx/clock.h | 4 + arch/arm/include/asm/arch-am33xx/clock_ti81xx.h | 142 ++++++ arch/arm/include/asm/arch-am33xx/cpu.h | 2 +- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 35 +- arch/arm/include/asm/arch-am33xx/hardware.h | 7 +- arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 5 + arch/arm/include/asm/arch-am33xx/hardware_ti814x.h | 5 + arch/arm/include/asm/arch-am33xx/hardware_ti816x.h | 57 +++ arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 3 + arch/arm/include/asm/arch-am33xx/mux.h | 2 + arch/arm/include/asm/arch-am33xx/mux_ti816x.h | 363 ++++++++++++++ arch/arm/include/asm/arch-am33xx/omap.h | 2 +- arch/arm/include/asm/arch-am33xx/spl.h | 11 +- board/ti/ti816x/Makefile | 47 ++ board/ti/ti816x/evm.c | 249 +++++++++ boards.cfg | 1 + drivers/serial/ns16550.c | 4 +- include/configs/ti816x_evm.h | 188 +++++++ spl/Makefile | 2 +- 27 files changed, 1644 insertions(+), 122 deletions(-) create mode 100644 arch/arm/cpu/armv7/am33xx/clock_ti816x.c create mode 100644 arch/arm/include/asm/arch-am33xx/clock_ti81xx.h create mode 100644 arch/arm/include/asm/arch-am33xx/hardware_ti816x.h create mode 100644 arch/arm/include/asm/arch-am33xx/mux_ti816x.h create mode 100644 board/ti/ti816x/Makefile create mode 100644 board/ti/ti816x/evm.c create mode 100644 include/configs/ti816x_evm.h -- 1.7.10.4

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[U-Boot] [PATCH v4 14/14] sf: Add Flag status register polling support
by Jagannadha Sutradharudu Teki 19 Jun '13

19 Jun '13

Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations. Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- Changes for v4: - Remove STMICRO config, discover poll_cmd at probe Changes for v3: - none Changes for v2: - none drivers/mtd/spi/spi_flash.c | 21 +++++++++++++++++---- drivers/mtd/spi/spi_flash_internal.h | 2 ++ include/spi_flash.h | 3 +++ 3 files changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index e5b401f..c439601 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -200,12 +200,19 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) unsigned long timebase; int ret; u8 status; + u8 check_status = 0x0; u8 poll_bit = STATUS_WIP; - u8 cmd = CMD_READ_STATUS; + u8 cmd = flash->poll_cmd; + + if (cmd == CMD_FLAG_STATUS) { + poll_bit = STATUS_PEC; + check_status = poll_bit; + } ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); if (ret) { - debug("SF: Failed to send command %02x: %d\n", cmd, ret); + debug("SF: fail to read %s status register\n", + cmd == CMD_READ_STATUS ? "read" : "flag"); return ret; } @@ -217,14 +224,14 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) if (ret) return -1; - if ((status & poll_bit) == 0) + if ((status & poll_bit) == check_status) break; } while (get_timer(timebase) < timeout); spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); - if ((status & poll_bit) == 0) + if ((status & poll_bit) == check_status) return 0; /* Timed out */ @@ -542,6 +549,12 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, goto err_manufacturer_probe; #endif + /* Discover the poll_cmd, as STMICRO is something different */ + flash->poll_cmd = CMD_READ_STATUS; + if ((*idp == SPI_FLASH_STMICRO_IDCODE0) && + (flash->size >= 0x4000000)) + flash->poll_cmd = CMD_FLAG_STATUS; + #ifdef CONFIG_OF_CONTROL if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { debug("SF: FDT decode error\n"); diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index e9b85bf..8147f27 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -22,6 +22,7 @@ #define CMD_PAGE_PROGRAM 0x02 #define CMD_WRITE_DISABLE 0x04 #define CMD_READ_STATUS 0x05 +#define CMD_FLAG_STATUS 0x70 #define CMD_WRITE_ENABLE 0x06 #define CMD_ERASE_4K 0x20 #define CMD_ERASE_32K 0x52 @@ -45,6 +46,7 @@ /* Common status */ #define STATUS_WIP 0x01 +#define STATUS_PEC 0x80 /* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); diff --git a/include/spi_flash.h b/include/spi_flash.h index 1de193a..e94e59c 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -44,6 +44,9 @@ struct spi_flash { /* Current flash bank */ u8 bank_curr; #endif + /* Poll cmd - for flash erase/program */ + u8 poll_cmd; + void *memory_map; /* Address of read-only SPI flash access */ int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); -- 1.8.3

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[U-Boot] [PATCH v4 02/14] sf: Discover the bank addr commands
by Jagannadha Sutradharudu Teki 19 Jun '13

19 Jun '13

Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- Changes for v4: - none Changes for v3: - none Changes for v2: - none drivers/mtd/spi/spi_flash.c | 21 +++++++++++++++++++++ drivers/mtd/spi/spi_flash_internal.h | 14 ++++++++++++++ include/spi_flash.h | 2 ++ 3 files changed, 37 insertions(+) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 9ddd070..9c90f00 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -304,6 +304,27 @@ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) return 0; } +int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0) +{ + /* discover bank cmds */ + switch (idcode0) { + case SPI_FLASH_SPANSION_IDCODE0: + flash->bank_cmd[0] = CMD_BANKADDR_BRRD; + flash->bank_cmd[1] = CMD_BANKADDR_BRWR; + break; + case SPI_FLASH_STMICRO_IDCODE0: + case SPI_FLASH_WINBOND_IDCODE0: + flash->bank_cmd[0] = CMD_EXTNADDR_RDEAR; + flash->bank_cmd[1] = CMD_EXTNADDR_WREAR; + break; + default: + printf("SF: Unsupported bank commands %02x\n", idcode0); + return -1; + } + + return 0; +} + #ifdef CONFIG_OF_CONTROL int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) { diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 772fef6..db6c444 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -28,6 +28,17 @@ #define CMD_ERASE_64K 0xd8 #define CMD_ERASE_CHIP 0xc7 +/* Manufacture ID's */ +#define SPI_FLASH_SPANSION_IDCODE0 0x01 +#define SPI_FLASH_STMICRO_IDCODE0 0x20 +#define SPI_FLASH_WINBOND_IDCODE0 0xef + +/* Bank addr access commands */ +#define CMD_BANKADDR_BRWR 0x17 +#define CMD_BANKADDR_BRRD 0x16 +#define CMD_EXTNADDR_WREAR 0xC5 +#define CMD_EXTNADDR_RDEAR 0xC8 + /* Common status */ #define STATUS_WIP 0x01 @@ -80,6 +91,9 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); /* Program the bank address register */ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel); +/* Configure the BAR - discover the bank cmds */ +int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0); + /* * Same as spi_flash_cmd_read() except it also claims/releases the SPI * bus. Used as common part of the ->read() operation. diff --git a/include/spi_flash.h b/include/spi_flash.h index 3b6a44e..50a03bf 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -38,6 +38,8 @@ struct spi_flash { u32 page_size; /* Erase (sector) size */ u32 sector_size; + /* Bank cmds - cmd[0] - read, cmd[1] - write */ + u8 bank_cmd[2]; void *memory_map; /* Address of read-only SPI flash access */ int (*read)(struct spi_flash *flash, u32 offset, -- 1.8.3

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[U-Boot] [PATCH 4/4] sf: Warn to use BAR for > 16MiB flashes
by Jagannadha Sutradharudu Teki 19 Jun '13

19 Jun '13

Warning for > 16MiB flashes to #define CONFIG_SPI_FLASH_BAR Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/mtd/spi/spi_flash.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f3245a4..911c5e8 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -563,7 +563,12 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, if (flash->memory_map) printf(", mapped at %p", flash->memory_map); puts("\n"); - +#ifndef CONFIG_SPI_FLASH_BAR + if (flash->size > SPI_FLASH_16MB_BOUN) { + puts("SF: Warning - Only lower 16MiB accessible,"); + puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); + } +#endif spi_release_bus(spi); return flash; -- 1.8.3

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[U-Boot] [PATCH v4 05/14] sf: Update sf read to support all sizes of flashes
by Jagannadha Sutradharudu Teki 19 Jun '13

19 Jun '13

This patch updated the spi_flash read func to support all sizes of flashes using bank reg addr facility. The same support has been added in below patch for erase/write spi_flash functions: "sf: Support all sizes of flashes using bank addr reg facility" (sha1: c956f600cbb0943d0afe1004cdb503f4fcd8f415) With these new updates on sf framework, the flashes which has < 16MB are not effected as per as performance is concern and but the u-boot.bin size incrased ~460 bytes. sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 199.72s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 351.739s, speed 48913 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 65.659s, speed 262144 B/s sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 198.953s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 350.90s, speed 49200 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 66.521s, speed 262144 B/s Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- Changes for v4: - none Changes for v3: - none Changes for v2: - none drivers/mtd/spi/spi_flash.c | 36 +++++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index a6c5d83..7e987a0 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -148,7 +148,9 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { - u8 cmd[5]; + u8 cmd[5], bank_sel; + u32 remain_len, read_len; + int ret = -1; /* Handle memory-mapped SPI */ if (flash->memory_map) { @@ -157,10 +159,38 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, } cmd[0] = CMD_READ_ARRAY_FAST; - spi_flash_addr(offset, cmd); cmd[4] = 0x00; - return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); + while (len) { + bank_sel = offset / SPI_FLASH_16MB_BOUN; + + ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); + if (ret) { + debug("SF: fail to set bank%d\n", bank_sel); + return ret; + } + + remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset); + if (len < remain_len) + read_len = len; + else + read_len = remain_len; + + spi_flash_addr(offset, cmd); + + ret = spi_flash_read_common(flash, cmd, sizeof(cmd), + data, read_len); + if (ret < 0) { + debug("SF: read failed\n"); + break; + } + + offset += read_len; + len -= read_len; + data += read_len; + } + + return ret; } int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout, -- 1.8.3

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[U-Boot] [PATCH v2 1/3] ARM: Tegra: FDT: Add USB EHCI function for T30/T114
by Jim Lin 19 Jun '13

19 Jun '13

Add DT node for USB EHCI function. Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards. Signed-off-by: Jim Lin <jilin(a)nvidia.com> --- arch/arm/dts/tegra114.dtsi | 27 +++++++++++++++++++++++++++ arch/arm/dts/tegra30.dtsi | 27 +++++++++++++++++++++++++++ board/nvidia/dts/tegra114-dalmore.dts | 7 +++++++ board/nvidia/dts/tegra30-beaver.dts | 6 ++++++ board/nvidia/dts/tegra30-cardhu.dts | 6 ++++++ include/fdtdec.h | 2 ++ lib/fdtdec.c | 2 ++ 7 files changed, 77 insertions(+), 0 deletions(-) diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index f86d18d..f87d05a 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -216,4 +216,31 @@ clocks = <&tegra_car 15>; status = "disable"; }; + + usb@7d000000 { + compatible = "nvidia,tegra114-ehci"; + reg = <0x7d000000 0x4000>; + interrupts = <52>; + phy_type = "utmi"; + clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */ + status = "disabled"; + }; + + usb@7d004000 { + compatible = "nvidia,tegra114-ehci"; + reg = <0x7d004000 0x4000>; + interrupts = <53>; + phy_type = "utmi"; + clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */ + status = "disabled"; + }; + + usb@7d008000 { + compatible = "nvidia,tegra114-ehci"; + reg = <0x7d008000 0x4000>; + interrupts = <129>; + phy_type = "utmi"; + clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */ + status = "disabled"; + }; }; diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index ccf154f..e5275c2 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -216,4 +216,31 @@ clocks = <&tegra_car 15>; status = "disabled"; }; + + usb@7d000000 { + compatible = "nvidia,tegra30-ehci"; + reg = <0x7d000000 0x4000>; + interrupts = <52>; + phy_type = "utmi"; + clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */ + status = "disabled"; + }; + + usb@7d004000 { + compatible = "nvidia,tegra30-ehci"; + reg = <0x7d004000 0x4000>; + interrupts = <53>; + phy_type = "utmi"; + clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */ + status = "disabled"; + }; + + usb@7d008000 { + compatible = "nvidia,tegra30-ehci"; + reg = <0x7d008000 0x4000>; + interrupts = <129>; + phy_type = "utmi"; + clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */ + status = "disabled"; + }; }; diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts index 86e9459..435c01e 100644 --- a/board/nvidia/dts/tegra114-dalmore.dts +++ b/board/nvidia/dts/tegra114-dalmore.dts @@ -14,6 +14,7 @@ i2c4 = "/i2c@7000c700"; sdhci0 = "/sdhci@78000600"; sdhci1 = "/sdhci@78000400"; + usb0 = "/usb@7d008000"; }; memory { @@ -61,4 +62,10 @@ bus-width = <8>; status = "okay"; }; + + usb@7d008000 { + /* SPDIF_IN: USB_VBUS_EN1 */ + nvidia,vbus-gpio = <&gpio 86 0>; + status = "okay"; + }; }; diff --git a/board/nvidia/dts/tegra30-beaver.dts b/board/nvidia/dts/tegra30-beaver.dts index 836169f..b003ae1 100644 --- a/board/nvidia/dts/tegra30-beaver.dts +++ b/board/nvidia/dts/tegra30-beaver.dts @@ -14,6 +14,7 @@ i2c4 = "/i2c@7000c700"; sdhci0 = "/sdhci@78000600"; sdhci1 = "/sdhci@78000000"; + usb0 = "/usb@7d008000"; }; memory { @@ -68,4 +69,9 @@ status = "okay"; bus-width = <8>; }; + + usb@7d008000 { + nvidia,vbus-gpio = <&gpio 61 3>; /* PH5, USB13_VBUS_PULLUP */ + status = "okay"; + }; }; diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts index 4d22b48..071a464 100644 --- a/board/nvidia/dts/tegra30-cardhu.dts +++ b/board/nvidia/dts/tegra30-cardhu.dts @@ -14,6 +14,7 @@ i2c4 = "/i2c@7000c700"; sdhci0 = "/sdhci@78000600"; sdhci1 = "/sdhci@78000000"; + usb0 = "/usb@7d008000"; }; memory { @@ -63,4 +64,9 @@ status = "okay"; bus-width = <8>; }; + + usb@7d008000 { + nvidia,vbus-gpio = <&gpio 233 3>; /* PDD1, EN_3V3_PU */ + status = "okay"; + }; }; diff --git a/include/fdtdec.h b/include/fdtdec.h index 4e8032b..d19b9f3 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -64,6 +64,8 @@ struct fdt_memory { enum fdt_compat_id { COMPAT_UNKNOWN, COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */ + COMPAT_NVIDIA_TEGRA30_USB, /* Tegra30 USB port */ + COMPAT_NVIDIA_TEGRA114_USB, /* Tegra114 USB port */ COMPAT_NVIDIA_TEGRA114_I2C, /* Tegra114 I2C w/single clock source */ COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra20 i2c */ COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra20 dvc (really just i2c) */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index ac1fe0b..ffc4369 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -37,6 +37,8 @@ DECLARE_GLOBAL_DATA_PTR; static const char * const compat_names[COMPAT_COUNT] = { COMPAT(UNKNOWN, "<none>"), COMPAT(NVIDIA_TEGRA20_USB, "nvidia,tegra20-ehci"), + COMPAT(NVIDIA_TEGRA30_USB, "nvidia,tegra30-ehci"), + COMPAT(NVIDIA_TEGRA114_USB, "nvidia,tegra114-ehci"), COMPAT(NVIDIA_TEGRA114_I2C, "nvidia,tegra114-i2c"), COMPAT(NVIDIA_TEGRA20_I2C, "nvidia,tegra20-i2c"), COMPAT(NVIDIA_TEGRA20_DVC, "nvidia,tegra20-i2c-dvc"), -- 1.7.7

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[U-Boot] [PATCH] mtd: nand: fix initialization of BBT options
by Daniel Schwierzeck 18 Jun '13

18 Jun '13

commit dfe64e2c89731a3f9950d7acd8681b68df2bae03 Author: Sergey Lapin <slapin(a)ossfans.org> Date: Mon Jan 14 03:46:50 2013 +0000 mtd: resync with Linux-3.7.1 changed the initialization of BBT options. Fix drivers jz4740 and s3c2410 which have not been updated yet and cause compile errors. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> --- Patch is compile tested on boards smdk2410 and qi_lb60 --- drivers/mtd/nand/jz4740_nand.c | 2 +- drivers/mtd/nand/s3c2410_nand.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c index a691fbc..9421e56 100644 --- a/drivers/mtd/nand/jz4740_nand.c +++ b/drivers/mtd/nand/jz4740_nand.c @@ -256,7 +256,7 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.strength = 4; nand->ecc.layout = &qi_lb60_ecclayout_2gb; nand->chip_delay = 50; - nand->options = NAND_USE_FLASH_BBT; + nand->bbt_options |= NAND_BBT_USE_FLASH; return 0; } diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c index 43d8213..1187b9f 100644 --- a/drivers/mtd/nand/s3c2410_nand.c +++ b/drivers/mtd/nand/s3c2410_nand.c @@ -179,9 +179,7 @@ int board_nand_init(struct nand_chip *nand) #endif #ifdef CONFIG_S3C2410_NAND_BBT - nand->options = NAND_USE_FLASH_BBT; -#else - nand->options = 0; + nand->bbt_options |= NAND_BBT_USE_FLASH; #endif debug("end of nand_init\n"); -- 1.8.1.2

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