June 2013 - U-Boot

[U-Boot] [PATCH] imx: nitrogen6x: Add splash screen support to nitrogen6x
by Robert Winkler 15 Jun '13

15 Jun '13

Depends on: 18d1c87ebe2a6a05905ae1cdd7a31abe6b5ee39d b38050121cd3fea821a048661cdad5bf71f3a2b8 Signed-off-by: Robert Winkler <robert.winkler(a)boundarydevices.com> --- board/boundary/nitrogen6x/nitrogen6x.c | 21 +++++++++++++++++++++ include/configs/nitrogen6x.h | 10 +++++++++- 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 8f0f9b8..7096029 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -388,6 +388,27 @@ int board_eth_init(bd_t *bis) return 0; } +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) + return 1; + + env_loadsplash = getenv("loadsplash"); + if (!env_loadsplash) { + printf("Environment variable loadsplash not found!\n"); + return 1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("Failed to run loadsplash %s\n\n", env_loadsplash); + return 1; + } + printf("leaving splash_screen_prepare\n"); + return 0; +} + static void setup_buttons(void) { imx_iomux_v3_setup_multiple_pads(button_pads, diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index aea91bc..3cd850d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -38,7 +38,7 @@ #define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (15 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R @@ -149,6 +149,13 @@ #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_LOGO #define CONFIG_IPUV3_CLK 260000000 @@ -208,6 +215,8 @@ "echo ; echo serial console at 115200, 8N1 ; echo ; " \ "echo details at http://boundarydevices.com/6q_bootscript ; " \ "setenv stdout serial\0" \ + "loadsplash=if sf probe ; then " \ + "sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ "; do " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ -- 1.8.3

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[U-Boot] [PATCH 0/4] ARM: at91: atmel_nand: check ONFI ecc minimum requirement
by Josh Wu 14 Jun '13

14 Jun '13

in this patch series, first we make the nand driver can dynamic change sector size and ecc correct bits. Then we enable ONFI ecc parameters check. Josh Wu (4): ARM: at91: atmel_nand: pmecc driver will select the galois table by sector size ARM: at91: sama5d3: remove unused definition about PMECC alpha table offset mtd: atmel_nand: alloc memory instead of use static array for pmecc data ARM: at91: atmel_nand: add code to check the ONFI parameter ECC requirement arch/arm/include/asm/arch-at91/at91sam9x5.h | 6 + arch/arm/include/asm/arch-at91/sama5d3.h | 2 - doc/README.atmel_pmecc | 14 -- drivers/mtd/nand/atmel_nand.c | 195 +++++++++++++++++++++++++-- include/configs/at91sam9x5ek.h | 1 - include/configs/sama5d3xek.h | 1 - 6 files changed, 191 insertions(+), 28 deletions(-) -- 1.7.9.5

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[U-Boot] [PATCH 3/4] sf: Add debug messages on spi_flash_read_common
by Jagannadha Sutradharudu Teki 14 Jun '13

14 Jun '13

- Added debug's on spi_flash_read_common() - Added space Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/mtd/spi/spi_flash.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index cb38b66..f3245a4 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -252,8 +252,18 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, struct spi_slave *spi = flash->spi; int ret; - spi_claim_bus(spi); + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); + if (ret < 0) { + debug("SF: read cmd failed\n"); + return ret; + } + spi_release_bus(spi); return ret; -- 1.8.3

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[U-Boot] [PATCH 2/4] sf: Place the sf calls in proper order
by Jagannadha Sutradharudu Teki 14 Jun '13

14 Jun '13

Placed the sf calls in proper order - erase/write/read Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/mtd/spi/spi_flash.c | 186 ++++++++++++++++++++++---------------------- 1 file changed, 93 insertions(+), 93 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f8fd897..cb38b66 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -68,6 +68,51 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len); } +int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) +{ + struct spi_slave *spi = flash->spi; + unsigned long timebase; + int ret; + u8 status; + u8 check_status = 0x0; + u8 poll_bit = STATUS_WIP; + u8 cmd = flash->poll_cmd; + + if (cmd == CMD_FLAG_STATUS) { + poll_bit = STATUS_PEC; + check_status = poll_bit; + } + + ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); + if (ret) { + debug("SF: fail to read %s status register\n", + cmd == CMD_READ_STATUS ? "read" : "flag"); + return ret; + } + + timebase = get_timer(0); + do { + WATCHDOG_RESET(); + + ret = spi_xfer(spi, 8, NULL, &status, 0); + if (ret) + return -1; + + if ((status & poll_bit) == check_status) + break; + + } while (get_timer(timebase) < timeout); + + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); + + if ((status & poll_bit) == check_status) + return 0; + + /* Timed out */ + debug("SF: time out!\n"); + return -1; +} + int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, size_t cmd_len, const void *buf, size_t buf_len, unsigned long timeout) { @@ -105,6 +150,54 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, return ret; } +int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + u32 erase_size; + u8 cmd[4]; + int ret = -1; + + erase_size = flash->sector_size; + if (offset % erase_size || len % erase_size) { + debug("SF: Erase offset/length not multiple of erase size\n"); + return -1; + } + + if (erase_size == 4096) + cmd[0] = CMD_ERASE_4K; + else + cmd[0] = CMD_ERASE_64K; + + while (len) { +#ifdef CONFIG_SPI_FLASH_BAR + u8 bank_sel; + + bank_sel = offset / SPI_FLASH_16MB_BOUN; + + ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); + if (ret) { + debug("SF: fail to set bank%d\n", bank_sel); + return ret; + } +#endif + spi_flash_addr(offset, cmd); + + debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], + cmd[2], cmd[3], offset); + + ret = spi_flash_write_common(flash, cmd, sizeof(cmd), + NULL, 0, SPI_FLASH_PAGE_ERASE_TIMEOUT); + if (ret < 0) { + debug("SF: erase failed\n"); + break; + } + + offset += erase_size; + len -= erase_size; + } + + return ret; +} + int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, size_t len, const void *buf) { @@ -215,99 +308,6 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, return ret; } -int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) -{ - struct spi_slave *spi = flash->spi; - unsigned long timebase; - int ret; - u8 status; - u8 check_status = 0x0; - u8 poll_bit = STATUS_WIP; - u8 cmd = flash->poll_cmd; - - if (cmd == CMD_FLAG_STATUS) { - poll_bit = STATUS_PEC; - check_status = poll_bit; - } - - ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); - if (ret) { - debug("SF: fail to read %s status register\n", - cmd == CMD_READ_STATUS ? "read" : "flag"); - return ret; - } - - timebase = get_timer(0); - do { - WATCHDOG_RESET(); - - ret = spi_xfer(spi, 8, NULL, &status, 0); - if (ret) - return -1; - - if ((status & poll_bit) == check_status) - break; - - } while (get_timer(timebase) < timeout); - - spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); - - if ((status & poll_bit) == check_status) - return 0; - - /* Timed out */ - debug("SF: time out!\n"); - return -1; -} - -int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) -{ - u32 erase_size; - u8 cmd[4]; - int ret = -1; - - erase_size = flash->sector_size; - if (offset % erase_size || len % erase_size) { - debug("SF: Erase offset/length not multiple of erase size\n"); - return -1; - } - - if (erase_size == 4096) - cmd[0] = CMD_ERASE_4K; - else - cmd[0] = CMD_ERASE_64K; - - while (len) { -#ifdef CONFIG_SPI_FLASH_BAR - u8 bank_sel; - - bank_sel = offset / SPI_FLASH_16MB_BOUN; - - ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); - if (ret) { - debug("SF: fail to set bank%d\n", bank_sel); - return ret; - } -#endif - spi_flash_addr(offset, cmd); - - debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], - cmd[2], cmd[3], offset); - - ret = spi_flash_write_common(flash, cmd, sizeof(cmd), - NULL, 0, SPI_FLASH_PAGE_ERASE_TIMEOUT); - if (ret < 0) { - debug("SF: erase failed\n"); - break; - } - - offset += erase_size; - len -= erase_size; - } - - return ret; -} - int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) { u8 cmd; -- 1.8.3

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[U-Boot] [PATCH V3 REPOST 1/4] README: document CONFIG_ENV_IS_IN_MMC
by Stephen Warren 14 Jun '13

14 Jun '13

From: Stephen Warren <swarren(a)nvidia.com> Describe the meaning of CONFIG_ENV_IS_IN_MMC, and all related defines that must or can be set when using that option. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> Reviewed-by: Peter Korsgaard <jacmet(a)sunsite.dk> Acked-by: Tom Rini <trini(a)ti.com> --- v3: * Mention that env size/offset are in bytes. * Fix typo; s/CONFIG_ENV_OFFSET/CONFIG_ENV_SIZE/ in one place. v2: New patch. --- README | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/README b/README index 3012dcd..e7fedb8 100644 --- a/README +++ b/README @@ -3606,6 +3606,46 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. You will probably want to define these to avoid a really noisy system when storing the env in UBI. +- CONFIG_ENV_IS_IN_MMC: + + Define this if you have an MMC device which you want to use for the + environment. + + - CONFIG_SYS_MMC_ENV_DEV: + + Specifies which MMC device the environment is stored in. + + - CONFIG_SYS_MMC_ENV_PART (optional): + + Specifies which MMC partition the environment is stored in. If not + set, defaults to partition 0, the user area. Common values might be + 1 (first MMC boot partition), 2 (second MMC boot partition). + + - CONFIG_ENV_OFFSET: + - CONFIG_ENV_SIZE: + + These two #defines specify the offset and size of the environment + area within the specified MMC device. + + These two values are in units of bytes, but must be aligned to an + MMC sector boundary. + + - CONFIG_ENV_OFFSET_REDUND (optional): + + Specifies a second storage area, of CONFIG_ENV_SIZE size, used to + hold a redundant copy of the environment data. This provides a + valid backup copy in case the other copy is corrupted, e.g. due + to a power failure during a "saveenv" operation. + + This value is also in units of bytes, but must also be aligned to + an MMC sector boundary. + + - CONFIG_ENV_SIZE_REDUND (optional): + + This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is + set. If this value is set, it must be set to the same value as + CONFIG_ENV_SIZE. + - CONFIG_SYS_SPI_INIT_OFFSET Defines offset to the initial SPI buffer area in DPRAM. The -- 1.8.1.5

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[U-Boot] [Patch] fsl_esdhc: Fix DMA transfer completion waiting loop
by Andrew Gabbasov 14 Jun '13

14 Jun '13

Rework the waiting for transfer completion loop condition to continue waiting until both Transfer Complete and DMA End interrupts occur. Checking of DLA bit in Present State register looks not needed in addition to interrupts status checking, so it can be removed from the condition. Also, DMA Error condition is added to the list of data errors, checked in the loop. Signed-off-by: Andrew Gabbasov <andrew_gabbasov(a)mentor.com> --- drivers/mmc/fsl_esdhc.c | 3 +-- include/fsl_esdhc.h | 4 +++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 54b5363..814bba4 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -400,8 +400,7 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) if (irqstat & DATA_ERR) return COMM_ERR; - } while (!(irqstat & IRQSTAT_TC) && - (esdhc_read32(&regs->prsstat) & PRSSTAT_DLA)); + } while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE); #endif } diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 47d2fe4..ea0880b 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -63,7 +63,9 @@ #define IRQSTAT_CC (0x00000001) #define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE) -#define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE) +#define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \ + IRQSTAT_DMAE) +#define DATA_COMPLETE (IRQSTAT_TC | IRQSTAT_DINT) #define IRQSTATEN 0x0002e034 #define IRQSTATEN_DMAE (0x10000000) -- 1.7.10.4

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[U-Boot] [PATCH v4 00/14] sf: Update sf framework to support all sizes of flashes
by Jagannadha Sutradharudu Teki 14 Jun '13

14 Jun '13

This is a v4 patch series with some modifications on previous series with same head "sf: Update sf framework to support all sizes of flashes" These patches removes some redundents and better coding when comapred to v3. The current implementation in sf supports 3-byte address mode due to this up to 16MB amount of flash is able to access for those flashes which has an actual size of > 16MB. This series of patches is more detailed/meatured changes w.r.t the current sf framework in addition to changes related to support all sizes using bank/exnt register addr accessing support. With these new updates on sf framework, the flashes which has < 16MB are not effected as per as performance is concern and but the u-boot.bin size incrased ~460 bytes. sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 199.72s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 351.739s, speed 48913 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 65.659s, speed 262144 B/s sf update(for first 16MBytes), Changes after: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 198.953s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 350.90s, speed 49200 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 66.521s, speed 262144 B/s The main aim of these changes is to not effect the current framework and at the same time to support the > 16Mbyte flashes, becuase of this I involved few flash vendor people in CC [thought that they may/mayn't be a mailing list members] to know their views. REQUEST FOR ALL SPI CODE CONTRIBUTORS/USERS, PLEASE TEST THESE CHANGES W.R.T YOUR HW IF POSSIBLE. Please let me know for any issues/concerns/questions. -- Thanks, Jagan. Jagannadha Sutradharudu Teki (14): sf: Add bank address register writing support sf: Discover the bank addr commands sf: Read flash bank addr register at probe time sf: Update sf to support all sizes of flashes sf: Update sf read to support all sizes of flashes sf: Add bank addr code in CONFIG_SPI_FLASH_BAR sf: Use spi_flash_addr() in write call sf: stmicro: Add support for N25Q512 sf: stmicro: Add support for N25Q512A sf: stmicro: Add support for N25Q1024 sf: stmicro: Add support for N25Q1024A sf: spansion: Add support for S25FL512S_64K sf: Remove spi_flash_cmd_poll_bit() sf: Add Flag status register polling support README | 5 + drivers/mtd/spi/spansion.c | 7 ++ drivers/mtd/spi/spi_flash.c | 191 +++++++++++++++++++++++++++++------ drivers/mtd/spi/spi_flash_internal.h | 29 +++++- drivers/mtd/spi/stmicro.c | 24 +++++ include/spi_flash.h | 8 ++ 6 files changed, 231 insertions(+), 33 deletions(-) -- 1.8.3

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[U-Boot] [PATCH 1/2] spi: cf_qspi: Use DIV_ROUND_UP at appropriate place
by Axel Lin 14 Jun '13

14 Jun '13

This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin(a)ingics.com> --- drivers/spi/cf_qspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/cf_qspi.c b/drivers/spi/cf_qspi.c index a37ac4e..06bcf91 100644 --- a/drivers/spi/cf_qspi.c +++ b/drivers/spi/cf_qspi.c @@ -171,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, volatile qspi_t *qspi = dev->regs; u8 *txbuf = (u8 *)dout; u8 *rxbuf = (u8 *)din; - u32 count = ((bitlen / 8) + (bitlen % 8 ? 1 : 0)); + u32 count = DIV_ROUND_UP(bitlen, 8); u32 n, i = 0; /* Sanitize arguments */ -- 1.8.1.2

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[U-Boot] [PATCH] sf: spansion: Correct name of S25FL128S 64K Sector part
by Jagannadha Sutradharudu Teki 14 Jun '13

14 Jun '13

Corrected the name of S25FL128S 64K sector part SPI flash, S25FL128S supported has been added in below commit "sf: spansion: Add support for S25FL128S" (sha1: 1bfb9f156aa66cca6bb9c773867a1f02a84b14be) Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/mtd/spi/spansion.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c index b3ef90f..dad4fbb 100644 --- a/drivers/mtd/spi/spansion.c +++ b/drivers/mtd/spi/spansion.c @@ -101,7 +101,7 @@ static const struct spansion_spi_flash_params spansion_spi_flash_table[] = { .idcode2 = 0x4d01, .pages_per_sector = 256, .nr_sectors = 256, - .name = "S25FL129P_64K/S25FL128S", + .name = "S25FL129P_64K/S25FL128S_64K", }, { .idcode1 = 0x0219, -- 1.8.3

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[U-Boot] spi: cf_spi: Question about checking (dspi->sr & 0x0000F000) witch magic number 4
by Axel Lin 14 Jun '13

14 Jun '13

Hi, While reading the code in cfspi_tx(): while ((dspi->sr & 0x0000F000) >= 4) ; I don't see the point of checking "(dspi->sr & 0x0000F000) >= 4)". I'm wondering if it should be while ((dspi->sr & 0x0000F000) >> 12) >= 4) ; or simply while (dspi->sr & 0x0000F000) ; Current code actually has the same effect as "while (dspi->sr & 0x0000F000) ;". comments? Axel

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