March 2013 - U-Boot

[U-Boot] [PATCH RESEND v2 0/4] usb:gadget: USB Mass Storage Gadget
by y＠samsung.com 05 Mar '13

05 Mar '13

From: Piotr Wilczek <p.wilczek(a)samsung.com> This patch series add support for the USB Mass Storage (UMS) New "ums" command provide access to on-device persistent memory. The storage_common.c and f_mass_storage.c source files are ported from v2.6.36 Linux kernel Changes in v2: - removed commented code; Lukasz Majewski (3): usb:composite: USB Mass Storage - storage_common.c from Linux kernel usb:gadget: USB Mass Storage Gadget support arm:trats: Use new ums command Piotr Wilczek (1): usb:composite: USB Mass Storage - f_mass_storage.c from Linux kernel board/samsung/trats/trats.c | 63 + common/Makefile | 1 + common/cmd_usb_mass_storage.c | 86 ++ drivers/usb/gadget/f_mass_storage.c | 2793 +++++++++++++++++++++++++++++++++++ drivers/usb/gadget/g_dnl.c | 6 + drivers/usb/gadget/storage_common.c | 653 ++++++++ include/configs/trats.h | 5 + include/usb_mass_storage.h | 55 + 8 files changed, 3662 insertions(+) create mode 100644 common/cmd_usb_mass_storage.c create mode 100644 drivers/usb/gadget/f_mass_storage.c create mode 100644 drivers/usb/gadget/storage_common.c create mode 100644 include/usb_mass_storage.h -- 1.7.9.5

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[U-Boot] [PATCH] powerpc/85xx: Add workaround for errata USB-14 (enable on P204x/P3041/P50x0)
by xulei 05 Mar '13

05 Mar '13

On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal multi-bit ECC errors, which has impact on performance, so software should disable all ECC reporting from USB1 and USB2 by setting bits 16 and 17 to 1 in the register at DCSRBASE + 0x0002_0520. In formal release document, the errata number should be USB14 instead of USB138. Signed-off-by: xulei <Lei.Xu(a)freescale.com> Signed-off-by: Roy Zang <tie-fei.zang(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 13 +++++++++++++ arch/powerpc/include/asm/config_mpc85xx.h | 5 ++++- 3 files changed, 20 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 5d72f4c..422782c 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -255,6 +255,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003 puts("Work-around for Erratum PCIe-A003 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_USB14 + puts("Work-around for Erratum USB14 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index de9d916..72c5328 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -623,6 +623,19 @@ skip_l2: } #endif + /* On P204x/P304x/P50x0 Rev1.0, USB transmit will result internal + * multi-bit ECC errors, which has impact on performance, so software + * should disable all ECC reporting from USB1 and USB2 by setting bits + * 16 and 17 to 1 in the register at DCSRBASE + 0x0002_0520. + */ +#ifdef CONFIG_SYS_FSL_ERRATUM_USB14 + if (IS_SVR_REV(get_svr(), 1, 0)) { + void *p; + p = (void *)CONFIG_SYS_DCSRBAR + 0x20520; + setbits_be32(p, 3 << (31 - 17)); + } +#endif + #ifdef CONFIG_FMAN_ENET fman_enet_init(); #endif diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index d57c178..4236835 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -333,6 +333,7 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER @@ -365,6 +366,7 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER @@ -442,6 +444,7 @@ #define CONFIG_SYS_FSL_USB2_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 @@ -473,7 +476,7 @@ #define CONFIG_SYS_FSL_USB2_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_USB138 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_ERRATUM_A004699 -- 1.7.0.4

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[U-Boot] [PATCH 0/2 v1] Exynos5: spl: Reduce spl size
by Akshay Saraswat 05 Mar '13

05 Mar '13

This patch set tries to gain some space in spl by restructuring and reorganising some code in two different clock init's for two different times of execution. Akshay Saraswat (2): Exynos5: spl: Reorganize mem_timing struct to gain space in spl Exynos5: spl: Reduce clock init in spl board/samsung/smdk5250/Makefile | 3 +- board/samsung/smdk5250/clock_init.c | 506 +------------------------------ board/samsung/smdk5250/clock_init.h | 57 ++-- board/samsung/smdk5250/dmc_common.c | 40 +-- board/samsung/smdk5250/dmc_init_ddr3.c | 116 +++---- board/samsung/smdk5250/lowlevel_init.S | 4 +- board/samsung/smdk5250/setup.h | 16 +- board/samsung/smdk5250/smdk5250.c | 4 + board/samsung/smdk5250/spl_clock_init.c | 469 ++++++++++++++++++++++++++++ 9 files changed, 625 insertions(+), 590 deletions(-) create mode 100644 board/samsung/smdk5250/spl_clock_init.c -- 1.7.9.5

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[U-Boot] [PATCH 00/11] Add BF60x processor support to Blackfin architecture.
by Sonic Zhang 05 Mar '13

05 Mar '13

From: Sonic Zhang <sonic.zhang(a)analog.com> ADSP-BF60x is the new generation Blackfin® dual-core processor announced by Analog Devices in late March, 2012. This patch set adds BF60x processor support to Das U-Boot Blackfin architecture. For more information, see http://blackfin.uclinux.org . In addition, the maintainer of the Blackfin system is changed to Sonic Zhang <sonic.adi(a)gmail.com>, because Mike Frysinger is no longer with Analog Devices any more. Bob Liu (5): Blackfin: bf60x: new processor header files Blackfin: bf60x: add dma support Blackfin: bf60x: support big cplb page Blackfin: bf60x: add gpio support Blackfin: bf60x: add hw watchdog support Scott Jiang (1): Blackfin: spi: add bf6xx spi driver Sonic Zhang (4): Blackfin: bf60x: Port blackfin core architecture code to boot on bf60x. Blackfin: bf60x: add serial support blackfin: bf609: add board and headers files to support bf609 Blackfin: bf60x: add rsi/sdh support Steven Miao (1): Blackfin: bf60x: add resume from hibernate MAINTAINERS | 3 +- arch/blackfin/cpu/cpu.c | 4 +- arch/blackfin/cpu/gpio.c | 36 +- arch/blackfin/cpu/initcode.c | 370 ++- arch/blackfin/cpu/initcode.h | 52 + arch/blackfin/cpu/reset.c | 6 + arch/blackfin/cpu/serial.c | 81 +- arch/blackfin/cpu/serial.h | 222 +-- arch/blackfin/cpu/serial1.h | 275 ++ arch/blackfin/cpu/serial4.h | 139 + arch/blackfin/cpu/start.S | 2 + arch/blackfin/include/asm/blackfin_cdef.h | 3 + arch/blackfin/include/asm/blackfin_def.h | 5 + arch/blackfin/include/asm/blackfin_local.h | 3 + arch/blackfin/include/asm/config-pre.h | 4 + arch/blackfin/include/asm/cplb.h | 17 +- arch/blackfin/include/asm/dma.h | 113 +- arch/blackfin/include/asm/gpio.h | 2 +- arch/blackfin/include/asm/mach-bf533/BF531_def.h | 1 + arch/blackfin/include/asm/mach-bf561/BF561_def.h | 1 + arch/blackfin/include/asm/mach-bf609/BF609_cdef.h | 543 +++ arch/blackfin/include/asm/mach-bf609/BF609_def.h | 3758 ++++++++++++++++++++ arch/blackfin/include/asm/mach-bf609/anomaly.h | 128 + arch/blackfin/include/asm/mach-bf609/def_local.h | 5 + arch/blackfin/include/asm/mach-bf609/gpio.h | 151 + arch/blackfin/include/asm/mach-bf609/portmux.h | 257 ++ arch/blackfin/include/asm/mach-bf609/ports.h | 103 + arch/blackfin/include/asm/mach-common/bits/cgu.h | 80 + arch/blackfin/include/asm/mach-common/bits/dde.h | 88 + arch/blackfin/include/asm/mach-common/bits/dma.h | 48 +- arch/blackfin/include/asm/mach-common/bits/mpu.h | 6 +- arch/blackfin/include/asm/mach-common/bits/pll.h | 5 + arch/blackfin/include/asm/mach-common/bits/sdh.h | 38 +- .../blackfin/include/asm/mach-common/bits/spi6xx.h | 240 ++ arch/blackfin/include/asm/mach-common/bits/uart4.h | 66 + arch/blackfin/lib/board.c | 33 +- arch/blackfin/lib/clocks.c | 113 +- arch/blackfin/lib/string.c | 97 +- board/bf609-ezkit/Makefile | 55 + board/bf609-ezkit/bf609-ezkit.c | 67 + boards.cfg | 1 + common/cmd_reginfo.c | 19 +- drivers/mmc/bfin_sdh.c | 68 +- drivers/spi/Makefile | 1 + drivers/spi/bfin_spi6xx.c | 308 ++ include/configs/bf609-ezkit.h | 169 + include/configs/bfin_adi_common.h | 8 +- 47 files changed, 7373 insertions(+), 421 deletions(-) create mode 100644 arch/blackfin/cpu/serial1.h create mode 100644 arch/blackfin/cpu/serial4.h create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_cdef.h create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_def.h create mode 100644 arch/blackfin/include/asm/mach-bf609/anomaly.h create mode 100644 arch/blackfin/include/asm/mach-bf609/def_local.h create mode 100644 arch/blackfin/include/asm/mach-bf609/gpio.h create mode 100644 arch/blackfin/include/asm/mach-bf609/portmux.h create mode 100644 arch/blackfin/include/asm/mach-bf609/ports.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/cgu.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/dde.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/spi6xx.h create mode 100644 arch/blackfin/include/asm/mach-common/bits/uart4.h create mode 100644 board/bf609-ezkit/Makefile create mode 100644 board/bf609-ezkit/bf609-ezkit.c create mode 100644 drivers/spi/bfin_spi6xx.c create mode 100644 include/configs/bf609-ezkit.h

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[U-Boot] [PATCH v4 0/5] Add NAND support to DFU, enable for am335x_evm
by Tom Rini 05 Mar '13

05 Mar '13

This series adds DFU support to NAND and was started by Pantelis. The NAND changes have been compile-tested on all ARM and PowerPC targets and run-time tested on ARM. DFU itself has been tested, for NAND, on am335x_evm. For practical reasons, this series depends on Pantelis' previous series of generic DFU changes. Lukasz and I are discussing how to handle a few changes there since one of them breaks file writing. -- Tom Changes in v4: - Further reword nand_util.c comments, from Scott - In nand_write_skip_bad make sure *actual is 0 for YAFFS2 errors too, reminded by Scott. - In cmd_nand.c don't drop the size is less than maxsize check in arg_off_size as other nand functions need this still (Scott). - Add patch to fix CONFIG_CMD_NAND_YAFFS Changes in v3: - Reworked skip_check_len changes to just add accounting for *used to the logic. - Allow for actual to be NULL in nand_(read|write)_skip_bad, only DFU calls this with a non-NULL parameter. Make sure the comments for both functions explain the parameters and their behavior. - Other style changes requested by Scott. - As nand_(write|read)_skip_bad passes back just a used length now. - Rework logic in nand_block_op for nand_(read|write)_skip_bad returning just a size for actual used length. - Remove unused externs from drivers/dfu/dfu_nand.c - Fix checkpatch.pl warnings in include/configs/am335x_evm.h Changes in v2: - NAND skip_check_len changes reworked to allow nand_(read|write)_skip_bad to return this information to the caller. - nand_block_op calls nand_(read|write)_skip_bad directly. - Bugfix in dfu_nand to make sure we set dfu->skip_bad to 0 on each iteration. - Add CONFIG_CMD_MTDPARTS and relevant information to am335x_evm - Enable DFU for NAND and MMC, set dfu_alt_info_(nand|mmc) as examples for both in am335x_evm.h - Increase CONFIG_SYS_MAXARGS due to hush parsing bugs that would otherwise prevent 'setenv dfu_alt_info ${dfu_alt_info_nand}' on am335x_evm Pantelis Antoniou (2): dfu: NAND specific routines for DFU operation am335x_evm: Enable DFU for NAND and MMC, provide example alt_info for both Tom Rini (3): nand: Extend nand_(read|write)_skip_bad with *actual and limit parameters cmd_nand.c: Fix CONFIG_CMD_NAND_YAFFS am335x_evm: Add CONFIG_CMD_MTDPARTS and relevant defaults common/cmd_nand.c | 55 +++++++----- common/env_nand.c | 3 +- drivers/dfu/Makefile | 1 + drivers/dfu/dfu.c | 8 ++ drivers/dfu/dfu_nand.c | 195 ++++++++++++++++++++++++++++++++++++++++++ drivers/mtd/nand/nand_util.c | 68 +++++++++++++-- include/configs/am335x_evm.h | 47 +++++++++- include/dfu.h | 23 +++++ include/nand.h | 4 +- 9 files changed, 368 insertions(+), 36 deletions(-) create mode 100644 drivers/dfu/dfu_nand.c -- 1.7.9.5

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[U-Boot] Add new NAND flash
by Matthias Weißer 05 Mar '13

05 Mar '13

Hi I would like to add a new NAND flash type to u-boot and have some problems with it. The type is MT29F16G08CBABA – Page size x8: 4320 bytes (4096 + 224 bytes) – Block size: 256 pages (1024K + 56K bytes) – Plane size: 2 planes x 1024 blocks per plane – Device size: 16Gb: 2048 blocks The NAND subsystem is configured as follows #define CONFIG_NAND_MXC #define CONFIG_NAND_MXC_V1_1 #define CONFIG_MXC_NAND_REGS_BASE (0xBB000000) #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE (0xBB000000) #define CONFIG_MXC_NAND_HWECC #define CONFIG_SYS_NAND_LARGEPAGE The NAND is connected (8 bit wide) to an iMX25 which is booting from NOR. So the NAND is only a mass storage device. I am able to read the ID of the chip. 2Ch 48h 04h 46h 85h I then added the following entry to the nand_flash_ids[] table {"NAND 2GiB 3,3V 8-bit", 0x48, 0, 2048, 0, LP_OPTIONS}, Before getting to the u-boot prompt I get the following message: NAND: NAND device: Manufacturer ID: 0x2c, Chip ID: 0x48 (Micron NAND 2GiB 3,3V 8-bit) NAND bus width 8 instead 16 bit This is caused by bit 6 in id byte 4 which tells that the device is 16 bit wide organized and the iMX specific part of the NAND system which tells the generic system that the device is connected via a 8 bit bus which is obviously correct as the flash chip only has 8 data lines. Is there anything I am doing wrong here? Thanks, Matthias

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[U-Boot] [PATCH] CONFIG_BOOTDELAY default should not affect runtime
by Joe Hershberger 05 Mar '13

05 Mar '13

Because the code that handles bootdelay is compiled in conditionally based on the default value, you are restricted in the default, regardless of what you want the runtime options to be. Change the source to always check if any default is given so that other values can be selected and used at runtime. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- common/main.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/common/main.c b/common/main.c index e2d2e09..0973c59 100644 --- a/common/main.c +++ b/common/main.c @@ -95,7 +95,7 @@ extern void mdm_init(void); /* defined in board.c */ * Watch for 'delay' seconds for autoboot stop or autoboot delay string. * returns: 0 - no key string, allow autoboot 1 - got key string, abort */ -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) +#if defined(CONFIG_BOOTDELAY) # if defined(CONFIG_AUTOBOOT_KEYED) #ifndef CONFIG_MENU static inline @@ -279,7 +279,7 @@ int abortboot(int bootdelay) return abort; } # endif /* CONFIG_AUTOBOOT_KEYED */ -#endif /* CONFIG_BOOTDELAY >= 0 */ +#endif /* CONFIG_BOOTDELAY */ /* * Runs the given boot command securely. Specifically: @@ -295,8 +295,7 @@ int abortboot(int bootdelay) * printing the error message to console. */ -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) && \ - defined(CONFIG_OF_CONTROL) +#if defined(CONFIG_BOOTDELAY) && defined(CONFIG_OF_CONTROL) static void secure_boot_cmd(char *cmd) { cmd_tbl_t *cmdtp; @@ -358,11 +357,10 @@ void main_loop (void) int rc = 1; int flag; #endif -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) && \ - defined(CONFIG_OF_CONTROL) +#if defined(CONFIG_BOOTDELAY) && defined(CONFIG_OF_CONTROL) char *env; #endif -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) +#if defined(CONFIG_BOOTDELAY) char *s; int bootdelay; #endif @@ -431,7 +429,7 @@ void main_loop (void) update_tftp (0UL); #endif /* CONFIG_UPDATE_TFTP */ -#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) +#if defined(CONFIG_BOOTDELAY) s = getenv ("bootdelay"); bootdelay = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY; -- 1.7.11.5

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[U-Boot] [PATCH 0/4 v3] Add ACE HW support for SHA 256
by Akshay Saraswat 04 Mar '13

04 Mar '13

This patch set adds hardware acceleration for SHA 256 with the help of ACE. Changes since v2: - Patch-1: - Added falling back to software sha256 in case length exceeds buffer limit. - Reduced one tab at lines 533, 559 and 571 in the patch. - Removed space after a cast at line 506 in the patch. - Removed blank line at line 561 in the patch. - Removed space before semicolon at line 576 in the patch. - Patch-2: - Added "SHA1" in the comment for config. - Patch-3: - Added new nodes for SHA1 and SHA256 in struct hash_algo for the case when ACE is enabled. - Added new declaration for function pointer hash_func_ws with different return type. - Patch-4: - New patch to enable config for hash command. Akshay Saraswat (4): Exynos: Add hardware accelerated SHA 256 Exynos: config: Enable ACE HW for SHA 256 for Exynos gen: Add ACE acceleration to hash Exynos: config: Enable hash command Makefile | 1 + arch/arm/include/asm/arch-exynos/cpu.h | 4 + common/hash.c | 15 ++ drivers/crypto/Makefile | 47 +++++ drivers/crypto/ace_sfr.h | 310 +++++++++++++++++++++++++++++++++ drivers/crypto/ace_sha.c | 127 ++++++++++++++ include/ace_sha.h | 42 +++++ include/configs/exynos5250-dt.h | 4 + include/hash.h | 5 + 9 files changed, 555 insertions(+) create mode 100644 drivers/crypto/Makefile create mode 100644 drivers/crypto/ace_sfr.h create mode 100644 drivers/crypto/ace_sha.c create mode 100644 include/ace_sha.h -- 1.8.0

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[U-Boot] should tools/env/README also recommend setting HOSTSTRIP?
by Robert P. J. Day 04 Mar '13

04 Mar '13

it would seem that in addition to manually setting HOSTCC, a user should also set HOSTSTRIP when building fw_printenv, no? there's no mention of that in the README but the strip operation will certainly fail without it. rday

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Re: [U-Boot] [PATCH 1/4] Exynos: Add hardware accelerated SHA 256
by Kim Phillips 04 Mar '13

04 Mar '13

On Fri, 1 Mar 2013 16:11:36 +0000 Akshay Saraswat <akshay.s(a)samsung.com> wrote: > Samsung Enterprise Portal mySingle > > > > Hi Kim, > > > > >On Thu, 28 Feb 2013 11:08:21 +0000 > > >Akshay Saraswat <akshay.s(a)samsung.com> wrote: > > > > > >> >On Wed, 27 Feb 2013 10:24:39 -0500 > > >> > > >> >Akshay Saraswat <akshay.s(a)samsung.com> wrote: > > > > > >can you fix your mailer to not double space lines? > > > > Sorry for the disarranged text. I hope this time it is good. > > As you can see, no. It looks like you didn't change anything. I have to manually single-space things below. > >> So, I have incremented this value > >> to 500 which shall be good enough for the lowest of all frequencies. But I guess what we > >> need here is some formula, to calculate timeout on the basis of frequency, which is nowhere > >> defined. > > >That's odd - I see a bunch of frequencies advertised in > >arch/arm/cpu/armv7/exynos/clock.c. > >Or how about using a cycle counter instead? > >btw, where can I find documentation for the ACE? > > I tried with different frequencies and data sizes and found that it takes 2 to 3 msecs in all the cases. > Since, it is hardware accelerated encoding it is supposed to behave in this same manner. > But the current version of u-boot behaves mysteriously and slow downs when pressed enter for long. > In the above case mentioned I even saw time took to be more than 100 msecs for all the cases. > I think it would not be a better idea to timeout encoding acceleration. > But still if it is needed, cycle counter suggestion would be a great solution. it depends on whether the h/w can fault during its operation. > You can read Exynos5250 manual's "Security subsystem" section, which I referred for this. you mean this?: http://www.samsung.com/global/business/semiconductor/file/product/Exynos_5_… There is no "Security subsystem" section. Kim

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