March 2013 - U-Boot

[U-Boot] [PATCH v2 0/3] i.MX6 SabreSD and SabreAUTO bmode support
by Otavio Salvador 03 Mar '13

03 Mar '13

This adds the bmode support for i.MX6 SabreSD and SabreAUTO boards. This allows user to choose the boot mode at runtime making it easy to boot from USB or other media. Changes in v2: - Rework code to use a 'ret' variable (Fabio) - Improve commit log Otavio Salvador (3): mx6qsabresd: Fix card detection for invalid card id case mx6qsabresd: Document the mapping of USDHC[2-4] mx6qsabre{sd,auto}: Add boot mode select board/freescale/mx6qsabreauto/mx6qsabreauto.c | 17 +++++++++++++ board/freescale/mx6qsabresd/mx6qsabresd.c | 35 ++++++++++++++++++++++++--- include/configs/mx6qsabre_common.h | 4 ++- 3 files changed, 51 insertions(+), 5 deletions(-) -- 1.8.1

2 5

[U-Boot] [PATCH v6] mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support
by Jagannadha Sutradharudu Teki 03 Mar '13

03 Mar '13

From: aaron.williams(a)caviumnetworks.com This commit is based on that patch from aaron.williams(a)caviumnetworks.com with same commit title. pulled the same code changes into current u-boot tree. http://patchwork.ozlabs.org/patch/140863/ http://lists.denx.de/pipermail/u-boot/2011-April/089606.html This patch corrects the addresses used when working with Spansion/AMD FLASH chips. Addressing for 8 and 16 bits is almost identical except in the 16-bit case the LSB of the address is always 0. The confusion arose because the addresses in the datasheet for 16-bit mode are word addresses but this code assumed it was byte addresses. I have only been able to test this on our Octeon boards which use either an 8-bit or 16-bit bus. I have not tested the case where there's an 8-bit part on a 16-bit bus. This patch also adds some delays as suggested by Spansion. If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an 8-bit bus is detected. Apart from the pulled changes, fixed few minor code cleanups and tested on 256M29EW, 512M29EW flashes. Before this fix: --------------- Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes After this fix: -------------- Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x7E2301 Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes Signed-off-by: Aaron Williams <aaron.williams(a)caviumnetworks.com> Tested-by: Luka Perkov <uboot(a)lukaperkov.net> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Tested-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- Changes for v3: - Fixed few minor code cleanups Changes for v4: - Updated the S-o-b for original authors Changes for v5: - Collect all S-o-b together Changes for v6: - Preserving author details drivers/mtd/cfi_flash.c | 78 +++++++++++++++++++++++++++++++++-------------- include/mtd/cfi_flash.h | 41 ++++++++++++------------ 2 files changed, 76 insertions(+), 43 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 60dbb78..6b9fc1a 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -210,9 +210,11 @@ unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) static inline void * flash_map (flash_info_t * info, flash_sect_t sect, uint offset) { - unsigned int byte_offset = offset * info->portwidth; + unsigned int byte_offset = offset * info->portwidth / info->chipwidth; + unsigned int addr = (info->start[sect] + byte_offset); + unsigned int mask = 0xffffffff << (info->portwidth - 1); - return (void *)(info->start[sect] + byte_offset); + return (void *)(addr & mask); } static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, @@ -398,6 +400,8 @@ void flash_write_cmd (flash_info_t * info, flash_sect_t sect, #endif flash_write64(cword.ll, addr); break; + default: + printf("fwc: Unknown port width %d\n", info->portwidth); } /* Ensure all the instructions are fully finished */ @@ -585,7 +589,6 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, prompt, info->start[sector], flash_read_long (info, sector, 0)); flash_write_cmd (info, sector, 0, info->cmd_reset); - udelay(1); return ERR_TIMOUT; } udelay (1); /* also triggers watchdog */ @@ -753,12 +756,8 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) static flash_sect_t find_sector (flash_info_t * info, ulong addr) { static flash_sect_t saved_sector; /* previously found sector */ - static flash_info_t *saved_info; /* previously used flash bank */ flash_sect_t sector = saved_sector; - if ((info != saved_info) || (sector >= info->sector_count)) - sector = 0; - while ((info->start[sector] < addr) && (sector < info->sector_count - 1)) sector++; @@ -770,7 +769,6 @@ static flash_sect_t find_sector (flash_info_t * info, ulong addr) sector--; saved_sector = sector; - saved_info = info; return sector; } @@ -787,12 +785,15 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, /* Check if Flash is (sufficiently) erased */ switch (info->portwidth) { case FLASH_CFI_8BIT: + debug("%s: 8-bit 0x%02x\n", __func__, cword.c); flag = ((flash_read8(dstaddr) & cword.c) == cword.c); break; case FLASH_CFI_16BIT: + debug("%s: 16-bit 0x%04x\n", __func__, cword.w); flag = ((flash_read16(dstaddr) & cword.w) == cword.w); break; case FLASH_CFI_32BIT: + debug("%s: 32-bit 0x%08lx\n", __func__, cword.l); flag = ((flash_read32(dstaddr) & cword.l) == cword.l); break; case FLASH_CFI_64BIT: @@ -1053,6 +1054,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) flash_sect_t sect; int st; + debug("%s: erasing sectors %d to %d\n", __func__, s_first, s_last); + if (info->flash_id != FLASH_MAN_CFI) { puts ("Can't erase unknown flash type - aborted\n"); return 1; @@ -1162,6 +1165,9 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) rcode = 1; else if (flash_verbose) putc ('.'); + } else { + debug("\nSector %d is protected.\n", + info->protect[sect]); } } @@ -1857,7 +1863,7 @@ static void flash_read_cfi (flash_info_t *info, void *buf, unsigned int i; for (i = 0; i < len; i++) - p[i] = flash_read_uchar(info, start + i); + p[i] = flash_read_uchar(info, start + (i * 2)); } static void __flash_cmd_reset(flash_info_t *info) @@ -1878,21 +1884,40 @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) { int cfi_offset; - /* Issue FLASH reset command */ - flash_cmd_reset(info); - for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); cfi_offset++) { + /* Issue FLASH reset command */ + flash_cmd_reset(info); flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI); - if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { + if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') && + flash_isequal(info, 0, + FLASH_OFFSET_CFI_RESP + 2, 'R') && + flash_isequal(info, 0, + FLASH_OFFSET_CFI_RESP + 4, 'Y')) { flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, sizeof(struct cfi_qry)); +#ifdef CONFIG_SYS_FLASH_INTERFACE_WIDTH + info->interface = CONFIG_SYS_FLASH_INTERFACE_WIDTH; +#else info->interface = le16_to_cpu(qry->interface_desc); - + /* Some flash chips can support multiple bus widths. + * In this case, override the interface width and + * limit it to the port width. + */ + if ((info->interface == FLASH_CFI_X8X16) && + (info->portwidth == FLASH_CFI_8BIT)) { + debug("Overriding 16-bit interface" + " width to 8-bit port width.\n"); + info->interface = FLASH_CFI_X8; + } else if ((info->interface == FLASH_CFI_X16X32) && + (info->portwidth == FLASH_CFI_16BIT)) { + debug("Overriding 16-bit interface" + " width to 16-bit port width.\n"); + info->interface = FLASH_CFI_X16; + } +#endif info->cfi_offset = flash_offset_cfi[cfi_offset]; debug ("device interface is %d\n", info->interface); @@ -1903,8 +1928,8 @@ static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) info->chipwidth << CFI_FLASH_SHIFT_WIDTH); /* calculate command offsets as in the Linux driver */ - info->addr_unlock1 = 0x555; - info->addr_unlock2 = 0x2aa; + info->addr_unlock1 = 0xaaa; + info->addr_unlock2 = 0x555; /* * modify the unlock address if we are @@ -1938,8 +1963,12 @@ static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) for (info->chipwidth = FLASH_CFI_BY8; info->chipwidth <= info->portwidth; info->chipwidth <<= 1) - if (__flash_detect_cfi(info, qry)) + if (__flash_detect_cfi(info, qry)) { + debug("Found CFI flash, portwidth %d," + " chipwidth %d\n", + info->portwidth, info->chipwidth); return 1; + } } debug ("not found\n"); return 0; @@ -1958,7 +1987,7 @@ static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) /* CFI < 1.1, try to guess from device id */ if ((info->device_id & 0x80) != 0) cfi_reverse_geometry(qry); - } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { + } else if (flash_read_uchar(info, info->ext_addr + 0x1e) == 3) { /* CFI >= 1.1, deduct from top/bottom flag */ /* note: ext_addr is valid since cfi_version > 0 */ cfi_reverse_geometry(qry); @@ -2054,14 +2083,15 @@ ulong flash_get_size (phys_addr_t base, int banknum) if (flash_detect_cfi (info, &qry)) { info->vendor = le16_to_cpu(qry.p_id); - info->ext_addr = le16_to_cpu(qry.p_adr); + info->ext_addr = le16_to_cpu(qry.p_adr) * 2; + debug("extended address is 0x%x\n", info->ext_addr); num_erase_regions = qry.num_erase_regions; if (info->ext_addr) { info->cfi_version = (ushort) flash_read_uchar (info, - info->ext_addr + 3) << 8; + info->ext_addr + 6) << 8; info->cfi_version |= (ushort) flash_read_uchar (info, - info->ext_addr + 4); + info->ext_addr + 8); } #ifdef DEBUG @@ -2112,6 +2142,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) debug ("device id is 0x%x\n", info->device_id); debug ("device id2 is 0x%x\n", info->device_id2); debug ("cfi version is 0x%04x\n", info->cfi_version); + debug("port width: %d, chipwidth: %d, interface: %d\n", + info->portwidth, info->chipwidth, info->interface); size_ratio = info->portwidth / info->chipwidth; /* if the chip is x8/x16 reduce the ratio by half */ diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 966b5e0..9bd76eb 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -78,29 +78,30 @@ #define FLASH_CONTINUATION_CODE 0x7F #define FLASH_OFFSET_MANUFACTURER_ID 0x00 -#define FLASH_OFFSET_DEVICE_ID 0x01 -#define FLASH_OFFSET_DEVICE_ID2 0x0E -#define FLASH_OFFSET_DEVICE_ID3 0x0F -#define FLASH_OFFSET_CFI 0x55 +#define FLASH_OFFSET_DEVICE_ID 0x02 +#define FLASH_OFFSET_DEVICE_ID2 0x1C +#define FLASH_OFFSET_DEVICE_ID3 0x1E +#define FLASH_OFFSET_CFI 0xAA + #define FLASH_OFFSET_CFI_ALT 0x555 -#define FLASH_OFFSET_CFI_RESP 0x10 -#define FLASH_OFFSET_PRIMARY_VENDOR 0x13 +#define FLASH_OFFSET_CFI_RESP 0x20 +#define FLASH_OFFSET_PRIMARY_VENDOR 0x26 /* extended query table primary address */ -#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x2A #define FLASH_OFFSET_WTOUT 0x1F -#define FLASH_OFFSET_WBTOUT 0x20 -#define FLASH_OFFSET_ETOUT 0x21 -#define FLASH_OFFSET_CETOUT 0x22 -#define FLASH_OFFSET_WMAX_TOUT 0x23 -#define FLASH_OFFSET_WBMAX_TOUT 0x24 -#define FLASH_OFFSET_EMAX_TOUT 0x25 -#define FLASH_OFFSET_CEMAX_TOUT 0x26 -#define FLASH_OFFSET_SIZE 0x27 -#define FLASH_OFFSET_INTERFACE 0x28 -#define FLASH_OFFSET_BUFFER_SIZE 0x2A -#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C -#define FLASH_OFFSET_ERASE_REGIONS 0x2D -#define FLASH_OFFSET_PROTECT 0x02 +#define FLASH_OFFSET_WBTOUT 0x40 +#define FLASH_OFFSET_ETOUT 0x4A +#define FLASH_OFFSET_CETOUT 0x44 +#define FLASH_OFFSET_WMAX_TOUT 0x46 +#define FLASH_OFFSET_WBMAX_TOUT 0x48 +#define FLASH_OFFSET_EMAX_TOUT 0x4A +#define FLASH_OFFSET_CEMAX_TOUT 0x4C +#define FLASH_OFFSET_SIZE 0x4E +#define FLASH_OFFSET_INTERFACE 0x50 +#define FLASH_OFFSET_BUFFER_SIZE 0x54 +#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x58 +#define FLASH_OFFSET_ERASE_REGIONS 0x5A +#define FLASH_OFFSET_PROTECT 0x04 #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 -- 1.7.4

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[U-Boot] [PATCH v8 01/31] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
by Benoît Thébaudeau 03 Mar '13

03 Mar '13

From: Fabio Estevam <fabio.estevam(a)freescale.com> Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau(a)advansee.com> --- Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None README | 9 ++++++--- drivers/mtd/nand/ndfc.c | 4 ++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/README b/README index d8cb394..830c45e 100644 --- a/README +++ b/README @@ -3713,9 +3713,12 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_SRIOn_MEM_SIZE: Size of SRIO port 'n' memory region -- CONFIG_SYS_NDFC_16 - Defined to tell the NDFC that the NAND chip is using a - 16 bit bus. +- CONFIG_SYS_NAND_BUSWIDTH_16BIT + Defined to tell the NAND controller that the NAND chip is using + a 16 bit bus. + Not all NAND drivers use this symbol. + Example of driver that uses it: + - drivers/mtd/nand/ndfc.c - CONFIG_SYS_NDFC_EBC0_CFG Sets the EBC0_CFG register for the NDFC. If not defined diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 6ebbb5e..213d2c9 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -156,7 +156,7 @@ static uint8_t ndfc_read_byte(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT return (uint8_t) readw(chip->IO_ADDR_R); #else return readb(chip->IO_ADDR_R); @@ -218,7 +218,7 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.bytes = 3; nand->select_chip = ndfc_select_chip; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT nand->options |= NAND_BUSWIDTH_16; #endif -- 1.7.10.4

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[U-Boot] [PATCH] patman: Don't barf if the word 'commit' starts a line
by Doug Anderson 03 Mar '13

03 Mar '13

Patman's regular expression for detecting the start of a commit in a git log was a little simplistic and could be confused if the git log itself had the word "commit" as the start of a line (as this commit does). Make patman a little more robust. Signed-off-by: Doug Anderson <dianders(a)chromium.org> --- tools/patman/patchstream.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py index f7ee75a..cf12362 100644 --- a/tools/patman/patchstream.py +++ b/tools/patman/patchstream.py @@ -49,7 +49,7 @@ re_series = re.compile('^Series-(\w*): *(.*)') re_tag = re.compile('^(Tested-by|Acked-by|Cc): (.*)') # The start of a new commit in the git log -re_commit = re.compile('^commit (.*)') +re_commit = re.compile('^commit ([0-9a-f]*)$') # We detect these since checkpatch doesn't always do it re_space_before_tab = re.compile('^[+].* \t') -- 1.8.1.3

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[U-Boot] [PATCH 0/4 V2] SMDK5250: FDT: Add device tree support for console
by Rajeshwari Shinde 03 Mar '13

03 Mar '13

Enabled fdt support for default console on SMDK5250. Changes in V2: - Changed the compatible string to "samsung,exynos4210-uart" Rajeshwari Shinde (4): EXYNOS5: FDT: Add compatible strings for Serial EXYNOS5: FDT: Add serial device node values S5P: Serial: Add fdt support to driver CONFIG: EXYNOS5: Enable silent console arch/arm/dts/exynos5250.dtsi | 27 ++++++++++ board/samsung/dts/exynos5250-smdk5250.dts | 1 + drivers/serial/serial_s5p.c | 80 +++++++++++++++++++++++++++++ include/configs/exynos5250-dt.h | 2 + include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 6 files changed, 112 insertions(+), 0 deletions(-) -- 1.7.4.4

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[U-Boot] [PATCH v5 0/23] Create generic board init for ARM, x86, PPC
by Simon Glass 03 Mar '13

03 Mar '13

This series creates a generic board init implementation which contains the essential functions of the major arch/xxx/lib/board.c files. It is split into two parts: board_f.c for pre-relocation and board_r.c for post-relocation. What is the motivation for this change? 1. There is a lot of repeated code in the board.c files. Any change to things like setting up the baud rate requires a change in 10 separate places. 2. Since there are 14 separate files, adding a new feature which requires initialisation is painful since it must be independently added in 14 places. 3. As time goes by the architectures naturely diverge since there is limited pressure to compare features or even CONFIG options against simiilar things in other board.c files. 4. New architectures must implement all the features all over again, and sometimes in subtley different ways. This places an unfair burden on getting a new architecture fully functional and running with U-Boot. 5. While it is a bit of a tricky change, I believe it is worthwhile and achievable. There is no requirement that all code be common, only that the code that is common should be located in common/board.c rather than arch/xxx/lib/board.c. All the functions of board_init_f() and board_init_r() are broken into separate function calls so that they can easily be included or excluded for a particular architecture. It also makes it easier to adopt Graeme's initcall proposal assuming this comes about. http://lists.denx.de/pipermail/u-boot/2012-January/114499.html This series is not dependent on generic relocation. So relocation happens as one big chunk and is still completely arch-specific. See the relocation series for a proposed solution to this for ARM: http://lists.denx.de/pipermail/u-boot/2011-December/112928.html or x86's implementation which is in mainline. Unifying relocation is probably the next step after this series. Instead of moving over a whole architecture, this series takes the approach of simply enabling generic board support for an architecture. It is then up to each board to opt in by defining CONFIG_SYS_GENERIC_BOARD in the board config file. If this is not done, then the code will be generated as before. This allows both sets of code to co-exist until we are comfortable with the generic approach, and enough boards run. ARM is a relatively large board.c file and one which I can test, therefore I think it is a good target for this series. On the other hand, x86 is relatively small and simple, but different enough that it introduces a few issues to be solved. So I have chosen both ARM and x86 for this series. After a suggestion from Wolfgang I have added PPC also. This is the largest and most feature-full board, so hopefully we have all bases covered in this series. Other archs are mostly a subset of these. A generic global_data structure is now in mainline, and this is required for this series. Similarly we need a generic bd_info structure, since generic code will be accessing it. I have done this with a simple generic file for now. There was dicussion on the list about passing gd_t around as a parameter to pre-relocation init functions. I think this makes sense, but it can be done as a separate change, and this series does not require it. While this series needs to stand on its own, the goal is the unification of the board init code. So I hope we can address issues with this in mind, rather than focusing too narrowly on particular ARM, x86 or PPC issues. I have added TODO markers in places where I think there are opportunities to relationalise the board init now it is all in one place, but these don't need to be addressed for the feature to work, and are best done as smaller patches than can be reviewed by individual arch maintainers, I think. I have run-tested ARM on Tegra Seaboard and x86/coreboot only. To try it out, define CONFIG_SYS_GENERIC_BOARD in your board file and rebuild. Most likely on PPC at least it will hang, but if you are lucky it will print something first :-) I hope to test an SPL board (snow / exynos5250) when I can get that booting from mainline. I have run this though buildman with CONFIG_SYS_GENERIC_BOARD on for all ARM, PPC and x86 boards. The only failure is highbank (an ARM board), which seems to use SCSI but scsi_init() is not available. Code size increases by about 1KB on ARM and about 1.3KB on PPC with generic board enabled. This is mostly due to the move to using separate functions for each part of the init, which will make it easier to move to a pure initcall approach later if we want to. Since this series was first sent there have been additions to the board code for ARM and PPC. I have added in these additions. This is a manual process, and I expect that people will find problems (and send patches) as they try out their boards. Changes in v5: - Use unsigned int for baud_rate - Remove bi_ip_addr field from struct bd_info - Add new patch to replace __bss_end__ with __bss_end - Remove the __bss_end #define now that this is consistent across U-Boot - Remove avr32 changes from what should be an arm patch - Adjust u-boot-nds32.h link symbols to keep U-Boot building - Add debug() code to initcalls - Update copyright on initcalls - Avoid using static declaration for init_func_watchdog_reset() - Add fdtdec header file to board_f.c - Remove setup_global_data_ptr() - Tidy up stack init - Put global data on stack in board_init_f() - Add fdt relocation - Remove fdt relocation field from x86 arch_global_data - Deal with change of board_init_f() semantics on ARM - Save boot_flags in global_data in board_init_f() - Add print_cpuinfo() prototype to include/common.h - Add code from arch/arm/lib/board.c to control loading of environment - Put watchdog init function definitions in watchdog.h - Adjust ppc to work with watchdog.h additions - Add new patch to fix config in keymile boards - Add offsets support for access to fdt that uses CONFIG_OF_SEPARATE - Use watchdog.h for watchdog functions - Add define to work around __bss_end / __bss_end__ confusion - Add prototype for update_flash_size() to include/common.h - Updates in board_r.c to make ppc build correctly - Add prototype for board_start_ide() to include/ide.h - Bring in new ppc features since this patch was first created - Add new patch to adjust board_f.c for x86 - Add new patch to adjust board_r.c for x86 - Include asm/sections.h in x86 sdram code - Define _end instead of __end for x86 - Avoid setting up gd on x86 as it is already done Changes in v4: - Add three more fields required for ARM - Add asm/sections.h for each architecture - Use asm/sections.h instead of asm-generic/sections.h - Use asm/sections.h instead of asm-generic/sections.h - Adjust u-boot-x86.h link symbols to keep U-Boot building - Use asm/sections.h instead of asm-generic/sections.h - Use asm/sections.h instead of asm-generic/sections.h - Updates to sit on top of earlier patches - Updates to sit on top of earlier patches - Use asm/sections.h instead of asm-generic/sections.h - Rebase to master - Drop sc520_timer.c patch (warning already fixed by previous patch) Changes in v3: - Cast away the volatile on gd for memcpy() - Add header to new x86 relocate.c and init_helpers.c - Rebase to master - Rebase on top of x86/master (which has not yet been pulled to master) Changes in v2: - Change generic board to an opt-in system on a per-board basic - Add CONFIG_SYS_GENERIC_BOARD to allow board to select generic board - Add PowerPC support - Rebase to master Simon Glass (23): ppc: Add initial memory barrier macros Introduce generic u-boot.h file Replace __bss_end__ with __bss_end Introduce generic link section.h symbol files arm: Use sections header to obtain link symbols x86: nds32: Change stub example to use asm-generic/sections.h Introduce a basic initcall implementation Define CONFIG_SYS_LEGACY_BOARD everywhere Declare watchdog functions in watchdog.h Introduce generic pre-relocation board_f.c Introduce generic post-relocation board_r.c Add spl load feature arm: Remove use of board_early_init_r/last_stage_init() arm: Enable generic board support Add CONFIG_SYS_SYM_OFFSETS to support offset symbols Adjust board_f.c for ppc Adjust board_r.c for ppc ppc: Enable generic board support x86: Adjust board_f.c for x86 x86: Adjust board_r.c for x86 x86: Use sections header to obtain link symbols x86: Enable generic board support tegra: Enable generic board for Seaboard. README | 17 + arch/arm/cpu/arm1136/start.S | 2 +- arch/arm/cpu/arm1136/u-boot-spl.lds | 2 +- arch/arm/cpu/arm1176/start.S | 2 +- arch/arm/cpu/arm720t/start.S | 2 +- arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 2 +- arch/arm/cpu/arm920t/start.S | 2 +- arch/arm/cpu/arm925t/start.S | 2 +- arch/arm/cpu/arm926ejs/davinci/spl.c | 2 +- arch/arm/cpu/arm926ejs/mxs/start.S | 2 +- arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 2 +- arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds | 2 +- arch/arm/cpu/arm926ejs/start.S | 4 +- arch/arm/cpu/arm946es/start.S | 2 +- arch/arm/cpu/arm_intcm/start.S | 2 +- arch/arm/cpu/armv7/omap-common/u-boot-spl.lds | 2 +- arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 2 +- arch/arm/cpu/armv7/start.S | 2 +- arch/arm/cpu/ixp/start.S | 2 +- arch/arm/cpu/ixp/u-boot.lds | 2 +- arch/arm/cpu/pxa/start.S | 2 +- arch/arm/cpu/s3c44b0/start.S | 2 +- arch/arm/cpu/sa1100/start.S | 2 +- arch/arm/cpu/u-boot.lds | 4 +- arch/arm/include/asm/sections.h | 27 + arch/arm/include/asm/spl.h | 2 +- arch/arm/include/asm/u-boot-arm.h | 4 - arch/arm/include/asm/u-boot.h | 9 + arch/arm/lib/Makefile | 3 + arch/arm/lib/board.c | 1 + arch/arm/lib/crt0.S | 4 +- arch/arm/lib/spl.c | 2 +- arch/avr32/config.mk | 3 + arch/avr32/cpu/start.S | 2 +- arch/avr32/cpu/u-boot.lds | 2 +- arch/avr32/include/asm/sections.h | 6 +- arch/avr32/lib/board.c | 4 +- arch/blackfin/config.mk | 3 + arch/blackfin/include/asm/sections.h | 27 + arch/m68k/config.mk | 3 + arch/m68k/include/asm/sections.h | 27 + arch/m68k/lib/board.c | 4 +- arch/microblaze/config.mk | 3 + arch/microblaze/include/asm/sections.h | 27 + arch/mips/config.mk | 3 + arch/mips/include/asm/sections.h | 27 + arch/nds32/config.mk | 3 + arch/nds32/cpu/n1213/start.S | 2 +- arch/nds32/cpu/n1213/u-boot.lds | 2 +- arch/nds32/include/asm/sections.h | 27 + arch/nds32/include/asm/u-boot-nds32.h | 8 +- arch/nds32/lib/board.c | 2 +- arch/nios2/config.mk | 3 + arch/nios2/cpu/start.S | 6 +- arch/nios2/cpu/u-boot.lds | 2 +- arch/nios2/include/asm/sections.h | 27 + arch/openrisc/include/asm/sections.h | 27 + arch/powerpc/cpu/74xx_7xx/start.S | 4 +- arch/powerpc/cpu/74xx_7xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc512x/start.S | 4 +- arch/powerpc/cpu/mpc512x/u-boot.lds | 2 +- arch/powerpc/cpu/mpc5xx/start.S | 4 +- arch/powerpc/cpu/mpc5xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc5xxx/spl_boot.c | 2 +- arch/powerpc/cpu/mpc5xxx/start.S | 4 +- arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds | 2 +- arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds | 2 +- arch/powerpc/cpu/mpc5xxx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc8220/start.S | 4 +- arch/powerpc/cpu/mpc8220/u-boot.lds | 2 +- arch/powerpc/cpu/mpc824x/start.S | 4 +- arch/powerpc/cpu/mpc824x/u-boot.lds | 2 +- arch/powerpc/cpu/mpc8260/start.S | 4 +- arch/powerpc/cpu/mpc8260/u-boot.lds | 2 +- arch/powerpc/cpu/mpc83xx/start.S | 4 +- arch/powerpc/cpu/mpc83xx/u-boot-spl.lds | 4 +- arch/powerpc/cpu/mpc83xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc85xx/start.S | 4 +- arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc86xx/start.S | 4 +- arch/powerpc/cpu/mpc86xx/u-boot.lds | 2 +- arch/powerpc/cpu/mpc8xx/start.S | 4 +- arch/powerpc/cpu/ppc4xx/start.S | 4 +- arch/powerpc/cpu/ppc4xx/u-boot.lds | 2 +- arch/powerpc/include/asm/io.h | 8 + arch/powerpc/include/asm/sections.h | 27 + arch/powerpc/include/asm/spl.h | 2 +- arch/powerpc/include/asm/u-boot.h | 7 + arch/powerpc/lib/Makefile | 2 + arch/powerpc/lib/board.c | 18 +- arch/sandbox/config.mk | 3 + arch/sandbox/include/asm/sections.h | 2 + arch/sh/config.mk | 3 + arch/sh/cpu/sh2/u-boot.lds | 2 +- arch/sh/cpu/sh3/u-boot.lds | 2 +- arch/sh/cpu/sh4/u-boot.lds | 2 +- arch/sh/include/asm/sections.h | 27 + arch/sparc/config.mk | 3 + arch/sparc/include/asm/sections.h | 27 + arch/x86/cpu/coreboot/sdram.c | 1 + arch/x86/cpu/u-boot.lds | 4 +- arch/x86/include/asm/global_data.h | 1 - arch/x86/include/asm/sections.h | 27 + arch/x86/include/asm/u-boot-x86.h | 9 - arch/x86/include/asm/u-boot.h | 11 + arch/x86/lib/Makefile | 3 + arch/x86/lib/board.c | 3 +- arch/x86/lib/init_helpers.c | 3 +- arch/x86/lib/relocate.c | 9 +- board/BuS/eb_cpu5282/u-boot.lds | 2 +- board/LEOX/elpt860/u-boot.lds | 2 +- board/RPXClassic/u-boot.lds | 2 +- board/RPXlite/u-boot.lds | 2 +- board/RPXlite_dw/u-boot.lds | 2 +- board/RRvision/u-boot.lds | 2 +- board/actux1/u-boot.lds | 2 +- board/actux2/u-boot.lds | 2 +- board/actux3/u-boot.lds | 2 +- board/adder/u-boot.lds | 2 +- board/ait/cam_enc_4xx/u-boot-spl.lds | 2 +- board/altera/nios2-generic/u-boot.lds | 2 +- board/amcc/acadia/u-boot-nand.lds | 2 +- board/amcc/bamboo/u-boot-nand.lds | 2 +- board/amcc/canyonlands/u-boot-nand.lds | 2 +- board/amcc/kilauea/u-boot-nand.lds | 2 +- board/amcc/sequoia/u-boot-nand.lds | 2 +- board/amcc/sequoia/u-boot-ram.lds | 2 +- board/astro/mcf5373l/u-boot.lds | 2 +- board/cm4008/flash.c | 1 + board/cm41xx/flash.c | 1 + board/cobra5272/u-boot.lds | 2 +- board/cogent/u-boot.lds | 2 +- board/dave/PPChameleonEVB/u-boot.lds | 2 +- board/davinci/da8xxevm/u-boot-spl-da850evm.lds | 2 +- board/davinci/da8xxevm/u-boot-spl-hawk.lds | 2 +- board/dvlhost/u-boot.lds | 2 +- board/eltec/mhpc/u-boot.lds | 2 +- board/emk/top860/u-boot.lds | 2 +- board/ep88x/u-boot.lds | 2 +- board/esd/dasa_sim/u-boot.lds | 2 +- board/esd/pmc440/u-boot-nand.lds | 2 +- board/esd/tasreg/u-boot.lds | 2 +- board/esteem192e/u-boot.lds | 2 +- board/evb64260/u-boot.lds | 2 +- board/fads/u-boot.lds | 2 +- board/flagadm/u-boot.lds | 2 +- board/freescale/m5208evbe/u-boot.lds | 2 +- board/freescale/m52277evb/u-boot.lds | 2 +- board/freescale/m5235evb/u-boot.lds | 2 +- board/freescale/m5249evb/u-boot.lds | 2 +- board/freescale/m5253demo/u-boot.lds | 2 +- board/freescale/m5253evbe/u-boot.lds | 2 +- board/freescale/m5271evb/u-boot.lds | 2 +- board/freescale/m5272c3/u-boot.lds | 2 +- board/freescale/m5275evb/u-boot.lds | 2 +- board/freescale/m5282evb/u-boot.lds | 2 +- board/freescale/m53017evb/u-boot.lds | 2 +- board/freescale/m5329evb/u-boot.lds | 2 +- board/freescale/m5373evb/u-boot.lds | 2 +- board/freescale/m54418twr/u-boot.lds | 2 +- board/freescale/m54451evb/u-boot.lds | 2 +- board/freescale/m54455evb/u-boot.lds | 2 +- board/freescale/m547xevb/u-boot.lds | 2 +- board/freescale/m548xevb/u-boot.lds | 2 +- board/freescale/mx31ads/u-boot.lds | 2 +- board/gaisler/gr_cpci_ax2000/u-boot.lds | 2 +- board/gaisler/gr_ep2s60/u-boot.lds | 2 +- board/gaisler/gr_xc3s_1500/u-boot.lds | 2 +- board/gaisler/grsim/u-boot.lds | 2 +- board/gaisler/grsim_leon2/u-boot.lds | 2 +- board/gen860t/u-boot-flashenv.lds | 2 +- board/gen860t/u-boot.lds | 2 +- board/genietv/u-boot.lds | 2 +- board/hermes/u-boot.lds | 2 +- board/hymod/u-boot.lds | 2 +- board/icu862/u-boot.lds | 2 +- board/idmr/u-boot.lds | 2 +- board/ip860/u-boot.lds | 2 +- board/ivm/u-boot.lds | 2 +- board/korat/u-boot-F7FC.lds | 2 +- board/kup/kup4k/u-boot.lds | 2 +- board/kup/kup4x/u-boot.lds | 2 +- board/lwmon/u-boot.lds | 2 +- board/manroland/uc100/u-boot.lds | 2 +- board/matrix_vision/mvsmr/u-boot.lds | 2 +- board/mbx8xx/u-boot.lds | 2 +- board/mousse/u-boot.lds | 2 +- board/mvblue/u-boot.lds | 2 +- board/netphone/u-boot.lds | 2 +- board/netta/u-boot.lds | 2 +- board/netta2/u-boot.lds | 2 +- board/netvia/u-boot.lds | 2 +- board/nx823/u-boot.lds | 2 +- board/quantum/u-boot.lds | 2 +- board/r360mpi/u-boot.lds | 2 +- board/rbc823/u-boot.lds | 2 +- board/renesas/sh7752evb/u-boot.lds | 2 +- board/renesas/sh7757lcr/u-boot.lds | 2 +- board/rsdproto/u-boot.lds | 2 +- board/samsung/smdk5250/smdk5250-uboot-spl.lds | 2 +- board/samsung/smdk6400/u-boot-nand.lds | 2 +- board/sandpoint/u-boot.lds | 2 +- board/sixnet/u-boot.lds | 2 +- board/snmc/qs850/u-boot.lds | 2 +- board/snmc/qs860t/u-boot.lds | 2 +- board/spc1920/u-boot.lds | 2 +- board/spd8xx/u-boot.lds | 2 +- board/stx/stxxtc/u-boot.lds | 2 +- board/svm_sc8xx/u-boot.lds | 2 +- board/tqc/tqm8xx/u-boot.lds | 2 +- board/v37/u-boot.lds | 2 +- board/vpac270/u-boot-spl.lds | 2 +- board/woodburn/woodburn.c | 2 +- common/Makefile | 4 + common/board_f.c | 1021 ++++++++++++++++++++++ common/board_r.c | 916 +++++++++++++++++++ config.mk | 8 + examples/standalone/stubs.c | 7 +- include/asm-generic/global_data.h | 2 + include/asm-generic/sections.h | 119 +++ include/asm-generic/u-boot.h | 159 ++++ include/common.h | 2 + include/configs/km/keymile-common.h | 4 - include/configs/km/km-powerpc.h | 4 + include/configs/seaboard.h | 2 + include/ide.h | 7 + include/initcall.h | 25 + include/watchdog.h | 18 + lib/Makefile | 1 + lib/initcall.c | 39 + nand_spl/board/amcc/acadia/u-boot.lds | 2 +- nand_spl/board/amcc/bamboo/u-boot.lds | 2 +- nand_spl/board/amcc/canyonlands/u-boot.lds | 2 +- nand_spl/board/amcc/kilauea/u-boot.lds | 2 +- nand_spl/board/amcc/sequoia/u-boot.lds | 2 +- nand_spl/board/freescale/mpc8315erdb/u-boot.lds | 4 +- nand_spl/board/freescale/mx31pdk/u-boot.lds | 2 +- nand_spl/board/karo/tx25/u-boot.lds | 2 +- nand_spl/board/samsung/smdk6400/u-boot.lds | 2 +- nand_spl/board/sheldon/simpc8313/u-boot.lds | 4 +- 243 files changed, 2976 insertions(+), 253 deletions(-) create mode 100644 arch/arm/include/asm/sections.h create mode 100644 arch/blackfin/include/asm/sections.h create mode 100644 arch/m68k/include/asm/sections.h create mode 100644 arch/microblaze/include/asm/sections.h create mode 100644 arch/mips/include/asm/sections.h create mode 100644 arch/nds32/include/asm/sections.h create mode 100644 arch/nios2/include/asm/sections.h create mode 100644 arch/openrisc/include/asm/sections.h create mode 100644 arch/powerpc/include/asm/sections.h create mode 100644 arch/sh/include/asm/sections.h create mode 100644 arch/sparc/include/asm/sections.h create mode 100644 arch/x86/include/asm/sections.h create mode 100644 common/board_f.c create mode 100644 common/board_r.c create mode 100644 include/asm-generic/sections.h create mode 100644 include/asm-generic/u-boot.h create mode 100644 include/initcall.h create mode 100644 lib/initcall.c -- 1.8.1

6 49

[U-Boot] [PATCH 0/3] i.MX6 SabreSD and SabreAUTO bmode support
by Otavio Salvador 03 Mar '13

03 Mar '13

This adds the bmode support for i.MX6 SabreSD and SabreAUTO boards. This allows user to choose the boot mode at runtime making it easy to boot from USB or other media. Otavio Salvador (3): mx6qsabresd: Fix card detection for invalid card id case mx6qsabresd: Document the mapping of USDHC[2-4] mx6qsabre{sd,auto}: Add boot mode select board/freescale/mx6qsabreauto/mx6qsabreauto.c | 17 ++++++++++++++++ board/freescale/mx6qsabresd/mx6qsabresd.c | 28 ++++++++++++++++++++++++++- include/configs/mx6qsabre_common.h | 4 +++- 3 files changed, 47 insertions(+), 2 deletions(-) -- 1.8.1

2 12

Re: [U-Boot] [PATCH v5 0/3] mx23/mxs pending patches
by Fabio Estevam 02 Mar '13

02 Mar '13

On Sat, Mar 2, 2013 at 5:07 PM, Otavio Salvador <otavio(a)ossystems.com.br> wrote: >> What issues does this patch series fix? I see that it adds USB >> support, but I don't see any bug fix. > > This is the missing patches, which has not been included in Marek series. He > has included most patches in his pull request but this one's. [Adding the list] Ok, I see, but looks like you forgot to update the cover letter, as there are no bug fixes in this series as stated here.

2 1

[U-Boot] FDT howto
by Jagan Teki 02 Mar '13

02 Mar '13

Hi All, I am planning to use devicetree on u-boot. I have an experience to work with devicetree on Linux. For u-boot, I have read doc from doc/README.fdt-control. I see some dts usages on tegra boards. I have lot of confusions with the concept itself. Is Linux and u-boot devicetree concept and build system are same? Suppose I have 4 boards J1, J2, J3 & J4 on my soc "emb".of vendor "vast" For this requirement I have board/vast/dts/J1.dts board/vast/dts/J2.dts board/vast/dts/J3.dts board/vast/dts/J4.dts include/configs/emb_common.h ==> single configuration of all SOC needed definitions like defconfig in Linux. do I need any more files? In emb_common.h i am defining CONFIG_OF_SEPARATE is it sufficient? My plan is to build u-boot and then build the dtb with specific board and then combine. I saw that all tegra boards config files are defining CONFIG_DEFAULT_DEVICE_TREE if ie. the case dts is a compile time option right. am i correct? Please let me know your inputs. -- Thanks, Jagan.

2 21

[U-Boot] [PATCH] Tegra114: pinmux: Update pinmux tables & code, fix a bug w/SDMMC3 init
by Tom Warren 02 Mar '13

02 Mar '13

Use the latest tables & code from our internal U-Boot repo. The SDMMC3_CD, CLK_LB_IN and CLK_LB_OUT offsets in the pingroup table were off by a few indices, causing the pinmux init code to write bad data to the PINMUX_AUX_ regs. This also enabled the lock bit, which made it impossible to reconfig the pads correctly for SDMMC3 (SD card on Dalmore) operation. Also fixes SPI_CS2_N, USB_VBUS_EN0, HDMI_CEC and UART2_RXD/TXD muxes. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- arch/arm/cpu/tegra114-common/pinmux.c | 214 +++++++----- arch/arm/include/asm/arch-tegra114/pinmux.h | 146 ++------ board/nvidia/dalmore/dalmore.c | 3 + board/nvidia/dalmore/pinmux-config-dalmore.h | 463 ++++++++++++++++---------- 4 files changed, 449 insertions(+), 377 deletions(-) diff --git a/arch/arm/cpu/tegra114-common/pinmux.c b/arch/arm/cpu/tegra114-common/pinmux.c index 52b3ec4..2cdabdf 100644 --- a/arch/arm/cpu/tegra114-common/pinmux.c +++ b/arch/arm/cpu/tegra114-common/pinmux.c @@ -37,6 +37,7 @@ struct tegra_pingroup_desc { #define PMUX_OD_SHIFT 6 #define PMUX_LOCK_SHIFT 7 #define PMUX_IO_RESET_SHIFT 8 +#define PMUX_RCV_SEL_SHIFT 9 /* Convenient macro for defining pin group properties */ #define PIN(pg_name, vdd, f0, f1, f2, f3, iod) \ @@ -58,6 +59,10 @@ struct tegra_pingroup_desc { #define PINO(pg_name, vdd, f0, f1, f2, f3) \ PIN(pg_name, vdd, f0, f1, f2, f3, OUTPUT) +/* A pin group number which is not used */ +#define PIN_RESERVED \ + PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE) + const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = { /* NAME VDD f0 f1 f2 f3 */ PINI(ULPI_DATA0, BB, SPI3, HSI, UARTA, ULPI), @@ -84,71 +89,71 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = { PINI(SDMMC1_DAT2, SDMMC1, SDMMC1, PWM0, SPI4, UARTA), PINI(SDMMC1_DAT1, SDMMC1, SDMMC1, PWM1, SPI4, UARTA), PINI(SDMMC1_DAT0, SDMMC1, SDMMC1, RSVD2, SPI4, UARTA), - PINI(GPIO_PV2, BB, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(GPIO_PV3, BB, RSVD1, RSVD2, RSVD3, RSVD4), + PIN_RESERVED, /* Reserved by t114: 0x3060 - 0x3064 */ + PIN_RESERVED, PINI(CLK2_OUT, SDMMC1, EXTPERIPH2, RSVD2, RSVD3, RSVD4), PINI(CLK2_REQ, SDMMC1, DAP, RSVD2, RSVD3, RSVD4), - PINO(LCD_PWR1, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_PWR2, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_SDIN, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_SDOUT, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_WR_N, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_CS0_N, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_DC0, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_SCK, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_PWR0, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_PCLK, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_DE, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_HSYNC, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_VSYNC, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D0, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D1, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D2, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D3, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D4, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D5, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D6, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D7, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D8, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D9, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D10, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D11, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D12, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D13, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D14, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D15, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D16, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D17, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D18, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D19, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D20, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D21, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D22, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_D23, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_CS1_N, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_M1, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINO(LCD_DC1, LCD, RSVD1, RSVD2, RSVD3, RSVD4), + PIN_RESERVED, /* Reserved by t114: 0x3070 - 0x310c */ + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, PINI(HDMI_INT, LCD, RSVD1, RSVD2, RSVD3, RSVD4), PINI(DDC_SCL, LCD, I2C4, RSVD2, RSVD3, RSVD4), PINI(DDC_SDA, LCD, I2C4, RSVD2, RSVD3, RSVD4), - PINI(CRT_HSYNC, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(CRT_VSYNC, LCD, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D0, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D1, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D2, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D3, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D4, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D5, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D6, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D7, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D8, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D9, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D10, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_D11, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_PCLK, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_MCLK, VI, RSVD1, RSVD3, RSVD3, RSVD4), - PINI(VI_VSYNC, VI, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(VI_HSYNC, VI, RSVD1, RSVD2, RSVD3, RSVD4), + PIN_RESERVED, /* Reserved by t114: 0x311c - 0x3160 */ + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, PINI(UART2_RXD, UART, UARTB, SPDIF, UARTA, SPI4), PINI(UART2_TXD, UART, UARTB, SPDIF, UARTA, SPI4), PINI(UART2_RTS_N, UART, UARTA, UARTB, RSVD3, SPI4), @@ -220,7 +225,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = { PINI(SDMMC4_DAT5, SDMMC4, SDMMC4, SPI3, GMI, RSVD4), PINI(SDMMC4_DAT6, SDMMC4, SDMMC4, SPI3, GMI, RSVD4), PINI(SDMMC4_DAT7, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4), - PINI(SDMMC4_RST_N, SDMMC4, RSVD1, RSVD2, RSVD3, SDMMC4), + PIN_RESERVED, /* Reserved by t114: 0x3280 */ PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT2, RSVD4), PINI(GPIO_PCC1, CAM, I2S4, RSVD2, RSVD3, RSVD4), PINI(GPIO_PBB0, CAM, I2S4, VI, VI_ALT1, VI_ALT3), @@ -246,11 +251,11 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = { PINI(KB_ROW8, SYS, KBC, RSVD2, RSVD3, UARTA), PINI(KB_ROW9, SYS, KBC, RSVD2, RSVD3, UARTA), PINI(KB_ROW10, SYS, KBC, RSVD2, RSVD3, UARTA), - PINI(KB_ROW11, SYS, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(KB_ROW12, SYS, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(KB_ROW13, SYS, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(KB_ROW14, SYS, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(KB_ROW15, SYS, RSVD1, RSVD2, RSVD3, RSVD4), + PIN_RESERVED, /* Reserved by t114: 0x32e8 - 0x32f8 */ + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, PINI(KB_COL0, SYS, KBC, USB, SPI2, EMC_DLL), PINI(KB_COL1, SYS, KBC, RSVD2, SPI2, EMC_DLL), PINI(KB_COL2, SYS, KBC, RSVD2, SPI2, RSVD4), @@ -278,36 +283,46 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = { PINI(DAP2_DIN, AUDIO, I2S1, HDA, RSVD3, RSVD4), PINI(DAP2_DOUT, AUDIO, I2S1, HDA, RSVD3, RSVD4), PINI(DAP2_SCLK, AUDIO, I2S1, HDA, RSVD3, RSVD4), - PINI(SPI2_MOSI, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4), - PINI(SPI2_MISO, AUDIO, SPI6, RSVD2, RSVD3, RSVD4), - PINI(SPI2_CS0_N, AUDIO, SPI6, SPI1, RSVD3, RSVD4), - PINI(SPI2_SCK, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4), - PINI(SPI1_MOSI, AUDIO, RSVD1, SPI1, SPI2, DAP2), - PINI(SPI1_SCK, AUDIO, RSVD1, SPI1, SPI2, RSVD4), - PINI(SPI1_CS0_N, AUDIO, SPI6, SPI1, SPI2, RSVD4), - PINI(SPI1_MISO, AUDIO, RSVD1, SPI1, SPI2, RSVD4), - PINI(SPI2_CS1_N, AUDIO, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(SPI2_CS2_N, AUDIO, RSVD1, RSVD2, RSVD3, RSVD4), + PINI(DVFS_PWM, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4), + PINI(GPIO_X1_AUD, AUDIO, SPI6, RSVD2, RSVD3, RSVD4), + PINI(GPIO_X3_AUD, AUDIO, SPI6, SPI1, RSVD3, RSVD4), + PINI(DVFS_CLK, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4), + PINI(GPIO_X4_AUD, AUDIO, RSVD1, SPI1, SPI2, DAP2), + PINI(GPIO_X5_AUD, AUDIO, RSVD1, SPI1, SPI2, RSVD4), + PINI(GPIO_X6_AUD, AUDIO, SPI6, SPI1, SPI2, RSVD4), + PINI(GPIO_X7_AUD, AUDIO, RSVD1, SPI1, SPI2, RSVD4), + PIN_RESERVED, /* Reserved by t114: 0x3388 - 0x3338c */ + PIN_RESERVED, PINI(SDMMC3_CLK, SDMMC3, SDMMC3, RSVD2, RSVD3, SPI3), PINI(SDMMC3_CMD, SDMMC3, SDMMC3, PWM3, UARTA, SPI3), PINI(SDMMC3_DAT0, SDMMC3, SDMMC3, RSVD2, RSVD3, SPI3), PINI(SDMMC3_DAT1, SDMMC3, SDMMC3, PWM2, UARTA, SPI3), PINI(SDMMC3_DAT2, SDMMC3, SDMMC3, PWM1, DISPA, SPI3), PINI(SDMMC3_DAT3, SDMMC3, SDMMC3, PWM0, DISPB, SPI3), - PINI(SDMMC3_DAT4, SDMMC3, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(SDMMC3_DAT5, SDMMC3, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(SDMMC3_DAT6, SDMMC3, RSVD1, RSVD2, RSVD3, RSVD4), - PINI(SDMMC3_DAT7, SDMMC3, RSVD1, RSVD2, RSVD3, RSVD4), + PIN_RESERVED, /* Reserved by t114: 0x33a8 - 0x33dc */ + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, + PIN_RESERVED, PINI(HDMI_CEC, SYS, CEC, SDMMC3, RSVD3, SOC), PINI(SDMMC1_WP_N, SDMMC1, SDMMC1, CLK12, SPI4, UARTA), - PINI(SDMMC3_CD_N, SDMMC3, SDMMC3, OWR, RSVD3, RSVD4), - PINI(SPI1_CS1_N, AUDIO, SPI6, RSVD2, SPI2, I2C1), - PINI(SPI1_CS2_N, AUDIO, SPI6, SPI1, SPI2, I2C1), - PINI(USB_VBUS_EN0, SYS, USB, RSVD2, RSVD3, RSVD4), - PINI(USB_VBUS_EN1, SYS, USB, RSVD2, RSVD3, RSVD4), + PINI(SDMMC3_CD_N, SYS, SDMMC3, OWR, RSVD3, RSVD4), + PINI(GPIO_W2_AUD, AUDIO, SPI6, RSVD2, SPI2, I2C1), + PINI(GPIO_W3_AUD, AUDIO, SPI6, SPI1, SPI2, I2C1), + PINI(USB_VBUS_EN0, LCD, USB, RSVD2, RSVD3, RSVD4), + PINI(USB_VBUS_EN1, LCD, USB, RSVD2, RSVD3, RSVD4), PINI(SDMMC3_CLK_LB_IN, SDMMC3, SDMMC3, RSVD2, RSVD3, RSVD4), - PINO(SDMMC3_CLK_LB_OUT, SDMMC3, SDMMC3, RSVD2, RSVD3, RSVD4), - PINO(NAND_GMI_CLK_LB, GMI, SDMMC2, NAND, GMI, RSVD4), + PINI(SDMMC3_CLK_LB_OUT, SDMMC3, SDMMC3, RSVD2, RSVD3, RSVD4), + PIN_RESERVED, /* Reserved by t114: 0x3404 */ PINO(RESET_OUT_N, SYS, RSVD1, RSVD2, RSVD3, RESET_OUT_N), }; @@ -484,6 +499,30 @@ static int pinmux_set_ioreset(enum pmux_pingrp pin, return 0; } +static int pinmux_set_rcv_sel(enum pmux_pingrp pin, + enum pmux_pin_rcv_sel rcv_sel) +{ + struct pmux_tri_ctlr *pmt = + (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; + u32 *pin_rcv_sel = &pmt->pmt_ctl[pin]; + u32 reg; + + /* Error check on pin and rcv_sel */ + assert(pmux_pingrp_isvalid(pin)); + assert(pmux_pin_rcv_sel_isvalid(rcv_sel)); + + if (rcv_sel == PMUX_PIN_RCV_SEL_DEFAULT) + return 0; + + reg = readl(pin_rcv_sel); + reg &= ~(0x1 << PMUX_RCV_SEL_SHIFT); + if (rcv_sel == PMUX_PIN_RCV_SEL_HIGH) + reg |= (0x1 << PMUX_RCV_SEL_SHIFT); + writel(reg, pin_rcv_sel); + + return 0; +} + void pinmux_config_pingroup(struct pingroup_config *config) { enum pmux_pingrp pin = config->pingroup; @@ -495,6 +534,7 @@ void pinmux_config_pingroup(struct pingroup_config *config) pinmux_set_lock(pin, config->lock); pinmux_set_od(pin, config->od); pinmux_set_ioreset(pin, config->ioreset); + pinmux_set_rcv_sel(pin, config->rcv_sel); } void pinmux_config_table(struct pingroup_config *config, int len) diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index fd22930..53905cb 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -50,72 +50,12 @@ enum pmux_pingrp { PINGRP_SDMMC1_DAT2, PINGRP_SDMMC1_DAT1, PINGRP_SDMMC1_DAT0, - PINGRP_GPIO_PV2, - PINGRP_GPIO_PV3, - PINGRP_CLK2_OUT, + PINGRP_CLK2_OUT = PINGRP_SDMMC1_DAT0 + 3, PINGRP_CLK2_REQ, - PINGRP_LCD_PWR1, - PINGRP_LCD_PWR2, - PINGRP_LCD_SDIN, - PINGRP_LCD_SDOUT, - PINGRP_LCD_WR_N, - PINGRP_LCD_CS0_N, - PINGRP_LCD_DC0, - PINGRP_LCD_SCK, - PINGRP_LCD_PWR0, - PINGRP_LCD_PCLK, - PINGRP_LCD_DE, - PINGRP_LCD_HSYNC, - PINGRP_LCD_VSYNC, - PINGRP_LCD_D0, - PINGRP_LCD_D1, - PINGRP_LCD_D2, - PINGRP_LCD_D3, - PINGRP_LCD_D4, - PINGRP_LCD_D5, - PINGRP_LCD_D6, - PINGRP_LCD_D7, - PINGRP_LCD_D8, - PINGRP_LCD_D9, - PINGRP_LCD_D10, - PINGRP_LCD_D11, - PINGRP_LCD_D12, - PINGRP_LCD_D13, - PINGRP_LCD_D14, - PINGRP_LCD_D15, - PINGRP_LCD_D16, - PINGRP_LCD_D17, - PINGRP_LCD_D18, - PINGRP_LCD_D19, - PINGRP_LCD_D20, - PINGRP_LCD_D21, - PINGRP_LCD_D22, - PINGRP_LCD_D23, - PINGRP_LCD_CS1_N, - PINGRP_LCD_M1, - PINGRP_LCD_DC1, - PINGRP_HDMI_INT, + PINGRP_HDMI_INT = PINGRP_CLK2_REQ + 41, PINGRP_DDC_SCL, PINGRP_DDC_SDA, - PINGRP_CRT_HSYNC, - PINGRP_CRT_VSYNC, - PINGRP_VI_D0, - PINGRP_VI_D1, - PINGRP_VI_D2, - PINGRP_VI_D3, - PINGRP_VI_D4, - PINGRP_VI_D5, - PINGRP_VI_D6, - PINGRP_VI_D7, - PINGRP_VI_D8, - PINGRP_VI_D9, - PINGRP_VI_D10, - PINGRP_VI_D11, - PINGRP_VI_PCLK, - PINGRP_VI_MCLK, - PINGRP_VI_VSYNC, - PINGRP_VI_HSYNC, - PINGRP_UART2_RXD, + PINGRP_UART2_RXD = PINGRP_DDC_SDA + 19, PINGRP_UART2_TXD, PINGRP_UART2_RTS_N, PINGRP_UART2_CTS_N, @@ -186,8 +126,7 @@ enum pmux_pingrp { PINGRP_SDMMC4_DAT5, PINGRP_SDMMC4_DAT6, PINGRP_SDMMC4_DAT7, - PINGRP_SDMMC4_RST_N, - PINGRP_CAM_MCLK, + PINGRP_CAM_MCLK = PINGRP_SDMMC4_DAT7 + 2, PINGRP_GPIO_PCC1, PINGRP_GPIO_PBB0, PINGRP_CAM_I2C_SCL, @@ -212,12 +151,7 @@ enum pmux_pingrp { PINGRP_KB_ROW8, PINGRP_KB_ROW9, PINGRP_KB_ROW10, - PINGRP_KB_ROW11, - PINGRP_KB_ROW12, - PINGRP_KB_ROW13, - PINGRP_KB_ROW14, - PINGRP_KB_ROW15, - PINGRP_KB_COL0, + PINGRP_KB_COL0 = PINGRP_KB_ROW10 + 6, PINGRP_KB_COL1, PINGRP_KB_COL2, PINGRP_KB_COL3, @@ -244,47 +178,30 @@ enum pmux_pingrp { PINGRP_DAP2_DIN, PINGRP_DAP2_DOUT, PINGRP_DAP2_SCLK, - PINGRP_SPI2_MOSI, - PINGRP_SPI2_MISO, - PINGRP_SPI2_CS0_N, - PINGRP_SPI2_SCK, - PINGRP_SPI1_MOSI, - PINGRP_SPI1_SCK, - PINGRP_SPI1_CS0_N, - PINGRP_SPI1_MISO, - PINGRP_SPI2_CS1_N, - PINGRP_SPI2_CS2_N, - PINGRP_SDMMC3_CLK, + PINGRP_DVFS_PWM, + PINGRP_GPIO_X1_AUD, + PINGRP_GPIO_X3_AUD, + PINGRP_DVFS_CLK, + PINGRP_GPIO_X4_AUD, + PINGRP_GPIO_X5_AUD, + PINGRP_GPIO_X6_AUD, + PINGRP_GPIO_X7_AUD, + PINGRP_SDMMC3_CLK = PINGRP_GPIO_X7_AUD + 3, PINGRP_SDMMC3_CMD, PINGRP_SDMMC3_DAT0, PINGRP_SDMMC3_DAT1, PINGRP_SDMMC3_DAT2, PINGRP_SDMMC3_DAT3, - PINGRP_SDMMC3_DAT4, - PINGRP_SDMMC3_DAT5, - PINGRP_SDMMC3_DAT6, - PINGRP_SDMMC3_DAT7, - PINGRP_PEX_L0_PRSNT_N, - PINGRP_PEX_L0_RST_N, - PINGRP_PEX_L0_CLKREQ_N, - PINGRP_PEX_WAKE_N, - PINGRP_PEX_L1_PRSNT_N, - PINGRP_PEX_L1_RST_N, - PINGRP_PEX_L1_CLKREQ_N, - PINGRP_PEX_L2_PRSNT_N, - PINGRP_PEX_L2_RST_N, - PINGRP_PEX_L2_CLKREQ_N, - PINGRP_HDMI_CEC, /* offset 0x33e0 */ + PINGRP_HDMI_CEC = PINGRP_SDMMC3_DAT3 + 15, /* offset 0x33e0 */ PINGRP_SDMMC1_WP_N, PINGRP_SDMMC3_CD_N, - PINGRP_SPI1_CS1_N, - PINGRP_SPI1_CS2_N, - PINGRP_USB_VBUS_EN0, /* offset 0x33f4 */ + PINGRP_GPIO_W2_AUD, + PINGRP_GPIO_W3_AUD, + PINGRP_USB_VBUS_EN0, /* offset 0x33f4 */ PINGRP_USB_VBUS_EN1, PINGRP_SDMMC3_CLK_LB_IN, PINGRP_SDMMC3_CLK_LB_OUT, - PINGRP_NAND_GMI_CLK_LB, - PINGRP_RESET_OUT_N, + PINGRP_RESET_OUT_N = PINGRP_SDMMC3_CLK_LB_OUT + 2, PINGRP_COUNT, }; @@ -304,23 +221,16 @@ enum pdrive_pingrp { PDRIVE_PINGROUP_DAP3, PDRIVE_PINGROUP_DAP4, PDRIVE_PINGROUP_DBG, - PDRIVE_PINGROUP_LCD1, - PDRIVE_PINGROUP_LCD2, - PDRIVE_PINGROUP_SDIO2, PDRIVE_PINGROUP_SDIO3, PDRIVE_PINGROUP_SPI, PDRIVE_PINGROUP_UAA, PDRIVE_PINGROUP_UAB, PDRIVE_PINGROUP_UART2, PDRIVE_PINGROUP_UART3, - PDRIVE_PINGROUP_VI1 = 24, /* offset 0x8c8 */ PDRIVE_PINGROUP_SDIO1 = 33, /* offset 0x8ec */ PDRIVE_PINGROUP_CRT = 36, /* offset 0x8f8 */ PDRIVE_PINGROUP_DDC, PDRIVE_PINGROUP_GMA, - PDRIVE_PINGROUP_GMB, - PDRIVE_PINGROUP_GMC, - PDRIVE_PINGROUP_GMD, PDRIVE_PINGROUP_GME, PDRIVE_PINGROUP_GMF, PDRIVE_PINGROUP_GMG, @@ -401,6 +311,7 @@ enum pmux_func { PMUX_FUNC_VI, PMUX_FUNC_VI_SENSOR_CLK, PMUX_FUNC_XIO, + /* End of Tegra2 MUX selectors */ PMUX_FUNC_BLINK, PMUX_FUNC_CEC, PMUX_FUNC_CLK12, @@ -444,7 +355,7 @@ enum pmux_func { PMUX_FUNC_VGP4, PMUX_FUNC_VGP5, PMUX_FUNC_VGP6, - + /* End of Tegra3 MUX selectors */ PMUX_FUNC_USB, PMUX_FUNC_SOC, PMUX_FUNC_CPU, @@ -453,10 +364,12 @@ enum pmux_func { PMUX_FUNC_PMI, PMUX_FUNC_CLDVFS, PMUX_FUNC_RESET_OUT_N, + /* End of Tegra114 MUX selectors */ PMUX_FUNC_SAFE, PMUX_FUNC_MAX, + PMUX_FUNC_INVALID = 0x4000, PMUX_FUNC_RSVD1 = 0x8000, PMUX_FUNC_RSVD2 = 0x8001, PMUX_FUNC_RSVD3 = 0x8002, @@ -492,6 +405,7 @@ enum pmux_tristate { enum pmux_pin_io { PMUX_PIN_OUTPUT = 0, PMUX_PIN_INPUT = 1, + PMUX_PIN_NONE, }; /* return 1 if a pin_io_is in range */ #define pmux_pin_io_isvalid(io) (((io) >= PMUX_PIN_OUTPUT) && \ @@ -525,6 +439,16 @@ enum pmux_pin_ioreset { (((ioreset) >= PMUX_PIN_IO_RESET_DEFAULT) && \ ((ioreset) <= PMUX_PIN_IO_RESET_ENABLE)) +enum pmux_pin_rcv_sel { + PMUX_PIN_RCV_SEL_DEFAULT = 0, + PMUX_PIN_RCV_SEL_NORMAL, + PMUX_PIN_RCV_SEL_HIGH, +}; +/* return 1 if a pin_rcv_sel_is in range */ +#define pmux_pin_rcv_sel_isvalid(rcv_sel) \ + (((rcv_sel) >= PMUX_PIN_RCV_SEL_DEFAULT) && \ + ((rcv_sel) <= PMUX_PIN_RCV_SEL_HIGH)) + /* Available power domains used by pin groups */ enum pmux_vddio { PMUX_VDDIO_BB = 0, @@ -581,6 +505,8 @@ struct pingroup_config { enum pmux_pin_lock lock; /* lock enable/disable PMUX_PIN... */ enum pmux_pin_od od; /* open-drain or push-pull driver */ enum pmux_pin_ioreset ioreset; /* input/output reset PMUX_PIN... */ + enum pmux_pin_rcv_sel rcv_sel; /* select between High and Normal */ + /* VIL/VIH receivers */ }; /* Set a pin group to tristate */ diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index aca3c7d..2020a5f 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -24,6 +24,9 @@ */ void pinmux_init(void) { + pinmux_config_table(tegra114_pinmux_set_nontristate, + ARRAY_SIZE(tegra114_pinmux_set_nontristate)); + pinmux_config_table(tegra114_pinmux_common, ARRAY_SIZE(tegra114_pinmux_common)); diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h index 3dd47da..d258819 100644 --- a/board/nvidia/dalmore/pinmux-config-dalmore.h +++ b/board/nvidia/dalmore/pinmux-config-dalmore.h @@ -17,7 +17,7 @@ #ifndef _PINMUX_CONFIG_DALMORE_H_ #define _PINMUX_CONFIG_DALMORE_H_ -#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io) \ +#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io) \ { \ .pingroup = PINGRP_##_pingroup, \ .func = PMUX_FUNC_##_mux, \ @@ -41,7 +41,19 @@ .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ } -#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \ +#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \ + { \ + .pingroup = PINGRP_##_pingroup, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ + } + +#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \ { \ .pingroup = PINGRP_##_pingroup, \ .func = PMUX_FUNC_##_mux, \ @@ -50,200 +62,291 @@ .io = PMUX_PIN_##_io, \ .lock = PMUX_PIN_LOCK_##_lock, \ .od = PMUX_PIN_OD_DEFAULT, \ - .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ + .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ + } + +#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \ + { \ + .pingroup = PINGRP_##_pingroup, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + .io = PMUX_PIN_##_io, \ + .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_##_od, \ + .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ } +#define USB_PINMUX CEC_PINMUX + static struct pingroup_config tegra114_pinmux_common[] = { + /* EXTPERIPH1 pinmux */ + DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, OUTPUT), + + /* I2S0 pinmux */ + DEFAULT_PINMUX(DAP1_DIN, I2S0, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP1_DOUT, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_FS, I2S0, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP1_SCLK, I2S0, NORMAL, NORMAL, INPUT), + + /* I2S1 pinmux */ + DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT), + + /* I2S3 pinmux */ + DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT), + + /* CLDVFS pinmux */ + DEFAULT_PINMUX(DVFS_PWM, CLDVFS, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(DVFS_CLK, CLDVFS, NORMAL, NORMAL, OUTPUT), + + /* ULPI pinmux */ + DEFAULT_PINMUX(ULPI_CLK, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA2, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA3, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA4, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA5, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA6, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DATA7, ULPI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(ULPI_DIR, ULPI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_NXT, ULPI, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(ULPI_STP, ULPI, NORMAL, NORMAL, OUTPUT), + + /* I2C3 pinmux */ + I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* VI pinmux */ + VI_PINMUX(CAM_MCLK, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + + /* VI_ALT1 pinmux */ + VI_PINMUX(GPIO_PBB0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + + /* VGP4 pinmux */ + VI_PINMUX(GPIO_PBB4, VGP4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + + /* I2C2 pinmux */ + I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* UARTD pinmux */ + DEFAULT_PINMUX(GMI_A16, UARTD, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_A17, UARTD, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_A18, UARTD, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_A19, UARTD, NORMAL, NORMAL, OUTPUT), + + /* SPI4 pinmux */ + DEFAULT_PINMUX(GMI_AD5, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD6, SPI4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD7, SPI4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD12, RSVD1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_CS6_N, SPI4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_WR_N, SPI4, NORMAL, NORMAL, INPUT), + + /* PWM1 pinmux */ + DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT), + + /* SOC pinmux */ + DEFAULT_PINMUX(GMI_CS1_N, SOC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(GMI_OE_N, SOC, NORMAL, TRISTATE, INPUT), + + /* EXTPERIPH2 pinmux */ + DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, OUTPUT), + /* SDMMC1 pinmux */ - DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_WP_N, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, UP, NORMAL, INPUT), /* SDMMC3 pinmux */ - DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_CLK_LB_IN, SDMMC3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3, NORMAL, NORMAL, OUTPUT), - - DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_CD_N, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC3_CLK_LB_IN, SDMMC3, UP, TRISTATE, INPUT), + DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3, DOWN, NORMAL, INPUT), /* SDMMC4 pinmux */ - LV_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_CMD, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_DAT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE), - LV_PINMUX(SDMMC4_RST_N, RSVD1, DOWN, NORMAL, INPUT, DISABLE, DISABLE), + DEFAULT_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_CMD, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT0, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT1, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT2, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT3, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT4, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT5, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT6, SDMMC4, UP, NORMAL, INPUT), + DEFAULT_PINMUX(SDMMC4_DAT7, SDMMC4, UP, NORMAL, INPUT), + + /* BLINK pinmux */ + DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT), + + /* KBC pinmux */ + DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT), + + /*Audio Codec*/ + DEFAULT_PINMUX(DAP3_DIN, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(DAP3_SCLK, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(GPIO_PV0, RSVD1, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(KB_ROW7, RSVD1, UP, NORMAL, INPUT), + + /* UARTA pinmux */ + DEFAULT_PINMUX(KB_ROW10, UARTA, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(KB_ROW9, UARTA, NORMAL, NORMAL, OUTPUT), + + /* I2CPWR pinmux (I2C5) */ + I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + + /* SYSCLK pinmux */ + DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT), + + /* RTCK pinmux */ + DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, INPUT), + + /* CLK pinmux */ + DEFAULT_PINMUX(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT), + + /* PWRON pinmux */ + DEFAULT_PINMUX(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT), + + /* CPU pinmux */ + DEFAULT_PINMUX(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT), + + /* PMI pinmux */ + DEFAULT_PINMUX(PWR_INT_N, PMI, NORMAL, TRISTATE, INPUT), + + /* RESET_OUT_N pinmux */ + DEFAULT_PINMUX(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT), + + /* EXTPERIPH3 pinmux */ + DEFAULT_PINMUX(CLK3_OUT, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), /* I2C1 pinmux */ - I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), - I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), + I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), - /* I2C2 pinmux */ - I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), - I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + /* UARTB pinmux */ + DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, OUTPUT), - /* I2C3 pinmux */ - I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), - I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + /* IRDA pinmux */ + DEFAULT_PINMUX(UART2_RXD, UARTB, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(UART2_TXD, UARTB, NORMAL, NORMAL, OUTPUT), + + /* UARTC pinmux */ + DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, TRISTATE, INPUT), + DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT), + + /* OWR pinmux */ + DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT), + + /* CEC pinmux */ + CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), /* I2C4 pinmux */ - I2C_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), - I2C_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), - - /* Power I2C pinmux */ - I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), - I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), - - DEFAULT_PINMUX(ULPI_DATA0, UARTA, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(ULPI_DATA1, UARTA, UP, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA2, UARTA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA3, UARTA, NORMAL, NORMAL, INPUT), - - DEFAULT_PINMUX(ULPI_DATA4, UARTA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA5, UARTA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA6, UARTA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA7, UARTA, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(ULPI_CLK, UARTD, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(ULPI_DIR, UARTD, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_NXT, UARTD, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_STP, UARTD, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(DAP3_FS, I2S2, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP3_DIN, I2S2, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP3_DOUT, I2S2, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP3_SCLK, I2S2, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(CLK2_REQ, DAP, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(UART2_RXD, UARTB, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(UART2_TXD, UARTB, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GPIO_PU0, RSVD1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PU1, RSVD1, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GPIO_PU2, RSVD1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PU3, RSVD1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PU4, PWM1, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GPIO_PU5, PWM2, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GPIO_PU6, RSVD1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(CLK3_OUT, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(CLK3_REQ, DEV3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_WP_N, GMI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_CS2_N, RSVD1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GMI_AD10, NAND, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GMI_A16, UARTD, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GMI_A17, UARTD, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_A18, UARTD, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_A19, UARTD, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(CAM_MCLK, VI_ALT2, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PCC1, RSVD1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PBB0, RSVD1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PBB3, VGP3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PBB5, VGP5, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PBB6, VGP6, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PBB7, I2S4, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PCC2, I2S4, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT), - - /* KBC keys */ - DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW3, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW4, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW5, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW6, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW7, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW9, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW10, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL4, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL6, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL7, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PV0, RSVD1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PV1, RSVD1, UP, NORMAL, INPUT), - - DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP1_FS, I2S0, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP1_DIN, I2S0, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP1_DOUT, I2S0, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP1_SCLK, I2S0, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(CLK1_REQ, DAP, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SPDIF_OUT, SPDIF, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT), - - DEFAULT_PINMUX(SPI1_MOSI, SPI1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SPI1_SCK, SPI1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SPI1_CS0_N, SPI1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SPI1_CS1_N, SPI1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SPI1_CS2_N, SPI1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SPI1_MISO, SPI1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(HDMI_INT, RSVD1, NORMAL, TRISTATE, INPUT), - - /* GPIOs */ - /* SDMMC1 CD gpio */ - DEFAULT_PINMUX(GMI_IORDY, RSVD1, UP, NORMAL, INPUT), - - /* Touch RESET */ - DEFAULT_PINMUX(GMI_AD14, NAND, NORMAL, NORMAL, OUTPUT), - - /* Power rails GPIO */ - DEFAULT_PINMUX(SPI2_SCK, GMI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_PBB4, VGP4, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT), + DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DISABLE, HIGH), + + /* USB pinmux */ + USB_PINMUX(USB_VBUS_EN0, USB, NORMAL, NORMAL, INPUT, DISABLE, ENABLE), + + /* nct */ + DEFAULT_PINMUX(GPIO_X6_AUD, SPI6, UP, TRISTATE, INPUT), }; static struct pingroup_config unused_pins_lowpower[] = { - DEFAULT_PINMUX(GMI_CS0_N, NAND, UP, TRISTATE, OUTPUT), - DEFAULT_PINMUX(GMI_CS3_N, NAND, UP, TRISTATE, OUTPUT), - DEFAULT_PINMUX(GMI_CS4_N, NAND, UP, TRISTATE, OUTPUT), - DEFAULT_PINMUX(GMI_CS7_N, NAND, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_AD0, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD1, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD2, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD3, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD4, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD5, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD6, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD7, NAND, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, TRISTATE, OUTPUT), - DEFAULT_PINMUX(GMI_AD11, NAND, NORMAL, TRISTATE, OUTPUT), - DEFAULT_PINMUX(GMI_AD13, NAND, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_WR_N, NAND, NORMAL, TRISTATE, OUTPUT), + DEFAULT_PINMUX(CLK1_REQ, RSVD3, DOWN, TRISTATE, OUTPUT), + DEFAULT_PINMUX(USB_VBUS_EN1, RSVD3, DOWN, TRISTATE, OUTPUT), }; -#endif /* _PINMUX_CONFIG_DALMORE_H_ */ +/* Initially setting all used GPIO's to non-TRISTATE */ +static struct pingroup_config tegra114_pinmux_set_nontristate[] = { + DEFAULT_PINMUX(GPIO_X4_AUD, RSVD1, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_X5_AUD, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_X6_AUD, RSVD3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_X7_AUD, RSVD1, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_W2_AUD, RSVD1, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_W3_AUD, SPI6, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_X1_AUD, RSVD3, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_X3_AUD, RSVD3, UP, NORMAL, INPUT), + + DEFAULT_PINMUX(DAP3_FS, I2S2, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(DAP3_DIN, I2S2, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(DAP3_DOUT, I2S2, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(DAP3_SCLK, I2S2, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PV0, RSVD3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_PV1, RSVD1, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(GPIO_PBB3, RSVD3, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PBB5, RSVD3, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PBB6, RSVD3, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PBB7, RSVD3, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PCC1, RSVD3, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_PCC2, RSVD3, DOWN, NORMAL, INPUT), + + DEFAULT_PINMUX(GMI_AD0, GMI, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD1, GMI, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD10, GMI, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD11, GMI, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD12, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD13, GMI, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD2, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD3, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD8, GMI, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_ADV_N, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CLK, GMI, DOWN, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_CS0_N, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS2_N, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS3_N, GMI, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_CS4_N, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_CS7_N, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_DQS, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_IORDY, GMI, UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_WP_N, GMI, UP, NORMAL, INPUT), + + DEFAULT_PINMUX(SDMMC1_WP_N, SPI4, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(CLK2_REQ, RSVD3, NORMAL, NORMAL, OUTPUT), + + DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_COL4, SDMMC3, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT), + DEFAULT_PINMUX(KB_COL6, KBC, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_COL7, KBC, UP, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW3, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW4, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW6, KBC, DOWN, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT), + + DEFAULT_PINMUX(CLK3_REQ, RSVD3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PU4, RSVD3, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PU5, RSVD3, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(GPIO_PU6, RSVD3, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(HDMI_INT, RSVD1, DOWN, NORMAL, INPUT), + + DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(SPDIF_IN, USB, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(SDMMC3_CD_N, SDMMC3, UP, NORMAL, INPUT), +}; +#endif /* PINMUX_CONFIG_COMMON_H */ -- 1.7.0.4

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