November 2013 - U-Boot

[U-Boot] [PATCH] Add code for spi half duplex operation for enc28j60
by Asok Subramanian 08 Jan '14

08 Jan '14

Add code for spi half duplex operation for enc28j60 The current code assumes full duplex spi operation. But there are processors like imx23 which only permit half duplex operation. This fix does half duplex operation based on the definition of CONFIG_SPI_HALF_DUPLEX Signed-off-by: Asok Subramanian <asok at vyassoft.com> --- drivers/net/enc28j60.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index ec33764..753fe26 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -157,9 +157,17 @@ static u8 enc_r8(enc_dev_t *enc, const u16 reg) enc_set_bank(enc, reg); dout[0] = CMD_RCR(reg); +#ifndef CONFIG_SPI_HALF_DUPLEX spi_xfer(enc->slave, nbytes * 8, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); return din[nbytes-1]; +#else + spi_xfer(enc->slave, (nbytes -1) * 8, dout, NULL, + SPI_XFER_BEGIN ); + spi_xfer(enc->slave, 8, NULL, din, + SPI_XFER_END ); + return din[0]; +#endif } /* @@ -175,6 +183,7 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) enc_set_bank(enc, reg); dout[0] = CMD_RCR(reg); +#ifndef CONFIG_SPI_HALF_DUPLEX spi_xfer(enc->slave, nbytes * 8, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); result = din[nbytes-1]; @@ -183,6 +192,20 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) SPI_XFER_BEGIN | SPI_XFER_END); result |= din[nbytes-1] << 8; return result; +#else + spi_xfer(enc->slave, (nbytes -1) * 8, dout, NULL, + SPI_XFER_BEGIN ); + spi_xfer(enc->slave, 8, NULL, din, + SPI_XFER_END ); + result = din[0]; + dout[0]++; /* next register */ + spi_xfer(enc->slave, (nbytes -1) * 8, dout, NULL, + SPI_XFER_BEGIN ); + spi_xfer(enc->slave, 8, NULL, din, + SPI_XFER_END ); + result |= din[0] << 8; + return result; +#endif } /* -- 1.7.9.5

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[U-Boot] [PATCH v6] spi: pl022_spi: Add support for ARM PL022 spi controller
by Armando Visconti 08 Jan '14

08 Jan '14

This patch adds the support for the ARM PL022 SPI controller for the standard variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX FIFO. Signed-off-by: Armando Visconti <armando.visconti(a)st.com> Signed-off-by: Vipin Kumar <vipin.kumar(a)st.com> Acked-by: Stefan Roese <sr(a)denx.de> --- v5->v6 1. Make use of spi_alloc_slave() macro. 2. Changed the identation on 'if statement' as requested by Jagan. drivers/spi/Makefile | 1 + drivers/spi/pl022_spi.c | 308 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 309 insertions(+) create mode 100644 drivers/spi/pl022_spi.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d08609e..b6443b1 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -47,6 +47,7 @@ COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o +COBJS-$(CONFIG_PL022_SPI) += pl022_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o COBJS-$(CONFIG_SH_SPI) += sh_spi.o COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c new file mode 100644 index 0000000..5b47413 --- /dev/null +++ b/drivers/spi/pl022_spi.c @@ -0,0 +1,308 @@ +/* + * (C) Copyright 2012 + * Armando Visconti, ST Microelectronics, armando.visconti(a)st.com. + * + * Driver for ARM PL022 SPI Controller. Based on atmel_spi.c + * by Atmel Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <spi.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> + +/* SSP registers mapping */ +struct pl022 { + u32 ssp_cr0; /* 0x000 */ + u32 ssp_cr1; /* 0x004 */ + u32 ssp_dr; /* 0x008 */ + u32 ssp_sr; /* 0x00c */ + u32 ssp_cpsr; /* 0x010 */ + u32 ssp_imsc; /* 0x014 */ + u32 ssp_ris; /* 0x018 */ + u32 ssp_mis; /* 0x01c */ + u32 ssp_icr; /* 0x020 */ + u32 ssp_dmacr; /* 0x024 */ + u8 reserved_1[0x080 - 0x028]; + u32 ssp_itcr; /* 0x080 */ + u32 ssp_itip; /* 0x084 */ + u32 ssp_itop; /* 0x088 */ + u32 ssp_tdr; /* 0x08c */ + u8 reserved_2[0xFE0 - 0x090]; + u32 ssp_pid0; /* 0xfe0 */ + u32 ssp_pid1; /* 0xfe4 */ + u32 ssp_pid2; /* 0xfe8 */ + u32 ssp_pid3; /* 0xfec */ + u32 ssp_cid0; /* 0xff0 */ + u32 ssp_cid1; /* 0xff4 */ + u32 ssp_cid2; /* 0xff8 */ + u32 ssp_cid3; /* 0xffc */ +}; + +/* SSP Control Register 0 - SSP_CR0 */ +#define SSP_CR0_SPO (0x1 << 6) +#define SSP_CR0_SPH (0x1 << 7) +#define SSP_CR0_8BIT_MODE (0x07) +#define SSP_SCR_MAX (0xFF) +#define SSP_SCR_SHFT 8 + +/* SSP Control Register 0 - SSP_CR1 */ +#define SSP_CR1_MASK_SSE (0x1 << 1) + +#define SSP_CPSR_MAX (0xFE) + +/* SSP Status Register - SSP_SR */ +#define SSP_SR_MASK_TFE (0x1 << 0) /* Transmit FIFO empty */ +#define SSP_SR_MASK_TNF (0x1 << 1) /* Transmit FIFO not full */ +#define SSP_SR_MASK_RNE (0x1 << 2) /* Receive FIFO not empty */ +#define SSP_SR_MASK_RFF (0x1 << 3) /* Receive FIFO full */ +#define SSP_SR_MASK_BSY (0x1 << 4) /* Busy Flag */ + +struct pl022_spi_slave { + struct spi_slave slave; + void *regs; + unsigned int freq; +}; + +static inline struct pl022_spi_slave *to_pl022_spi(struct spi_slave *slave) +{ + return container_of(slave, struct pl022_spi_slave, slave); +} + +/* + * Following three functions should be provided by the + * board support package. + */ +int __weak spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return 1; +} + +void __weak spi_cs_activate(struct spi_slave *slave) +{ + /* do nothing */ +} + +void __weak spi_cs_deactivate(struct spi_slave *slave) +{ + /* do nothing */ +} + +void spi_init(void) +{ + /* do nothing */ +} + +/* + * ARM PL022 exists in different 'flavors'. + * This drivers currently support the standard variant (0x00041022), that has a + * 16bit wide and 8 locations deep TX/RX FIFO. + */ +static int pl022_is_supported(struct pl022_spi_slave *ps) +{ + struct pl022 *pl022 = (struct pl022 *)ps->regs; + + /* PL022 version is 0x00041022 */ + if ((readl(&pl022->ssp_pid0) == 0x22) && + (readl(&pl022->ssp_pid1) == 0x10) && + ((readl(&pl022->ssp_pid2) & 0xf) == 0x04) && + (readl(&pl022->ssp_pid3) == 0x00)) + return 1; + + return 0; +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct pl022_spi_slave *ps; + struct pl022 *pl022; + u16 scr = 1, prescaler, cr0 = 0, cpsr = 0; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + ps = spi_alloc_slave(struct pl022_spi_slave, bus, cs); + if (!ps) + return NULL; + + ps->freq = max_hz; + + switch (bus) { + case 0: + ps->regs = (void *)CONFIG_SYS_SPI_BASE; + break; +#ifdef CONFIG_SYS_SPI_BASE1 + case 1: + ps->regs = (void *)CONFIG_SYS_SPI_BASE1; + break; +#endif +#ifdef CONFIG_SYS_SPI_BASE2 + case 2: + ps->regs = (void *)CONFIG_SYS_SPI_BASE2; + break; +#endif +#ifdef CONFIG_SYS_SPI_BASE3 + case 3: + ps->regs = (void *)CONFIG_SYS_SPI_BASE3; + break; +#endif + default: + free(ps); + return NULL; + } + + pl022 = (struct pl022 *)ps->regs; + + /* Check the PL022 version */ + if (!pl022_is_supported(ps)) { + free(ps); + return NULL; + } + + /* Set requested polarity and 8bit mode */ + cr0 = SSP_CR0_8BIT_MODE; + cr0 |= (mode & SPI_CPHA) ? SSP_CR0_SPH : 0; + cr0 |= (mode & SPI_CPOL) ? SSP_CR0_SPO : 0; + + writel(cr0, &pl022->ssp_cr0); + + /* Program the SSPClk frequency */ + prescaler = CONFIG_SYS_SPI_CLK / ps->freq; + + if (prescaler <= 0xFF) { + cpsr = prescaler; + } else { + for (scr = 1; scr <= SSP_SCR_MAX; scr++) { + if (!(prescaler % scr)) { + cpsr = prescaler / scr; + if (cpsr <= SSP_CPSR_MAX) + break; + } + } + + if (scr > SSP_SCR_MAX) { + scr = SSP_SCR_MAX; + cpsr = prescaler / scr; + cpsr &= SSP_CPSR_MAX; + } + } + + if (cpsr & 0x1) + cpsr++; + + writel(cpsr, &pl022->ssp_cpsr); + cr0 = readl(&pl022->ssp_cr0); + writel(cr0 | (scr - 1) << SSP_SCR_SHFT, &pl022->ssp_cr0); + + return &ps->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct pl022_spi_slave *ps = to_pl022_spi(slave); + + free(ps); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct pl022_spi_slave *ps = to_pl022_spi(slave); + struct pl022 *pl022 = (struct pl022 *)ps->regs; + + /* Enable the SPI hardware */ + setbits_le32(&pl022->ssp_cr1, SSP_CR1_MASK_SSE); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct pl022_spi_slave *ps = to_pl022_spi(slave); + struct pl022 *pl022 = (struct pl022 *)ps->regs; + + /* Disable the SPI hardware */ + writel(0x0, &pl022->ssp_cr1); +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct pl022_spi_slave *ps = to_pl022_spi(slave); + struct pl022 *pl022 = (struct pl022 *)ps->regs; + u32 len_tx = 0, len_rx = 0, len; + u32 ret = 0; + const u8 *txp = dout; + u8 *rxp = din, value; + + if (bitlen == 0) + /* Finish any previously submitted transfers */ + goto out; + + /* + * TODO: The controller can do non-multiple-of-8 bit + * transfers, but this driver currently doesn't support it. + * + * It's also not clear how such transfers are supposed to be + * represented as a stream of bytes...this is a limitation of + * the current SPI interface. + */ + if (bitlen % 8) { + ret = -1; + + /* Errors always terminate an ongoing transfer */ + flags |= SPI_XFER_END; + goto out; + } + + len = bitlen / 8; + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + while (len_tx < len) { + if (readl(&pl022->ssp_sr) & SSP_SR_MASK_TNF) { + value = (txp != NULL) ? *txp++ : 0; + writel(value, &pl022->ssp_dr); + len_tx++; + } + + if (readl(&pl022->ssp_sr) & SSP_SR_MASK_RNE) { + value = readl(&pl022->ssp_dr); + if (rxp) + *rxp++ = value; + len_rx++; + } + } + + while (len_rx < len_tx) { + if (readl(&pl022->ssp_sr) & SSP_SR_MASK_RNE) { + value = readl(&pl022->ssp_dr); + if (rxp) + *rxp++ = value; + len_rx++; + } + } + +out: + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return ret; +} -- 1.7.11.7

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[U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black
by Simon Glass 08 Jan '14

08 Jan '14

This series adds a few improvements to the image signing feature to make it easier to use on the Beaglebone Black. - Add a DEV_TREE_BIN option to make it easier to include the correct FDT (with embedded public keys) into the U-Boot image - Enable cache for more TI boards (to speed things up) - Increase malloc size - Enable CONFIG_OF_CONTROL, FIT and secure boot on am33xx/omap (RFC only, not sure we want this, although we could create a separate config for it) I also have a change to adjust mkimage to automatically make space in the FDT when adding hashes and signatures. Included here is the ENOSPC patch, but the fit_image.c patch will wait until the dumpimage tool is merged, since I am changing the same code. With this, secure boot was tested successfully on Beaglebone Black. Simon Glass (8): am33xx/omap: Allow cache enable for all Sitara/OMAP hash: Export functions to find and show hash fdt: Add DEV_TREE_BIN option to specify a device tree binary file fdt: Update functions which write to an FDT to return -ENOSPC arm: ti: Increase malloc size to 16MB for armv7 boards RFC: am33xx/omap: Enable CONFIG_OF_CONTROL RFC: am33xx/omap: Enable FIT support RFC: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE Makefile | 8 +- arch/arm/cpu/armv7/omap-common/Makefile | 4 + arch/arm/cpu/armv7/omap-common/hwinit-common.c | 41 -- arch/arm/cpu/armv7/omap-common/omap-cache.c | 56 +++ arch/arm/cpu/armv7/omap3/board.c | 8 - arch/arm/dts/am33xx.dtsi | 649 +++++++++++++++++++++++++ arch/arm/dts/dt-bindings/gpio/gpio.h | 15 + arch/arm/dts/dt-bindings/pinctrl/am33xx.h | 41 ++ arch/arm/dts/dt-bindings/pinctrl/omap.h | 54 ++ board/siemens/common/board.c | 9 - board/ti/dts/am335x-bone-common.dtsi | 262 ++++++++++ board/ti/dts/am335x-boneblack.dts | 17 + board/ti/dts/tps65217.dtsi | 56 +++ common/hash.c | 13 +- common/image-fit.c | 4 +- doc/README.fdt-control | 16 +- include/configs/am335x_evm.h | 9 + include/configs/ti_armv7_common.h | 2 +- include/hash.h | 22 + include/rsa.h | 3 +- lib/rsa/rsa-sign.c | 28 +- 21 files changed, 1236 insertions(+), 81 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap-common/omap-cache.c create mode 100644 arch/arm/dts/am33xx.dtsi create mode 100644 arch/arm/dts/dt-bindings/gpio/gpio.h create mode 100644 arch/arm/dts/dt-bindings/pinctrl/am33xx.h create mode 100644 arch/arm/dts/dt-bindings/pinctrl/omap.h create mode 100644 board/ti/dts/am335x-bone-common.dtsi create mode 100644 board/ti/dts/am335x-boneblack.dts create mode 100644 board/ti/dts/tps65217.dtsi -- 1.8.4

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[U-Boot] [PATCH v2] exynos5250: remove redundant SPI and PMIC related configs
by Inderpal Singh 07 Jan '14

07 Jan '14

They have been defined once already. Hence remove the redundant definitions. Signed-off-by: Inderpal Singh <inderpal.singh(a)linaro.org> --- v1 was posted as the first patch of [1] Changes in v2: - split from the patchset at [1] - removed redundant configs for PMIC - rebased to latest u-boot-samsung master branch [1] http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/157101 include/configs/exynos5250-dt.h | 26 -------------------------- 1 file changed, 26 deletions(-) diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 62b83d4..03b07b2 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -246,11 +246,6 @@ #define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_I2C_EDID -/* PMIC */ -#define CONFIG_PMIC -#define CONFIG_PMIC_I2C -#define CONFIG_PMIC_MAX77686 - /* SPI */ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_SPI_FLASH @@ -278,27 +273,6 @@ #define CONFIG_POWER_I2C #define CONFIG_POWER_MAX77686 -/* SPI */ -#define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_SPI_FLASH - -#ifdef CONFIG_SPI_FLASH -#define CONFIG_EXYNOS_SPI -#define CONFIG_CMD_SF -#define CONFIG_CMD_SPI -#define CONFIG_SPI_FLASH_WINBOND -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -#define CONFIG_SF_DEFAULT_SPEED 50000000 -#define EXYNOS5_SPI_NUM_CONTROLLERS 5 -#endif - -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_ENV_SPI_MODE SPI_MODE_0 -#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -#define CONFIG_ENV_SPI_BUS 1 -#define CONFIG_ENV_SPI_MAX_HZ 50000000 -#endif - /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_SMC911X -- 1.7.9.5

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[U-Boot] linkstation_HGLAN and MPC824x support
by Tom Rini 06 Jan '14

06 Jan '14

Hello, With a recent change to U-Boot (as part of merging http://patchwork.ozlabs.org/patch/293612/), we need cache support for MPC824x, for the linkstation_HGLAN board to continue building, as the network driver is now cache aware. Alternatively, if there is no interest in maintaining the platform upstream anymore, we can remove it. Thanks! -- Tom

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[U-Boot] [PATCH V3 0/6] SMDK5420: Add S2MPS11 pmic support to SMDK5420
by Leela Krishna Amudala 03 Jan '14

03 Jan '14

This patchset adds support for S2MPS11 pmic on SMDK5420 This patchset has dependency on Rajeshwari's base patchset: [PATCH 00/10 V6] EXYNOS5420: Add SMDK5420 board support http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/172653 Also, for testing we need Naveen's i2c patchset as well: i2c: improve s3c24x0 with High-speed and new SYS_I2C framework support http://www.mail-archive.com/u-boot@lists.denx.de/msg122679.html Changes since V2: - Rebased on V6 version patchset sent by Rajeshwari http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/172653 Changes since V1: - In patch "exynos: Use common pmic_reg_update() definition" moved pmic_reg_update() from drivers/power/power_i2c.c to power_core.c suggested by Lukasz Majewski <l.majewski(a)samsung.com> - Changed the License details to GPL 2.0+ license for below pathces SMDK5420: S2MPS11: Adds the register settings for S2MPS11 exynos: Add a common DT based PMIC driver initialization - corrected the typo error in "config: SMDK5420: Enable S2MPS11 pmic" patch header Leela Krishna Amudala (6): exynos: Use common pmic_reg_update() definition power: Explicitly select pmic device's bus FDT: Exynos5420: Add compatible srings for PMIC SMDK5420: S2MPS11: Adds the register settings for S2MPS11 exynos: Add a common DT based PMIC driver initialization config: SMDK5420: Enable S2MPS11 pmic board/samsung/common/board.c | 39 ++++++----- drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_common.c | 97 ++++++++++++++++++++++++++ drivers/power/power_core.c | 33 +++++++++ drivers/power/power_i2c.c | 62 +++++++++++++++-- include/configs/smdk5420.h | 4 ++ include/fdtdec.h | 1 + include/power/pmic.h | 35 ++++++++++ include/power/s2mps11_pmic.h | 141 ++++++++++++++++++++++++++++++++++++++ lib/fdtdec.c | 1 + 10 files changed, 391 insertions(+), 23 deletions(-) create mode 100644 drivers/power/pmic/pmic_common.c create mode 100644 include/power/s2mps11_pmic.h -- 1.7.10.4

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[U-Boot] [PATCH V2 0/7] SMDK5420: Add support for FIMD and DP
by Ajay Kumar 02 Jan '14

02 Jan '14

This patchset adds support for FIMD and DP on SMDK5420. This patchset is rebased on Rajeshwari's latest SMDK5420 patchset: [PATCH 00/10 V6] EXYNOS5420: Add SMDK5420 board support http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/172653 For testing we need: Naveen's i2c patchset: i2c: improve s3c24x0 with High-speed and new SYS_I2C framework support http://www.mail-archive.com/u-boot@lists.denx.de/msg122679.html Leela's PMIC patchset: [PATCH V3 0/6] SMDK5420: Add S2MPS11 pmic support to SMDK5420 http://www.mail-archive.com/u-boot@lists.denx.de/msg125733.html Changes since V1: [PATCH V2 4/7] - Read FIMD sysmmu addresses from DT instead of hardcoding them. [PATCH V2 5/7] - Remove hardcoded i2c setting for enabling VDD_28IO_DP [PATCH V2 6/7] - Enable VDD_28IO_DP in standard PMIC way Ajay Kumar (7): [PATCH V2 1/7] exynos_fb: Remove usage of static defines [PATCH V2 2/7] arm: exynos: Add RPLL for Exynos5420 [PATCH V2 3/7] arm: exynos: Add get_lcd_clk and set_lcd_clk callbacks for Exynos5420 [PATCH V2 4/7] video: exynos_fimd: Add framework to disable FIMD sysmmu [PATCH V2 5/7] smdk5420: Implement callbacks needed by exynos_fb driver [PATCH V2 6/7] exynos: s2mps11_pmic: Enable LDO38 for SMDK5420 [PATCH V2 7/7] CONFIG: SMDK5420: Enable FIMD and DP arch/arm/cpu/armv7/exynos/clock.c | 74 +++++++++++++++++- arch/arm/cpu/armv7/exynos/clock_init.h | 3 + arch/arm/cpu/armv7/exynos/clock_init_exynos5.c | 13 ++++ arch/arm/cpu/armv7/exynos/exynos5_setup.h | 2 +- arch/arm/dts/exynos5420.dtsi | 7 ++ arch/arm/include/asm/arch-exynos/clk.h | 1 + arch/arm/include/asm/arch-exynos/system.h | 1 + board/samsung/common/board.c | 18 +++++ board/samsung/smdk5420/smdk5420.c | 102 +++++-------------------- doc/device-tree-bindings/video/exynos-fb.txt | 4 + drivers/video/exynos_fb.c | 20 ++--- drivers/video/exynos_fimd.c | 24 ++++++ include/configs/exynos5250-dt.h | 2 - include/configs/smdk5420.h | 8 ++ include/power/s2mps11_pmic.h | 3 + 15 files changed, 177 insertions(+), 105 deletions(-) -- 1.7.12.4

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[U-Boot] [PATCH 0/4] Add support for TI TPS65090
by Simon Glass 02 Jan '14

02 Jan '14

This series adds support for the TPS65090 PMIC as used on the Samsung ARM Chromebook. It is plumbed into smdk5250 for now, while we await the exynos5-dt board being applied upstream. Aaron Durbin (3): exynos5: Enable tps65090 on smdk5250 power: Explicitly select pmic device's bus exynos5: support tps65090 pmic Tom Wai-Hong Tam (1): power: Add support for TPS65090 PMU chip. board/samsung/smdk5250/smdk5250.c | 33 +++- doc/device-tree-bindings/power/tps65090.txt | 21 ++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_tps65090.c | 296 ++++++++++++++++++++++++++++ drivers/power/power_i2c.c | 4 + include/configs/exynos5250-dt.h | 1 + include/fdtdec.h | 1 + include/power/tps65090_pmic.h | 83 ++++++++ lib/fdtdec.c | 1 + 9 files changed, 433 insertions(+), 8 deletions(-) create mode 100644 doc/device-tree-bindings/power/tps65090.txt create mode 100644 drivers/power/pmic/pmic_tps65090.c create mode 100644 include/power/tps65090_pmic.h -- 1.8.1.3

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[U-Boot] [PATCH 2/2] vexpress: Add vexpress qemu variant
by Ian Campbell 23 Dec '13

23 Dec '13

The main purpose of this is to disable the use of the virtualisation extensions which Qemu does not emulate. Also enable a few additional commands and the u-boot API. This works for me with: $ dd if=/dev/zero of=pflash0.img bs=1M count=64 $ dd if=/dev/zero of=pflash1.img bs=1M count=64 $ qemu-system-arm -M vexpress-a15 -cpu cortex-a15 -kernel u-boot -m 1024m -sd mmc.img -nographic -pflash pflash0.img -pflash pflash1.img (for some reason both pflash images are needed for saveenv to work) Signed-off-by: Ian Campbell <ijc(a)hellion.org.uk> Cc: albert.u.boot(a)aribaud.net --- boards.cfg | 1 + include/configs/vexpress_ca15_tc2.h | 2 ++ include/configs/vexpress_common.h | 4 ++++ 3 files changed, 7 insertions(+) diff --git a/boards.cfg b/boards.cfg index caba64e..6e2fccc 100644 --- a/boards.cfg +++ b/boards.cfg @@ -245,6 +245,7 @@ Active arm arm926ejs versatile armltd versatile Active arm arm946es - armltd integrator integratorap_cm946es integratorap:CM946ES Linus Walleij <linus.walleij(a)linaro.org> Active arm arm946es - armltd integrator integratorcp_cm946es integratorcp:CM946ES Linus Walleij <linus.walleij(a)linaro.org> Active arm armv7 - armltd vexpress vexpress_ca15_tc2 - - +Active arm armv7 - armltd vexpress vexpress_ca15_tc2_qemu vexpress_ca15_tc2:ARCH_VEXPRESS_QEMU - Active arm armv7 - armltd vexpress vexpress_ca5x2 - Matt Waddel <matt.waddel(a)linaro.org> Active arm armv7 - armltd vexpress vexpress_ca9x4 - Matt Waddel <matt.waddel(a)linaro.org> Active arm armv7 am33xx isee igep0033 am335x_igep0033 - Enric Balletbo i Serra <eballetbo(a)iseebcn.com> diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index 982f4a7..ccdb3c5 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -18,6 +18,8 @@ #define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR +#ifndef CONFIG_ARCH_VEXPRESS_QEMU #define CONFIG_ARMV7_VIRT +#endif #endif diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 7e78f8a..fbb9993 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -157,6 +157,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PXE #define CONFIG_MENU +#define CONFIG_CMD_ECHO #define CONFIG_CMD_ELF #define CONFIG_CMD_ENV #define CONFIG_CMD_FLASH @@ -164,6 +165,7 @@ #define CONFIG_CMD_MEMORY #define CONFIG_CMD_NET #define CONFIG_CMD_PING +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_SAVEENV #define CONFIG_CMD_RUN #define CONFIG_CMD_BOOTZ @@ -176,6 +178,7 @@ #define CONFIG_GENERIC_MMC #define CONFIG_ARM_PL180_MMCI #define CONFIG_ARM_PL180_MMCI_BASE V2M_MMCI +#define CONFIG_SYS_MMC_MAX_DEVICE 2 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000 @@ -253,6 +256,7 @@ #define CONFIG_SYS_FLASH_BASE0 V2M_NOR0 #define CONFIG_SYS_FLASH_BASE1 V2M_NOR1 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE0 +#define CONFIG_API /* Timeout values in ticks */ #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ -- 1.8.4.rc3

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[U-Boot] [PATCH 0/32] Add additional sandbox features and infrastructure
by Simon Glass 20 Dec '13

20 Dec '13

At present sandbox only supports a basic set of features. To help address this, a recent series added SPI and SPI flash support; this series expands the coverage further. Firstly SDL is used to provide LCD and audio support. Sandbox gains its own LCD driver which can display images, host a command line, etc. The audio support is basic and needs additional work, but it is a starting point. SDL also provides a keyboard emulation (using the Chrome OS EC code as a base). Secondly a TPM emulation is added. This does not include all features (the implementation is quite simplistic) but it is enough to do basic secure boot operations. Finally, various pieces of useful infrastructure are adding, including: - loading and saving of the emulated SDRAM to permit test runs to carry over state - loading and saving of general sandbox state (for example a driver can save its stage and reload it on the next run) - support for using bootm to load a kernel - providing a device tree for use by sandbox - block device emulation using host files - a means to jump to another U-Boot while preserving state (useful for test environments which want to run a series of tests with script-selectable state) - allowing the console to be active on start-up so that errors are not silent supressed The block device emulation provides access to filesystems from sandbox which should make it possible to write comprehensive filesystem tests. Major functions which still remain without sandbox support are I2C, networking and USB. Che-Liang Chiou (1): sandbox: tpm: Fix nvwrite command Henrik Nordström (1): sandbox: block driver using host file/device as backing store Simon Glass (29): Add crc8 routine sandbox: Use system headers first for sandbox's os.c sandbox: Use uint64_t instead of u64 for time sandbox: Increase memory size to 32MB sandbox: spi: Adjust 'sf test' to work on sandbox sandbox: Build a device tree file for sandbox sandbox: config: Don't use 64-bit physical memory sandbox: Correct data sizes and printf() strings in fdtdec.c sandbox: Use os functions to read host device tree sandbox: Improve/augment memory allocation functions sandbox: Correct help message <arg> garbling sandbox: Allow return from board_init_f() sandbox: Implement the bootm command for sandbox sandbox: Allow the console to work earlier sandbox: Add -i option to enter interactive mode sandbox: Allow reading/writing of RAM buffer sandbox: Add facility to save/restore sandbox state sandbox: tpm: Add TPM emulation sandbox: dts: Add display and keyboard to sandbox sandbox: Add a prototype for cleanup_before_linux() cros_ec: Add an enum for the number of flash regions fdt: Add a function for reading a flash map entry cros_ec: Add a function for decoding the Chrome OS EC flashmap cros_ec: sandbox: Add Chrome OS EC emulation sandbox: Add os_jump_to_image() to run another executable sandbox: Add -j option to indicate a jump from a previous U-Boot sandbox: Add SDL library for LCD, keyboard, audio sandbox: Add a simple sound driver sandbox: Add LCD driver Vadim Bendebury (1): cros_ec: Move EC interface into common library Makefile | 1 + arch/sandbox/config.mk | 7 + arch/sandbox/cpu/Makefile | 12 +- arch/sandbox/cpu/cpu.c | 21 +- arch/sandbox/cpu/os.c | 187 ++++++++- arch/sandbox/cpu/sdl.c | 334 +++++++++++++++ arch/sandbox/cpu/start.c | 121 +++++- arch/sandbox/cpu/state.c | 353 ++++++++++++++++ arch/sandbox/include/asm/arch-sandbox/sound.h | 14 + arch/sandbox/include/asm/global_data.h | 2 +- arch/sandbox/include/asm/sdl.h | 20 + arch/sandbox/include/asm/state.h | 132 +++++- arch/sandbox/include/asm/types.h | 4 +- arch/sandbox/include/asm/u-boot-sandbox.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 5 - board/sandbox/dts/sandbox.dts | 91 +++++ board/sandbox/sandbox/sandbox.c | 19 +- common/Makefile | 1 + common/board_f.c | 63 ++- common/cmd_sandbox.c | 64 +++ common/cmd_sf.c | 14 +- common/console.c | 16 +- common/cros_ec.c | 44 ++ common/lcd.c | 21 +- config.mk | 9 +- disk/part.c | 23 +- doc/device-tree-bindings/video/sandbox-fb.txt | 13 + drivers/block/Makefile | 1 + drivers/block/sandbox.c | 124 ++++++ drivers/misc/Makefile | 1 + drivers/misc/cros_ec.c | 50 +++ drivers/misc/cros_ec_sandbox.c | 558 ++++++++++++++++++++++++++ drivers/serial/sandbox.c | 4 + drivers/sound/Makefile | 2 + drivers/sound/sandbox.c | 23 ++ drivers/tpm/Makefile | 1 + drivers/tpm/tpm_tis_sandbox.c | 260 ++++++++++++ drivers/video/Makefile | 1 + drivers/video/sandbox_sdl.c | 70 ++++ include/config_fallbacks.h | 3 +- include/configs/sandbox.h | 9 +- include/cros_ec.h | 45 +++ include/ec_commands.h | 4 +- include/fdtdec.h | 20 + include/lcd.h | 3 + include/linux/crc8.h | 23 ++ include/os.h | 88 +++- include/part.h | 5 + include/sandboxblockdev.h | 18 + lib/Makefile | 1 + lib/crc8.c | 25 ++ lib/fdtdec.c | 34 +- 52 files changed, 2866 insertions(+), 103 deletions(-) create mode 100644 arch/sandbox/cpu/sdl.c create mode 100644 arch/sandbox/include/asm/arch-sandbox/sound.h create mode 100644 arch/sandbox/include/asm/sdl.h create mode 100644 board/sandbox/dts/sandbox.dts create mode 100644 common/cros_ec.c create mode 100644 doc/device-tree-bindings/video/sandbox-fb.txt create mode 100644 drivers/block/sandbox.c create mode 100644 drivers/misc/cros_ec_sandbox.c create mode 100644 drivers/sound/sandbox.c create mode 100644 drivers/tpm/tpm_tis_sandbox.c create mode 100644 drivers/video/sandbox_sdl.c create mode 100644 include/linux/crc8.h create mode 100644 include/sandboxblockdev.h create mode 100644 lib/crc8.c -- 1.8.4.1

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