November 2013 - U-Boot

[U-Boot] [PATCH 00/34] zynq: More boards support
by Jagannadha Sutradharudu Teki 05 Nov '13

05 Nov '13

These changes are from u-boot-xlnx.git repo from git.xilinx.com This repo is well tested on xilinx zynq platform, hence pushing the same on upstream. -- Thanks, Jagan. Jagannadha Sutradharudu Teki (34): zynq: Enable CONFIG_FIT_VERBOSE zynq: Enable Boot FreeBSD/vxWorks zynq: Cleanup on miscellaneous configs zynq: Cleanup on memory configs zynq: Minor config cleanup zynq: Enable cache options zynq: Add UART0, UART1 configs support zynq: Add GEM0, GEM1 configs support zynq-common: Rename zynq with zynq-common spi: Add zynq qspi controller driver zynq-common: Enable CONFIG_ZYNQ_QSPI zynq: Add zynq zc70x board support zynq: Add zynq zed board support zynq-common: Define CONFIG_SPI_FLASH_BAR zynq: Add PHYS_SDRAM_1_SIZE config zynq-common: Define exact TEXT_BASE zynq: zc70x: Add Catalyst 24WC08 EEPROM config support zynq: Add zynq microzed board support zynq: Add zynq_zc770 xm010 board support zynq: Add zynq_zc770 xm013 board support zynq: Add zynq_zc770 xm012 board support nand: Add zynq nand controller driver support zynq-common: Define CONFIG_NAND_ZYNQ zynq: Add zynq_zc770 xm011 board support zynq: Add support to find bootmode zynq-common: Define default environment zynq-common: Change Env. Sector size to 128Kb zynq-common: Define flash env. partition zynq-common: Define CONFIG_ENV_OVERWRITE zynq-common: Define ethaddr in default env. dts: zynq: Add basic fdt support gpio: zynq: Add dummy gpio routines zynq-common: Enable verified boot(RSA) dts: zynq: Add more zynq dts files arch/arm/cpu/armv7/zynq/slcr.c | 6 + arch/arm/dts/zynq-7000.dtsi | 13 + arch/arm/include/asm/arch-zynq/gpio.h | 25 + arch/arm/include/asm/arch-zynq/hardware.h | 3 + arch/arm/include/asm/arch-zynq/sys_proto.h | 1 + board/xilinx/dts/zynq-microzed.dts | 14 + board/xilinx/dts/zynq-zc702.dts | 14 + board/xilinx/dts/zynq-zc706.dts | 14 + board/xilinx/dts/zynq-zc770-xm010.dts | 14 + board/xilinx/dts/zynq-zc770-xm011.dts | 14 + board/xilinx/dts/zynq-zc770-xm012.dts | 14 + board/xilinx/dts/zynq-zc770-xm013.dts | 14 + board/xilinx/dts/zynq-zed.dts | 14 + board/xilinx/zynq/board.c | 33 + boards.cfg | 9 +- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/zynq_nand.c | 1200 ++++++++++++++++++++++++++++ drivers/spi/Makefile | 1 + drivers/spi/zynq_qspi.c | 447 +++++++++++ include/configs/zynq-common.h | 273 +++++++ include/configs/zynq.h | 139 ---- include/configs/zynq_microzed.h | 26 + include/configs/zynq_zc70x.h | 29 + include/configs/zynq_zc770.h | 44 + include/configs/zynq_zed.h | 27 + 25 files changed, 2248 insertions(+), 141 deletions(-) create mode 100644 arch/arm/dts/zynq-7000.dtsi create mode 100644 arch/arm/include/asm/arch-zynq/gpio.h create mode 100644 board/xilinx/dts/zynq-microzed.dts create mode 100644 board/xilinx/dts/zynq-zc702.dts create mode 100644 board/xilinx/dts/zynq-zc706.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm010.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm011.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm012.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm013.dts create mode 100644 board/xilinx/dts/zynq-zed.dts create mode 100644 drivers/mtd/nand/zynq_nand.c create mode 100644 drivers/spi/zynq_qspi.c create mode 100644 include/configs/zynq-common.h delete mode 100644 include/configs/zynq.h create mode 100644 include/configs/zynq_microzed.h create mode 100644 include/configs/zynq_zc70x.h create mode 100644 include/configs/zynq_zc770.h create mode 100644 include/configs/zynq_zed.h -- 1.8.3

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[U-Boot] [PATCH 1/1] [RFC] DM: early_malloc for DM added.
by Tomas Hlavacek 05 Nov '13

05 Nov '13

Modular early_malloc for DM with support for more heaps and lightweight first heap on stack. (RFC. Not intended for merging!) Signed-off-by: Tomas Hlavacek <tmshlvck(a)gmail.com> --- arch/arm/include/asm/global_data.h | 1 + arch/arm/lib/board.c | 5 ++ arch/avr32/include/asm/global_data.h | 1 + arch/avr32/lib/board.c | 4 ++ arch/blackfin/include/asm/global_data.h | 1 + arch/blackfin/lib/board.c | 4 ++ arch/m68k/include/asm/global_data.h | 1 + arch/m68k/lib/board.c | 4 ++ arch/microblaze/include/asm/global_data.h | 1 + arch/microblaze/lib/board.c | 5 ++ arch/mips/include/asm/global_data.h | 1 + arch/mips/lib/board.c | 4 ++ arch/nds32/include/asm/global_data.h | 1 + arch/nds32/lib/board.c | 4 ++ arch/nios2/include/asm/global_data.h | 1 + arch/nios2/lib/board.c | 4 ++ arch/openrisc/include/asm/global_data.h | 1 + arch/openrisc/lib/board.c | 4 ++ arch/powerpc/include/asm/global_data.h | 1 + arch/powerpc/lib/board.c | 4 ++ arch/sandbox/include/asm/global_data.h | 1 + arch/sandbox/lib/board.c | 4 ++ arch/sh/include/asm/global_data.h | 1 + arch/sparc/include/asm/global_data.h | 1 + arch/sparc/lib/board.c | 4 ++ arch/x86/include/asm/global_data.h | 1 + arch/x86/lib/board.c | 4 ++ common/Makefile | 1 + common/earlymalloc.c | 91 +++++++++++++++++++++++++++++ include/earlymalloc.h | 48 +++++++++++++++ 30 files changed, 208 insertions(+) create mode 100644 common/earlymalloc.c create mode 100644 include/earlymalloc.h diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index c3ff789..71ae6dc 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -84,6 +84,7 @@ typedef struct global_data { unsigned long post_log_res; /* success of POST test */ unsigned long post_init_f_time; /* When post_init_f started */ #endif + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 500e216..ad124c6 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -52,6 +52,7 @@ #include <fdtdec.h> #include <post.h> #include <logbuff.h> +#include <earlymalloc.h> #ifdef CONFIG_BITBANGMII #include <miiphy.h> @@ -273,6 +274,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->mon_len = _bss_end_ofs; #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ diff --git a/arch/avr32/include/asm/global_data.h b/arch/avr32/include/asm/global_data.h index 5c654bd..5edb1f0 100644 --- a/arch/avr32/include/asm/global_data.h +++ b/arch/avr32/include/asm/global_data.h @@ -50,6 +50,7 @@ typedef struct global_data { #endif void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 63fe297..8cb56df 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -149,6 +149,10 @@ void board_init_f(ulong board_type) memset(&gd_data, 0, sizeof(gd_data)); gd = &gd_data; + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + /* Perform initialization sequence */ board_early_init_f(); cpu_init(); diff --git a/arch/blackfin/include/asm/global_data.h b/arch/blackfin/include/asm/global_data.h index 67aa30f..33d3cec 100644 --- a/arch/blackfin/include/asm/global_data.h +++ b/arch/blackfin/include/asm/global_data.h @@ -59,6 +59,7 @@ typedef struct global_data { void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index e3ee4cd..f8dade6 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -250,6 +250,10 @@ void board_init_f(ulong bootflag) bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + /* Initialize */ serial_early_puts("IRQ init\n"); irq_init(); diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index 0ba2b43..ddd76f9 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -68,6 +68,7 @@ typedef struct global_data { #endif void **jt; /* Standalone app jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 1526967..a420d21 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -227,6 +227,10 @@ board_init_f (ulong bootflag) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) { hang (); diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h index 6e8537c..4e340e6 100644 --- a/arch/microblaze/include/asm/global_data.h +++ b/arch/microblaze/include/asm/global_data.h @@ -47,6 +47,7 @@ typedef struct global_data { unsigned long fb_base; /* base address of frame buffer */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index 9828b76..302a323 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -101,6 +101,11 @@ void board_init (void) asm ("nop"); /* FIXME gd is not initialize - wait */ memset ((void *)gd, 0, GENERATED_GBL_DATA_SIZE); memset ((void *)bd, 0, GENERATED_BD_INFO_SIZE); + + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = bd; gd->baudrate = CONFIG_BAUDRATE; bd->bi_baudrate = CONFIG_BAUDRATE; diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index f6cf9fe..9656fd6 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -61,6 +61,7 @@ typedef struct global_data { unsigned long env_valid; /* Checksum of Environment valid? */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index d998f0e..f40258c 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -160,6 +160,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h index de20a0a..313fecb 100644 --- a/arch/nds32/include/asm/global_data.h +++ b/arch/nds32/include/asm/global_data.h @@ -65,6 +65,7 @@ typedef struct global_data { void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c index 074aabf..34fff30 100644 --- a/arch/nds32/lib/board.c +++ b/arch/nds32/lib/board.c @@ -190,6 +190,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->mon_len = (unsigned int)(&__bss_end__) - (unsigned int)(&_start); for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h index 4b86fbd..02f93d3 100644 --- a/arch/nios2/include/asm/global_data.h +++ b/arch/nios2/include/asm/global_data.h @@ -42,6 +42,7 @@ typedef struct global_data { #endif void **jt; /* Standalone app jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* flags */ diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c index 65de26e..87e0559 100644 --- a/arch/nios2/lib/board.c +++ b/arch/nios2/lib/board.c @@ -97,6 +97,10 @@ void board_init (void) memset( gd, 0, GENERATED_GBL_DATA_SIZE ); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = (bd_t *)(gd+1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; gd->cpu_clk = CONFIG_SYS_CLK_FREQ; diff --git a/arch/openrisc/include/asm/global_data.h b/arch/openrisc/include/asm/global_data.h index 36de9d0..032b6b2 100644 --- a/arch/openrisc/include/asm/global_data.h +++ b/arch/openrisc/include/asm/global_data.h @@ -46,6 +46,7 @@ typedef struct global_data { unsigned long fb_base; /* base address of frame buffer */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/openrisc/lib/board.c b/arch/openrisc/lib/board.c index 85aa189..2a92899 100644 --- a/arch/openrisc/lib/board.c +++ b/arch/openrisc/lib/board.c @@ -86,6 +86,10 @@ void board_init(void) memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = (bd_t *)(gd+1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; gd->cpu_clk = CONFIG_SYS_CLK_FREQ; diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 01f1d4a..0839d03 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -184,6 +184,7 @@ typedef struct global_data { #endif void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 3f9af1d..ac88ae2 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -389,6 +389,10 @@ void board_init_f(ulong bootflag) memset((void *) gd, 0, sizeof(gd_t)); #endif + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) if ((*init_fnc_ptr) () != 0) hang(); diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index 8d47191..54342c0 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -47,6 +47,7 @@ typedef struct global_data { phys_size_t ram_size; /* RAM size */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/sandbox/lib/board.c b/arch/sandbox/lib/board.c index b7997e9..3d06cfc 100644 --- a/arch/sandbox/lib/board.c +++ b/arch/sandbox/lib/board.c @@ -156,6 +156,10 @@ void board_init_f(ulong bootflag) memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); diff --git a/arch/sh/include/asm/global_data.h b/arch/sh/include/asm/global_data.h index 1b782fc..180f56e 100644 --- a/arch/sh/include/asm/global_data.h +++ b/arch/sh/include/asm/global_data.h @@ -42,6 +42,7 @@ typedef struct global_data unsigned long env_valid; /* Checksum of Environment valid */ void **jt; /* Standalone app jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ diff --git a/arch/sparc/include/asm/global_data.h b/arch/sparc/include/asm/global_data.h index 613e2d8..82ed56f 100644 --- a/arch/sparc/include/asm/global_data.h +++ b/arch/sparc/include/asm/global_data.h @@ -76,6 +76,7 @@ typedef struct global_data { #endif void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; /* diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c index 519a4fb..86ee8db 100644 --- a/arch/sparc/lib/board.c +++ b/arch/sparc/lib/board.c @@ -179,6 +179,10 @@ void board_init_f(ulong bootflag) /* Clear initial global data */ memset((void *)gd, 0, sizeof(gd_t)); + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + gd->bd = (bd_t *) (gd + 1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; gd->cpu_clk = CONFIG_SYS_CLK_FREQ; diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 908a02c..171f85b 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -59,6 +59,7 @@ typedef struct global_data { unsigned long reset_status; /* reset status register at boot */ void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ + void *early_heap_first; /* early heap for early_malloc */ } gd_t; static inline gd_t *get_fs_gd_ptr(void) diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index 5f0b62c..5ff4f42 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -220,6 +220,10 @@ void board_init_f(ulong boot_flags) { gd->flags = boot_flags; + /* Initialize early_malloc */ + DECLARE_EARLY_HEAP_ON_STACK; + early_heap_init(gd->early_heap_first, CONFIG_SYS_EARLY_HEAP_SIZE); + do_init_loop(init_sequence_f); /* diff --git a/common/Makefile b/common/Makefile index 2a31c62..744beb8 100644 --- a/common/Makefile +++ b/common/Makefile @@ -188,6 +188,7 @@ COBJS-y += console.o COBJS-y += dlmalloc.o COBJS-y += memsize.o COBJS-y += stdio.o +COBJS-y += earlymalloc.o COBJS := $(sort $(COBJS-y)) diff --git a/common/earlymalloc.c b/common/earlymalloc.c new file mode 100644 index 0000000..6ba4df6 --- /dev/null +++ b/common/earlymalloc.c @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2012 + * Tomas Hlavacek (tmshlvck(a)gmail.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> /* for ROUND_UP */ +#include <asm/u-boot.h> +#include <asm/global_data.h> /* for gd_t and gd */ +#include <asm/types.h> /* for phys_addr_t and size_addt_t */ + +#include <earlymalloc.h> + +DECLARE_GLOBAL_DATA_PTR; + + +void early_heap_init(void *heap, size_t size) +{ + struct early_heap_header *h = heap; + + h->free_space_pointer = (void *)(roundup((phys_addr_t)heap + + sizeof(struct early_heap_header), + sizeof(phys_addr_t))); + h->free_bytes = size - roundup(sizeof(struct early_heap_header), + sizeof(phys_addr_t)); + h->next_early_heap = NULL; +} + +void *early_malloc(size_t size) +{ + phys_addr_t addr; + struct early_heap_header *h; + + /* Align size. */ + size = roundup(size, sizeof(phys_addr_t)); + + /* Choose early_heap with enough space. */ + h = gd->early_heap_first; + while ((h->free_bytes < size)&&(h->next_early_heap != NULL)) + h = h->next_early_heap; + + if(h->free_bytes < size) { + debug("Early heap overflow. Heap %08lX, free %d, required %d.", + h, h->free_bytes, size); + return NULL; + } + + /* Choose block beginning address and mark next free space. */ + addr = h->free_space_pointer; + + h->free_space_pointer += size; + h->free_bytes -= size; + + return (void *)addr; +} + + +int early_malloc_isaddress(void *addr) +{ + if ((phys_addr_t)addr < (phys_addr_t)gd->early_heap_first) + return 0; + + if ((phys_addr_t)addr >= (phys_addr_t)gd->early_heap_first + + CONFIG_SYS_EARLY_HEAP_SIZE) + return 0; + + return 1; +} + +int early_malloc_finished(void) +{ + return gd->flags & GD_FLG_RELOC; +} + diff --git a/include/earlymalloc.h b/include/earlymalloc.h new file mode 100644 index 0000000..345bdef --- /dev/null +++ b/include/earlymalloc.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2012 + * Tomas Hlavacek (tmshlvck(a)gmail.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __INCLUDE_EARLYMALLOC_H +#define __INCLUDE_EARLYMALLOC_H + +#include <linux/stddef.h> /* for size_t */ + +struct early_heap_header { + void *free_space_pointer; + size_t free_bytes; + void *next_early_heap; +}; + +void early_heap_init(void *heap, size_t size); +void *early_malloc(size_t size); +int early_malloc_isaddress(void *addr); +int early_malloc_finished(void); + +#ifndef CONFIG_SYS_EARLY_HEAP_SIZE +#define CONFIG_SYS_EARLY_HEAP_SIZE 256 +#endif /* CONFIG_SYS_EARLY_HEAP_SIZE */ + +#define DECLARE_EARLY_HEAP_ON_STACK char __early_heap[CONFIG_SYS_EARLY_HEAP_SIZE]; \ + gd->early_heap_first = (void *)__early_heap + +#endif /* __INCLUDE_EARLYMALLOC_H */ + -- 1.7.10.4

7 47

[U-Boot] [PATCH 0/2] Make 10Mbit/s work with lan8720a
by David Dueck 05 Nov '13

05 Nov '13

smsc_parse_status does not check the partner abilities. Use the general phy code after a fix. David Dueck (2): phy: Use supported field during autonegotiation phy: Use general phy code for smsc lan8720a drivers/net/phy/phy.c | 5 +++-- drivers/net/phy/smsc.c | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) -- 1.8.4.rc3

1 2

[U-Boot] [PATCH] Add support for TechNexion edm1-cf-imx6 SoM
by Tapani 05 Nov '13

05 Nov '13

Add support for TechNexion edm-cf-imx6 SoM The edm1-cf-imx6 SoM comes in three variants, one with imx6 solo cpu, one with an imx6 dual lite cpu and one with an imx6 quad cpu. This patch adds basic support for the module that utilizes SPL boot mechanism for detecting imx6 CPU runtime and sets the system accordingly. Signed-off-by: Richard Hu <richard.hu(a)technexion.com> Signed-off-by: Tapani Utriainen <tapani(a)technexion.com> Signed-off-by: Edward Lin <edward.lin(a)technexion.com> --- MAINTAINERS | 4 + arch/arm/include/asm/arch-mx6/spl.h | 19 + board/technexion/edm_cf_imx6/Makefile | 26 + board/technexion/edm_cf_imx6/README | 30 + board/technexion/edm_cf_imx6/clocks.cfg | 44 ++ board/technexion/edm_cf_imx6/edm_cf_imx6.c | 801 ++++++++++++++++++++++++ board/technexion/edm_cf_imx6/edm_cf_imx6_pins.h | 44 ++ board/technexion/edm_cf_imx6/imximage.cfg | 17 + boards.cfg | 1 + include/configs/edm_cf_imx6.h | 140 +++++ 10 files changed, 1126 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx6/spl.h create mode 100644 board/technexion/edm_cf_imx6/Makefile create mode 100644 board/technexion/edm_cf_imx6/README create mode 100644 board/technexion/edm_cf_imx6/clocks.cfg create mode 100644 board/technexion/edm_cf_imx6/edm_cf_imx6.c create mode 100644 board/technexion/edm_cf_imx6/edm_cf_imx6_pins.h create mode 100644 board/technexion/edm_cf_imx6/imximage.cfg create mode 100644 include/configs/edm_cf_imx6.h diff --git a/MAINTAINERS b/MAINTAINERS index 0a900dc..2c0f8b1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1074,6 +1074,10 @@ Eric Nelson <eric.nelson(a)boundarydevices.com> nitrogen6s i.MX6S 512MB nitrogen6s1g i.MX6S 1GB +Tapani Utriainen <tapani(a)technexion.com> + + edm_cf_imx6 i.MX6 several configurations + Alison Wang <b18965(a)freescale.com> vf610twr VF610 diff --git a/arch/arm/include/asm/arch-mx6/spl.h b/arch/arm/include/asm/arch-mx6/spl.h new file mode 100644 index 0000000..dd04088 --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/spl.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2013 TechNexion Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef __ASM_ARCH_IMX6_SPL_H__ +#define __ASM_ARCH_IMX6_SPL_H__ + +#define BOOT_DEVICE_MMC1 0 +#define BOOT_DEVICE_MMC2 1 +#define BOOT_DEVICE_MMC2_2 2 +#define BOOT_DEVICE_NAND 3 +#define BOOT_DEVICE_NONE 4 + +#endif /* __ASM_ARCH_IMX6_SPL_H__ */ diff --git a/board/technexion/edm_cf_imx6/Makefile b/board/technexion/edm_cf_imx6/Makefile new file mode 100644 index 0000000..2e764cb --- /dev/null +++ b/board/technexion/edm_cf_imx6/Makefile @@ -0,0 +1,26 @@ +# +# (C) Copyright 2013 TechNexion Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := edm_cf_imx6.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/technexion/edm_cf_imx6/README b/board/technexion/edm_cf_imx6/README new file mode 100644 index 0000000..aaca361 --- /dev/null +++ b/board/technexion/edm_cf_imx6/README @@ -0,0 +1,30 @@ +U-Boot for edm_cf_imx6 +-------------------- + +The edm_cf_imx6 uses SPL boot for auto configuration of CPU type and memory. +Supported cpus are imx6 duallite, quad and solo. + +For more details of the SoM, please refer to: +http://www.technexion.com + +Building U-boot for edm_cf_imx6 +----------------------------- + +To build U-Boot for i.mx6 solo, dual lite, quad: + +$ make distclean +$ make edm_cf_imx6_config +$ make +$ make u-boot.img + +Flashing U-boot into the SD card +-------------------------------- + +- After the 'make u-boot.img' command completes, the generated 'SPL' and +'u-boot.img' binary must be flashed into the SD card: + +# dd if=SPL of=/dev/$dev bs=1k seek=1 + +# dd if=u-boot.img of=/dev/$dev bs=64k seek=1; sync + +Only raw mmc boot has been verified to work. diff --git a/board/technexion/edm_cf_imx6/clocks.cfg b/board/technexion/edm_cf_imx6/clocks.cfg new file mode 100644 index 0000000..9a182c8 --- /dev/null +++ b/board/technexion/edm_cf_imx6/clocks.cfg @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2013 TechNexion Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) for both imx6sdl and imx6q + * + * Each entry must be well-defined on all applicable cpu variants + * + * Also, each entry must have the format + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + * + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 + +/* Note: this turns off NAND clock */ +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU and set Qos=0xf (bypass) */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/technexion/edm_cf_imx6/edm_cf_imx6.c b/board/technexion/edm_cf_imx6/edm_cf_imx6.c new file mode 100644 index 0000000..1a98168 --- /dev/null +++ b/board/technexion/edm_cf_imx6/edm_cf_imx6.c @@ -0,0 +1,801 @@ +/* + * Copyright (C) 2013 TechNexion Ltd. + * + * Author: Richard Hu (richard.hu(a)technexion.com) + * Tapani Utriainen (tapani(a)technexion.com) + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/imx-regs.h> +#ifdef CONFIG_SPL +#include <spl.h> +#endif +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/imx-common/iomux-v3.h> +#include <asm/imx-common/boot_mode.h> +#include <asm/io.h> +#include <asm/sizes.h> +#include <common.h> +#include <fsl_esdhc.h> +#include <mmc.h> + +#include "edm_cf_imx6_pins.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2) +#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9) + +enum boot_device { + SD0_BOOT, + SD1_BOOT, + MMC_BOOT, + NAND_BOOT, + WEIM_NOR_BOOT, + ONE_NAND_BOOT, + PATA_BOOT, + SATA_BOOT, + I2C_BOOT, + SPI_NOR_BOOT, + UNKNOWN_BOOT, + BOOT_DEV_NUM = UNKNOWN_BOOT, +}; + + +static enum boot_device boot_dev; +enum boot_device get_boot_device(void); + +static inline void setup_boot_device(void) +{ + uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4); + uint bt_mem_ctl = (soc_sbmr & 0x000000FF) >> 4 ; + uint bt_mem_type = (soc_sbmr & 0x00000008) >> 3; + uint bt_mem_mmc = (soc_sbmr & 0x00001000) >> 12; + + switch (bt_mem_ctl) { + case 0x0: + if (bt_mem_type) + boot_dev = ONE_NAND_BOOT; + else + boot_dev = WEIM_NOR_BOOT; + break; + case 0x2: + boot_dev = SATA_BOOT; + break; + case 0x3: + if (bt_mem_type) + boot_dev = I2C_BOOT; + else + boot_dev = SPI_NOR_BOOT; + break; + case 0x4: + case 0x5: + if (bt_mem_mmc) + boot_dev = SD0_BOOT; + else + boot_dev = SD1_BOOT; + break; + case 0x6: + case 0x7: + boot_dev = MMC_BOOT; + break; + case 0x8 ... 0xf: + boot_dev = NAND_BOOT; + break; + default: + boot_dev = UNKNOWN_BOOT; + break; + } +} + +enum boot_device get_boot_device(void) { + return boot_dev; +} + + +int dram_init(void) +{ + uint cpurev, imxtype; + u32 sdram_size; + + cpurev = get_cpu_rev(); + imxtype = (cpurev & 0xFF000) >> 12; + + switch (imxtype){ + case MXC_CPU_MX6SOLO: + sdram_size = 512 * 1024 * 1024; + break; + case MXC_CPU_MX6Q: + sdram_size = 2u * 1024 * 1024 * 1024; + break; + case MXC_CPU_MX6DL: + default: + sdram_size = 1u * 1024 * 1024 * 1024;; + break; + } + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, sdram_size); + + return 0; +} + +static iomux_v3_cfg_t const edmdl_uart1_pads[] = { + MX6DL_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6DL_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const edmq_uart1_pads[] = { + MX6Q_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6Q_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const edmdl_usdhc1_pads[] = { + MX6DL_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD1_DAT0__USDHC1_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD1_DAT1__USDHC1_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD1_DAT2__USDHC1_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD1_DAT3__USDHC1_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* Card detect */ + MX6DL_PAD_GPIO_2__GPIO_1_2 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const edmq_usdhc1_pads[] = { + MX6Q_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD1_DAT0__USDHC1_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD1_DAT1__USDHC1_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD1_DAT2__USDHC1_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD1_DAT3__USDHC1_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* Card detect */ + MX6Q_PAD_GPIO_2__GPIO_1_2 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const edmdl_usdhc3_pads[] = { + MX6DL_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* Card detect */ + MX6DL_PAD_EIM_DA9__GPIO_3_9 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const edmq_usdhc3_pads[] = { + MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* Card detect */ + MX6Q_PAD_EIM_DA9__GPIO_3_9 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static bool cpu_is_mx6q(void) +{ + u32 cpurev, imxtype; + + cpurev = get_cpu_rev(); + imxtype = (cpurev & 0xFF000) >> 12; + + return (imxtype == MXC_CPU_MX6Q); +} + +static void setup_iomux_uart(void) +{ + const iomux_v3_cfg_t *uart1_pads = NULL; + u32 uart1_pads_cnt; + + if (cpu_is_mx6q()) + { + uart1_pads = edmq_uart1_pads; + uart1_pads_cnt = ARRAY_SIZE(edmq_uart1_pads); + } + else + { + uart1_pads = edmdl_uart1_pads; + uart1_pads_cnt = ARRAY_SIZE(edmdl_uart1_pads); + } + imx_iomux_v3_setup_multiple_pads(uart1_pads, uart1_pads_cnt); +} + +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + { USDHC3_BASE_ADDR }, + { USDHC1_BASE_ADDR }, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC3_CD_GPIO); + break; + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + const iomux_v3_cfg_t *usdhc3_pads = NULL; + u32 usdhc3_pads_cnt; + const iomux_v3_cfg_t *usdhc1_pads = NULL; + u32 usdhc1_pads_cnt; + /* + * Following map is done: + * (U-boot device node) (Physical Port) + * mmc0 SOM MicroSD + * mmc1 Carrier board MicroSD + */ + switch (get_boot_device()) { + case SD1_BOOT: + usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + case SD0_BOOT: + default: + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + } + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + + if (cpu_is_mx6q()) + { + usdhc3_pads = edmq_usdhc3_pads; + usdhc3_pads_cnt = ARRAY_SIZE(edmq_usdhc3_pads); + } + else + { + usdhc3_pads = edmdl_usdhc3_pads; + usdhc3_pads_cnt = ARRAY_SIZE(edmdl_usdhc3_pads); + } + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, usdhc3_pads_cnt); + + gpio_direction_input(USDHC3_CD_GPIO); + break; + case 1: + if (cpu_is_mx6q()) + { + usdhc1_pads = edmq_usdhc1_pads; + usdhc1_pads_cnt = ARRAY_SIZE(edmq_usdhc1_pads); + } + else + { + usdhc1_pads = edmdl_usdhc1_pads; + usdhc1_pads_cnt = ARRAY_SIZE(edmdl_usdhc1_pads); + } + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, usdhc1_pads_cnt); + gpio_direction_input(USDHC1_CD_GPIO); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + return status; +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int board_late_init(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + + return 0; +} + +int board_init(void) +{ + setup_boot_device(); + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int checkboard(void) +{ + puts("Board: edm_cf_imx6\n"); + + return 0; +} + +#if defined(CONFIG_SPL_BUILD) +void board_init_f(ulong dummy) +{ + /* Set the stack pointer. */ + asm volatile("mov sp, %0\n" : : "r"(CONFIG_SPL_STACK)); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + /* Set global data pointer. */ + gd = &gdata; + + arch_cpu_init(); + board_early_init_f(); + timer_init(); + preloader_console_init(); + + board_init_r(NULL, 0); +} + +static void spl_dram_init_mx6solo_512mb(void) +{ + /* DDR3 initialization based on the MX6Solo Auto Reference Design (ARD) */ + /* DDR IO TYPE */ + writel(0x000c0000, IOMUXC_BASE_ADDR + 0x774); + writel(0x00000000, IOMUXC_BASE_ADDR + 0x754); + /* Clock */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4ac); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4b0); + /* Address */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x464); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x490); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x74c); + /* Control */ + writel(0x000c0030, IOMUXC_BASE_ADDR + 0x494); + writel(0x00003000, IOMUXC_BASE_ADDR + 0x4a4); + writel(0x00003000, IOMUXC_BASE_ADDR + 0x4a8); + writel(0x00000000, IOMUXC_BASE_ADDR + 0x4a0); + writel(0x00003030, IOMUXC_BASE_ADDR + 0x4b4); + writel(0x00003030, IOMUXC_BASE_ADDR + 0x4b8); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x76c); + /* Strobe */ + writel(0x00020000, IOMUXC_BASE_ADDR + 0x750); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4bc); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4c0); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4c4); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4c8); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4cc); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4d0); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4d4); + writel(0x00000038, IOMUXC_BASE_ADDR + 0x4d8); + /* Data */ + writel(0x00020000, IOMUXC_BASE_ADDR + 0x760); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x764); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x770); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x778); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x77c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x780); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x784); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x78c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x748); + + writel(0x00000030, IOMUXC_BASE_ADDR + 0x470); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x474); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x478); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x47c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x480); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x484); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x488); + writel(0x000C0030, IOMUXC_BASE_ADDR + 0x48c); + /* ZQ */ + writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); + writel(0xa1390003, MMDC_P1_BASE_ADDR + 0x800); + /* Write leveling */ + writel(0x0040003c, MMDC_P0_BASE_ADDR + 0x80c); + writel(0x0032003e, MMDC_P0_BASE_ADDR + 0x810); + + writel(0x42350231, MMDC_P0_BASE_ADDR + 0x83c); + writel(0x021a0218, MMDC_P0_BASE_ADDR + 0x840); + writel(0x4b4b4e49, MMDC_P0_BASE_ADDR + 0x848); + writel(0x3f3f3035, MMDC_P0_BASE_ADDR + 0x850); + /* Read data bit delay */ + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x824); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x828); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x81c); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x820); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x824); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x828); + /* Complete calibration by forced measurement */ + writel(0x00000800, MMDC_P0_BASE_ADDR + 0x8b8); + + writel(0x0002002d, MMDC_P0_BASE_ADDR + 0x004); + writel(0x00333030, MMDC_P0_BASE_ADDR + 0x008); + writel(0x696d5323, MMDC_P0_BASE_ADDR + 0x00c); + writel(0xb66e8c63, MMDC_P0_BASE_ADDR + 0x010); + writel(0x01ff00db, MMDC_P0_BASE_ADDR + 0x014); + writel(0x00001740, MMDC_P0_BASE_ADDR + 0x018); + writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x000026d2, MMDC_P0_BASE_ADDR + 0x02c); + writel(0x006d0e21, MMDC_P0_BASE_ADDR + 0x030); + writel(0x00000027, MMDC_P0_BASE_ADDR + 0x040); + writel(0x84190000, MMDC_P0_BASE_ADDR + 0x000); + writel(0x04008032, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x00008033, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x00048031, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x07208030, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x04008040, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x00005800, MMDC_P0_BASE_ADDR + 0x020); + writel(0x00011117, MMDC_P0_BASE_ADDR + 0x818); + writel(0x00011117, MMDC_P1_BASE_ADDR + 0x818); + writel(0x0002556d, MMDC_P0_BASE_ADDR + 0x004); + writel(0x00011006, MMDC_P1_BASE_ADDR + 0x004); + writel(0x00000000, MMDC_P0_BASE_ADDR + 0x01c); +} + +static void spl_dram_init_mx6dl_1g(void) +{ + /* DDR3 initialization based on the MX6Solo Auto Reference Design (ARD) */ + /* DDR IO TYPE */ + writel(0x000c0000, IOMUXC_BASE_ADDR + 0x774); + writel(0x00000000, IOMUXC_BASE_ADDR + 0x754); + /* Clock */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4ac); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4b0); + /* Address */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x464); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x490); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x74c); + /* Control */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x494); + writel(0x00003000, IOMUXC_BASE_ADDR + 0x4a4); + writel(0x00003000, IOMUXC_BASE_ADDR + 0x4a8); + writel(0x00000000, IOMUXC_BASE_ADDR + 0x4a0); + writel(0x00003030, IOMUXC_BASE_ADDR + 0x4b4); + writel(0x00003030, IOMUXC_BASE_ADDR + 0x4b8); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x76c); + /* Data Strobe */ + writel(0x00020000, IOMUXC_BASE_ADDR + 0x750); + + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4bc); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4c0); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4c4); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4c8); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4cc); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4d0); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4d4); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x4d8); + /* Data */ + writel(0x00020000, IOMUXC_BASE_ADDR + 0x760); + + writel(0x00000030, IOMUXC_BASE_ADDR + 0x764); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x770); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x778); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x77c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x780); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x784); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x78c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x748); + + writel(0x00000030, IOMUXC_BASE_ADDR + 0x470); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x474); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x478); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x47c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x480); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x484); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x488); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x48c); + + /* Calibrations */ + /* ZQ */ + writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); + writel(0xa1390003, MMDC_P1_BASE_ADDR + 0x800); + /* write leveling */ + writel(0x001F001F, MMDC_P0_BASE_ADDR + 0x80c); + writel(0x001F001F, MMDC_P0_BASE_ADDR + 0x810); + writel(0x001F001F, MMDC_P1_BASE_ADDR + 0x80c); + writel(0x001F001F, MMDC_P1_BASE_ADDR + 0x810); + /* DQS gating, read delay, write delay calibration values */ + /* based on calibration compare of 0x00ffff00 */ + writel(0x420E020E, MMDC_P0_BASE_ADDR + 0x83c); + writel(0x02000200, MMDC_P0_BASE_ADDR + 0x840); + writel(0x42020202, MMDC_P1_BASE_ADDR + 0x83C); + writel(0x01720172, MMDC_P1_BASE_ADDR + 0x840); + writel(0x494C4F4C, MMDC_P0_BASE_ADDR + 0x848); + writel(0x4A4C4C49, MMDC_P1_BASE_ADDR + 0x848); + writel(0x3F3F3133, MMDC_P0_BASE_ADDR + 0x850); + writel(0x39373F2E, MMDC_P1_BASE_ADDR + 0x850); + /* read data bit delay */ + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x824); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x828); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x81c); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x820); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x824); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x828); + /* Complete calibration by forced measurment */ + writel(0x00000800, MMDC_P0_BASE_ADDR + 0x8b8); + writel(0x00000800, MMDC_P1_BASE_ADDR + 0x8b8); + + writel(0x0002002d, MMDC_P0_BASE_ADDR + 0x004); + writel(0x00333030, MMDC_P0_BASE_ADDR + 0x008); + + writel(0x40445323, MMDC_P0_BASE_ADDR + 0x00c); + writel(0xb66e8c63, MMDC_P0_BASE_ADDR + 0x010); + + writel(0x01ff00db, MMDC_P0_BASE_ADDR + 0x014); + writel(0x00081740, MMDC_P0_BASE_ADDR + 0x018); + writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x000026d2, MMDC_P0_BASE_ADDR + 0x02c); + writel(0x00440e21, MMDC_P0_BASE_ADDR + 0x030); + writel(0x00000027, MMDC_P0_BASE_ADDR + 0x040); + writel(0xc31a0000, MMDC_P0_BASE_ADDR + 0x000); + /* MR2 */ + writel(0x04008032, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x0400803a, MMDC_P0_BASE_ADDR + 0x01c); + /* MR3 */ + writel(0x00008033, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x0000803b, MMDC_P0_BASE_ADDR + 0x01c); + /* MR1 */ + writel(0x00428031, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x00428039, MMDC_P0_BASE_ADDR + 0x01c); + /* MR0 */ + writel(0x07208030, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x07208038, MMDC_P0_BASE_ADDR + 0x01c); + /* ZQ calibration */ + writel(0x04008040, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x04008040, MMDC_P0_BASE_ADDR + 0x01c); + /* final DDR setup */ + writel(0x00005800, MMDC_P0_BASE_ADDR + 0x020); + writel(0x00000007, MMDC_P0_BASE_ADDR + 0x818); + writel(0x00000007, MMDC_P1_BASE_ADDR + 0x818); + writel(0x0002556d, MMDC_P0_BASE_ADDR + 0x004); + writel(0x00011006, MMDC_P1_BASE_ADDR + 0x404); + writel(0x00000000, MMDC_P0_BASE_ADDR + 0x01c); +} + +static void spl_dram_init_mx6q_2g(void) +{ + /* i.MX6Q */ + /* DDR IO TYPE */ + writel(0x000C0000, IOMUXC_BASE_ADDR + 0x798); + writel(0x00000000, IOMUXC_BASE_ADDR + 0x758); + /* Clock */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x588); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x594); + /* Address */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x56c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x578); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x74c); + /* Control */ + writel(0x00000030, IOMUXC_BASE_ADDR + 0x57c); + + writel(0x00000000, IOMUXC_BASE_ADDR + 0x58c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x59c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5a0); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x78c); + /* Data Strobe */ + writel(0x00020000, IOMUXC_BASE_ADDR + 0x750); + + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5a8); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5b0); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x524); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x51c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x518); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x50c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5b8); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5c0); + /* Data */ + writel(0x00020000, IOMUXC_BASE_ADDR + 0x774); + + writel(0x00000030, IOMUXC_BASE_ADDR + 0x784); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x788); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x794); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x79c); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x7a0); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x7a4); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x7a8); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x748); + + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5ac); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5b4); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x528); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x520); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x514); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x510); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5bc); + writel(0x00000030, IOMUXC_BASE_ADDR + 0x5c4); + + /* Calibrations */ + /* ZQ */ + writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); + /* write leveling */ + writel(0x001F001F, MMDC_P0_BASE_ADDR + 0x80c); + writel(0x001F001F, MMDC_P0_BASE_ADDR + 0x810); + writel(0x001F001F, MMDC_P1_BASE_ADDR + 0x80c); + writel(0x001F001F, MMDC_P1_BASE_ADDR + 0x810); + /* DQS gating, read delay, write delay calibration values */ + /* based on calibration compare of 0x00ffff00 */ + writel(0x4301030D, MMDC_P0_BASE_ADDR + 0x83c); + writel(0x03020277, MMDC_P0_BASE_ADDR + 0x840); + writel(0x4300030A, MMDC_P1_BASE_ADDR + 0x83c); + writel(0x02780248, MMDC_P1_BASE_ADDR + 0x840); + + writel(0x4536393B, MMDC_P0_BASE_ADDR + 0x848); + writel(0x36353441, MMDC_P1_BASE_ADDR + 0x848); + + writel(0x41414743, MMDC_P0_BASE_ADDR + 0x850); + writel(0x462F453F, MMDC_P1_BASE_ADDR + 0x850); + + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x824); + writel(0x33333333, MMDC_P0_BASE_ADDR + 0x828); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x81c); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x820); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x824); + writel(0x33333333, MMDC_P1_BASE_ADDR + 0x828); + + writel(0x00000800, MMDC_P0_BASE_ADDR + 0x8b8); + writel(0x00000800, MMDC_P1_BASE_ADDR + 0x8b8); + /* MMDC init: in DDR3, 64-bit mode, only MMDC0 is initiated: */ + writel(0x00020036, MMDC_P0_BASE_ADDR + 0x004); + writel(0x09444040, MMDC_P0_BASE_ADDR + 0x008); + writel(0x555A7975, MMDC_P0_BASE_ADDR + 0x00c); + writel(0xFF538F64, MMDC_P0_BASE_ADDR + 0x010); + writel(0x01FF00DB, MMDC_P0_BASE_ADDR + 0x014); + writel(0x00001740, MMDC_P0_BASE_ADDR + 0x018); + + writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x000026D2, MMDC_P0_BASE_ADDR + 0x02c); + writel(0x005A1023, MMDC_P0_BASE_ADDR + 0x030); + + /* 2G */ + writel(0x00000047, MMDC_P0_BASE_ADDR + 0x040); + writel(0x841A0000, MMDC_P0_BASE_ADDR + 0x000); + + writel(0x04088032, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x00008033, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x00048031, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x09408030, MMDC_P0_BASE_ADDR + 0x01c); + writel(0x04008040, MMDC_P0_BASE_ADDR + 0x01c); + + writel(0x00005800, MMDC_P0_BASE_ADDR + 0x020); + + writel(0x00011117, MMDC_P0_BASE_ADDR + 0x818); + writel(0x00011117, MMDC_P1_BASE_ADDR + 0x818); + + writel(0x00025576, MMDC_P0_BASE_ADDR + 0x004); + writel(0x00011006, MMDC_P0_BASE_ADDR + 0x404); + writel(0x00000000, MMDC_P0_BASE_ADDR + 0x01c); +} + +static void spl_dram_init(void) +{ + u32 cpurev, imxtype; + + cpurev = get_cpu_rev(); + imxtype = (cpurev & 0xFF000) >> 12; + + puts("CPU: Freescale i.MX"); + puts(get_imx_type(imxtype)); + puts("\n"); + + switch (imxtype){ + case MXC_CPU_MX6SOLO: + spl_dram_init_mx6solo_512mb(); + break; + case MXC_CPU_MX6Q: + spl_dram_init_mx6q_2g(); + break; + case MXC_CPU_MX6DL: + default: + spl_dram_init_mx6dl_1g(); + break; + } +} + +void spl_board_init(void) +{ + spl_dram_init(); + setup_boot_device(); +} + +u32 spl_boot_device(void) +{ + puts("Boot Device: "); + switch (get_boot_device()) { + case SD0_BOOT: + printf("SD0\n"); + return BOOT_DEVICE_MMC1; + case SD1_BOOT: + printf("SD1\n"); + return BOOT_DEVICE_MMC2; + case MMC_BOOT: + printf("MMC\n"); + return BOOT_DEVICE_MMC2; + case NAND_BOOT: + printf("NAND\n"); + return BOOT_DEVICE_NAND; + case UNKNOWN_BOOT: + default: + printf("UNKNOWN\n"); + return BOOT_DEVICE_NONE; + } +} + +u32 spl_boot_mode(void) +{ + switch (spl_boot_device()) { + case BOOT_DEVICE_MMC1: + case BOOT_DEVICE_MMC2: + case BOOT_DEVICE_MMC2_2: +#ifdef CONFIG_SPL_FAT_SUPPORT + return MMCSD_MODE_FAT; +#else + return MMCSD_MODE_RAW; +#endif + break; + case BOOT_DEVICE_NAND: + default: + puts("spl: ERROR: unsupported device\n"); + hang(); + } +} + +void reset_cpu(ulong addr) +{ + +} +#endif diff --git a/board/technexion/edm_cf_imx6/edm_cf_imx6_pins.h b/board/technexion/edm_cf_imx6/edm_cf_imx6_pins.h new file mode 100644 index 0000000..cba5d1c --- /dev/null +++ b/board/technexion/edm_cf_imx6/edm_cf_imx6_pins.h @@ -0,0 +1,44 @@ +#ifndef _EDM_CF_IMX6_PINS_H +#define _EDM_CF_IMX6_PINS_H + +enum { + MX6DL_PAD_CSI0_DAT10__UART1_TXD = IOMUX_PAD(0x0360, 0x004C, 3, 0x0000, 0, 0), + MX6DL_PAD_CSI0_DAT11__UART1_RXD = IOMUX_PAD(0x0364, 0x0050, 3, 0x08FC, 1, 0), + + MX6Q_PAD_CSI0_DAT10__UART1_TXD = IOMUX_PAD(0x0650, 0x0280, 3, 0x0000, 0, 0), + MX6Q_PAD_CSI0_DAT11__UART1_RXD = IOMUX_PAD(0x0654, 0x0284, 3, 0x0920, 1, 0), + + MX6DL_PAD_SD1_CLK__USDHC1_CLK = IOMUX_PAD(0x06C4, 0x02DC, 0, 0x0928, 1, 0), + MX6DL_PAD_SD1_CMD__USDHC1_CMD = IOMUX_PAD(0x06C8, 0x02E0, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + MX6DL_PAD_SD1_DAT0__USDHC1_DAT0 = IOMUX_PAD(0x06CC, 0x02E4, 0, 0x0000, 0, 0), + MX6DL_PAD_SD1_DAT1__USDHC1_DAT1 = IOMUX_PAD(0x06D0, 0x02E8, 0, 0x0000, 0, 0), + MX6DL_PAD_SD1_DAT2__USDHC1_DAT2 = IOMUX_PAD(0x06D4, 0x02EC, 0, 0x0000, 0, 0), + MX6DL_PAD_SD1_DAT3__USDHC1_DAT3 = IOMUX_PAD(0x06D8, 0x02F0, 0, 0x0000, 0, 0), + MX6DL_PAD_GPIO_2__GPIO_1_2 = IOMUX_PAD(0x05F4, 0x0224, 5, 0x0000, 0, 0), + + MX6Q_PAD_SD1_CLK__USDHC1_CLK = IOMUX_PAD(0x0738, 0x0350, 0, 0x0000, 0, 0), + MX6Q_PAD_SD1_CMD__USDHC1_CMD = IOMUX_PAD(0x0730, 0x0348, 16, 0x0000, 0, 0), + MX6Q_PAD_SD1_DAT0__USDHC1_DAT0 = IOMUX_PAD(0x0728, 0x0340, 0, 0x0000, 0, 0), + MX6Q_PAD_SD1_DAT1__USDHC1_DAT1 = IOMUX_PAD(0x0724, 0x033C, 0, 0x0000, 0, 0), + MX6Q_PAD_SD1_DAT2__USDHC1_DAT2 = IOMUX_PAD(0x0734, 0x034C, 0, 0x0000, 0, 0), + MX6Q_PAD_SD1_DAT3__USDHC1_DAT3 = IOMUX_PAD(0x072C, 0x0344, 0, 0x0000, 0, 0), + MX6Q_PAD_GPIO_2__GPIO_1_2 = IOMUX_PAD(0x0604, 0x0234, 5, 0x0000, 0, 0), + + MX6DL_PAD_SD3_CLK__USDHC3_CLK = IOMUX_PAD(0x06F4, 0x030C, 0, 0x0934, 1, 0), + MX6DL_PAD_SD3_CMD__USDHC3_CMD = IOMUX_PAD(0x06F8, 0x0310, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT0__USDHC3_DAT0 = IOMUX_PAD(0x06FC, 0x0314, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 = IOMUX_PAD(0x0700, 0x0318, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 = IOMUX_PAD(0x0704, 0x031C, 0, 0x0000, 0, 0), + MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 = IOMUX_PAD(0x0708, 0x0320, 0, 0x0000, 0, 0), + MX6DL_PAD_EIM_DA9__GPIO_3_9 = IOMUX_PAD(0x0590, 0x01C0, 5, 0x0000, 0, 0), + + MX6Q_PAD_SD3_CLK__USDHC3_CLK = IOMUX_PAD(0x06A4, 0x02BC, 0, 0x0000, 0, 0), + MX6Q_PAD_SD3_CMD__USDHC3_CMD = IOMUX_PAD(0x06A0, 0x02B8, 16, 0x0000, 0, 0), + MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 = IOMUX_PAD(0x06A8, 0x02C0, 0, 0x0000, 0, 0), + MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 = IOMUX_PAD(0x06AC, 0x02C4, 0, 0x0000, 0, 0), + MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 = IOMUX_PAD(0x06B0, 0x02C8, 0, 0x0000, 0, 0), + MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 = IOMUX_PAD(0x06B4, 0x02CC, 0, 0x0000, 0, 0), + MX6Q_PAD_EIM_DA9__GPIO_3_9 = IOMUX_PAD(0x044C, 0x0138, 5, 0x0000, 0, 0), +}; + +#endif /* _EDM_CF_IMX6_PINS_H */ diff --git a/board/technexion/edm_cf_imx6/imximage.cfg b/board/technexion/edm_cf_imx6/imximage.cfg new file mode 100644 index 0000000..4019d68 --- /dev/null +++ b/board/technexion/edm_cf_imx6/imximage.cfg @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2013 TechNexion Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +IMAGE_VERSION 2 + +BOOT_FROM sd + +#define __ASSEMBLY__ +#include <config.h> +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "clocks.cfg" diff --git a/boards.cfg b/boards.cfg index 79d6cd8..b7d66ff 100644 --- a/boards.cfg +++ b/boards.cfg @@ -288,6 +288,7 @@ nitrogen6s1g arm armv7 nitrogen6x boundar wandboard_dl arm armv7 wandboard - mx6 wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024 wandboard_quad arm armv7 wandboard - mx6 wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048 wandboard_solo arm armv7 wandboard - mx6 wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 +edm_cf_imx6 arm armv7 edm_cf_imx6 technexion mx6 edm_cf_imx6:IMX_CONFIG=board/technexion/edm_cf_imx6/imximage.cfg,SPL omap3_overo arm armv7 overo - omap3 omap3_pandora arm armv7 pandora - omap3 dig297 arm armv7 dig297 comelit omap3 diff --git a/include/configs/edm_cf_imx6.h b/include/configs/edm_cf_imx6.h new file mode 100644 index 0000000..7bfe8e2 --- /dev/null +++ b/include/configs/edm_cf_imx6.h @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * Configuration settings for the Wandboard. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> +#include <asm/sizes.h> + +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define MACH_TYPE_EDM_CF_IMX6 4257 +#define CONFIG_MACH_TYPE MACH_TYPE_EDM_CF_IMX6 + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_REVISION_TAG + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT + +#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 128 /* offset 64KB */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 700 /* 350 KB */ +#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS*512) + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 +#endif + +/* Memory map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +/* Set to 64k since we should be able to run on both imx6dl and imx6q */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_MXC_GPIO + +/* debug console */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE + +/* Standard command definition */ +#include <config_cmd_default.h> +/* ... exclude what's not yet supported */ +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_NET + +/* MMC Configuration */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER + +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +/* Environment settings */ +#define CONFIG_ENV_SIZE (8 << 10) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET (8 * 64 * 1024) +#define CONFIG_SYS_NO_FLASH +/* SPL boot reorders mmc devices so that boot device is 0 -- env is in boot dev */ +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc0\0" \ + "bootargs=console=ttymxc0,115200 root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw video=mxcfb0:dev=hdmi,1920x1080@60,if=BGR32\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev 0; mmc read $loadaddr 0x800 0x1000; bootm" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 384 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#endif /* __CONFIG_H * */ -- 1.8.0.3

7 13

[U-Boot] Pull request: u-boot-ti
by Tom Rini 05 Nov '13

05 Nov '13

Hello, The following changes since commit 304db0b38cfb04cfdb05a740d5ef27da06ea98ea: arm: Remove IXP425 boards pdnb3 and scpu (2013-10-17 09:28:08 +0200) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to f6723794fd8f3362c4f3b5d0f36607a6a6f107b2: TI:omap5: Add rdaddr, use consistent loadaddr values (2013-11-01 15:56:00 -0400) ---------------------------------------------------------------- Andreas Bießmann (10): tricorder: update flash partitioning tricorder: use generic provided loadaddr tricorder: add configuration for a flashcard u-boot tricorder: add cmdline history tricorder: add mtdparts to environment tricorder: add tricordereeprom command tricorder: panic() on unknown board tricorder: add led support tricorder: read kernel directly from NAND tricorder: support 256MiB SDRAM on revision > D Heiko Schocher (2): nand, davinci: add special UBL ecc position arm, da85x: update for the ipam390 board Igor Grinberg (2): cm-t35: move the eeprom code to common place cm-t35: move the display code to common place Javier Martinez Canillas (2): ARM: IGEP0033: rename config file to am335x_igep0033.h OMAP3: igep00x0: rename config file to omap3_igep00x0.h Lokesh Vutla (1): ARM: OMAP4: Convert to ti_armv7_common.h Minal Shah (1): dra7xx_evm: Enabled UART-boot mode and add dra7xx_evm_uart3 build Nikita Kiryanov (3): cm_t35: reduce default bootdelay to 3 seconds cm_t35: turn on GPIO commands cm_t35: update lcd predefines SRICHARAN R (1): ARM: OMAP5: DDR3: Change io settings Thomas Weber (3): tricorder: remove lcdmode from bootargs tricorder: Make u-boot faster tricorder: switch to alternative memtest Tom Rini (7): drivers/rtc/davinci.c: Reference DAVINCI_RTC_BASE more directly am33xx, davinci: Create and use <asm/davinci_rtc.h> bootcount_davinci: Switch to scratch register #2 TI:am33xx: Add bootcount support to ti_am335x_common.h am335x: Enable CONFIG_OMAP_WATCHDOG support TI:armv7: Change CONFIG_SYS_SPL_ARGS_ADDR to a higher address TI:omap5: Add rdaddr, use consistent loadaddr values arch/arm/cpu/armv7/am33xx/board.c | 7 +- arch/arm/cpu/armv7/omap-common/boot-common.c | 4 + arch/arm/include/asm/arch-am33xx/cpu.h | 9 - arch/arm/include/asm/arch-davinci/hardware.h | 38 --- arch/arm/include/asm/arch-omap5/omap.h | 4 +- arch/arm/include/asm/arch-omap5/spl.h | 1 + arch/arm/include/asm/davinci_rtc.h | 52 ++++ board/Barix/ipam390/ipam390-ais-uart.cfg | 2 +- board/Barix/ipam390/ipam390.c | 29 +-- board/compulab/cm_t35/Makefile | 3 - board/compulab/cm_t35/cm_t35.c | 7 +- board/compulab/common/Makefile | 36 +++ board/compulab/{cm_t35 => common}/eeprom.c | 51 ++-- board/compulab/{cm_t35 => common}/eeprom.h | 8 +- .../{cm_t35/display.c => common/omap3_display.c} | 8 +- board/corscience/tricorder/Makefile | 2 +- board/corscience/tricorder/led.c | 80 +++++++ board/corscience/tricorder/tricorder-eeprom.c | 251 ++++++++++++++++++++ board/corscience/tricorder/tricorder-eeprom.h | 41 ++++ board/corscience/tricorder/tricorder.c | 126 +++++++++- board/corscience/tricorder/tricorder.h | 4 +- board/enbw/enbw_cmc/enbw_cmc.c | 1 + board/ti/am335x/board.c | 6 + boards.cfg | 16 +- drivers/bootcount/Makefile | 1 + drivers/bootcount/bootcount_davinci.c | 13 +- drivers/mtd/nand/davinci_nand.c | 12 + drivers/rtc/davinci.c | 8 +- include/configs/{igep0033.h => am335x_igep0033.h} | 0 include/configs/cm_t35.h | 3 +- include/configs/dra7xx_evm.h | 9 +- include/configs/ipam390.h | 35 ++- include/configs/{igep00x0.h => omap3_igep00x0.h} | 0 include/configs/omap4_common.h | 188 +++------------ include/configs/omap4_panda.h | 2 - include/configs/omap4_sdp4430.h | 2 - include/configs/omap5_common.h | 7 +- include/configs/ti_am335x_common.h | 14 ++ include/configs/ti_armv7_common.h | 2 +- include/configs/tricorder.h | 155 +++++++++--- 40 files changed, 876 insertions(+), 361 deletions(-) create mode 100644 arch/arm/include/asm/davinci_rtc.h create mode 100644 board/compulab/common/Makefile rename board/compulab/{cm_t35 => common}/eeprom.c (60%) rename board/compulab/{cm_t35 => common}/eeprom.h (62%) rename board/compulab/{cm_t35/display.c => common/omap3_display.c} (97%) create mode 100644 board/corscience/tricorder/led.c create mode 100644 board/corscience/tricorder/tricorder-eeprom.c create mode 100644 board/corscience/tricorder/tricorder-eeprom.h rename include/configs/{igep0033.h => am335x_igep0033.h} (100%) rename include/configs/{igep00x0.h => omap3_igep00x0.h} (100%) Thanks! -- Tom

2 1

[U-Boot] [PATCH 0/5] i.MX6 (DQ/DLS): consolidate mux and pad names
by Eric Nelson 05 Nov '13

05 Nov '13

This patch set consolidates mux and pad declarations for the i.MX6 Dual/Quad and Dual-Lite/Solo processor variants. Patch 1 replaces the mux/pad names with their equivalents from the Linux kernel (from linux-next). This Patch 2 removes a set of completely useless pad declarations Patch 3 adds a number of registers that are defined in the Linux kernel and in the DLS variant, but not in the DQ. Patch 4 removes pad declarations that aren't used and aren't defined in the Linux kernel tree Patch 5 cleans up the whitespace in mx6[q|dl]_pins.h so the IOMUX_PAD() columns line up. Note to reviewers: Because the majority of the changes in this patch set are simple name changes, using the '--word-diff' git parameter makes review much easier: ~/u-boot$ git diff HEAD^^^ --word-diff Eric Nelson (5): i.MX6DQ/DLS: replace pad names with their Linux kernel equivalents i.MX6DQ/DLS: remove useless mux/pad declarations i.MX6DQ: Add Pinmux settings that are present in mainline and Dual-Lite/Solo i.MX6DQ/DLS: remove unused pad declarations i.MX6DQ/DLS: whitespace: Align IOMUX_PAD column in declarations arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 2413 ++++++++++--------------- arch/arm/include/asm/arch-mx6/mx6q_pins.h | 2390 +++++++++--------------- board/barco/titanium/titanium.c | 106 +- board/boundary/nitrogen6x/nitrogen6x.c | 170 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 40 +- board/freescale/mx6qarm2/mx6qarm2.c | 66 +- board/freescale/mx6qsabreauto/mx6qsabreauto.c | 60 +- board/freescale/mx6sabresd/mx6sabresd.c | 90 +- board/wandboard/wandboard.c | 54 +- 9 files changed, 2105 insertions(+), 3284 deletions(-) -- 1.8.1.2

2 7

[U-Boot] [PATCH v2 0/7] arm: atmel: sama5d3: enable spl boot from SD card
by Bo Shen 05 Nov '13

05 Nov '13

This patch series enable spl boot from SD card, it only can boot u-boot itself. Changes in v2: - Move spl related code to at91-common folder Bo Shen (7): arm: atmel: sama5d3: correct the ID for DBGU and PIT arm: atmel: sama5: correct the error define of DIV arm: atmel: the offset of MULA is 18 in sama5d3 arm: atmel: sama5d3: early enable PIO peripherals arm: atmel: add plla and mck initialize function arm: atmel: add ddr2 initialization function spl: mmc: FAT support boot u-boot arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/at91/Makefile | 1 + arch/arm/cpu/armv7/at91/clock.c | 27 ++++++ arch/arm/cpu/armv7/at91/mpddrc.c | 123 +++++++++++++++++++++++++ arch/arm/cpu/armv7/at91/sama5d3_devices.c | 2 +- arch/arm/cpu/armv7/at91/timer.c | 2 +- arch/arm/cpu/at91-common/Makefile | 32 +++++++ arch/arm/cpu/at91-common/spl.c | 39 ++++++++ arch/arm/cpu/at91-common/u-boot-spl.lds | 50 ++++++++++ arch/arm/include/asm/arch-at91/at91_common.h | 4 + arch/arm/include/asm/arch-at91/at91_pmc.h | 8 +- arch/arm/include/asm/arch-at91/atmel_mpddrc.h | 111 ++++++++++++++++++++++ arch/arm/include/asm/arch-at91/spl.h | 17 ++++ board/atmel/sama5d3xek/sama5d3xek.c | 99 ++++++++++++++++++++ include/configs/sama5d3xek.h | 37 ++++++++ spl/Makefile | 4 + 16 files changed, 553 insertions(+), 5 deletions(-) create mode 100644 arch/arm/cpu/armv7/at91/mpddrc.c create mode 100644 arch/arm/cpu/at91-common/Makefile create mode 100644 arch/arm/cpu/at91-common/spl.c create mode 100644 arch/arm/cpu/at91-common/u-boot-spl.lds create mode 100644 arch/arm/include/asm/arch-at91/atmel_mpddrc.h create mode 100644 arch/arm/include/asm/arch-at91/spl.h -- 1.7.9.5

2 10

[U-Boot] [PATCH v3 00/19] First step towards Kbuild: Use Kbuild style makefiles
by Masahiro Yamada 05 Nov '13

05 Nov '13

Kbuild in U-Boot has been talked for a while and RFC patches were posted by Simon Glass. (Refer to "RFC: Add Kbuild system to U-Boot" posted by Simon, May 12, 2013) Simon's effort is a good start point but varous critical features were missing from his patch series. I have also been eager to introduce Kbuild to U-Boot. So I have been working on this task for a while with a little different migration path from Simon's way. At last I succeeded to build a few boards with support of SPL build, Out-of-tree build, correct output file names, which were missing from Simon's patches. While I were working on my local branch, the build system and makefiles in U-Boot master repository always kept changing, of course. Now my fruit got too old to fit with the current u-boot/master anymore. But if someone is interested in my work, I can push my local branch to somewhere in my GitHub space. (RFC quality, but might be helpful for just discussions) I recognize those patches are so rough that they could support only a few ARM boards. Perfectly covering all architectures and all boards without breaking any U-Boot features is a too big task for a sigle indivisual. Even if I could do that, the patch series would be extremely big size and the adjustment for U-Boot would be complecated. So the review would probably take very long time. Along with the review process, as time goes by, the posted patches would become not appled to the master branch. So we would need to repeat post, review, fix, rebase on the master and post again, review, ... again and again for a very big patch series. I began to be wondering whether it is really possible to switch to Kbuild in this way. So I decided to begin with what I can do, one by one. By stepping little by litte, we can get close to Kbuild and finally we will arrive at our goal. I think this strategy is more realistic rather than adding a big change at one time. Before importing a real Kbuild, I'd like to adjust our makefiles in the form suitable for Kbuild. First of all, this series converts makefiles in sub directories to Kbuild style. What this series do is quite simple: - Moving common lines in sub makefiles to a new file 'scripts/Makefile.build' - Renaming COBJS-y and SOBJS-y to obj-y in each sub makefile. - A little bit more tweaks That's all. 01/19 creates scripts/Makefile.build and tweaks Makefile and spl/Makefile to use scripts/Makefile.build. U-Boot conventional makefiles are like this: include $(TOPDIR)/config.mk LIB = $(obj)libfoo.o COBJS := ... COBJS += ... SOBJS := ... SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) ######################################################################### include $(SRCTREE)/rules.mk sinclude $(obj).depend ######################################################################### Top and bottom parts are common in almost all makefiles. Writing those lines in all makefiles is a big waste. So common lines have been pushed into scripts/Makefile.build. In addition, scripts/Makefile.build includes a glue code for supporting 'obj-y'. Be aware U-Boot conventional (non-Kbuild) makefile sytle is still supported. So we can change sub makefiles little by little in the following patches. 02/19-19/19 change sub makefiles into a Kbuild suitable form using obj-y. In order to avoid creating a big patch file, they are divided by CPU architectures and categories. 02/19-07/19: refactor under arch/arm/ 08/19-16/19: refactor libraries which are commonly used for all architectures 17/19 : refactor under arch/sandbox 18/19 : refactor under arch/powerpc/ 19/19 : refactor under board/ti/ Conversion rule is pretty easy: (1) Delete common parts at top and bottom. (2) Rename COBJS -> obj-y SOBJS -> obj-y COBJS-$(CONFIG_FOO) -> obj-$(CONFIG_FOO) SOBJS-$(CONFIG_FOO) -> obj-$(CONFIG_FOO) START -> extra-y We can convert almost automatically althogh in some cases we may need to tweak a little. I refactored more than 150 makefiles in this series. But we still have more than 600 makefiles. (Most of them reside under board/ directory) We can convert them lator little by little. Your contribution is welcome! :-) Note1: This series breaks _NO_ features in U-Boot beucase it just moves common parts into scripts/Makefile.build In order to prove this series does no harm, I compiled all boards excepts nds32 and nios2 architectures and checked md5sum matching for ./u-boot (and spl/u-boot-spl if it exists). I tried md5sum for version 1 and I did the same thing again for version 2. I confirmed md5sum perfectly matched. For the detailed steps how to compare md5sum, please refer to the discussion in version 1: [U-Boot] [PATCH 00/19] First step towards Kbuild: Use Kbuild style makefiles Note2: obj-y := foo/ (descending into foo sub directory) syntax is not supprted in this series. It is implemented in upcoming patch series. The reason why I postpone this feature is I don't want to add a big change at one time. Adjusting for Kbuild little by litte is my strategy here for easy review. Note3: Of course, scripts/Makefile.build added by 01/19 patch is temporary. It shall be replaced with the one of Linux Kernel in future. Note4: 01/19 is a prerequisite for 02/19 to 19/19. But 02/19 thru 19/19 are order-independent. If some of 02/19-19/19 becomes not applied to u-boot/master, they can be omitted. Note5: I confirmed this series can be applied on v2013.10 Cc: Simon Glass <sjg(a)chromium.org> Cc: Tom Rini <trini(a)ti.com> Cc: Gerhard Sittig <gsi(a)denx.de> Masahiro Yamada (19): Makefile: prepare for using Kbuild-style Makefile armv7: convert makefiles to Kbuild style arm926ejs: convert makefiles to Kbuild style arm920t: convert makefiles to Kbuild style arm720t: convert makefiles to Kbuild style ARM: convert makefiles to Kbuild style ARM: imx-common: convert makefiles to Kbuild style drivers: net: convert makefiles to Kbuild style drivers: mtd: convert makefiles to Kbuild style drivers: usb: convert makefiles to Kbuild style drivers: convert makefiles to Kbuild style fs: convert makefiles to Kbuild style common: convert makefiles to Kbuild style net: convert a makefile to Kbuild style lib: convert makefiles to Kbuild style disk: convert a makefile to Kbuild style sandbox: convert makefiles to Kbuild style powerpc: convert makefiles to Kbuild style board: ti: convert makefiles to Kbuild style Makefile | 44 +++- arch/arm/cpu/arm1136/Makefile | 26 +- arch/arm/cpu/arm1136/mx31/Makefile | 27 +- arch/arm/cpu/arm1136/mx35/Makefile | 28 +-- arch/arm/cpu/arm1176/Makefile | 26 +- arch/arm/cpu/arm1176/bcm2835/Makefile | 25 +- arch/arm/cpu/arm1176/tnetv107x/Makefile | 27 +- arch/arm/cpu/arm720t/Makefile | 26 +- arch/arm/cpu/arm720t/tegra-common/Makefile | 25 +- arch/arm/cpu/arm720t/tegra114/Makefile | 25 +- arch/arm/cpu/arm720t/tegra20/Makefile | 23 +- arch/arm/cpu/arm720t/tegra30/Makefile | 23 +- arch/arm/cpu/arm920t/Makefile | 28 +-- arch/arm/cpu/arm920t/a320/Makefile | 25 +- arch/arm/cpu/arm920t/at91/Makefile | 33 +-- arch/arm/cpu/arm920t/ep93xx/Makefile | 24 +- arch/arm/cpu/arm920t/imx/Makefile | 27 +- arch/arm/cpu/arm920t/ks8695/Makefile | 26 +- arch/arm/cpu/arm920t/s3c24x0/Makefile | 29 +-- arch/arm/cpu/arm926ejs/Makefile | 28 +-- arch/arm/cpu/arm926ejs/armada100/Makefile | 23 +- arch/arm/cpu/arm926ejs/at91/Makefile | 59 ++--- arch/arm/cpu/arm926ejs/davinci/Makefile | 48 +--- arch/arm/cpu/arm926ejs/kirkwood/Makefile | 31 +-- arch/arm/cpu/arm926ejs/lpc32xx/Makefile | 23 +- arch/arm/cpu/arm926ejs/mb86r0x/Makefile | 25 +- arch/arm/cpu/arm926ejs/mx25/Makefile | 23 +- arch/arm/cpu/arm926ejs/mx27/Makefile | 23 +- arch/arm/cpu/arm926ejs/mxs/Makefile | 26 +- arch/arm/cpu/arm926ejs/nomadik/Makefile | 25 +- arch/arm/cpu/arm926ejs/omap/Makefile | 26 +- arch/arm/cpu/arm926ejs/orion5x/Makefile | 29 +-- arch/arm/cpu/arm926ejs/pantheon/Makefile | 23 +- arch/arm/cpu/arm926ejs/spear/Makefile | 36 +-- arch/arm/cpu/arm926ejs/versatile/Makefile | 26 +- arch/arm/cpu/arm946es/Makefile | 26 +- arch/arm/cpu/arm_intcm/Makefile | 26 +- arch/arm/cpu/armv7/Makefile | 36 +-- arch/arm/cpu/armv7/am33xx/Makefile | 51 +--- arch/arm/cpu/armv7/at91/Makefile | 31 +-- arch/arm/cpu/armv7/exynos/Makefile | 34 +-- arch/arm/cpu/armv7/highbank/Makefile | 24 +- arch/arm/cpu/armv7/mx5/Makefile | 25 +- arch/arm/cpu/armv7/mx6/Makefile | 25 +- arch/arm/cpu/armv7/omap-common/Makefile | 43 +--- arch/arm/cpu/armv7/omap3/Makefile | 41 +-- arch/arm/cpu/armv7/omap4/Makefile | 31 +-- arch/arm/cpu/armv7/omap5/Makefile | 33 +-- arch/arm/cpu/armv7/rmobile/Makefile | 50 +--- arch/arm/cpu/armv7/s5p-common/Makefile | 29 +-- arch/arm/cpu/armv7/s5pc1xx/Makefile | 27 +- arch/arm/cpu/armv7/socfpga/Makefile | 29 +-- arch/arm/cpu/armv7/tegra-common/Makefile | 24 +- arch/arm/cpu/armv7/tegra114/Makefile | 22 +- arch/arm/cpu/armv7/tegra20/Makefile | 26 +- arch/arm/cpu/armv7/tegra30/Makefile | 22 +- arch/arm/cpu/armv7/u8500/Makefile | 25 +- arch/arm/cpu/armv7/vf610/Makefile | 25 +- arch/arm/cpu/armv7/zynq/Makefile | 31 +-- arch/arm/cpu/ixp/Makefile | 30 +-- arch/arm/cpu/pxa/Makefile | 36 +-- arch/arm/cpu/sa1100/Makefile | 28 +-- arch/arm/cpu/tegra-common/Makefile | 25 +- arch/arm/cpu/tegra114-common/Makefile | 23 +- arch/arm/cpu/tegra20-common/Makefile | 29 +-- arch/arm/cpu/tegra30-common/Makefile | 26 +- arch/arm/imx-common/Makefile | 35 +-- arch/arm/lib/Makefile | 86 ++----- arch/powerpc/cpu/74xx_7xx/Makefile | 28 +-- arch/powerpc/cpu/mpc512x/Makefile | 51 ++-- arch/powerpc/cpu/mpc5xx/Makefile | 27 +- arch/powerpc/cpu/mpc5xxx/Makefile | 54 ++-- arch/powerpc/cpu/mpc824x/Makefile | 28 +-- arch/powerpc/cpu/mpc8260/Makefile | 32 +-- arch/powerpc/cpu/mpc83xx/Makefile | 58 ++--- arch/powerpc/cpu/mpc85xx/Makefile | 233 ++++++++--------- arch/powerpc/cpu/mpc86xx/Makefile | 50 ++-- arch/powerpc/cpu/mpc8xx/Makefile | 58 ++--- arch/powerpc/cpu/mpc8xxx/Makefile | 30 +-- arch/powerpc/cpu/mpc8xxx/ddr/Makefile | 30 +-- arch/powerpc/cpu/ppc4xx/Makefile | 90 +++---- arch/powerpc/lib/Makefile | 78 ++---- arch/sandbox/cpu/Makefile | 23 +- arch/sandbox/lib/Makefile | 25 +- board/sandbox/sandbox/Makefile | 21 +- board/ti/am335x/Makefile | 29 +-- board/ti/am3517crane/Makefile | 19 +- board/ti/am43xx/Makefile | 29 +-- board/ti/beagle/Makefile | 24 +- board/ti/dra7xx/Makefile | 27 +- board/ti/evm/Makefile | 19 +- board/ti/omap5912osk/Makefile | 24 +- board/ti/omap5_uevm/Makefile | 27 +- board/ti/omap730p2/Makefile | 24 +- board/ti/panda/Makefile | 21 +- board/ti/sdp3430/Makefile | 21 +- board/ti/sdp4430/Makefile | 23 +- board/ti/ti814x/Makefile | 29 +-- board/ti/ti816x/Makefile | 27 +- board/ti/tnetv107xevm/Makefile | 25 +- common/Makefile | 389 ++++++++++++++--------------- common/spl/Makefile | 36 +-- disk/Makefile | 34 +-- drivers/bios_emulator/Makefile | 23 +- drivers/block/Makefile | 52 ++-- drivers/bootcount/Makefile | 30 +-- drivers/crypto/Makefile | 25 +- drivers/dfu/Makefile | 27 +- drivers/dma/Makefile | 30 +-- drivers/fpga/Makefile | 44 +--- drivers/gpio/Makefile | 73 ++---- drivers/hwmon/Makefile | 40 +-- drivers/i2c/Makefile | 68 ++--- drivers/input/Makefile | 36 +-- drivers/misc/Makefile | 52 ++-- drivers/mmc/Makefile | 71 ++---- drivers/mtd/Makefile | 44 +--- drivers/mtd/nand/Makefile | 102 +++----- drivers/mtd/onenand/Makefile | 27 +- drivers/mtd/spi/Makefile | 36 +-- drivers/mtd/ubi/Makefile | 28 +-- drivers/net/Makefile | 136 +++++----- drivers/net/fm/Makefile | 59 ++--- drivers/net/npe/Makefile | 24 +- drivers/net/phy/Makefile | 60 ++--- drivers/pci/Makefile | 44 +--- drivers/pcmcia/Makefile | 34 +-- drivers/power/Makefile | 47 +--- drivers/power/battery/Makefile | 27 +- drivers/power/fuel_gauge/Makefile | 25 +- drivers/power/mfd/Makefile | 29 +-- drivers/power/pmic/Makefile | 35 +-- drivers/qe/Makefile | 25 +- drivers/rtc/Makefile | 108 ++++---- drivers/serial/Makefile | 82 +++--- drivers/sound/Makefile | 30 +-- drivers/spi/Makefile | 84 +++---- drivers/tpm/Makefile | 29 +-- drivers/twserial/Makefile | 24 +- drivers/usb/eth/Makefile | 28 +-- drivers/usb/gadget/Makefile | 58 ++--- drivers/usb/host/Makefile | 74 ++---- drivers/usb/musb-new/Makefile | 35 +-- drivers/usb/musb/Makefile | 36 +-- drivers/usb/phy/Makefile | 24 +- drivers/usb/ulpi/Makefile | 28 +-- drivers/video/Makefile | 86 +++---- drivers/watchdog/Makefile | 38 +-- fs/Makefile | 24 +- fs/cbfs/Makefile | 24 +- fs/cramfs/Makefile | 29 +-- fs/ext4/Makefile | 27 +- fs/fat/Makefile | 31 +-- fs/fdos/Makefile | 27 +- fs/jffs2/Makefile | 38 +-- fs/reiserfs/Makefile | 26 +- fs/sandbox/Makefile | 23 +- fs/ubifs/Makefile | 29 +-- fs/yaffs2/Makefile | 33 +-- fs/zfs/Makefile | 25 +- lib/Makefile | 114 ++++----- lib/libfdt/Makefile | 27 +- lib/lzma/Makefile | 24 +- lib/lzo/Makefile | 24 +- lib/rsa/Makefile | 22 +- lib/tizen/Makefile | 24 +- lib/zlib/Makefile | 22 +- net/Makefile | 46 +--- scripts/Makefile.build | 48 ++++ spl/Makefile | 26 +- 170 files changed, 1518 insertions(+), 5100 deletions(-) create mode 100644 scripts/Makefile.build -- 1.8.1.2

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Re: [U-Boot] [PATCH 00/15] MIPS Malta board support
by Daniel Schwierzeck 04 Nov '13

04 Nov '13

Hi Paul, 2013/10/23 Paul Burton <paul.burton(a)imgtec.com>: > This series adds support for booting on a physical MIPS Malta board > using a coreFPGA6 core card. > > The first 6 patches lay some groundwork, then the next 8 genericise > the existing qemu-malta board to also function on a physical Malta. > > In the final patch I stake my claim upon, errm I mean step up to > support :), the malta(el) board(s). > > Paul Burton (15): > mips32: detect L1 cache sizes if they're not defined > pcnet: code style cleanup > pcnet: s/le16_to_cpu/cpu_to_le16/ in pcnet_send > pcnet: add cache flushing & invalidation > pcnet: enable the NOUFLO feature > pci.h: allow inclusion in assembly source > qemu-malta: rename to just "malta" > malta: setup super I/O UARTs > malta: support for coreFPGA6 boards > malta: display "U-boot" on the LCD screen > malta: enable CONFIG_PCNET_79C973, PCNET_HAS_PROM, CONFIG_CMD_DHCP > malta: remove cache size definitions > malta: disable L2 caches > malta: add script & instructions to flash U-boot > malta: add myself to maintainers > could you please rebase to current master and adapt to Makefile/KBuild changes? After that I'll merge your series, thanks. -- - Daniel

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[U-Boot] [PATCH 0/9] Consolidate ARM timer code
by Rob Herring 04 Nov '13

04 Nov '13

From: Rob Herring <rob.herring(a)calxeda.com> Much of the ARM timer code is re-implemented for each platform yet it is all pretty much the same code. This series introduces a common implementation of timer functions and simplifies the platform code down to 2 or 3 config defines. It is intended for platforms with 32-bit freerunning timers. I've converted a couple of platforms as an example, but there are many more still that can be converted. This probably could be extended to work with 16-bit timers as well. I've compiled all ARM boards, but only tested on highbank. Rob Rob Herring (9): ARM: add common timer functions examples: enable gc-sections option time: create default __udelay ARM: highbank: convert to common timer code ARM: mx25: convert to common timer code ARM: mx27: convert to common timer code ARM: vexpress: convert to common timer code ARM: socfpga: convert to common timer code ARM: tegra: convert to common timer code arch/arm/cpu/arm926ejs/mx25/timer.c | 117 -------------------------------- arch/arm/cpu/arm926ejs/mx27/timer.c | 110 ------------------------------ arch/arm/cpu/armv7/highbank/timer.c | 83 ---------------------- arch/arm/cpu/armv7/socfpga/timer.c | 72 -------------------- arch/arm/cpu/tegra-common/Makefile | 2 +- arch/arm/cpu/tegra-common/timer.c | 95 -------------------------- arch/arm/lib/Makefile | 2 +- arch/arm/lib/time.c | 59 ++++++++++++++++ board/armltd/vexpress/vexpress_common.c | 71 ------------------- examples/api/Makefile | 2 +- include/configs/highbank.h | 4 ++ include/configs/imx27lite-common.h | 3 + include/configs/mx25pdk.h | 3 + include/configs/socfpga_cyclone5.h | 3 +- include/configs/tegra-common.h | 3 + include/configs/tx25.h | 2 + include/configs/vexpress_common.h | 4 ++ include/configs/zmx25.h | 3 + lib/time.c | 21 ++++++ 19 files changed, 107 insertions(+), 552 deletions(-) delete mode 100644 arch/arm/cpu/tegra-common/timer.c create mode 100644 arch/arm/lib/time.c -- 1.8.1.2

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