August 2012 - U-Boot

[U-Boot] [PATCH 0/6] SPL: Port SPL framework to powerpc
by Stefan Roese 25 Aug '12

25 Aug '12

This patchset ports the SPL framework to powerpc. Its based on the SPL generalization lately done by Tom Rini. The patches can be applied on top of his 3rd version located here: http://github.com/trini/u-boot WIP/spl-improvements Additionally, a new MPC5200 board port is included, the a3m071 board port. This board port uses this SPL framework mainly to speed up booting into the OS (Linux of course). Detection of Linux vs. U-Boot booting is done here by checking the environment variable "boot_os". If "boot_os" is set to "yes", then the OS (Linux) is booted. Otherwise the "real" U-Boot is booted. For this env checking in the SPL, a small restructuring of the env code has been done. Comments welcome! Thanks, Stefan

5 33

[U-Boot] arm: omap: Fix switching back to nandecc sw.
by Jeroen Hofstee 25 Aug '12

25 Aug '12

Switching back to nandecc sw fails to write correctly. A fix for this is already mentioned in the thread below, lets fix it. mentioned in http://lists.denx.de/pipermail/u-boot/2012-February/119002.html Signed-off-by: Jeroen Hofstee <jhofstee(a)victronenergy.com> --- drivers/mtd/nand/omap_gpmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index ca868ef..71aec1a 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -280,6 +280,7 @@ void omap_nand_switch_ecc(int32_t hardware) omap_hwecc_init(nand); printf("HW ECC selected\n"); } else { + nand->ecc.size = 0; nand->ecc.mode = NAND_ECC_SOFT; /* Use mtd default settings */ nand->ecc.layout = NULL; -- 1.7.9.5

4 5

[U-Boot] [PATCH] davinci: enbw_cmc: change switch init behaviour
by Heiko Schocher 25 Aug '12

25 Aug '12

change the behaviour of switch initialization: - rename "pwl" to "lan" in hwconfig parameter "lan" = port 1 with phy addr 2 "lmn" = port 2 with phy addr 3 - if we have a valid switch config file in flash, do not evaluate the settings in the hwconfig "lan" or "lmn" subcommand. - if we have no valid switch config file in flash, start the switch with default values, if we have a "lan" or a "lmn" hwconfig subcommand. If no "lan" or "lmn" is found in hwconfig, do nothing with the switch. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- board/enbw/enbw_cmc/enbw_cmc.c | 102 +++++++++++++++++++++++++++------------- 1 files changed, 69 insertions(+), 33 deletions(-) diff --git a/board/enbw/enbw_cmc/enbw_cmc.c b/board/enbw/enbw_cmc/enbw_cmc.c index 0874e9c..b9dfc5d 100644 --- a/board/enbw/enbw_cmc/enbw_cmc.c +++ b/board/enbw/enbw_cmc/enbw_cmc.c @@ -451,25 +451,15 @@ static char *enbw_cmc_getvalue(char *ptr, int *value) return ptr; } -static int enbw_cmc_config_switch(unsigned long addr) +static struct spi_slave *enbw_cmc_init_spi(void) { struct spi_slave *spi; - char *ptr = (char *)addr; - int value, reg; int ret; - int bus, cs, max_hz, spi_mode; - - debug("configure switch with file on addr: 0x%lx\n", addr); - bus = 0; - cs = 0; - max_hz = 1000000; - spi_mode = 0; - - spi = spi_setup_slave(bus, cs, max_hz, spi_mode); + spi = spi_setup_slave(0, 0, 1000000, 0); if (!spi) { printf("Failed to set up slave\n"); - return -EINVAL; + return NULL; } ret = spi_claim_bus(spi); @@ -480,25 +470,45 @@ static int enbw_cmc_config_switch(unsigned long addr) ret = enbw_cmc_switch_read_ident(spi); if (ret) - goto err_claim_bus; + goto err_read; + + return spi; +err_read: + spi_release_bus(spi); +err_claim_bus: + spi_free_slave(spi); + return NULL; +} + +static int enbw_cmc_config_switch(unsigned long addr) +{ + struct spi_slave *spi; + char *ptr = (char *)addr; + int value, reg; + int ret = 0; + + debug("configure switch with file on addr: 0x%lx\n", addr); + + spi = enbw_cmc_init_spi(); + if (!spi) + return -EINVAL; - ptr = (char *)addr; while (ptr != NULL) { ptr = enbw_cmc_getvalue(ptr, &reg); if (ptr != NULL) { ptr = enbw_cmc_getvalue(ptr, &value); if ((ptr != NULL) && (value >= 0)) - if (enbw_cmc_switch_write(spi, reg, value)) - goto err_read; + if (enbw_cmc_switch_write(spi, reg, value)) { + /* error writing to switch */ + ptr = NULL; + ret = -EINVAL; + } } } - return 0; -err_read: spi_release_bus(spi); -err_claim_bus: spi_free_slave(spi); - return -EINVAL; + return ret; } static int do_switch(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) @@ -524,8 +534,10 @@ U_BOOT_CMD(switch, 3, 1, do_switch, */ int board_eth_init(bd_t *bis) { + struct spi_slave *spi; const char *s; - size_t len; + size_t len = 0; + int config = 1; davinci_emac_mii_mode_sel(0); @@ -534,25 +546,49 @@ int board_eth_init(bd_t *bis) if (len) { unsigned long addr = simple_strtoul(s, NULL, 16); - enbw_cmc_config_switch(addr); + config = enbw_cmc_config_switch(addr); } + if (config) { + /* + * no valid config file -> do we have some args in + * hwconfig ? + */ + if ((hwconfig_subarg("switch", "lan", &len)) || + (hwconfig_subarg("switch", "lmn", &len))) { + /* If so start switch */ + spi = enbw_cmc_init_spi(); + if (spi) { + if (enbw_cmc_switch_write(spi, 1, 0)) + config = 0; + udelay(10000); + if (enbw_cmc_switch_write(spi, 1, 1)) + config = 0; + spi_release_bus(spi); + spi_free_slave(spi); + } + } else { + config = 0; + } + } if (!davinci_emac_initialize()) { printf("Error: Ethernet init failed!\n"); return -1; } - if (hwconfig_subarg_cmp("switch", "lan", "on")) - /* Switch port lan on */ - enbw_cmc_switch(1, 1); - else - enbw_cmc_switch(1, 0); + if (config) { + if (hwconfig_subarg_cmp("switch", "lan", "on")) + /* Switch port lan on */ + enbw_cmc_switch(1, 1); + else + enbw_cmc_switch(1, 0); - if (hwconfig_subarg_cmp("switch", "pwl", "on")) - /* Switch port pwl on */ - enbw_cmc_switch(2, 1); - else - enbw_cmc_switch(2, 0); + if (hwconfig_subarg_cmp("switch", "lmn", "on")) + /* Switch port pwl on */ + enbw_cmc_switch(2, 1); + else + enbw_cmc_switch(2, 0); + } return 0; } -- 1.7.7.6

2 1

[U-Boot] am33xx evm: Update secure_emif_sdram_config during ddr init
by Satyanarayana, Sandhya 25 Aug '12

25 Aug '12

This patch updates secure_emif_sdram_config with the same value written to sdram_config during ddr3 initialization. During suspend/resume, this value is copied into sdram_config. With this, a write to sdram_config at the end of resume sequence which triggers an init sequence can be avoided. Without this register write in place, the DDR_RESET line goes low for a few cycles during resume which is a violation of the JEDEC spec. Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana(a)ti.com> --- :100644 100644 cffd4ab... fd9fc4a... M arch/arm/cpu/armv7/am33xx/ddr.c :100644 100644 de9ee91... 6cfbef7... M arch/arm/include/asm/arch-am33xx/cpu.h :100644 100644 8a4b248... 819ea65... M arch/arm/include/asm/arch-am33xx/sys_proto.h arch/arm/cpu/armv7/am33xx/ddr.c | 5 ++++- arch/arm/include/asm/arch-am33xx/cpu.h | 2 ++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + 3 files changed, 7 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index cffd4ab..fd9fc4a 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -17,6 +17,7 @@ http://www.ti.com/ #include <asm/arch/cpu.h> #include <asm/arch/ddr_defs.h> +#include <asm/arch/sys_proto.h> #include <asm/io.h> #include <asm/emif.h> @@ -46,8 +47,10 @@ void config_sdram(const struct emif_regs *regs) { writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl); writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw); - if (regs->zq_config) + if (regs->zq_config){ writel(regs->zq_config, &emif_reg->emif_zq_config); + writel(regs->sdram_config, &cstat->secure_emif_sdram_config); + } writel(regs->sdram_config, &emif_reg->emif_sdram_config); } diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index de9ee91..6cfbef7 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -234,6 +234,8 @@ struct vtp_reg { struct ctrl_stat { unsigned int resv1[16]; unsigned int statusreg; /* ofset 0x40 */ + unsigned int resv2[51]; + unsigned int secure_emif_sdram_config; /* offset 0x0110 */ }; /* AM33XX GPIO registers */ diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 8a4b248..819ea65 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -46,6 +46,7 @@ u32 get_sysboot_value(void); int print_cpuinfo(void); #endif +extern struct ctrl_stat *cstat; u32 get_device_type(void); void setup_clocks_for_console(void); void ddr_pll_config(unsigned int ddrpll_M); -- 1.7.1

2 1

[U-Boot] [PATCH] da8xx/hawkboard: Add support for ohci host controller
by Sughosh Ganu 25 Aug '12

25 Aug '12

Also enable the ohci port on hawkboard. These additions result in an increased u-boot size -- adjust the same accordingly in the board's config. Move the usb header for da8xx platforms under arch-davinci. Signed-off-by: Sughosh Ganu <urwithsughosh(a)gmail.com> --- arch/arm/cpu/arm926ejs/davinci/psc.c | 5 ++ .../arm/include/asm/arch-davinci/da8xx-usb.h | 7 ++- arch/arm/include/asm/arch-davinci/hardware.h | 1 + board/davinci/da8xxevm/hawkboard.c | 41 +++++++++++++++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ohci-da8xx.c | 48 ++++++++++++++++++++ drivers/usb/musb/da8xx.c | 3 +- include/configs/hawkboard.h | 14 +++++- 8 files changed, 116 insertions(+), 4 deletions(-) rename drivers/usb/musb/da8xx.h => arch/arm/include/asm/arch-davinci/da8xx-usb.h (96%) create mode 100644 drivers/usb/host/ohci-da8xx.c diff --git a/arch/arm/cpu/arm926ejs/davinci/psc.c b/arch/arm/cpu/arm926ejs/davinci/psc.c index 3e92518..2ffb42a 100644 --- a/arch/arm/cpu/arm926ejs/davinci/psc.c +++ b/arch/arm/cpu/arm926ejs/davinci/psc.c @@ -128,6 +128,11 @@ void lpsc_syncreset(unsigned int id) lpsc_transition(id, 0x01); } +void lpsc_disable(unsigned int id) +{ + lpsc_transition(id, 0x0); +} + /* Not all DaVinci chips have a DSP power domain. */ #ifdef CONFIG_SOC_DM644X diff --git a/drivers/usb/musb/da8xx.h b/arch/arm/include/asm/arch-davinci/da8xx-usb.h similarity index 96% rename from drivers/usb/musb/da8xx.h rename to arch/arm/include/asm/arch-davinci/da8xx-usb.h index be1cdaf..eb79bf8 100644 --- a/drivers/usb/musb/da8xx.h +++ b/arch/arm/include/asm/arch-davinci/da8xx-usb.h @@ -1,5 +1,5 @@ /* - * da8xx.h -- TI's DA8xx platform specific usb wrapper definitions. + * da8xx-usb.h -- TI's DA8xx platform specific usb wrapper definitions. * * Author: Ajay Kumar Gupta <ajay.gupta(a)ti.com> * @@ -26,7 +26,6 @@ #include <asm/arch/hardware.h> #include <asm/arch/gpio.h> -#include "musb_core.h" /* Base address of da8xx usb0 wrapper */ #define DA8XX_USB_OTG_BASE 0x01E00000 @@ -99,4 +98,8 @@ struct da8xx_usb_regs { #define CFGCHIP2_REFFREQ_48MHZ (3 << 0) #define DA8XX_USB_VBUS_GPIO (1 << 15) + +int usb_phy_on(void); +void usb_phy_off(void); + #endif /* __DA8XX_MUSB_H__ */ diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index b145c6e..2287929 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -306,6 +306,7 @@ typedef volatile unsigned int * dv_reg_p; void lpsc_on(unsigned int id); void lpsc_syncreset(unsigned int id); +void lpsc_disable(unsigned int id); void dsp_on(void); void davinci_enable_uart0(void); diff --git a/board/davinci/da8xxevm/hawkboard.c b/board/davinci/da8xxevm/hawkboard.c index b694258..156cb7f 100644 --- a/board/davinci/da8xxevm/hawkboard.c +++ b/board/davinci/da8xxevm/hawkboard.c @@ -4,6 +4,7 @@ * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar(a)ti.com> * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> * Copyright (C) 2004 Texas Instruments. + * Copyright (C) 2012 Sughosh Ganu <urwithsughosh(a)gmail.com>. * * ---------------------------------------------------------------------------- * This program is free software; you can redistribute it and/or modify @@ -28,6 +29,7 @@ #include <asm/io.h> #include <asm/arch/davinci_misc.h> #include <asm/arch/pinmux_defs.h> +#include <asm/arch/da8xx-usb.h> #include <ns16550.h> DECLARE_GLOBAL_DATA_PTR; @@ -89,3 +91,42 @@ int misc_init_r(void) return 0; } + +int usb_phy_on(void) +{ + u32 timeout; + u32 cfgchip2; + + cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); + + cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | + CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ | + CFGCHIP2_USB1PHYCLKMUX); + cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | + CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX | + CFGCHIP2_USB1SUSPENDM; + + writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); + + /* wait until the usb phy pll locks */ + timeout = DA8XX_USB_OTG_TIMEOUT; + while (timeout--) + if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) + return 1; + + /* USB phy was not turned on */ + return 0; +} + +void usb_phy_off(void) +{ + u32 cfgchip2; + + /* + * Power down the on-chip PHY. + */ + cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); + cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM); + cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET; + writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); +} diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 6de9164..bcb4662 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -28,6 +28,7 @@ LIB := $(obj)libusb_host.o # ohci COBJS-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o COBJS-$(CONFIG_USB_ATMEL) += ohci-at91.o +COBJS-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx-hcd.o diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c new file mode 100644 index 0000000..f0ccb83 --- /dev/null +++ b/drivers/usb/host/ohci-da8xx.c @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2012 Sughosh Ganu <urwithsughosh(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> + +#include <asm/arch/da8xx-usb.h> + +int usb_cpu_init(void) +{ + /* enable psc for usb2.0 */ + lpsc_on(DAVINCI_LPSC_USB20); + + /* enable psc for usb1.0 */ + lpsc_on(DAVINCI_LPSC_USB11); + + /* start the on-chip usb phy and its pll */ + if (usb_phy_on()) + return 0; + + return 1; +} + +int usb_cpu_stop(void) +{ + usb_phy_off(); + + /* turn off the usb clock and assert the module reset */ + lpsc_disable(DAVINCI_LPSC_USB11); + lpsc_disable(DAVINCI_LPSC_USB20); + + return 0; +} + +int usb_cpu_init_fail(void) +{ + return usb_cpu_stop(); +} diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c index 617d88e..653410a 100644 --- a/drivers/usb/musb/da8xx.c +++ b/drivers/usb/musb/da8xx.c @@ -23,7 +23,8 @@ */ #include <common.h> -#include "da8xx.h" +#include "musb_core.h" +#include <asm/arch/da8xx-usb.h> /* MUSB platform configuration */ struct musb_config musb_cfg = { diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index c6e9ce5..bc09c55 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -136,7 +136,7 @@ #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ @@ -157,6 +157,16 @@ #endif /* CONFIG_SYS_USE_NAND */ +/* USB Configs */ +#define CONFIG_SYS_USB_OHCI_CPU_INIT +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_OHCI_DA8XX +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000 +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard" + /* * U-Boot general configuration */ @@ -199,6 +209,8 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_MEMORY +#define CONFIG_CMD_USB +#define CONFIG_CMD_EXT2 #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS -- 1.7.5.4

2 3

[U-Boot] [PATCH 01/11] powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500
by York Sun 25 Aug '12

25 Aug '12

Using E6500 L1 cache as initram requires L2 cache enabled. Add l2-cache cluster enabling. Signed-off-by: York Sun <yorksun(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 39 ++++++++++++++++++++++- arch/powerpc/cpu/mpc85xx/start.S | 57 +++++++++++++++++++++++++++++++++ arch/powerpc/include/asm/immap_85xx.h | 43 +++++++++++++++++++++++++ 3 files changed, 138 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 2c78905..1a2858a 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -309,6 +309,34 @@ static void __fsl_serdes__init(void) } __attribute__((weak, alias("__fsl_serdes__init"))) void fsl_serdes_init(void); +#ifdef CONFIG_E6500 +int enable_cluster_l2(void) +{ + int i = 0; + u32 cluster; + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + struct ccsr_cluster_l2 *l2cache; + + cluster = in_be32(&gur->tp_cluster[i++].lower); + if (cluster & TP_CLUSTER_EOC) + return 0; + + do { + l2cache = (void *)(CONFIG_SYS_FSL_CLUSTER_1_L2 + i * 0x40000); + cluster = in_be32(&gur->tp_cluster[i++].lower); + + printf("enable l2 for cluster %d %p\n", i, l2cache); + + out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC); + while ((in_be32(&l2cache->l2csr0) & (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0) + ; + out_be32(&l2cache->l2csr0, L2CSR0_L2E); + } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC); + + return 0; +} +#endif + /* * Initialize L2 as cache. * @@ -322,6 +350,11 @@ int cpu_init_r(void) #ifdef CONFIG_SYS_LBC_LCRR volatile fsl_lbc_t *lbc = LBC_BASE_ADDR; #endif +#ifdef CONFIG_L2_CACHE + volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; +#elif defined(CONFIG_E6500) + struct ccsr_cluster_l2 * l2cache = (void *)CONFIG_SYS_FSL_CLUSTER_1_L2; +#endif #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) || \ defined(CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011) @@ -363,7 +396,6 @@ int cpu_init_r(void) puts ("L2: "); #if defined(CONFIG_L2_CACHE) - volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; volatile uint cache_ctl; uint ver; u32 l2siz_field; @@ -474,6 +506,11 @@ int cpu_init_r(void) } skip_l2: +#elif defined(CONFIG_E6500) + if (l2cache->l2csr0 & L2CSR0_L2E) + printf("%d KB enabled\n", (l2cache->l2cfg0 & 0x3fff) * 64); + + enable_cluster_l2(); #else puts("disabled\n"); #endif diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 2e1d265..739127f 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -762,6 +762,63 @@ delete_temp_tlbs: tlbwe #endif /* #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS) */ +#ifdef CONFIG_E6500 +create_ccsr_l2_tlb: + /* + * Create a TLB for the MMR location of CCSR + * to access L2CSR0 register + */ + lis r0, FSL_BOOKE_MAS0(0, 0, 0)@h + ori r0, r0, FSL_BOOKE_MAS0(0, 0, 0)@l + lis r1, FSL_BOOKE_MAS1(1, 0, 0, 0, BOOKE_PAGESZ_4K)@h + ori r1, r1, FSL_BOOKE_MAS1(1, 0, 0, 0, BOOKE_PAGESZ_4K)@l + lis r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR + 0xC20000, (MAS2_I|MAS2_G))@h + ori r2, r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR + 0xC20000, (MAS2_I|MAS2_G))@l + lis r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW + 0xC20000, 0, (MAS3_SW|MAS3_SR))@h + ori r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW + 0xC20000, 0, (MAS3_SW|MAS3_SR))@l + lis r7, CONFIG_SYS_CCSRBAR_PHYS_HIGH@h + ori r7, r7, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l + mtspr MAS0, r0 + mtspr MAS1, r1 + mtspr MAS2, r2 + mtspr MAS3, r3 + mtspr MAS7, r7 + isync + msync + tlbwe +enable_l2_e6500: + /* enable L2 cache */ + lis r3, (CONFIG_SYS_CCSRBAR + 0xC20000)@h + ori r3, r3, (CONFIG_SYS_CCSRBAR + 0xC20000)@l + lis r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@h + ori r4, r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@l + sync + stw r4, 0(r3) /* invalidate L2 */ +1: sync + lwz r0, 0(r3) + twi 0, r0, 0 + isync + and. r1, r0, r4 + bne 1b + lis r4, L2CSR0_L2E@h + sync + stw r4, 0(r3) /* eanble L2 */ +delete_ccsr_l2_tlb: + lis r0, FSL_BOOKE_MAS0(0, 0, 0)@h + ori r0, r0, FSL_BOOKE_MAS0(0, 0, 0)@l + li r1, 0 + lis r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, (MAS2_I|MAS2_G))@h + ori r2, r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, (MAS2_I|MAS2_G))@l + mtspr MAS0, r0 + mtspr MAS1, r1 + mtspr MAS2, r2 + isync + msync + tlbwe + li r3, 0 + mtspr MAS7, r3 +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_A004510 #define DCSR_LAWBARH0 (CONFIG_SYS_CCSRBAR + 0x1000) #define LAW_SIZE_1M 0x13 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 7ce27db..62d8d0b 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2789,6 +2789,7 @@ typedef struct ccsr_snvs_regs { #define CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET 0x58c000 #define CONFIG_SYS_FSL_FM2_RX0_10G_OFFSET 0x590000 #define CONFIG_SYS_FSL_PAMU1_OFFSET 0x21000 +#define CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET 0xC20000 #else #define CONFIG_SYS_MPC85xx_ECM_OFFSET 0x0000 #define CONFIG_SYS_MPC85xx_DDR_OFFSET 0x2000 @@ -2946,4 +2947,46 @@ typedef struct ccsr_snvs_regs { #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) #define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET) +#ifdef CONFIG_E6500 +struct ccsr_cluster_l2 { + u32 l2csr0; /* 0x000 L2 cache control and status register 0 */ + u32 l2csr1; /* 0x004 L2 cache control and status register 1 */ + u32 l2cfg0; /* 0x008 L2 cache configuration register 0 */ + u8 res_0c[500];/* 0x00c - 0x1ff */ + u32 l2pir0; /* 0x200 L2 cache partitioning ID register 0 */ + u8 res_204[4]; + u32 l2par0; /* 0x208 L2 cache partitioning allocation register 0 */ + u32 l2pwr0; /* 0x20c L2 cache partitioning way register 0 */ + u32 l2pir1; /* 0x210 L2 cache partitioning ID register 1 */ + u8 res_214[4]; + u32 l2par1; /* 0x218 L2 cache partitioning allocation register 1 */ + u32 l2pwr1; /* 0x21c L2 cache partitioning way register 1 */ + u32 u2pir2; /* 0x220 L2 cache partitioning ID register 2 */ + u8 res_224[4]; + u32 l2par2; /* 0x228 L2 cache partitioning allocation register 2 */ + u32 l2pwr2; /* 0x22c L2 cache partitioning way register 2 */ + u32 l2pir3; /* 0x230 L2 cache partitioning ID register 3 */ + u8 res_234[5]; + u32 l2par3; /* 0x238 L2 cache partitining allocation register 3 */ + u32 l2pwr3; /* 0x23c L2 cache partitining way register 3 */ + u8 res_240[3008]; /* 0x240 - 0xdff */ + u32 l2errinjhi; /* 0xe00 L2 cache error injection mask high */ + u32 l2errinjlo; /* 0xe04 L2 cache error injection mask low */ + u32 l2errinjctl;/* 0xe08 L2 cache error injection control */ + u8 res_e0c[20]; /* 0xe0c - 0x01f */ + u32 l2captdatahi; /* 0xe20 L2 cache error capture data high */ + u32 l2captdatalo; /* 0xe24 L2 cache error capture data low */ + u32 l2captecc; /* 0xe28 L2 cache error capture ECC syndrome */ + u8 res_e2c[20]; /* 0xe2c - 0xe3f */ + u32 l2errdet; /* 0xe40 L2 cache error detect */ + u32 l2errdis; /* 0xe44 L2 cache error disable */ + u32 l2errinten; /* 0xe48 L2 cache error interrupt enable */ + u32 l2errattr; /* 0xe4c L2 cache error attribute */ + u32 l2erreaddr; /* 0xe50 L2 cache error extended address */ + u32 l2erraddr; /* 0xe54 L2 cache error address */ + u32 l2errctl; /* 0xe58 L2 cache error control */ +}; +#define CONFIG_SYS_FSL_CLUSTER_1_L2 \ + (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET) +#endif /* CONFIG_E6500 */ #endif /*__IMMAP_85xx__*/ -- 1.7.0.4

3 18

[U-Boot] [PATCH v2 0/18] ARM: SPL: Make more generic, merge DaVinci and OMAP
by Tom Rini 25 Aug '12

25 Aug '12

Hey all, The following patch series merges the davinci and omap-common SPL frameworks into a single framework, CONFIG_SPL_FRAMEWORK along with a few small cleanups to the code to make it a little smaller and more flexible. The end result is that davinci can now opt in on SPL-boots-Linux by just setting the right defines and other platforms would just need to adapt to this framework. In my testing, davinci gains between 300 and 700 bytes for this (not enabling the SPL OS feature) and omap4/5/etc lose just a little bit (from the printf->puts changes). I've tested this on omap3_beagle (xM and classic) and omap4_panda. I don't have any davinci platforms that were previously using SPL so I can't boot-test those changes but since everyone sets CONFIG_SPL_MAX_SIZE, we're OK in that department. To make this series easier to test I've placed it on http://github.com/trini/u-boot WIP/spl-improvements I've looked a little into re-reducing the size and the biggest problem I see is that SPI a lot of informational prints that we don't need, strictly speaking, but are nice in a normal U-Boot context. I'm unsure of the best way to quiet these as I don't like the idea of sprinkling http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303 and I'm sending another email to discuss that. Oh, and I've switched to using patman for this series now, please let me know if I made the tool do something silly :) -- Tom Changes in v2: - Add CONFIG_SYS_SPL_MALLOC_START / SIZE defines from Christian Riesch - Add arch/arm/cpu/arm926ejs/davinci/config.mk to build u-boot.ais - Fix checkpatch warning (u32* boot_params_ptr -> u32 *boot_params_ptr) - Place files into common/spl (due to gcc bug #54303) and include/spl.h - Reorder all of the patches that used to follow this to precede. Tom Rini (18): Makefile: Move SPL files to clobber, remove from clean spl_mmc: Make FAT checks / calls guarded with CONFIG_SPL_FAT_SUPPORT omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print() omap-common: Fix typo in save_boot_params() in lowlevel_init.S ARM: SPL: Rename omap_boot_device to spl_boot_device ARM: SPL: Rename omap_boot_mode to spl_boot_mode() ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.c ARM: SPL: Only call mem_malloc_init if configured ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h> ARM: SPL: Make spl_mmc.c more generic ARM: SPL: Clean up spl.c / spl_nand.c slightly ARM: SPL: Start hooking in the current SPI SPL support ARM: SPL: Move gpmc_init() to spl_board_init() SPL: Move the omap SPL framework to common/spl ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORK da850_am18xxevm: Add README.da850_am18xxevm SPL: Enhance drivers/mtd/nand/nand_spl_load.c SPL: Enhance spi_spl_load to match the other load functions Makefile | 12 +-- README | 9 ++ arch/arm/cpu/arm926ejs/davinci/config.mk | 16 +++ arch/arm/cpu/arm926ejs/davinci/spl.c | 47 ++------- arch/arm/cpu/armv7/am33xx/board.c | 2 +- arch/arm/cpu/armv7/omap-common/Makefile | 13 --- arch/arm/cpu/armv7/omap-common/boot-common.c | 27 ++++- arch/arm/cpu/armv7/omap-common/hwinit-common.c | 7 +- arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 6 +- arch/arm/cpu/armv7/omap-common/spl_nand.c | 111 -------------------- arch/arm/cpu/armv7/omap3/board.c | 28 +++-- arch/arm/include/asm/arch-am33xx/spl.h | 31 ++++++ arch/arm/include/asm/arch-davinci/spl.h | 28 +++++ arch/arm/include/asm/arch-omap3/spl.h | 34 ++++++ arch/arm/include/asm/arch-omap4/spl.h | 35 ++++++ arch/arm/include/asm/arch-omap4/sys_proto.h | 1 - arch/arm/include/asm/arch-omap5/spl.h | 35 ++++++ arch/arm/include/asm/arch-omap5/sys_proto.h | 1 - arch/arm/include/asm/omap_common.h | 77 -------------- arch/arm/include/asm/spl.h | 29 +++++ board/davinci/da8xxevm/README.da850_am18xxevm | 53 ++++++++++ board/overo/overo.c | 10 -- common/spl/Makefile | 37 +++++++ .../arm/cpu/armv7/omap-common => common/spl}/spl.c | 43 ++++---- .../armv7/omap-common => common/spl}/spl_ymodem.c | 3 +- doc/README.SPL | 1 - drivers/mmc/Makefile | 5 + .../armv7/omap-common => drivers/mmc}/spl_mmc.c | 24 ++--- drivers/mtd/nand/Makefile | 7 +- drivers/mtd/nand/nand_spl_load.c | 89 +++++++++++----- drivers/mtd/spi/spi_spl_load.c | 23 ++-- include/configs/am335x_evm.h | 1 + include/configs/am3517_crane.h | 2 + include/configs/am3517_evm.h | 2 + include/configs/cam_enc_4xx.h | 3 +- include/configs/da850evm.h | 5 + include/configs/devkit8000.h | 1 + include/configs/hawkboard.h | 3 +- include/configs/mcx.h | 2 + include/configs/omap3_beagle.h | 1 + include/configs/omap3_evm_common.h | 1 + include/configs/omap3_overo.h | 1 + include/configs/omap4_common.h | 2 + include/configs/omap5_evm.h | 2 + include/configs/tam3517-common.h | 2 + include/configs/tricorder.h | 1 + include/spl.h | 69 ++++++++++++ spl/Makefile | 1 + 48 files changed, 588 insertions(+), 355 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/davinci/config.mk delete mode 100644 arch/arm/cpu/armv7/omap-common/spl_nand.c create mode 100644 arch/arm/include/asm/arch-am33xx/spl.h create mode 100644 arch/arm/include/asm/arch-davinci/spl.h create mode 100644 arch/arm/include/asm/arch-omap3/spl.h create mode 100644 arch/arm/include/asm/arch-omap4/spl.h create mode 100644 arch/arm/include/asm/arch-omap5/spl.h create mode 100644 arch/arm/include/asm/spl.h create mode 100644 board/davinci/da8xxevm/README.da850_am18xxevm create mode 100644 common/spl/Makefile rename {arch/arm/cpu/armv7/omap-common => common/spl}/spl.c (87%) rename {arch/arm/cpu/armv7/omap-common => common/spl}/spl_ymodem.c (96%) rename {arch/arm/cpu/armv7/omap-common => drivers/mmc}/spl_mmc.c (91%) create mode 100644 include/spl.h -- 1.7.9.5

4 41

[U-Boot] [PATCH] powerpc: Fix declaration type for I/O functions
by Prabhakar Kushwaha 25 Aug '12

25 Aug '12

Prototype declaration of I/O operation functions are not correct. as both 'extern' and function definition are at same place. Chage protoype declaration as static. Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- Based upon git://git.denx.de/u-boot.git branch master arch/powerpc/include/asm/io.h | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index 0a71bb9..9597583 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h @@ -162,7 +162,7 @@ static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) * is actually performed (i.e. the data has come back) before we start * executing any following instructions. */ -extern inline u8 in_8(const volatile unsigned char __iomem *addr) +static inline u8 in_8(const volatile unsigned char __iomem *addr) { u8 ret; @@ -173,7 +173,7 @@ extern inline u8 in_8(const volatile unsigned char __iomem *addr) return ret; } -extern inline void out_8(volatile unsigned char __iomem *addr, u8 val) +static inline void out_8(volatile unsigned char __iomem *addr, u8 val) { __asm__ __volatile__("sync;\n" "stb%U0%X0 %1,%0;\n" @@ -181,7 +181,7 @@ extern inline void out_8(volatile unsigned char __iomem *addr, u8 val) : "r" (val)); } -extern inline u16 in_le16(const volatile unsigned short __iomem *addr) +static inline u16 in_le16(const volatile unsigned short __iomem *addr) { u16 ret; @@ -192,7 +192,7 @@ extern inline u16 in_le16(const volatile unsigned short __iomem *addr) return ret; } -extern inline u16 in_be16(const volatile unsigned short __iomem *addr) +static inline u16 in_be16(const volatile unsigned short __iomem *addr) { u16 ret; @@ -202,18 +202,18 @@ extern inline u16 in_be16(const volatile unsigned short __iomem *addr) return ret; } -extern inline void out_le16(volatile unsigned short __iomem *addr, u16 val) +static inline void out_le16(volatile unsigned short __iomem *addr, u16 val) { __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); } -extern inline void out_be16(volatile unsigned short __iomem *addr, u16 val) +static inline void out_be16(volatile unsigned short __iomem *addr, u16 val) { __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); } -extern inline u32 in_le32(const volatile unsigned __iomem *addr) +static inline u32 in_le32(const volatile unsigned __iomem *addr) { u32 ret; @@ -224,7 +224,7 @@ extern inline u32 in_le32(const volatile unsigned __iomem *addr) return ret; } -extern inline u32 in_be32(const volatile unsigned __iomem *addr) +static inline u32 in_be32(const volatile unsigned __iomem *addr) { u32 ret; @@ -234,13 +234,13 @@ extern inline u32 in_be32(const volatile unsigned __iomem *addr) return ret; } -extern inline void out_le32(volatile unsigned __iomem *addr, u32 val) +static inline void out_le32(volatile unsigned __iomem *addr, u32 val) { __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); } -extern inline void out_be32(volatile unsigned __iomem *addr, u32 val) +static inline void out_be32(volatile unsigned __iomem *addr, u32 val) { __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); } -- 1.7.5.4

5 8

[U-Boot] [PATCH 00/17]: ARM: SPL: Make more generic, merge DaVinci and OMAP
by Tom Rini 24 Aug '12

24 Aug '12

Hey all, The following patch series merges the davinci and omap-common SPL frameworks into a single framework, CONFIG_SPL_FRAMEWORK along with a few small cleanups to the code to make it a little smaller and more flexible. The end result is that davinci can now opt in on SPL-boots-Linux by just setting the right defines and other platforms would just need to adapt to this framework. In my testing, davinci gains between 300 and 700 bytes for this (not enabling the SPL OS feature) and omap4/5/etc lose just a little bit (from the printf->puts changes). I've tested this on omap3_beagle (xM and classic) and omap4_panda. I don't have any davinci platforms that were previously using SPL so I can't boot-test those changes but since everyone sets CONFIG_SPL_MAX_SIZE, we're OK in that department. To make this series easier to test I've placed it on http://github.com/trini/u-boot WIP/spl-improvements I've looked a little into re-reducing the size and the biggest problem I see is that SPI a lot of informational prints that we don't need, strictly speaking, but are nice in a normal U-Boot context. I'm unsure of the best way to quiet these as I don't like the idea of sprinkling #ifndef CONFIG_SPL_BUILD in random places. -- Tom

5 31

[U-Boot] [PATCH v2] rmobile: Add README
by Nobuhiro Iwamatsu 24 Aug '12

24 Aug '12

From: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> This add README of Renesas RMOBILE. Based doc/README.omap3. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- V2: Added more compiler infomation. doc/README.rmobile | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 doc/README.rmobile diff --git a/doc/README.rmobile b/doc/README.rmobile new file mode 100644 index 0000000..7ec63f1 --- /dev/null +++ b/doc/README.rmobile @@ -0,0 +1,65 @@ +Summary +======= + +This README is about U-Boot support for Renesas's ARM Cortex-A9 based RMOBILE[1] +family of SoCs. Renesas's RMOBILE SoC family contains an ARM Cortex-A9. + +Currently the following boards are supported: + +* KMC KZM-A9-GT [2] + +* Atmark-Techno Armadillo-800-EVA [3] + +Toolchain +========= + +ARM Cortex-A9 support ARM v7 instruction set (-march=armv7a). +But currently we compile with -march=armv5 to allow more compilers to work. +(For U-Boot code this has no performance impact.) +Because there was no compiler which is supporting armv7a not much before. +Currently, ELDK[4], Linaro[5], CodeSourcey[6] and Emdebian[7] supports -march=armv7a +and you can get. + +Build +===== + +* KZM-A9-GT + +make kzm9g_config +make + +* Armadillo-800-EVA + +make armadillo-800eva_config +make + +Links +===== + +[1] Renesas RMOBILE: + +http://am.renesas.com/products/soc/assp/mobile/r_mobile/index.jsp + +[2] KZM-A9-GT + +http://www.kmckk.co.jp/kzma9-gt/index.html + +[3] Armadillo-800-EVA + +http://armadillo.atmark-techno.com/armadillo-800-EVA + +[4] ELDK + +http://www.denx.de/wiki/view/ELDK-5/WebHome#Section_1.6. + +[5] Linaro + +http://www.linaro.org/downloads/ + +[6] CodeSourcey + +http://www.mentor.com/embedded-software/codesourcery + +[7] Emdebian + +http://www.emdebian.org/crosstools.html -- 1.7.10

2 1