August 2012 - U-Boot

[U-Boot] [PATCH v2] mx5: add iomux-mx51.h include
by Matt Sealey 27 Aug '12

27 Aug '12

Allow usage of the imx-common/iomux-v3.h framework by including pad settings for the i.MX51. The content of the file is taken from Linux kernel at commit 5d23b39 plus the required changes to make it work in U-Boot. The contained pad settings are the minimum required to make an Efika MX boot and get all the currently-implemented peripherals working in U-Boot. It is recommended that this file not be just a dumping ground for pins but only contain the settings required for all the boards using it. Changes for v2: * reference commit id from Linux kernel * additionally roll in the USB pads * removed GPIO_NUMBER define Signed-off-by: Matt Sealey <matt(a)genesi-usa.com> --- arch/arm/include/asm/arch-mx5/iomux-mx51.h | 164 ++++++++++++++++++++++++++++ 1 file changed, 164 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx5/iomux-mx51.h diff --git a/arch/arm/include/asm/arch-mx5/iomux-mx51.h b/arch/arm/include/asm/arch-mx5/iomux-mx51.h new file mode 100644 index 0000000..4f37295 --- /dev/null +++ b/arch/arm/include/asm/arch-mx5/iomux-mx51.h @@ -0,0 +1,164 @@ +/* + * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria(a)canonical.com> + * Copyright (C) 2010 Freescale Semiconductor, Inc. + * Copyright (C) 2009-2012 Genesi USA, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * The vast majority of this file is taken from the Linux kernel at + * commit 5d23b39 + */ + +#ifndef __IOMUX_MX51_H__ +#define __IOMUX_MX51_H__ + +#include <asm/imx-common/iomux-v3.h> + +#define PAD_CTL_DVS (1 << 13) +#define PAD_CTL_INPUT_DDR (1 << 9) +#define PAD_CTL_HYS (1 << 8) + +#define PAD_CTL_PKE (1 << 7) +#define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) +#define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) +#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) + +#define PAD_CTL_ODE (1 << 3) + +#define PAD_CTL_DSE_LOW (0 << 1) +#define PAD_CTL_DSE_MED (1 << 1) +#define PAD_CTL_DSE_HIGH (2 << 1) +#define PAD_CTL_DSE_MAX (3 << 1) + +#define PAD_CTL_SRE_FAST (1 << 0) +#define PAD_CTL_SRE_SLOW (0 << 0) + +/* Pad control groupings */ +#define MX51_UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_DSE_HIGH | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) +#define MX51_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ + PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \ + PAD_CTL_HYS) +#define MX51_ESDHC_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ + PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \ + PAD_CTL_HYS) +#define MX51_USBH1_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_SRE_FAST | \ + PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \ + PAD_CTL_HYS | PAD_CTL_PUE) +#define MX51_ECSPI_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_HYS | \ + PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST) +#define MX51_SDHCI_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_PUE | \ + PAD_CTL_SRE_FAST | PAD_CTL_DVS) +#define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | PAD_CTL_SRE_FAST) + +#define __NA_ 0x000 + +/* + * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode> + * If <padname> or <padmode> refers to a GPIO, it is named GPIO<unit>_<num> + * See also iomux-v3.h + */ + +/* PAD MUX ALT INPSE PATH PADCTRL */ +enum { + MX51_PAD_EIM_D16__USBH2_DATA0 = IOMUX_PAD(0x3f0, 0x05c, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D17__USBH2_DATA1 = IOMUX_PAD(0x3f4, 0x060, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D18__USBH2_DATA2 = IOMUX_PAD(0x3f8, 0x064, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D19__USBH2_DATA3 = IOMUX_PAD(0x3fc, 0x068, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D20__USBH2_DATA4 = IOMUX_PAD(0x400, 0x06c, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D21__USBH2_DATA5 = IOMUX_PAD(0x404, 0x070, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D22__USBH2_DATA6 = IOMUX_PAD(0x408, 0x074, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D23__USBH2_DATA7 = IOMUX_PAD(0x40c, 0x078, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_D27__GPIO2_9 = IOMUX_PAD(0x41c, 0x088, 1, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_EIM_A24__USBH2_CLK = IOMUX_PAD(0x450, 0x0bc, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_A25__USBH2_DIR = IOMUX_PAD(0x454, 0x0c0, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_A26__GPIO2_20 = IOMUX_PAD(0x458, 0x0c4, 1, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_EIM_A26__USBH2_STP = IOMUX_PAD(0x458, 0x0c4, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_A27__USBH2_NXT = IOMUX_PAD(0x45c, 0x0c8, 2, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_EIM_CS0__GPIO2_25 = IOMUX_PAD(0x474, 0x0e0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_EIM_CS2__SD1_CD = IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_ESDHC_PAD_CTRL), + MX51_PAD_EIM_CS3__GPIO2_28 = IOMUX_PAD(0x480, 0x0ec, 1, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_EIM_CS4__GPIO2_29 = IOMUX_PAD(0x484, 0x0f0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_NANDF_WE_B__PATA_DIOW = IOMUX_PAD(0x4e4, 0x108, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_RE_B__PATA_DIOR = IOMUX_PAD(0x4e8, 0x10c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_ALE__PATA_BUFFER_EN = IOMUX_PAD(0x4ec, 0x110, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_CLE__PATA_RESET_B = IOMUX_PAD(0x4f0, 0x114, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_WP_B__PATA_DMACK = IOMUX_PAD(0x4f4, 0x118, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_RB0__PATA_DMARQ = IOMUX_PAD(0x4f8, 0x11c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_RB1__PATA_IORDY = IOMUX_PAD(0x4fc, 0x120, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_GPIO_NAND__PATA_INTRQ = IOMUX_PAD(0x514, 0x12c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_CS2__PATA_CS_0 = IOMUX_PAD(0x520, 0x138, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_CS3__PATA_CS_1 = IOMUX_PAD(0x524, 0x13c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_CS4__PATA_DA_0 = IOMUX_PAD(0x528, 0x140, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_CS5__PATA_DA_1 = IOMUX_PAD(0x52c, 0x144, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_CS6__PATA_DA_2 = IOMUX_PAD(0x530, 0x148, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D15__PATA_DATA15 = IOMUX_PAD(0x53c, 0x154, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D14__PATA_DATA14 = IOMUX_PAD(0x540, 0x158, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D13__PATA_DATA13 = IOMUX_PAD(0x544, 0x15c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D12__PATA_DATA12 = IOMUX_PAD(0x548, 0x160, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D11__PATA_DATA11 = IOMUX_PAD(0x54c, 0x164, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D10__PATA_DATA10 = IOMUX_PAD(0x550, 0x168, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D9__PATA_DATA9 = IOMUX_PAD(0x554, 0x16c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D8__PATA_DATA8 = IOMUX_PAD(0x558, 0x170, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D7__PATA_DATA7 = IOMUX_PAD(0x55c, 0x174, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D6__PATA_DATA6 = IOMUX_PAD(0x560, 0x178, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D5__PATA_DATA5 = IOMUX_PAD(0x564, 0x17c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D4__PATA_DATA4 = IOMUX_PAD(0x568, 0x180, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D3__PATA_DATA3 = IOMUX_PAD(0x56c, 0x184, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D2__PATA_DATA2 = IOMUX_PAD(0x570, 0x188, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D1__PATA_DATA1 = IOMUX_PAD(0x574, 0x18c, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_NANDF_D0__PATA_DATA0 = IOMUX_PAD(0x578, 0x190, 1, __NA_, 0, NO_PAD_CTRL), + MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI = IOMUX_PAD(0x600, 0x210, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL), + MX51_PAD_CSPI1_MISO__ECSPI1_MISO = IOMUX_PAD(0x604, 0x214, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL), + MX51_PAD_CSPI1_SS0__GPIO4_24 = IOMUX_PAD(0x608, 0x218, 3, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_CSPI1_SS1__GPIO4_25 = IOMUX_PAD(0x60c, 0x21c, 3, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK = IOMUX_PAD(0x614, 0x224, 0, __NA_, 0, MX51_ECSPI_PAD_CTRL), + MX51_PAD_UART1_RXD__UART1_RXD = IOMUX_PAD(0x618, 0x228, 0, 0x9e4, 0, MX51_UART_PAD_CTRL), + MX51_PAD_UART1_TXD__UART1_TXD = IOMUX_PAD(0x61c, 0x22c, 0, __NA_, 0, MX51_UART_PAD_CTRL), + MX51_PAD_UART1_RTS__UART1_RTS = IOMUX_PAD(0x620, 0x230, 0, 0x9e0, 0, MX51_UART_PAD_CTRL), + MX51_PAD_UART1_CTS__UART1_CTS = IOMUX_PAD(0x624, 0x234, 0, __NA_, 0, MX51_UART_PAD_CTRL), + MX51_PAD_USBH1_CLK__USBH1_CLK = IOMUX_PAD(0x678, 0x278, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DIR__USBH1_DIR = IOMUX_PAD(0x67c, 0x27c, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_STP__USBH1_STP = IOMUX_PAD(0x680, 0x280, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_STP__GPIO1_27 = IOMUX_PAD(0x680, 0x280, 2, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_USBH1_NXT__USBH1_NXT = IOMUX_PAD(0x684, 0x284, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA0__USBH1_DATA0 = IOMUX_PAD(0x688, 0x288, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA1__USBH1_DATA1 = IOMUX_PAD(0x68c, 0x28c, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA2__USBH1_DATA2 = IOMUX_PAD(0x690, 0x290, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA3__USBH1_DATA3 = IOMUX_PAD(0x694, 0x294, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA4__USBH1_DATA4 = IOMUX_PAD(0x698, 0x298, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA5__USBH1_DATA5 = IOMUX_PAD(0x69c, 0x29c, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA6__USBH1_DATA6 = IOMUX_PAD(0x6a0, 0x2a0, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_USBH1_DATA7__USBH1_DATA7 = IOMUX_PAD(0x6a4, 0x2a4, 0, __NA_, 0, MX51_USBH1_PAD_CTRL), + MX51_PAD_SD1_CMD__SD1_CMD = IOMUX_PAD(0x79c, 0x394, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD1_CLK__SD1_CLK = IOMUX_PAD(0x7a0, 0x398, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS), + MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD1_DATA1__SD1_DATA1 = IOMUX_PAD(0x7a8, 0x3a0, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD1_DATA2__SD1_DATA2 = IOMUX_PAD(0x7ac, 0x3a4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD1_DATA3__SD1_DATA3 = IOMUX_PAD(0x7b0, 0x3a8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_GPIO1_0__SD1_CD = IOMUX_PAD(0x7b4, 0x3ac, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL), + MX51_PAD_GPIO1_1__SD1_WP = IOMUX_PAD(0x7b8, 0x3b0, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL), + MX51_PAD_SD2_CMD__SD2_CMD = IOMUX_PAD(0x7bc, 0x3b4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD2_CLK__SD2_CLK = IOMUX_PAD(0x7c0, 0x3b8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS), + MX51_PAD_SD2_DATA0__SD2_DATA0 = IOMUX_PAD(0x7c4, 0x3bc, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD2_DATA1__SD2_DATA1 = IOMUX_PAD(0x7c8, 0x3c0, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD2_DATA2__SD2_DATA2 = IOMUX_PAD(0x7cc, 0x3c4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_SD2_DATA3__SD2_DATA3 = IOMUX_PAD(0x7d0, 0x3c8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL), + MX51_PAD_GPIO1_3__GPIO1_3 = IOMUX_PAD(0x7d8, 0x3d0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_GPIO1_5__GPIO1_5 = IOMUX_PAD(0x808, 0x3dc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_GPIO1_6__GPIO1_6 = IOMUX_PAD(0x80c, 0x3e0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL), + MX51_PAD_GPIO1_7__SD2_WP = IOMUX_PAD(0x810, 0x3e4, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL), + MX51_PAD_GPIO1_8__SD2_CD = IOMUX_PAD(0x814, 0x3e8, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL), +}; + +#endif /* __IOMUX_MX51_H__ */ -- 1.7.9.5

2 2

[U-Boot] [PATCH 1/3] mxs: Replace i.MX233 by i.MX23 on copyright header
by Otavio Salvador 27 Aug '12

27 Aug '12

All other header are going to use i.MX23 so we change this for consistency. Signed-off-by: Otavio Salvador <otavio(a)ossystems.com.br> --- arch/arm/include/asm/arch-mxs/sys_proto.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h index 4610363..9e4a4c9 100644 --- a/arch/arm/include/asm/arch-mxs/sys_proto.h +++ b/arch/arm/include/asm/arch-mxs/sys_proto.h @@ -1,5 +1,5 @@ /* - * Freescale i.MX233/i.MX28 specific functions + * Freescale i.MX23/i.MX28 specific functions * * Copyright (C) 2011 Marek Vasut <marek.vasut(a)gmail.com> * on behalf of DENX Software Engineering GmbH -- 1.7.10.4

4 10

[U-Boot] [PATCH 1/4] COMMON: Implement common bounce buffer
by Marek Vasut 27 Aug '12

27 Aug '12

Implement common bounce buffer to be used on a less capable hardware. That includes hardware that can not do DMA from any address or such. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Andy Fleming <afleming(a)freescale.com> --- common/Makefile | 1 + common/bouncebuf.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/bouncebuf.h | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 180 insertions(+) create mode 100644 common/bouncebuf.c create mode 100644 include/bouncebuf.h diff --git a/common/Makefile b/common/Makefile index 483eb4d..63f3523 100644 --- a/common/Makefile +++ b/common/Makefile @@ -188,6 +188,7 @@ endif ifdef CONFIG_SPL_BUILD COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o endif +COBJS-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o COBJS-y += console.o COBJS-y += dlmalloc.o COBJS-y += image.o diff --git a/common/bouncebuf.c b/common/bouncebuf.c new file mode 100644 index 0000000..4f827f8 --- /dev/null +++ b/common/bouncebuf.c @@ -0,0 +1,92 @@ +/* + * Generic bounce buffer implementation + * + * Copyright (C) 2012 Marek Vasut <marex(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <errno.h> +#include <bouncebuf.h> + +static int addr_aligned(void *data, size_t len) +{ + const ulong align_mask = ARCH_DMA_MINALIGN - 1; + + /* Check if start is aligned */ + if ((ulong)data & align_mask) { + debug("Unaligned start address %p\n", data); + return 0; + } + + data += len; + + /* Check if end is aligned */ + if ((ulong)data & align_mask) { + debug("Unaligned end address %p\n", data); + return 0; + } + + /* Aligned */ + return 1; +} + +int bounce_buffer_start(void **data, size_t len, void **backup, uint8_t flags) +{ + void *tmp; + size_t alen; + + if (addr_aligned(*data, len)) { + *backup = NULL; + return 0; + } + + alen = roundup(len, ARCH_DMA_MINALIGN); + tmp = memalign(ARCH_DMA_MINALIGN, alen); + + if (!tmp) + return -ENOMEM; + + if (flags & GEN_BB_READ) + memcpy(tmp, *data, len); + + *backup = *data; + *data = tmp; + + return 0; +} + +int bounce_buffer_stop(void **data, size_t len, void **backup, uint8_t flags) +{ + void *tmp = *data; + + /* The buffer was already aligned, since "backup" is NULL. */ + if (!*backup) + return 0; + + if (flags & GEN_BB_WRITE) + memcpy(*backup, *data, len); + + *data = *backup; + free(tmp); + + return 0; +} diff --git a/include/bouncebuf.h b/include/bouncebuf.h new file mode 100644 index 0000000..31021c5 --- /dev/null +++ b/include/bouncebuf.h @@ -0,0 +1,87 @@ +/* + * Generic bounce buffer implementation + * + * Copyright (C) 2012 Marek Vasut <marex(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __INCLUDE_BOUNCEBUF_H__ +#define __INCLUDE_BOUNCEBUF_H__ + +/* + * GEN_BB_READ -- Data are read from the buffer eg. by DMA hardware. + * The source buffer is copied into the bounce buffer (if unaligned, otherwise + * the source buffer is used directly) upon start() call, then the operation + * requiring the aligned transfer happens, then the bounce buffer is lost upon + * stop() call. + */ +#define GEN_BB_READ (1 << 0) +/* + * GEN_BB_WRITE -- Data are written into the buffer eg. by DMA hardware. + * The source buffer starts in an undefined state upon start() call, then the + * operation requiring the aligned transfer happens, then the bounce buffer is + * copied into the destination buffer (if unaligned, otherwise destination + * buffer is used directly) upon stop() call. + */ +#define GEN_BB_WRITE (1 << 1) +/* + * GEN_BB_RW -- Data are read and written into the buffer eg. by DMA hardware. + * The source buffer is copied into the bounce buffer (if unaligned, otherwise + * the source buffer is used directly) upon start() call, then the operation + * requiring the aligned transfer happens, then the bounce buffer is copied + * into the destination buffer (if unaligned, otherwise destination buffer is + * used directly) upon stop() call. + */ +#define GEN_BB_RW (GEN_BB_READ | GEN_BB_WRITE) + +#ifdef CONFIG_BOUNCE_BUFFER +/** + * bounce_buffer_start() -- Start the bounce buffer session + * data: pointer to buffer to be aligned + * len: length of the buffer + * backup: pointer to backup buffer (the original value is stored here if + * needed + * flags: flags describing the transaction, see above. + */ +int bounce_buffer_start(void **data, size_t len, void **backup, uint8_t flags); +/** + * bounce_buffer_stop() -- Finish the bounce buffer session + * data: pointer to buffer that was aligned + * len: length of the buffer + * backup: pointer to backup buffer (the original value is stored here if + * needed + * flags: flags describing the transaction, see above. + */ +int bounce_buffer_stop(void **data, size_t len, void **backup, uint8_t flags); +#else +static inline int bounce_buffer_start(void **data, size_t len, void **backup, + uint8_t flags) +{ + return 0; +} + +static inline int bounce_buffer_stop(void **data, size_t len, void **backup, + uint8_t flags) +{ + return 0; +} +#endif + +#endif -- 1.7.10.4

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[U-Boot] [Patch V3 0/4] add mips64 cpu support
by Zhizhou Zhang 26 Aug '12

26 Aug '12

This patch add mips64 cpu support. Changes in V3: - merge related files into one patch, no longer one file one patch. - add detailed commit message. - remove standalone example. it's too complicate. Zhizhou Zhang (4): [MIPS] Add support for MIPS64 cpus [MIPS] add mips64 support in mips head files [MIPS] Add qemu-mips building configs [MIPS] Disable standalone while building MIPS64 Makefile | 2 + arch/mips/cpu/mips64/Makefile | 47 +++++++ arch/mips/cpu/mips64/config.mk | 39 ++++++ arch/mips/cpu/mips64/cpu.c | 124 +++++++++++++++++ arch/mips/cpu/mips64/interrupts.c | 39 ++++++ arch/mips/cpu/mips64/start.S | 256 +++++++++++++++++++++++++++++++++++ arch/mips/cpu/mips64/time.c | 86 ++++++++++++ arch/mips/include/asm/addrspace.h | 2 +- arch/mips/include/asm/cache.h | 21 +++ arch/mips/include/asm/io.h | 18 ++- arch/mips/include/asm/posix_types.h | 12 +- board/qemu-mips/config.mk | 10 -- board/qemu-mips/u-boot.lds | 8 ++ boards.cfg | 1 + include/configs/qemu-mips.h | 3 + include/configs/qemu-mips64.h | 171 +++++++++++++++++++++++ 16 files changed, 824 insertions(+), 15 deletions(-) create mode 100644 arch/mips/cpu/mips64/Makefile create mode 100644 arch/mips/cpu/mips64/config.mk create mode 100644 arch/mips/cpu/mips64/cpu.c create mode 100644 arch/mips/cpu/mips64/interrupts.c create mode 100644 arch/mips/cpu/mips64/start.S create mode 100644 arch/mips/cpu/mips64/time.c delete mode 100644 board/qemu-mips/config.mk create mode 100644 include/configs/qemu-mips64.h -- 1.7.9.5

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[U-Boot] Blackfin BF54x Silicon revision 0.4 and uClinux
by Dimitar Penev 26 Aug '12

26 Aug '12

Hello Gents, My question is not directly applicable with u-boot but I think here I may find the answer which I still don't get from the Analog Device forum. Does anyone got working hardware based on Blackfin BF54x rev 0.4 (the current silicon revision) and uClinux http://blackfin.uclinux.org/gf/project/uclinux-dist ? I know about BF548 EZKIT Lite but it uses BF548 Rev 0.2. Thank you Dimitar

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Re: [U-Boot] Intermediate ARM status
by Albert ARIBAUD 26 Aug '12

26 Aug '12

Hi Anatolij, On Sat, 25 Aug 2012 17:47:57 +0200, Anatolij Gustschin <agust(a)denx.de> wrote: > Hi Albert, > > On Sat, 25 Aug 2012 14:22:26 +0200 > Albert ARIBAUD <albert.u.boot(a)aribaud.net> wrote: > ... > > ydirectenv.h:69:0: warning: "vfree" redefined [enabled by default] > > /home/uboot/src/u-boot-arm/include/linux/compat.h:24:0: note: this > > is the location of the previous definition > > In file included from yportenv.h:80:0, > > > > I believe the errors / warnings have nothing to do with the arm > > sub-tree ARM commits per se. > > Yes, these appear with the current master branch, too. A patch fixing > them is already pending, http://patchwork.ozlabs.org/patch/177537/ It does fix some, but not all warnings: =========================================================================== uboot@lilith:~/src/u-boot-arm$ time LANG=C BUILD_NBUILDS=7 BUILD_NCPUS=1 ./MAKEALL VCMA9 smdk2410 Configuring for VCMA9 board... Configuring for smdk2410 board... text data bss dec hex filename 482924 10292 287516 780732 be9bc ./build/smdk2410/u-boot yaffs_guts.c: In function 'yaffs_check_chunk_erased': yaffs_guts.c:324:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_verify_chunk_written': yaffs_guts.c:352:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_grab_chunk_cache': yaffs_guts.c:1488:6: warning: variable 'pushout' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_check_obj_details_loaded': yaffs_guts.c:3180:6: warning: variable 'alloc_failed' set but not used [-Wunused-but-set-variable] yaffs_guts.c:3179:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_update_oh': yaffs_guts.c:3288:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_get_obj_name': yaffs_guts.c:4447:7: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_summary.c: In function 'yaffs_summary_read': yaffs_summary.c:194:6: warning: variable 'sum_tags_bytes' set but not used [-Wunused-but-set-variable] yaffs_verify.c: In function 'yaffs_verify_file': yaffs_verify.c:227:6: warning: variable 'actual_depth' set but not used [-Wunused-but-set-variable] yaffs_yaffs1.c: In function 'yaffs1_scan': yaffs_yaffs1.c:26:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_yaffs2.c: In function 'yaffs2_scan_chunk': yaffs_yaffs2.c:949:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_yaffs2.c: In function 'yaffs2_scan_backwards': yaffs_yaffs2.c:1352:6: warning: variable 'deleted' set but not used [-Wunused-but-set-variable] text data bss dec hex filename 508063 10688 287580 806331 c4dbb ./build/VCMA9/u-boot yaffs_guts.c: In function 'yaffs_check_chunk_erased': yaffs_guts.c:324:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_verify_chunk_written': yaffs_guts.c:352:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_grab_chunk_cache': yaffs_guts.c:1488:6: warning: variable 'pushout' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_check_obj_details_loaded': yaffs_guts.c:3180:6: warning: variable 'alloc_failed' set but not used [-Wunused-but-set-variable] yaffs_guts.c:3179:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_update_oh': yaffs_guts.c:3288:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_get_obj_name': yaffs_guts.c:4447:7: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_summary.c: In function 'yaffs_summary_read': yaffs_summary.c:194:6: warning: variable 'sum_tags_bytes' set but not used [-Wunused-but-set-variable] yaffs_verify.c: In function 'yaffs_verify_file': yaffs_verify.c:227:6: warning: variable 'actual_depth' set but not used [-Wunused-but-set-variable] yaffs_yaffs1.c: In function 'yaffs1_scan': yaffs_yaffs1.c:26:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_yaffs2.c: In function 'yaffs2_scan_chunk': yaffs_yaffs2.c:949:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_yaffs2.c: In function 'yaffs2_scan_backwards': yaffs_yaffs2.c:1352:6: warning: variable 'deleted' set but not used [-Wunused-but-set-variable] --------------------- SUMMARY ---------------------------- Boards compiled: 2 Boards with warnings but no errors: 2 ( VCMA9 smdk2410 ) ---------------------------------------------------------- real 0m29.001s user 0m40.947s sys 0m6.328s =========================================================================== Although, it may be my toolchain being more sensitive than others. > Thanks, > > Anatolij Amicalement, -- Albert.

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[U-Boot] [PATCH 0/3] MIPS: refactoring for extended Qemu support
by daniel.schwierzeck＠gmail.com 26 Aug '12

26 Aug '12

From: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Refactor handling of endianess flag and CONFIG_STANDALONE_LOAD_ADDR. Introduce qemu_mipsel support. Daniel Schwierzeck (3): MIPS: factor out endianess flag handling to arch config.mk MIPS: move CONFIG_STANDALONE_LOAD_ADDR to CPU config makefiles MIPS: add support for qemu for little endian MIPS32 CPUs arch/mips/config.mk | 20 +++++++++++++++++--- arch/mips/cpu/mips32/config.mk | 19 ++----------------- arch/mips/cpu/xburst/config.mk | 5 +++-- boards.cfg | 3 ++- include/configs/qemu-mips.h | 7 ++++++- include/configs/qi_lb60.h | 1 + 6 files changed, 31 insertions(+), 24 deletions(-) -- 1.7.11.3

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[U-Boot] [PATCH 0/2] Add gio api support to mx27
by Philippe Reynes 25 Aug '12

25 Aug '12

Change in v3: - rebase on u-boot-imx (instead of u-boot) - fix conflit with "mxc: Make gpio_get_value() use PSR" Philippe Reynes (2): gpio: add gpio api support to mx27 (v3) imx27lite: update with gpio api change (v3) arch/arm/cpu/arm926ejs/mx27/generic.c | 11 +++--- arch/arm/include/asm/arch-mx27/gpio.h | 55 +++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx27/imx-regs.h | 30 ++++------------ board/logicpd/imx27lite/imx27lite.c | 5 +-- drivers/gpio/mxc_gpio.c | 12 +++++-- include/configs/imx27lite-common.h | 5 +++ 6 files changed, 84 insertions(+), 34 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx27/gpio.h -- 1.7.4.4

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[U-Boot] Intermediate ARM status
by Albert ARIBAUD 25 Aug '12

25 Aug '12

All, I have merged Tom Rini's ti/master branch, but not the tegra or stagin/trini(a)ti.com ones yet. At this point 314 boards were built, 9 failing due to dtc not being available. But when I rebase onto u-boot/master, I get: --------------------- SUMMARY ---------------------------- Boards compiled: 314 Boards with errors: 9 ( trimslice tec ventana seaboard plutux harmony medcom whistler paz00 ) Boards with warnings but no errors: 2 ( VCMA9 smdk2410 ) ---------------------------------------------------------- These two boards actually already build with warnings on u-boot/master: - multiple instances of: ydirectenv.h:31:0: warning: "BUG" redefined [enabled by default] /home/uboot/src/u-boot-arm/include/common.h:160:0: note: this is the location of the previous definition ydirectenv.h:50:0: warning: "hweight8" redefined [enabled by default] /home/uboot/src/u-boot-arm/build/smdk2410/include2/asm/bitops.h:139:0: note: this is the location of the previous definition ydirectenv.h:51:0: warning: "hweight32" redefined [enabled by default] /home/uboot/src/u-boot-arm/build/smdk2410/include2/asm/bitops.h:137:0: note: this is the location of the previous definition One instance of: yaffs_guts.c: In function 'yaffs_check_chunk_erased': yaffs_guts.c:324:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_verify_chunk_written': yaffs_guts.c:352:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_grab_chunk_cache': yaffs_guts.c:1488:6: warning: variable 'pushout' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_check_obj_details_loaded': yaffs_guts.c:3180:6: warning: variable 'alloc_failed' set but not used [-Wunused-but-set-variable] yaffs_guts.c:3179:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_update_oh': yaffs_guts.c:3288:6: warning: variable 'result' set but not used [-Wunused-but-set-variable] yaffs_guts.c: In function 'yaffs_get_obj_name': yaffs_guts.c:4447:7: warning: variable 'result' set but not used [-Wunused-but-set-variable] Multiples instances of: ydirectenv.h:66:0: warning: "kmalloc" redefined [enabled by default] /home/uboot/src/u-boot-arm/include/linux/compat.h:20:0: note: this is the location of the previous definition ydirectenv.h:67:0: warning: "kfree" redefined [enabled by default] /home/uboot/src/u-boot-arm/include/linux/compat.h:23:0: note: this is the location of the previous definition ydirectenv.h:68:0: warning: "vmalloc" redefined [enabled by default] /home/uboot/src/u-boot-arm/include/linux/compat.h:22:0: note: this is the location of the previous definition ydirectenv.h:69:0: warning: "vfree" redefined [enabled by default] /home/uboot/src/u-boot-arm/include/linux/compat.h:24:0: note: this is the location of the previous definition In file included from yportenv.h:80:0, I believe the errors / warnings have nothing to do with the arm sub-tree ARM commits per se. Therefore I have pushed the rebased u-bot-arm/master and next. already present

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[U-Boot] Please pull u-boot-ti/master
by Tom Rini 25 Aug '12

25 Aug '12

Hello, The following changes since commit a1cd53c6b6e2e7fbf4ffa20d3548646e4c94efe5: sc_sps_1: Adjust board config to use 'mxs' SoC code (2012-08-14 00:36:30 +0200) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to 56540ed12d86a998ebd8f9ec8d55828c30ab1f14: davinci, c6x: Always use C version of reset code (2012-08-24 15:50:35 -0700) ---------------------------------------------------------------- Heiko Schocher (1): davinci: enbw_cmc: change switch init behaviour Jeroen Hofstee (1): arm: omap: Fix switching back to nandecc sw. Satyanarayana, Sandhya (1): am33xx evm: Update secure_emif_sdram_config during ddr init Sughosh Ganu (1): da8xx/hawkboard: Add support for ohci host controller Tom Rini (8): am335x evm: Initial support for AM335x GP EVM Profiles am33xx: Correct MMC1, remove MMC2 support am335x evm: Enable MMC1 pinmux am33xx: Add support, update omap3 McSPI driver am335x evm: Enable support for spi0 omap4/5/am33xx: Make lowlevel_init available to all armv7 platforms armv7: Make lowlevel_init.S's lowlevel_init do ABI compatible stack davinci, c6x: Always use C version of reset code arch/arm/cpu/arm926ejs/davinci/Makefile | 4 +- arch/arm/cpu/arm926ejs/davinci/psc.c | 5 + arch/arm/cpu/arm926ejs/davinci/reset.S | 81 ---------------- arch/arm/cpu/arm926ejs/davinci/reset.c | 33 +++++++ arch/arm/cpu/armv7/Makefile | 6 +- arch/arm/cpu/armv7/am33xx/board.c | 8 +- arch/arm/cpu/armv7/am33xx/clock.c | 5 + arch/arm/cpu/armv7/am33xx/ddr.c | 5 +- arch/arm/cpu/armv7/lowlevel_init.S | 51 ++++++++++ arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 18 ---- arch/arm/include/asm/arch-am33xx/cpu.h | 2 + arch/arm/include/asm/arch-am33xx/hardware.h | 3 +- arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 3 +- arch/arm/include/asm/arch-am33xx/omap.h | 1 - arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + .../arm/include/asm/arch-davinci/da8xx-usb.h | 7 +- arch/arm/include/asm/arch-davinci/hardware.h | 1 + arch/arm/include/asm/arch-omap4/omap.h | 1 - arch/arm/include/asm/arch-omap5/omap.h | 2 - arch/arm/include/asm/omap_common.h | 2 +- board/davinci/da8xxevm/hawkboard.c | 41 ++++++++ board/enbw/enbw_cmc/enbw_cmc.c | 102 +++++++++++++------- board/ti/am335x/mux.c | 73 +++++++++++++- drivers/mtd/nand/omap_gpmc.c | 1 + drivers/spi/omap3_spi.c | 16 +++ drivers/spi/omap3_spi.h | 5 + drivers/usb/host/Makefile | 1 + drivers/usb/host/ohci-da8xx.c | 48 +++++++++ drivers/usb/musb/da8xx.c | 3 +- include/configs/am335x_evm.h | 13 ++- include/configs/hawkboard.h | 14 ++- include/configs/omap4_common.h | 7 +- include/configs/omap5_evm.h | 7 +- 33 files changed, 404 insertions(+), 166 deletions(-) delete mode 100644 arch/arm/cpu/arm926ejs/davinci/reset.S create mode 100644 arch/arm/cpu/arm926ejs/davinci/reset.c create mode 100644 arch/arm/cpu/armv7/lowlevel_init.S rename drivers/usb/musb/da8xx.h => arch/arm/include/asm/arch-davinci/da8xx-usb.h (96%) create mode 100644 drivers/usb/host/ohci-da8xx.c -- Tom

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