August 2012 - U-Boot

[U-Boot] [PATCH] net: Make the netconsole buffer size configurable
by Joe Hershberger 01 Aug '12

01 Aug '12

Allow a board to configure a larger buffer for netconsole, but leave the default. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- doc/README.NetConsole | 2 ++ drivers/net/netconsole.c | 10 ++++++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/doc/README.NetConsole b/doc/README.NetConsole index c8bcb90..73543e5 100644 --- a/doc/README.NetConsole +++ b/doc/README.NetConsole @@ -6,6 +6,8 @@ serial and network input/output devices by adjusting the 'stdin' and set either of these variables to "nc". Input and output can be switched independently. +CONFIG_NETCONSOLE_BUFFER_SIZE - Override the default buffer size + We use an environment variable 'ncip' to set the IP address and the port of the destination. The format is <ip_addr>:<port>. If <port> is omitted, the value of 6666 is used. If the env var doesn't exist, the diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c index 14243b8..6b4390e 100644 --- a/drivers/net/netconsole.c +++ b/drivers/net/netconsole.c @@ -28,7 +28,13 @@ DECLARE_GLOBAL_DATA_PTR; -static char input_buffer[512]; +#ifdef CONFIG_NETCONSOLE_BUFFER_SIZE +#define BUFFER_SIZE CONFIG_NETCONSOLE_BUFFER_SIZE +#else +#define BUFFER_SIZE 512 +#endif + +static char input_buffer[BUFFER_SIZE]; static int input_size; /* char count in input buffer */ static int input_offset; /* offset to valid chars in input buffer */ static int input_recursion; @@ -203,7 +209,7 @@ static void nc_puts(const char *s) len = strlen(s); while (len) { - int send_len = min(len, 512); + int send_len = min(len, BUFFER_SIZE); nc_send_packet(s, send_len); len -= send_len; s += send_len; -- 1.6.0.2

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[U-Boot] [PATCH 0/7 V3] EXYNOS5: Enable SPI support
by Rajeshwari Shinde 01 Aug '12

01 Aug '12

This patch set adds SPI driver for EXYNOS5 and enables same. This patchset is based on top of latest V7 I2C patches which are merged in u-boot-i2c. url for same: http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/136058 Changes in V2: - Correted the Commit message. Changes in V3: - Removed SPI_SLAVE Flag. - Corrected warning messages. Rajeshwari Shinde (7): EXYNOS5: Add pinmux support for SPI SPI: Add W25Q32 to Winbond SPI flash table EXYNOS: Add clock for SPI. EXYNOS5: Add base address for SPI. SPI: Add SPI Driver for EXYNOS. EXYNOS5: Enable SPI Enable SPI booting. arch/arm/cpu/armv7/exynos/clock.c | 124 +++++++ arch/arm/cpu/armv7/exynos/pinmux.c | 51 +++- arch/arm/include/asm/arch-exynos/clk.h | 4 +- arch/arm/include/asm/arch-exynos/cpu.h | 6 + arch/arm/include/asm/arch-exynos/periph.h | 5 + arch/arm/include/asm/arch-exynos/spi.h | 78 +++++ board/samsung/smdk5250/Makefile | 2 +- board/samsung/smdk5250/smdk5250.c | 4 + board/samsung/smdk5250/{mmc_boot.c => spl_boot.c} | 31 ++- drivers/mtd/spi/winbond.c | 8 + drivers/spi/Makefile | 1 + drivers/spi/exynos_spi.c | 368 +++++++++++++++++++++ include/configs/smdk5250.h | 28 ++- 13 files changed, 704 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/spi.h rename board/samsung/smdk5250/{mmc_boot.c => spl_boot.c} (66%) create mode 100644 drivers/spi/exynos_spi.c -- 1.7.4.4

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[U-Boot] [PATCH V2 00/13] Basic Raspberyr Pi support
by Stephen Warren 01 Aug '12

01 Aug '12

This series adds basic support for the Raspberry Pi ARM board. v2: * Add README config_cmd_default.h documentation fix. * Use <> not "" for include of config_cmd_default.h. * Squash together 3 patches related to enabling booting a Linux kernel. * Minor rpi_b.h order changes in order to drop later cleanup patch. * Merged together 2 patch series of mine, and the GPIO series from Vikram. Stephen Warren (11): README: fix references to config_cmd_default.h ARM: add basic support for the Broadcom BCM2835 SoC ARM: bcm2835: add Raspberry Pi model B board ARM: arm1176: enable instruction cache in arch_cpu_init() ARM: rpi_b: enable CONFIG_ARCH_CPU_INIT for icache ARM: rpi_b: define CONFIG_MACH_TYPE ARM: rpi_b: include config_cmd_default.h ARM: rpi_b: enable booting the Linux kernel ARM: rpi_b: drop RAM size to 128M ARM: rpi_b: move stack to top of RAM ARM: bcm2835: implement reset using watchdog Vikram Narayanan (2): gpio: bcm2835: Add GPIO driver rbpi: Add BCM2835 GPIO driver for raspberry pi MAINTAINERS | 4 + README | 4 +- arch/arm/cpu/arm1176/bcm2835/Makefile | 37 +++++++++ arch/arm/cpu/arm1176/bcm2835/config.mk | 19 +++++ arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S | 19 +++++ arch/arm/cpu/arm1176/bcm2835/reset.c | 35 +++++++++ arch/arm/cpu/arm1176/bcm2835/timer.c | 55 +++++++++++++ arch/arm/cpu/arm1176/cpu.c | 7 ++ arch/arm/include/asm/arch-bcm2835/gpio.h | 66 ++++++++++++++++ arch/arm/include/asm/arch-bcm2835/timer.h | 37 +++++++++ arch/arm/include/asm/arch-bcm2835/wdog.h | 37 +++++++++ board/raspberrypi/rpi_b/Makefile | 34 +++++++++ board/raspberrypi/rpi_b/rpi_b.c | 34 +++++++++ boards.cfg | 1 + drivers/gpio/Makefile | 1 + drivers/gpio/bcm2835_gpio.c | 90 ++++++++++++++++++++++ include/configs/rpi_b.h | 106 ++++++++++++++++++++++++++ 17 files changed, 584 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/arm1176/bcm2835/Makefile create mode 100644 arch/arm/cpu/arm1176/bcm2835/config.mk create mode 100644 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S create mode 100644 arch/arm/cpu/arm1176/bcm2835/reset.c create mode 100644 arch/arm/cpu/arm1176/bcm2835/timer.c create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h create mode 100644 arch/arm/include/asm/arch-bcm2835/timer.h create mode 100644 arch/arm/include/asm/arch-bcm2835/wdog.h create mode 100644 board/raspberrypi/rpi_b/Makefile create mode 100644 board/raspberrypi/rpi_b/rpi_b.c create mode 100644 drivers/gpio/bcm2835_gpio.c create mode 100644 include/configs/rpi_b.h -- 1.7.9.5

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[U-Boot] [PATCH] arm: Fixed the offset for the no relocation.
by Zhong Hongbo 01 Aug '12

01 Aug '12

From: Zhong Hongbo <bocui107(a)gmail.com> When the u-boot address of destination equal to __start, no relocation. relocation offset(r9) = 0. Signed-off-by: Zhong Hongbo <bocui107(a)gmail.com> --- arch/arm/cpu/arm1136/start.S | 1 + arch/arm/cpu/arm1176/start.S | 2 +- arch/arm/cpu/arm720t/start.S | 1 + arch/arm/cpu/arm920t/start.S | 1 + arch/arm/cpu/arm925t/start.S | 1 + arch/arm/cpu/arm926ejs/start.S | 1 + arch/arm/cpu/arm946es/start.S | 1 + arch/arm/cpu/arm_intcm/start.S | 1 + arch/arm/cpu/ixp/start.S | 1 + arch/arm/cpu/lh7a40x/start.S | 1 + arch/arm/cpu/pxa/start.S | 1 + arch/arm/cpu/s3c44b0/start.S | 1 + arch/arm/cpu/sa1100/start.S | 1 + 13 files changed, 13 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 2483c63..3752af9 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -190,6 +190,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index dd1b73b..7de4af2 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -252,7 +252,7 @@ stack_setup: adr r0, _start cmp r0, r6 - moveq r9, #0 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 3b97e80..913065b 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -167,6 +167,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 9b8604e..14c9156 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -210,6 +210,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 1a54416..3a483f6 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -204,6 +204,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..1b530dc 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -235,6 +235,7 @@ stack_setup: adr r0, _start sub r9, r6, r0 /* r9 <- relocation offset */ cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index b4d1d2d..30e2183 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -175,6 +175,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index b85e7d4..a133d19 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -171,6 +171,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 59c359a..c12f1a7 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -273,6 +273,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index bd68cd4..33b9269 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -184,6 +184,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 33c73f6..536cf5c 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -197,6 +197,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index 8daf26c..323b923 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -156,6 +156,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index bcea2a8..1ea92d1 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -160,6 +160,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs -- 1.7.5.4

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[U-Boot] Problem with PCIexpress switch
by Miguel Ángel Álvarez 01 Aug '12

01 Aug '12

Dear all, We are developing a board using a Freescale P2020. This micro has three PCIexpress ports. 2 1xlane PCIe and 1 2xlane PCIe. We have been able to successfully use the PCIe interfaces. However, now we want to expand the number of PCIe slots connecting the 2xlane PCIe to a PCIe switch (89HPES6T5E). This switch offers a 2xlane upstream port and 4 1xlane downstream ports. The problem is that we do not really know how PCIe switches are managed in Linux. If any of you can recommend us some resources to read, we will appreciate it very much. If there is no information to read, let me describe our main problem. The question is that if I let u-boot scan the PCIe, the upstream and downstream ports are detected as well as the cards connected to the downstream port. However when u-boot launches Linux, this last just finds a device (the HPES6T5E), and none of the downstream ports or card connected to them. pci 0000:00:00.0: PCI bridge, secondary bus 0000:01 pci 0000:00:00.0: IO window: 0x00-0xffff pci 0000:00:00.0: MEM window: 0x80000000-0x9fffffff pci 0000:00:00.0: PREFETCH window: disabled pci 0000:00:00.0: enabling device (0106 -> 0107) pci 0001:02:00.0: PCI bridge, secondary bus 0001:03 pci 0001:02:00.0: IO window: 0x00-0xffff pci 0001:02:00.0: MEM window: 0xa0000000-0xbfffffff pci 0001:02:00.0: PREFETCH window: disabled pci 0001:02:00.0: enabling device (0106 -> 0107) pci 0002:05:00.0: PCI bridge, secondary bus 0002:06 pci 0002:05:00.0: IO window: disabled pci 0002:05:00.0: MEM window: 0xc0000000-0xc00fffff pci 0002:05:00.0: PREFETCH window: disabled pci 0002:04:00.0: PCI bridge, secondary bus 0002:05 pci 0002:04:00.0: IO window: 0x00-0xffff pci 0002:04:00.0: MEM window: 0xc0000000-0xdfffffff pci 0002:04:00.0: PREFETCH window: disabled pci 0002:04:00.0: enabling device (0106 -> 0107) However, if I do not let u-boot scan the bus (undef CONFIG_PCI_PNP, for example), Linux finds five devices for the 89HPES6T5E and the card connected to the downstream ports. pci 0000:00:00.0: PCI bridge, secondary bus 0000:01 pci 0000:00:00.0: IO window: 0x00-0xffff pci 0000:00:00.0: MEM window: 0x80000000-0x9fffffff pci 0000:00:00.0: PREFETCH window: disabled pci 0000:00:00.0: enabling device (0106 -> 0107) pci 0001:02:00.0: PCI bridge, secondary bus 0001:03 pci 0001:02:00.0: IO window: 0x00-0xffff pci 0001:02:00.0: MEM window: 0xa0000000-0xbfffffff pci 0001:02:00.0: PREFETCH window: disabled pci 0001:02:00.0: enabling device (0106 -> 0107) pci 0002:06:02.0: PCI bridge, secondary bus 0002:07 pci 0002:06:02.0: IO window: disabled pci 0002:06:02.0: MEM window: disabled pci 0002:06:02.0: PREFETCH window: disabled pci 0002:06:03.0: PCI bridge, secondary bus 0002:08 pci 0002:06:03.0: IO window: disabled pci 0002:06:03.0: MEM window: disabled pci 0002:06:03.0: PREFETCH window: disabled pci 0002:06:04.0: PCI bridge, secondary bus 0002:09 pci 0002:06:04.0: IO window: disabled pci 0002:06:04.0: MEM window: disabled pci 0002:06:04.0: PREFETCH window: disabled pci 0002:06:05.0: PCI bridge, secondary bus 0002:0a pci 0002:06:05.0: IO window: disabled pci 0002:06:05.0: MEM window: 0xc0000000-0xc00fffff pci 0002:06:05.0: PREFETCH window: disabled pci 0002:05:00.0: PCI bridge, secondary bus 0002:06 pci 0002:05:00.0: IO window: disabled pci 0002:05:00.0: MEM window: 0xc0000000-0xc00fffff pci 0002:05:00.0: PREFETCH window: disabled pci 0002:04:00.0: PCI bridge, secondary bus 0002:05 pci 0002:04:00.0: IO window: 0x00-0xffff pci 0002:04:00.0: MEM window: 0xc0000000-0xdfffffff pci 0002:04:00.0: PREFETCH window: disabled pci 0002:04:00.0: enabling device (0106 -> 0107) pci 0002:05:00.0: enabling device (0000 -> 0002) pci 0002:06:05.0: enabling device (0000 -> 0002) /sys/bus/pci/devices # ls 0002:0a:00.0 0002:06:04.0 0002:06:02.0 0002:04:00.0 0000:00:00.0 0002:06:05.0 0002:06:03.0 0002:05:00.0 0001:02:00.0 It seems that the problem comes from the detection of a PCI_CLASS_BRIDGE_PCI device in pciauto_config_device, but I do not understand the rest of the problem. Any clues? Thanks Miguel Ángel

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[U-Boot] [PATCH v4] arm : Atmel : add at91sam9x5ek board support
by Bo Shen 01 Aug '12

01 Aug '12

Add at91sam9x5ek board support, this board support the following SoCs AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35 Using at91sam9x5ek_nandflash to configure for the board Now only supports NAND with software ECC boot up Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- This patch is based on git://git.denx.de/u-boot-atmel.git Changed since v3 Remove CONFIG_NET_MULTI which was globally removed Remove CONFIG_RESET_PHY_R related part which is empty unused function Changed since v1 and v2 Modify the code according to Andreas's suggestion --- MAINTAINERS | 3 + arch/arm/cpu/arm926ejs/at91/Makefile | 1 + arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 232 ++++++++++++++++ arch/arm/cpu/arm926ejs/at91/clock.c | 12 +- arch/arm/include/asm/arch-at91/at91sam9_matrix.h | 2 + arch/arm/include/asm/arch-at91/at91sam9x5.h | 170 ++++++++++++ arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h | 91 ++++++ arch/arm/include/asm/arch-at91/hardware.h | 2 + board/atmel/at91sam9x5ek/Makefile | 52 ++++ board/atmel/at91sam9x5ek/at91sam9x5ek.c | 293 ++++++++++++++++++++ board/atmel/at91sam9x5ek/config.mk | 1 + boards.cfg | 1 + drivers/net/macb.c | 4 +- include/configs/at91sam9x5ek.h | 183 ++++++++++++ 14 files changed, 1043 insertions(+), 4 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c create mode 100644 arch/arm/include/asm/arch-at91/at91sam9x5.h create mode 100644 arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h create mode 100644 board/atmel/at91sam9x5ek/Makefile create mode 100644 board/atmel/at91sam9x5ek/at91sam9x5ek.c create mode 100644 board/atmel/at91sam9x5ek/config.mk create mode 100644 include/configs/at91sam9x5ek.h diff --git a/MAINTAINERS b/MAINTAINERS index 6438e1c..a2fccbf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -660,6 +660,9 @@ Sedji Gaouaou<sedji.gaouaou(a)atmel.com> at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC) at91sam9m10g45ek ARM926EJS (AT91SAM9G45 SoC) +Bo Shen <voice.shen(a)atmel.com> + at91sam9x5ek ARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC) + Simon Guinot <simon.guinot(a)sequanux.org> inetspace_v2 ARM926EJS (Kirkwood SoC) diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile index f333753..346e58f 100644 --- a/arch/arm/cpu/arm926ejs/at91/Makefile +++ b/arch/arm/cpu/arm926ejs/at91/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o COBJS-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o +COBJS-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o COBJS-$(CONFIG_AT91_EFLASH) += eflash.o COBJS-$(CONFIG_AT91_LED) += led.o COBJS-y += clock.o diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c new file mode 100644 index 0000000..7558ca2 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c @@ -0,0 +1,232 @@ +/* + * Copyright (C) 2012 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/io.h> + +unsigned int get_chip_id(void) +{ + /* The 0x40 is the offset of cidr in DBGU */ + return readl(ATMEL_BASE_DBGU + 0x40) & ~ARCH_ID_VERSION_MASK; +} + +unsigned int get_extension_chip_id(void) +{ + /* The 0x44 is the offset of exid in DBGU */ + return readl(ATMEL_BASE_DBGU + 0x44); +} + +unsigned int has_emac1() +{ + return cpu_is_at91sam9x25(); +} + +unsigned int has_emac0() +{ + return !(cpu_is_at91sam9g15()); +} + +unsigned int has_lcdc() +{ + return cpu_is_at91sam9g15() || cpu_is_at91sam9g35() + || cpu_is_at91sam9x35(); +} + +char *get_cpu_name() +{ + unsigned int extension_id = get_extension_chip_id(); + + if (cpu_is_at91sam9x5()) { + switch (extension_id) { + case ARCH_EXID_AT91SAM9G15: + return CONFIG_SYS_AT91_G15_CPU_NAME; + case ARCH_EXID_AT91SAM9G25: + return CONFIG_SYS_AT91_G25_CPU_NAME; + case ARCH_EXID_AT91SAM9G35: + return CONFIG_SYS_AT91_G35_CPU_NAME; + case ARCH_EXID_AT91SAM9X25: + return CONFIG_SYS_AT91_X25_CPU_NAME; + case ARCH_EXID_AT91SAM9X35: + return CONFIG_SYS_AT91_X35_CPU_NAME; + default: + return CONFIG_SYS_AT91_UNKNOWN_CPU; + } + } else { + return CONFIG_SYS_AT91_UNKNOWN_CPU; + } +} + +void at91_seriald_hw_init(void) +{ + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + + at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */ + at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ + + writel(1 << ATMEL_ID_SYS, &pmc->pcer); +} + +void at91_serial0_hw_init(void) +{ + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + + at91_set_a_periph(AT91_PIO_PORTA, 0, 1); /* TXD */ + at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* RXD */ + + writel(1 << ATMEL_ID_USART0, &pmc->pcer); +} + +void at91_serial1_hw_init(void) +{ + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + + at91_set_a_periph(AT91_PIO_PORTA, 5, 1); /* TXD */ + at91_set_a_periph(AT91_PIO_PORTA, 6, 0); /* RXD */ + + writel(1 << ATMEL_ID_USART1, &pmc->pcer); +} + +void at91_serial2_hw_init(void) +{ + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + + at91_set_a_periph(AT91_PIO_PORTA, 7, 1); /* TXD */ + at91_set_a_periph(AT91_PIO_PORTA, 8, 0); /* RXD */ + + writel(1 << ATMEL_ID_USART2, &pmc->pcer); +} + +#ifdef CONFIG_ATMEL_SPI +void at91_spi0_hw_init(unsigned long cs_mask) +{ + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_PMC_BASE; + + at91_set_a_periph(AT91_PIO_PORTA, 11, 0); /* SPI0_MISO */ + at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* SPI0_MOSI */ + at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* SPI0_SPCK */ + + /* Enable clock */ + writel(1 << ATMEL_ID_SPI0, &pmc->pcer); + + if (cs_mask & (1 << 0)) + at91_set_a_periph(AT91_PIO_PORTA, 14, 0); + if (cs_mask & (1 << 1)) + at91_set_b_periph(AT91_PIO_PORTA, 7, 0); + if (cs_mask & (1 << 2)) + at91_set_b_periph(AT91_PIO_PORTA, 1, 0); + if (cs_mask & (1 << 3)) + at91_set_b_periph(AT91_PIO_PORTB, 3, 0); + if (cs_mask & (1 << 4)) + at91_set_pio_output(AT91_PIO_PORTA, 14, 0); + if (cs_mask & (1 << 5)) + at91_set_pio_output(AT91_PIO_PORTA, 7, 0); + if (cs_mask & (1 << 6)) + at91_set_pio_output(AT91_PIO_PORTA, 1, 0); + if (cs_mask & (1 << 7)) + at91_set_pio_output(AT91_PIO_PORTB, 3, 0); +} + +void at91_spi1_hw_init(unsigned long cs_mask) +{ + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_PMC_BASE; + + at91_set_b_periph(AT91_PIO_PORTA, 21, 0); /* SPI1_MISO */ + at91_set_b_periph(AT91_PIO_PORTA, 22, 0); /* SPI1_MOSI */ + at91_set_b_periph(AT91_PIO_PORTA, 23, 0); /* SPI1_SPCK */ + + /* Enable clock */ + writel(1 << ATMEL_ID_SPI1, &pmc->pcer); + + if (cs_mask & (1 << 0)) + at91_set_b_periph(AT91_PIO_PORTA, 8, 0); + if (cs_mask & (1 << 1)) + at91_set_b_periph(AT91_PIO_PORTA, 0, 0); + if (cs_mask & (1 << 2)) + at91_set_b_periph(AT91_PIO_PORTA, 31, 0); + if (cs_mask & (1 << 3)) + at91_set_b_periph(AT91_PIO_PORTA, 30, 0); + if (cs_mask & (1 << 4)) + at91_set_pio_output(AT91_PIO_PORTA, 8, 0); + if (cs_mask & (1 << 5)) + at91_set_pio_output(AT91_PIO_PORTA, 0, 0); + if (cs_mask & (1 << 6)) + at91_set_pio_output(AT91_PIO_PORTA, 31, 0); + if (cs_mask & (1 << 7)) + at91_set_pio_output(AT91_PIO_PORTA, 30, 0); +} +#endif + +#ifdef CONFIG_MACB +void at91_macb_hw_init(void) +{ + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + + if (has_emac0()) { + /* Enable EMAC0 clock */ + writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); + /* EMAC0 pins setup */ + at91_set_a_periph(AT91_PIO_PORTB, 4, 0); /* ETXCK */ + at91_set_a_periph(AT91_PIO_PORTB, 3, 0); /* ERXDV */ + at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* ERX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* ERX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* ERXER */ + at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* ETXEN */ + at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* ETX0 */ + at91_set_a_periph(AT91_PIO_PORTB, 10, 0); /* ETX1 */ + at91_set_a_periph(AT91_PIO_PORTB, 5, 0); /* EMDIO */ + at91_set_a_periph(AT91_PIO_PORTB, 6, 0); /* EMDC */ + } + + if (has_emac1()) { + /* Enable EMAC1 clock */ + writel(1 << ATMEL_ID_EMAC1, &pmc->pcer); + /* EMAC1 pins setup */ + at91_set_b_periph(AT91_PIO_PORTC, 29, 0); /* ETXCK */ + at91_set_b_periph(AT91_PIO_PORTC, 28, 0); /* ECRSDV */ + at91_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ERXO */ + at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ERX1 */ + at91_set_b_periph(AT91_PIO_PORTC, 16, 0); /* ERXER */ + at91_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ETXEN */ + at91_set_b_periph(AT91_PIO_PORTC, 18, 0); /* ETX0 */ + at91_set_b_periph(AT91_PIO_PORTC, 19, 0); /* ETX1 */ + at91_set_b_periph(AT91_PIO_PORTC, 31, 0); /* EMDIO */ + at91_set_b_periph(AT91_PIO_PORTC, 30, 0); /* EMDC */ + } + +#ifndef CONFIG_RMII + /* Only emac0 support MII */ + if (has_emac0()) { + at91_set_b_periph(AT91_PIO_PORTB, 16, 0); /* ECRS */ + at91_set_b_periph(AT91_PIO_PORTB, 17, 0); /* ECOL */ + at91_set_b_periph(AT91_PIO_PORTB, 13, 0); /* ERX2 */ + at91_set_b_periph(AT91_PIO_PORTB, 14, 0); /* ERX3 */ + at91_set_b_periph(AT91_PIO_PORTB, 15, 0); /* ERXCK */ + at91_set_b_periph(AT91_PIO_PORTB, 11, 0); /* ETX2 */ + at91_set_b_periph(AT91_PIO_PORTB, 12, 0); /* ETX3 */ + at91_set_b_periph(AT91_PIO_PORTB, 8, 0); /* ETXER */ + } +#endif +} +#endif diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c index a7085de..dc5c6c4 100644 --- a/arch/arm/cpu/arm926ejs/at91/clock.c +++ b/arch/arm/cpu/arm926ejs/at91/clock.c @@ -154,7 +154,8 @@ int at91_clock_init(unsigned long main_clock) * For now, assume this parentage won't change. */ mckr = readl(&pmc->mckr); -#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \ + || defined(CONFIG_AT91SAM9X5) /* plla divisor by 2 */ gd->plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12)); #endif @@ -168,7 +169,14 @@ int at91_clock_init(unsigned long main_clock) freq / ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 7) : freq; if (mckr & AT91_PMC_MCKR_MDIV_MASK) freq /= 2; /* processor clock division */ -#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \ + || defined(CONFIG_AT91SAM9X5) + /* mdiv <==> divisor + * 0 <==> 1 + * 1 <==> 2 + * 2 <==> 4 + * 3 <==> 3 + */ gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) == (AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4) ? freq / 3 diff --git a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h index 6d97189..b9a93b0 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h @@ -23,6 +23,8 @@ #include <asm/arch/at91cap9_matrix.h> #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #include <asm/arch/at91sam9g45_matrix.h> +#elif defined(CONFIG_AT91SAM9X5) +#include <asm/arch/at91sam9x5_matrix.h> #else #error "Unsupported AT91SAM9/CAP9 processor" #endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5.h b/arch/arm/include/asm/arch-at91/at91sam9x5.h new file mode 100644 index 0000000..0e728c9 --- /dev/null +++ b/arch/arm/include/asm/arch-at91/at91sam9x5.h @@ -0,0 +1,170 @@ +/* + * Chip-specific header file for the AT91SAM9x5 family + * + * Copyright (C) 2012 Atmel Corporation. + * + * Definitions for the SoC: + * AT91SAM9x5 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __AT91SAM9X5_H__ +#define __AT91SAM9X5_H__ + +/* + * Peripheral identifiers/interrupts. + */ +#define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define ATMEL_ID_SYS 1 /* System Controller Interrupt */ +#define ATMEL_ID_PIOAB 2 /* Parallel I/O Controller A and B */ +#define ATMEL_ID_PIOCD 3 /* Parallel I/O Controller C and D */ +#define ATMEL_ID_SMD 4 /* SMD Soft Modem (SMD) */ +#define ATMEL_ID_USART0 5 /* USART 0 */ +#define ATMEL_ID_USART1 6 /* USART 1 */ +#define ATMEL_ID_USART2 7 /* USART 2 */ +#define ATMEL_ID_TWI0 9 /* Two-Wire Interface 0 */ +#define ATMEL_ID_TWI1 10 /* Two-Wire Interface 1 */ +#define ATMEL_ID_TWI2 11 /* Two-Wire Interface 2 */ +#define ATMEL_ID_HSMCI0 12 /* High Speed Multimedia Card Interface 0 */ +#define ATMEL_ID_SPI0 13 /* Serial Peripheral Interface 0 */ +#define ATMEL_ID_SPI1 14 /* Serial Peripheral Interface 1 */ +#define ATMEL_ID_UART0 15 /* UART 0 */ +#define ATMEL_ID_UART1 16 /* UART 1 */ +#define ATMEL_ID_TC01 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */ +#define ATMEL_ID_PWM 18 /* Pulse Width Modulation Controller */ +#define ATMEL_ID_ADC 19 /* ADC Controller */ +#define ATMEL_ID_DMAC0 20 /* DMA Controller 0 */ +#define ATMEL_ID_DMAC1 21 /* DMA Controller 1 */ +#define ATMEL_ID_UHPHS 22 /* USB Host High Speed */ +#define ATMEL_ID_UDPHS 23 /* USB Device High Speed */ +#define ATMEL_ID_EMAC0 24 /* Ethernet MAC0 */ +#define ATMEL_ID_LCDC 25 /* LCD Controller */ +#define ATMEL_ID_HSMCI1 26 /* High Speed Multimedia Card Interface 1 */ +#define ATMEL_ID_EMAC1 27 /* Ethernet MAC1 */ +#define ATMEL_ID_SSC 28 /* Synchronous Serial Controller */ +#define ATMEL_ID_IRQ 31 /* Advanced Interrupt Controller */ + +/* + * User Peripheral physical base addresses. + */ +#define ATMEL_BASE_SPI0 0xf0000000 +#define ATMEL_BASE_SPI1 0xf0004000 +#define ATMEL_BASE_HSMCI0 0xf0008000 +#define ATMEL_BASE_HSMCI1 0xf000c000 +#define ATMEL_BASE_SSC 0xf0010000 +#define ATMEL_BASE_CAN0 0xf8000000 +#define ATMEL_BASE_CAN1 0xf8004000 +#define ATMEL_BASE_TC0 0xf8008000 +#define ATMEL_BASE_TC1 0xf8008040 +#define ATMEL_BASE_TC2 0xf8008080 +#define ATMEL_BASE_TC3 0xf800c000 +#define ATMEL_BASE_TC4 0xf800c040 +#define ATMEL_BASE_TC5 0xf800c080 +#define ATMEL_BASE_TWI0 0xf8010000 +#define ATMEL_BASE_TWI1 0xf8014000 +#define ATMEL_BASE_TWI2 0xf8018000 +#define ATMEL_BASE_USART0 0xf801c000 +#define ATMEL_BASE_USART1 0xf8020000 +#define ATMEL_BASE_USART2 0xf8024000 +#define ATMEL_BASE_USART3 0xf8028000 +#define ATMEL_BASE_EMAC0 0xf802c000 +#define ATMEL_BASE_EMAC1 0xf8030000 +#define ATMEL_BASE_PWM 0xf8034000 +#define ATMEL_BASE_LCDC 0xf8038000 +#define ATMEL_BASE_UDPHS 0xf803c000 +#define ATMEL_BASE_UART0 0xf8040000 +#define ATMEL_BASE_UART1 0xf8044000 +#define ATMEL_BASE_ISI 0xf8048000 +#define ATMEL_BASE_ADC 0xf804c000 +#define ATMEL_BASE_SYS 0xffffc000 + +/* + * System Peripherals + */ +#define ATMEL_BASE_MATRIX 0xffffde00 +#define ATMEL_BASE_PMECC 0xffffe000 +#define ATMEL_BASE_PMERRLOC 0xffffe600 +#define ATMEL_BASE_DDRSDRC 0xffffe800 +#define ATMEL_BASE_SMC 0xffffea00 +#define ATMEL_BASE_DMAC0 0xffffec00 +#define ATMEL_BASE_DMAC1 0xffffee00 +#define ATMEL_BASE_AIC 0xfffff000 +#define ATMEL_BASE_DBGU 0xfffff200 +#define ATMEL_BASE_PIOA 0xfffff400 +#define ATMEL_BASE_PIOB 0xfffff600 +#define ATMEL_BASE_PIOC 0xfffff800 +#define ATMEL_BASE_PIOD 0xfffffa00 +#define ATMEL_BASE_PMC 0xfffffc00 +#define ATMEL_BASE_RSTC 0xfffffe00 +#define ATMEL_BASE_SHDWC 0xfffffe10 +#define ATMEL_BASE_PIT 0xfffffe30 +#define ATMEL_BASE_WDT 0xfffffe40 +#define ATMEL_BASE_GPBR 0xfffffe60 +#define ATMEL_BASE_RTC 0xfffffeb0 + +/* + * Internal Memory. + */ +#define ATMEL_BASE_ROM 0x00100000 /* Internal ROM base address */ +#define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */ +#define ATMEL_BASE_SMD 0x00400000 /* SMD Controller */ +#define ATMEL_BASE_UDPHS_FIFO 0x00500000 /* USB Device HS controller */ +#define ATMEL_BASE_OHCI 0x00600000 /* USB Host controller (OHCI) */ +#define ATMEL_BASE_EHCI 0x00700000 /* USB Host controller (EHCI) */ + +/* 9x5 series chip id definitions */ +#define ARCH_ID_AT91SAM9X5 0x819a05a0 +#define ARCH_ID_VERSION_MASK 0x1f +#define ARCH_EXID_AT91SAM9G15 0x00000000 +#define ARCH_EXID_AT91SAM9G35 0x00000001 +#define ARCH_EXID_AT91SAM9X35 0x00000002 +#define ARCH_EXID_AT91SAM9G25 0x00000003 +#define ARCH_EXID_AT91SAM9X25 0x00000004 + +#define cpu_is_at91sam9x5() (get_chip_id() == ARCH_ID_AT91SAM9X5) +#define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \ + (get_extension_chip_id() == ARCH_EXID_AT91SAM9G15)) +#define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \ + (get_extension_chip_id() == ARCH_EXID_AT91SAM9G25)) +#define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \ + (get_extension_chip_id() == ARCH_EXID_AT91SAM9G35)) +#define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \ + (get_extension_chip_id() == ARCH_EXID_AT91SAM9X25)) +#define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \ + (get_extension_chip_id() == ARCH_EXID_AT91SAM9X35)) + +/* + * Cpu Name + */ +#define CONFIG_SYS_AT91_G15_CPU_NAME "AT91SAM9G15" +#define CONFIG_SYS_AT91_G25_CPU_NAME "AT91SAM9G25" +#define CONFIG_SYS_AT91_G35_CPU_NAME "AT91SAM9G35" +#define CONFIG_SYS_AT91_X25_CPU_NAME "AT91SAM9X25" +#define CONFIG_SYS_AT91_X35_CPU_NAME "AT91SAM9X35" +#define CONFIG_SYS_AT91_UNKNOWN_CPU "Unknown CPU type" +#define ATMEL_CPU_NAME get_cpu_name() + +/* + * Other misc defines + */ +#define ATMEL_PIO_PORTS 4 +#define CPU_HAS_PIO3 +#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ + +/* + * at91sam9x5 specific prototypes + */ +#ifndef __ASSEMBLY__ +unsigned int get_chip_id(void); +unsigned int get_extension_chip_id(void); +unsigned int has_emac1(void); +unsigned int has_emac0(void); +unsigned int has_lcdc(void); +char *get_cpu_name(void); +#endif + +#endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h new file mode 100644 index 0000000..d6ce6fa --- /dev/null +++ b/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h @@ -0,0 +1,91 @@ +/* + * Matrix-centric header file for the AT91SAM9X5 family + * + * Copyright (C) 2012 Atmel Corporation. + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9X5 preliminary datasheet. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __AT91SAM9X5_MATRIX_H__ +#define __AT91SAM9X5_MATRIX_H__ + +#ifndef __ASSEMBLY__ + +struct at91_matrix { + u32 mcfg[16]; + u32 scfg[16]; + u32 pras[16][2]; + u32 mrcr; /* 0x100 Master Remap Control */ + u32 filler[7]; + u32 ebicsa; + u32 filler4[47]; + u32 wpmr; + u32 wpsr; +}; + +#endif /* __ASSEMBLY__ */ + +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) +#define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0) +#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0) +#define AT91_MATRIX_ULBT_128 (7 << 0) + +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18 + +#define AT91_MATRIX_M0PR_SHIFT 0 +#define AT91_MATRIX_M1PR_SHIFT 4 +#define AT91_MATRIX_M2PR_SHIFT 8 +#define AT91_MATRIX_M3PR_SHIFT 12 +#define AT91_MATRIX_M4PR_SHIFT 16 +#define AT91_MATRIX_M5PR_SHIFT 20 +#define AT91_MATRIX_M6PR_SHIFT 24 +#define AT91_MATRIX_M7PR_SHIFT 28 + +#define AT91_MATRIX_M8PR_SHIFT 0 /* register B */ +#define AT91_MATRIX_M9PR_SHIFT 4 /* register B */ +#define AT91_MATRIX_M10PR_SHIFT 8 /* register B */ +#define AT91_MATRIX_M11PR_SHIFT 12 /* register B */ + +#define AT91_MATRIX_RCB0 (1 << 0) +#define AT91_MATRIX_RCB1 (1 << 1) +#define AT91_MATRIX_RCB2 (1 << 2) +#define AT91_MATRIX_RCB3 (1 << 3) +#define AT91_MATRIX_RCB4 (1 << 4) +#define AT91_MATRIX_RCB5 (1 << 5) +#define AT91_MATRIX_RCB6 (1 << 6) +#define AT91_MATRIX_RCB7 (1 << 7) +#define AT91_MATRIX_RCB8 (1 << 8) +#define AT91_MATRIX_RCB9 (1 << 9) +#define AT91_MATRIX_RCB10 (1 << 10) + +#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) +#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) +#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_EBI_DBPU_ON (0 << 8) +#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8) +#define AT91_MATRIX_EBI_DBPD_ON (0 << 9) +#define AT91_MATRIX_EBI_DBPD_OFF (1 << 9) +#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) +#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17) +#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17) +#define AT91_MATRIX_NFD0_ON_D0 (0 << 24) +#define AT91_MATRIX_NFD0_ON_D16 (1 << 24) +#define AT91_MATRIX_MP_OFF (0 << 25) +#define AT91_MATRIX_MP_ON (1 << 25) + +#endif diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h index 85c2889..4c4ee70 100644 --- a/arch/arm/include/asm/arch-at91/hardware.h +++ b/arch/arm/include/asm/arch-at91/hardware.h @@ -37,6 +37,8 @@ # include <asm/arch/at91sam9rl.h> #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) # include <asm/arch/at91sam9g45.h> +#elif defined(CONFIG_AT91SAM9X5) +# include <asm/arch/at91sam9x5.h> #elif defined(CONFIG_AT91CAP9) # include <asm/arch/at91cap9.h> #elif defined(CONFIG_AT91X40) diff --git a/board/atmel/at91sam9x5ek/Makefile b/board/atmel/at91sam9x5ek/Makefile new file mode 100644 index 0000000..458d9a0 --- /dev/null +++ b/board/atmel/at91sam9x5ek/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian(a)popies.net> +# Lead Tech Design <www.leadtechdesign.com> +# +# (C) Copyright 2012 +# Bo Shen <voice.shen(a)atmel.com> +# Atmel corporation <www.atmel.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y += at91sam9x5ek.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c new file mode 100644 index 0000000..17db0fd --- /dev/null +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -0,0 +1,293 @@ +/* + * Copyright (C) 2012 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/at91sam9x5_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/clk.h> +#include <lcd.h> +#include <atmel_hlcdc.h> +#ifdef CONFIG_MACB +#include <net.h> +#endif +#include <netdev.h> +#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h> +#endif +#ifdef CONFIG_ATMEL_SPI +#include <spi.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ +#ifdef CONFIG_CMD_NAND +static void at91sam9x5ek_nand_hw_init(void) +{ + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + unsigned long csa; + + /* Enable CS3 */ + csa = readl(&matrix->ebicsa); + csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA; + writel(csa, &matrix->ebicsa); + + /* Configure SMC CS3 for NAND/SmartMedia */ + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) | + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4), + &smc->cs[3].pulse); + writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), + &smc->cs[3].cycle); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_MODE_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_MODE_DBW_8 | +#endif + AT91_SMC_MODE_TDF_CYCLE(3), + &smc->cs[3].mode); + + writel(1 << ATMEL_ID_PIOCD, &pmc->pcer); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + + at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */ + at91_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */ + at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* NAND ALE */ + at91_set_a_periph(AT91_PIO_PORTD, 3, 1); /* NAND CLE */ + at91_set_a_periph(AT91_PIO_PORTD, 6, 1); + at91_set_a_periph(AT91_PIO_PORTD, 7, 1); + at91_set_a_periph(AT91_PIO_PORTD, 8, 1); + at91_set_a_periph(AT91_PIO_PORTD, 9, 1); + at91_set_a_periph(AT91_PIO_PORTD, 10, 1); + at91_set_a_periph(AT91_PIO_PORTD, 11, 1); + at91_set_a_periph(AT91_PIO_PORTD, 12, 1); + at91_set_a_periph(AT91_PIO_PORTD, 13, 1); +} +#endif + +int board_eth_init(bd_t *bis) +{ + int rc = 0; + +#ifdef CONFIG_MACB + if (has_emac0()) + rc = macb_eth_initialize(0, + (void *)ATMEL_BASE_EMAC0, 0x00); + if (has_emac1()) + rc = macb_eth_initialize(1, + (void *)ATMEL_BASE_EMAC1, 0x00); +#endif + return rc; +} + +#ifdef CONFIG_LCD +vidinfo_t panel_info = { + .vl_col = 800, + .vl_row = 480, + .vl_clk = 24000000, + .vl_sync = LCDC_LCDCFG5_HSPOL | LCDC_LCDCFG5_VSPOL, + .vl_bpix = LCD_BPP, + .vl_tft = 1, + .vl_clk_pol = 1, + .vl_hsync_len = 128, + .vl_left_margin = 64, + .vl_right_margin = 64, + .vl_vsync_len = 2, + .vl_upper_margin = 22, + .vl_lower_margin = 21, + .mmio = ATMEL_BASE_LCDC, +}; + +void lcd_enable(void) +{ + if (has_lcdc()) + at91_set_a_periph(AT91_PIO_PORTC, 29, 1); /* power up */ +} + +void lcd_disable(void) +{ + if (has_lcdc()) + at91_set_a_periph(AT91_PIO_PORTC, 29, 0); /* power down */ +} + +static void at91sam9x5ek_lcd_hw_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + if (has_lcdc()) { + at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDPWM */ + at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDVSYNC */ + at91_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDHSYNC */ + at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDISP */ + at91_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */ + at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDPCK */ + + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */ + at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */ + at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */ + at91_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */ + at91_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */ + at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */ + at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */ + at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */ + at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */ + at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */ + at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */ + at91_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */ + at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */ + at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */ + at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */ + at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */ + at91_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */ + at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */ + at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */ + at91_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */ + at91_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */ + at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */ + at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */ + + writel(1 << ATMEL_ID_LCDC, &pmc->pcer); + } +} + +#ifdef CONFIG_LCD_INFO +void lcd_show_board_info(void) +{ + ulong dram_size, nand_size; + int i; + char temp[32]; + + if (has_lcdc()) { + lcd_printf("%s\n", U_BOOT_VERSION); + lcd_printf("(C) 2012 ATMEL Corp\n"); + lcd_printf("at91support(a)atmel.com\n"); + lcd_printf("%s CPU at %s MHz\n", + get_cpu_name(), + strmhz(temp, get_cpu_clk_rate())); + + dram_size = 0; + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + dram_size += gd->bd->bi_dram[i].size; + nand_size = 0; + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_size += nand_info[i].size; + lcd_printf(" %ld MB SDRAM, %ld MB NAND\n", + dram_size >> 20, + nand_size >> 20); + } +} +#endif /* CONFIG_LCD_INFO */ +#endif /* CONFIG_LCD */ + +/* SPI chip select control */ +#ifdef CONFIG_ATMEL_SPI +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs < 2; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + switch (slave->cs) { + case 1: + at91_set_pio_output(AT91_PIO_PORTA, 7, 0); + break; + case 0: + default: + at91_set_pio_output(AT91_PIO_PORTA, 14, 0); + break; + } +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + switch (slave->cs) { + case 1: + at91_set_pio_output(AT91_PIO_PORTA, 7, 1); + break; + case 0: + default: + at91_set_pio_output(AT91_PIO_PORTA, 14, 1); + break; + } +} +#endif /* CONFIG_ATMEL_SPI */ + +int board_early_init_f(void) +{ + at91_seriald_hw_init(); + return 0; +} + +int board_init(void) +{ + /* arch number of AT91SAM9X5EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + +#ifdef CONFIG_CMD_NAND + at91sam9x5ek_nand_hw_init(); +#endif + +#ifdef CONFIG_ATMEL_SPI + at91_spi0_hw_init(1 << 0); + at91_spi0_hw_init(1 << 4); +#endif + +#ifdef CONFIG_MACB + at91_macb_hw_init(); +#endif + +#ifdef CONFIG_LCD + at91sam9x5ek_lcd_hw_init(); +#endif + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} diff --git a/board/atmel/at91sam9x5ek/config.mk b/board/atmel/at91sam9x5ek/config.mk new file mode 100644 index 0000000..6589a12 --- /dev/null +++ b/board/atmel/at91sam9x5ek/config.mk @@ -0,0 +1 @@ +CONFIG_SYS_TEXT_BASE = 0x26f00000 diff --git a/boards.cfg b/boards.cfg index 9205070..c9bd1b3 100644 --- a/boards.cfg +++ b/boards.cfg @@ -89,6 +89,7 @@ at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91sam9m10g45ek_nandflash arm arm926ejs at91sam9m10g45ek atmel at91 at91sam9m10g45ek:AT91SAM9M10G45,SYS_USE_NANDFLASH at91sam9rlek_dataflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH at91sam9rlek_nandflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH +at91sam9x5ek_nandflash arm arm926ejs at91sam9x5ek atmel at91 at91sam9x5ek:AT91SAM9X5,SYS_USE_NANDFLASH at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 4578467..8f55cdc 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -471,7 +471,7 @@ static int macb_init(struct eth_device *netdev, bd_t *bd) #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ - defined(CONFIG_AT91SAM9XE) + defined(CONFIG_AT91SAM9XE) || defined(CONFIG_AT91SAM9X5) macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN)); #else macb_writel(macb, USRIO, 0); @@ -480,7 +480,7 @@ static int macb_init(struct eth_device *netdev, bd_t *bd) #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ - defined(CONFIG_AT91SAM9XE) + defined(CONFIG_AT91SAM9XE) || defined(CONFIG_AT91SAM9X5) macb_writel(macb, USRIO, MACB_BIT(CLKEN)); #else macb_writel(macb, USRIO, MACB_BIT(MII)); diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h new file mode 100644 index 0000000..f8bd870 --- /dev/null +++ b/include/configs/at91sam9x5ek.h @@ -0,0 +1,183 @@ +/* + * Copyright (C) 2012 Atmel Corporation + * + * Configuation settings for the AT91SAM9X5EK board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +#include <asm/hardware.h> + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_AT91SAM9X5EK +#define CONFIG_AT91FAMILY + +#define CONFIG_ARCH_CPU_INIT + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DISPLAY_CPUINFO + +/* general purpose I/O */ +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ +#define CONFIG_AT91_GPIO + +/* serial console */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS + +/* LCD */ +#define CONFIG_LCD +#define LCD_BPP LCD_COLOR16 +#define LCD_OUTPUT_BPP 24 +#define CONFIG_LCD_LOGO +#undef LCD_TEST_PATTERN +#define CONFIG_LCD_INFO +#define CONFIG_LCD_INFO_BELOW_LOGO +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_ATMEL_HLCD +#define CONFIG_ATMEL_LCD_RGB565 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +#define CONFIG_BOOTDELAY 3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) + +/* DataFlash */ +#ifdef CONFIG_ATMEL_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SYS_MAX_DATAFLASH_BANKS +#endif + +/* no NOR flash */ +#define CONFIG_SYS_NO_FLASH + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 + +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#endif + +/* Ethernet */ +#define CONFIG_MACB +#define CONFIG_RMII +#define CONFIG_NET_RETRY_COUNT 20 +#define CONFIG_MACB_SEARCH_PHY + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END 0x26e00000 + +#ifdef CONFIG_SYS_USE_NANDFLASH +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET_REDUND 0x100000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read " \ + "0x22000000 0x200000 0x300000; " \ + "bootm 0x22000000" +#endif + +#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ + "mtdparts=atmel_nand:" \ + "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ + "root=/dev/mtdblock1 rw " \ + "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs" + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \ + + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif -- 1.7.9.5

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[U-Boot] [PATCH] doc/git-mailrc: update at91 and avr32
by Andreas Bießmann 01 Aug '12

01 Aug '12

Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> --- doc/git-mailrc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/doc/git-mailrc b/doc/git-mailrc index c8a6390..743ce06 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -11,6 +11,7 @@ alias u-boot uboot # Maintainer aliases. Use the same alias here as patchwork to keep # things simple and easy to look up/coordinate. alias aaribaud Albert Aribaud <albert.u.boot(a)aribaud.net> +alias abiessmann Andreas Bießmann <andreas.devel(a)googlemail.com> alias afleming Andy Fleming <afleming(a)freescale.com> alias ag Anatolij Gustschin <agust(a)denx.de> alias galak Kumar Gala <galak(a)kernel.crashing.org> @@ -39,7 +40,7 @@ alias arch arm, avr32, bfin, m68k, microblaze, mips, nds32, nios2, pow alias arches arch alias arm uboot, aaribaud -alias at91 uboot, reinhardm +alias at91 uboot, abiessmann alias davinci ti alias imx uboot, sbabic alias kirkwood uboot, prafulla @@ -52,7 +53,7 @@ alias tegra uboot, Simon Glass <sjg(a)chromium.org>, Tom Warren <twarren@ alias tegra2 tegra alias ti uboot, Sandeep Paulraj <s-paulraj(a)ti.com>, Tom Rini <trini(a)ti.com> -alias avr32 uboot, Andreas Bießmann <andreas.devel(a)googlemail.com> +alias avr32 uboot, abiessmann alias bfin uboot, vapier alias blackfin bfin -- 1.7.10

2 3

[U-Boot] List of offending drivers
by Marek Vasut 01 Aug '12

01 Aug '12

Hello, Check the following list, it's the list of drivers scattered (misplaced) across the tree. The list is not complete and might be inaccurate. But it should give a good impression of what I'm going to break soon: arch/blackfin/cpu/serial.c arch/m68k/cpu/mcf5445x/pci.c arch/m68k/cpu/mcf547x_8x/pci.c arch/mips/cpu/mips32/au1x00/au1x00_eth.c arch/mips/cpu/mips32/au1x00/au1x00_serial.c arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c arch/mips/cpu/mips32/incaip/asc_serial.c arch/mips/cpu/xburst/jz_serial.c arch/powerpc/cpu/mpc512x/i2c.c arch/powerpc/cpu/mpc512x/ide.c arch/powerpc/cpu/mpc512x/pci.c arch/powerpc/cpu/mpc512x/serial.c arch/powerpc/cpu/mpc5xx/serial.c arch/powerpc/cpu/mpc5xx/spi.c arch/powerpc/cpu/mpc5xxx/i2c.c arch/powerpc/cpu/mpc5xxx/ide.c arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c arch/powerpc/cpu/mpc5xxx/serial.c arch/powerpc/cpu/mpc5xxx/usb.c arch/powerpc/cpu/mpc5xxx/usb_ohci.c arch/powerpc/cpu/mpc8220/fec.c arch/powerpc/cpu/mpc8220/i2c.c arch/powerpc/cpu/mpc8220/pci.c arch/powerpc/cpu/mpc8220/uart.c arch/powerpc/cpu/mpc824x/pci.c arch/powerpc/cpu/mpc824x/drivers/i2c/i2c.c arch/powerpc/cpu/mpc8260/ether_fcc.c arch/powerpc/cpu/mpc8260/ether_scc.c arch/powerpc/cpu/mpc8260/i2c.c arch/powerpc/cpu/mpc8260/pci.c arch/powerpc/cpu/mpc8260/serial_scc.c arch/powerpc/cpu/mpc8260/serial_smc.c arch/powerpc/cpu/mpc8260/spi.c arch/powerpc/cpu/mpc83xx/pci.c arch/powerpc/cpu/mpc83xx/pcie.c arch/powerpc/cpu/mpc85xx/ether_fcc.c arch/powerpc/cpu/mpc85xx/pci.c arch/powerpc/cpu/mpc85xx/serial_scc.c arch/powerpc/cpu/mpc8xx/fec.c arch/powerpc/cpu/mpc8xx/i2c.c arch/powerpc/cpu/mpc8xx/lcd.c arch/powerpc/cpu/mpc8xx/serial.c arch/powerpc/cpu/mpc8xx/spi.c arch/powerpc/cpu/mpc8xx/video.c arch/powerpc/cpu/mpc8xx/wlkbd.c arch/powerpc/cpu/ppc4xx/4xx_pci.c arch/powerpc/cpu/ppc4xx/4xx_pcie.c arch/powerpc/cpu/ppc4xx/4xx_uart.c arch/powerpc/cpu/ppc4xx/gpio.c arch/powerpc/cpu/ppc4xx/miiphy.c arch/powerpc/cpu/ppc4xx/usb.c arch/powerpc/cpu/ppc4xx/usb_ohci.c arch/sh/cpu/sh2/watchdog.c arch/sh/cpu/sh3/watchdog.c arch/sh/cpu/sh4/watchdog.c arch/sparc/cpu/leon2/serial.c arch/sparc/cpu/leon3/serial.c arch/sparc/cpu/leon3/usb_uhci.c arch/x86/cpu/sc520/sc520_pci.c board/BuS/EB+MCF-EV123/cfm_flash.c board/BuS/EB+MCF-EV123/flash.c board/LEOX/elpt860/flash.c board/Marvell/common/flash.c board/Marvell/common/i2c.c board/Marvell/common/intel_flash.c board/Marvell/common/ns16550.c board/Marvell/common/serial.c board/Marvell/db64360/mv_eth.c board/Marvell/db64360/pci.c board/Marvell/db64460/mv_eth.c board/Marvell/db64460/pci.c board/RPXClassic/flash.c board/RPXlite/flash.c board/RPXlite_dw/flash.c board/RRvision/flash.c board/a3000/flash.c board/alaska/flash.c board/altera/common/AMDLV065D.c board/altera/common/cfide.c board/altera/common/epled.c board/altera/common/flash.c board/altera/common/sevenseg.c board/amcc/bamboo/flash.c board/amcc/bubinga/flash.c board/amcc/common/flash.c board/amcc/ebony/flash.c board/amcc/luan/flash.c board/amcc/ocotea/flash.c board/amcc/taihu/flash.c board/amcc/taihu/lcd.c board/amcc/taishan/lcd.c board/amcc/walnut/flash.c board/amcc/yucca/flash.c board/amirix/ap1000/flash.c board/amirix/ap1000/pci.c board/amirix/ap1000/serial.c board/armltd/integrator/pci.c board/atc/flash.c board/atmel/at91rm9200ek/led.c board/atmel/at91sam9260ek/led.c board/atmel/at91sam9261ek/led.c board/atmel/at91sam9263ek/led.c board/atmel/at91sam9m10g45ek/led.c board/atmel/at91sam9rlek/led.c board/bct-brettl2/cled.c board/bct-brettl2/gpio_cfi_flash.c board/bct-brettl2/smsc9303.c board/bf527-ezkit/video.c board/bf533-ezkit/flash.c board/bf533-stamp/ide-cf.c board/bf533-stamp/video.c board/bf537-stamp/ide-cf.c board/bf548-ezkit/video.c board/bmw/flash.c board/bmw/m48t59y.c board/bmw/ns16550.c board/bmw/serial.c board/c2mon/flash.c board/c2mon/pcmcia.c board/calao/sbc35_a9g20/spi.c board/calao/tny_a9260/spi.c board/cm-bf527/gpio_cfi_flash.c board/cm-bf537e/gpio_cfi_flash.c board/cm-bf537u/gpio_cfi_flash.c board/cm-bf548/video.c board/cm4008/flash.c board/cm41xx/flash.c board/cm_t35/eeprom.c board/cm_t35/leds.c board/cmi/flash.c board/cobra5272/flash.c board/cogent/flash.c board/cogent/lcd.c board/cogent/pci.c board/cogent/rtc.c board/cogent/serial.c board/cpc45/flash.c board/cpc45/pd67290.c board/cpc45/plx9030.c board/cpu86/flash.c board/cpu87/flash.c board/cray/L1/flash.c board/cu824/flash.c board/dave/PPChameleonEVB/flash.c board/dave/PPChameleonEVB/nand.c board/dave/common/flash.c board/dave/common/fpga.c board/dave/common/pci.c board/davedenx/qong/fpga.c board/dvlhost/watchdog.c board/eNET/eNET_pci.c board/earthlcd/favr-32-ezkit/flash.c board/eltec/elppc/eepro100_srom.c board/eltec/elppc/flash.c board/eltec/elppc/mpc107_i2c.c board/eltec/elppc/pci.c board/eltec/mhpc/flash.c board/emk/common/am79c874.c board/emk/common/flash.c board/emk/top9000/spi.c board/ep8260/flash.c board/ep8260/mii_phy.c board/esd/adciop/flash.c board/esd/ar405/flash.c board/esd/ash405/flash.c board/esd/canbt/canbt.c board/esd/canbt/flash.c board/esd/cms700/flash.c board/esd/common/esd405ep_nand.c board/esd/common/flash.c board/esd/common/fpga.c board/esd/common/lcd.c board/esd/common/pci.c board/esd/common/xilinx_jtag/ board/esd/cpci2dp/flash.c board/esd/cpci405/flash.c board/esd/cpci5200/strataflash.c board/esd/cpci750/i2c.c board/esd/cpci750/ide.c board/esd/cpci750/mv_eth.c board/esd/cpci750/pci.c board/esd/cpci750/serial.c board/esd/cpciiser4/flash.c board/esd/dasa_sim/eeprom.c board/esd/dasa_sim/flash.c board/esd/dp405/flash.c board/esd/du405/flash.c board/esd/hh405/flash.c board/esd/hub405/flash.c board/esd/ocrtc/flash.c board/esd/pci405/flash.c board/esd/pci405/pci405.c board/esd/pf5200/flash.c board/esd/plu405/flash.c board/esd/pmc440/fpga.c board/esd/tasreg/flash.c board/esd/vme8349/caddy.c board/esd/vme8349/pci.c board/esd/voh405/flash.c board/esd/vom405/flash.c board/esd/wuh405/flash.c board/esteem192e/flash.c board/etin/debris/flash.c board/etin/debris/phantom.c board/etx094/flash.c board/eukrea/cpu9260/led.c board/evb64260/eth_addrtbl.c board/evb64260/eth.c board/evb64260/flash.c board/evb64260/i2c.c board/evb64260/intel_flash.c board/evb64260/pci.c board/evb64260/serial.c board/fads/flash.c board/fads/lamp.c board/fads/pcmcia.c board/flagadm/flash.c board/freescale/m5253demo/flash.c board/freescale/m5329evb/nand.c board/freescale/m5373evb/nand.c board/freescale/mpc8260ads/flash.c board/freescale/mpc8266ads/flash.c board/freescale/mpc832xemds/pci.c board/freescale/mpc8349emds/pci.c board/freescale/mpc8349itx/pci.c board/freescale/mpc8360emds/pci.c board/freescale/mpc8360erdk/nand.c board/freescale/mpc837xemds/pci.c board/freescale/mpc837xerdb/pci.c board/freescale/p1_p2_rdb/pci.c board/freescale/p2041rdb/eth.c board/freescale/p3060qds/eth.c board/funkwerk/vovpn-gw/flash.c board/funkwerk/vovpn-gw/m88e6060.c board/g2000/strataflash.c board/gdsys/common/miiphybb.c board/gen860t/beeper.c board/gen860t/flash.c board/gen860t/fpga.c board/genietv/flash.c board/gth2/ee_access.c board/gth2/flash.c board/gw8260/flash.c board/hermes/flash.c board/hidden_dragon/flash.c board/hymod/eeprom.c board/hymod/env.c board/hymod/flash.c board/hymod/input.c board/icecube/flash.c board/icu862/flash.c board/icu862/pcmcia.c board/idmr/flash.c board/incaip/flash.c ard/ip860/flash.c board/iphase4539/flash.c board/ivm/flash.c board/jse/flash.c board/jse/host_bridge.c board/keymile/km83xx/km83xx_i2c.c board/kup/common/flash.c board/kup/common/pcmcia.c board/lantec/flash.c board/linkstation/ide.c board/logicpd/zoom2/led.c board/lubbock/flash.c board/lwmon/flash.c board/lwmon/pcmcia.c board/lwmon5/kbd.c board/manroland/uc100/pcmcia.c board/matrix_vision/mergerbox/fpga.c board/matrix_vision/mergerbox/pci.c board/matrix_vision/mvbc_p/fpga.c board/matrix_vision/mvblm7/fpga.c board/matrix_vision/mvblm7/pci.c board/matrix_vision/mvblx/fpga.c board/matrix_vision/mvblx/sys_eeprom.c board/matrix_vision/mvsmr/fpga.c board/mbx8xx/flash.c board/mbx8xx/pcmcia.c board/mcc200/lcd.c board/micronas/vct/ebi.c board/micronas/vct/ebi_nor_flash.c board/micronas/vct/ebi_onenand.c board/micronas/vct/ebi_smc911x.c board/micronas/vct/ehci.c board/micronas/vct/gpio.c board/micronas/vct/smc_eeprom.c board/ml2/flash.c board/ml2/serial.c board/mousse/flash.c board/mousse/m48t59y.c board/mousse/pci.c board/mpl/common/isa.c board/mpl/common/kbd.c board/mpl/common/pci.c board/mpl/common/usb_uhci.c board/musenki/flash.c board/mvblue/flash.c board/mx1ads/syncflash.c board/netphone/phone_console.c board/netphone/flash.c board/netta/codec.c board/netta/dsp.c board/netta/flash.c board/netta/pcmcia.c board/netta2/flash.c board/netvia/flash.c board/ns9750dev/flash.c board/ns9750dev/led.c board/nx823/flash.c board/o2dnt/flash.c board/pb1x00/flash.c board/pcippc2/cpc710_pci.c board/pcippc2/flash.c board/pcippc2/fpga_serial.c board/pcippc2/i2c.c board/pcippc2/pcippc2_fpga.c board/pcippc2/sconsole.c board/pcs440ep/flash.c board/pm520/flash.c board/pm826/flash.c board/pm828/flash.c board/ppmc7xx/flash.c board/ppmc7xx/pci.c board/ppmc8260/strataflash.c board/prodrive/alpr/fpga.c board/prodrive/alpr/nand.c board/prodrive/common/flash.c board/prodrive/common/fpga.c board/prodrive/p3mx/mv_eth.c board/prodrive/p3mx/pci.c board/prodrive/p3mx/serial.c board/prodrive/pdnb3/flash.c board/prodrive/pdnb3/nand.c board/psyent/pk1c20/led.c board/quad100hd/nand.c board/quantum/fpga.c board/r360mpi/flash.c board/r360mpi/pcmcia.c board/rbc823/flash.c board/rbc823/kbd.c board/renesas/ap325rxa/cpld-ap325rxa.c board/renesas/sh7785lcr/rtl8169_mac.c board/ronetix/pm9261/led.c board/ronetix/pm9263/led.c board/rpxsuper/flash.c board/rpxsuper/mii_phy.c board/rsdproto/flash.c board/sacsng/flash.c board/samsung/goni/onenand.c board/samsung/smdkc100/onenand.c board/samsung/universal_c210/onenand.c board/sandburst/common/flash.c board/sandburst/common/ppc440gx_i2c.c board/sandpoint/flash.c board/sbc405/strataflash.c board/sbc8349/pci.c board/scb9328/flash.c board/siemens/IAD210/flash.c board/siemens/SCM/flash.c board/siemens/SCM/fpga_scm.c board/siemens/common/fpga.c board/sixnet/flash.c board/snmc/qs850/flash.c board/snmc/qs860t/flash.c board/socrates/nand.c board/spd8xx/flash.c board/st-ericsson/u8500/gpio.c board/stx/stxgp3/flash.c board/svm_sc8xx/flash.c board/tcm-bf537/gpio_cfi_flash.c board/ti/beagle/led.c board/ti/omap730p2/flash.c board/tqc/tqm5200/cam5200_flash.c board/tqc/tqm8272/nand.c board/tqc/tqm834x/pci.c board/tqc/tqm85xx/nand.c board/trizepsiv/eeprom.c board/utx8245/flash.c board/v37/flash.c board/v38b/ethaddr.c board/vpac270/onenand.c board/w7o/flash.c board/w7o/fpga.c board/westel/amx860/flash.c board/xaeniax/flash.c board/xes/common/actl_nand.c board/xes/common/fsl_8xxx_pci.c Best regards, Marek Vasut

7 17

[U-Boot] sh4 sti7109 for mb442 motherboards
by Андрей Борисович 01 Aug '12

01 Aug '12

Hello Help make a u-boot for sti7109 for mb442 motherboards and Linux to boot in 32bit mode. (now loaded in 29bit mode"Board: STb7100-Reference (MB442) [29-bit mode]") Thanks in advance.

1 0

[U-Boot] [PATCH v3 0/2] Add GPIO driver for BCM2835 SoC
by Vikram Narayanan 01 Aug '12

01 Aug '12

Also, add the driver to the raspberrypi default config Cc: Stephen Warren <swarren(a)wwwdotorg.org> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Vikram Narayanan (2): gpio: bcm2835: Add GPIO driver rbpi: Add BCM2835 GPIO driver for raspberry pi Changes from v2: Incorporate further comments from Stephen Warren Changes from v1: Incorporate comments from Stephen Warren arch/arm/include/asm/arch-bcm2835/gpio.h | 71 ++++++++++++++++++++++++ drivers/gpio/Makefile | 1 + drivers/gpio/bcm2835_gpio.c | 88 ++++++++++++++++++++++++++++++ include/configs/rpi_b.h | 3 +- 4 files changed, 162 insertions(+), 1 deletions(-) create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h create mode 100644 drivers/gpio/bcm2835_gpio.c -- 1.7.4.1

2 5