January 2012 - U-Boot

Re: [U-Boot] SPI Test
by Marek Vasut 16 Jan '12

16 Jan '12

> On 15.01.2012 19:49, Marek Vasut wrote: > >> On 01/15/2012 05:08 PM, Fabio Estevam wrote: > >>> On Sun, Jan 15, 2012 at 10:31 AM, Matthias Fuchs > >>> <matthias.fuchs(a)esd.eu> > > > > wrote: > >>>> -> finally we only need to deassert chip select. But the mxs_spi > >>>> driver -> does not support this operation without doing a byte > >>>> transfer. > >>>> > >>>> spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); > >>> > >>> Ok, so this is the point we need to fix in the mxs spi driver then. > >>> > >>> How about: > >>> > >>> diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c > >>> index 4c27fef..bb1804e 100644 > >>> --- a/drivers/spi/mxs_spi.c > >>> +++ b/drivers/spi/mxs_spi.c > >>> @@ -130,12 +130,6 @@ int spi_xfer(struct spi_slave *slave, unsigned int > >>> bitlen, > >>> > >>> const char *tx = dout; > >>> char *rx = din; > >>> > >>> - if (bitlen == 0) > >>> - return 0; > >>> - > >>> - if (!rx && !tx) > >>> - return 0; > >>> - > >>> > >>> if (flags & SPI_XFER_BEGIN) > >>> > >>> mxs_spi_start_xfer(ssp_regs); > >>> > >>> @@ -143,9 +137,6 @@ int spi_xfer(struct spi_slave *slave, unsigned int > >>> bitlen, > >>> > >>> /* We transfer 1 byte */ > >>> writel(1, &ssp_regs->hw_ssp_xfer_size); > >>> > >>> - if ((flags & SPI_XFER_END) && !len) > >>> - mxs_spi_end_xfer(ssp_regs); > >>> - > >>> > >>> if (tx) > >>> > >>> writel(SSP_CTRL0_READ, > >>> &ssp_regs->hw_ssp_ctrl0_clr); > >>> > >>> else > >>> > >>> @@ -181,6 +172,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int > >>> bitlen, > >>> > >>> return -1; > >>> > >>> } > >>> > >>> } > >>> > >>> + > >>> + if (flags & SPI_XFER_END) > >>> + mxs_spi_end_xfer(ssp_regs); > >>> > >>> return 0; > >>> > >>> } > >>> > >>> This makes sure that mxs_spi_end_xfer will be also called in the case > >>> where bitlen==0 and tx and rx== NULL, which is the case for > >>> spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); > >>> > >>>> So I think we need to ask someone from Freescale for a manual abort or > >>>> stay with my patch. Again, I agree, that it is not a shiny solution. > >>>> But it works. > >>> > >>> I think that mxs_spi_end_xfer does the chip select deassertion > >>> correctly based on the reference manual. > >> > >> I don't think so! There must be a transfer after calling it. > >> > >>> The issue I see with current implementation is that mxs_spi_end_xfer > >>> is not called in the case where bitlen==0 and tx/rx == NULL. > >> > >> That's true. But it's now the main problem :-) > >> > >>> The suggestion I sent above tries to address this problem. > >>> > >>> I will try to populate a SPI NOR on my mx28evk next week and try to > >>> take a look at this issue. > >> > >> Yes give it a try. > >> > >> Marek, did you made the M28EVK port? Did you really test t with an > >> SPI flash? > > > > Yes, I did test it. But I only have one device on the SPI bus so it > > doesn't matter if the CS remained asserted. > > Hmm, > > can you tell me what type of SPI flash you have installed? > Typically the read-status-register operation requires a low to high > transition to get terminated. This is from my flash' datasheet: > > Read-Status-Register (RDSR) > The Read-Status-Register (RDSR) instruction allows reading of the status > register. The status register > may be read at any time even during a Write (Program/Erase) operation. > When a Write operation is in > progress, the Busy bit may be checked before sending any new commands to > assure that the new > commands are properly received by the device. CE# must be driven low > before the RDSR instruction is > entered and remain low until the status data is read. > Read-Status-Register is continuous with ongoing > clock cycles until it is terminated by a low to high transition of the > CE#. See Figure 16 for the RDSR instruction sequence... > It's a SST part. I just noticed ... Matthias, why don't you CC the mailing list? Also, I can't really remember now what part there is. > > Matthias

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[U-Boot] [PATCH] common, image: introduce new uimage types
by Heiko Schocher 16 Jan '12

16 Jan '12

- ubootimage U-Boot image - splimage SPL image - dfenvimage Default Environment image - ublheader TI davinci UBL header image Signed-off-by: Heiko Schocher <hs(a)denx.de> --- common/image.c | 6 +++++- include/image.h | 4 ++++ 2 files changed, 9 insertions(+), 1 deletions(-) diff --git a/common/image.c b/common/image.c index 202c8a1..aca1318 100644 --- a/common/image.c +++ b/common/image.c @@ -133,6 +133,7 @@ static const table_entry_t uimage_os[] = { static const table_entry_t uimage_type[] = { { IH_TYPE_AISIMAGE, "aisimage", "Davinci AIS image",}, + { IH_TYPE_DFENVIMAGE, "dfenvimage", "default Env image", }, { IH_TYPE_FILESYSTEM, "filesystem", "Filesystem Image", }, { IH_TYPE_FIRMWARE, "firmware", "Firmware", }, { IH_TYPE_FLATDT, "flat_dt", "Flat Device Tree", }, @@ -145,8 +146,11 @@ static const table_entry_t uimage_type[] = { { IH_TYPE_OMAPIMAGE, "omapimage", "TI OMAP SPL With GP CH",}, { IH_TYPE_RAMDISK, "ramdisk", "RAMDisk Image", }, { IH_TYPE_SCRIPT, "script", "Script", }, + { IH_TYPE_SPLIMAGE, "splimage", "SPL image", }, { IH_TYPE_STANDALONE, "standalone", "Standalone Program", }, - { IH_TYPE_UBLIMAGE, "ublimage", "Davinci UBL image",}, + { IH_TYPE_UBOOTIMAGE, "ubootimage", "U-Boot image", }, + { IH_TYPE_UBLHEADER, "ublheader", "UBL header image", }, + { IH_TYPE_UBLIMAGE, "ublimage", "Davinci UBL image", }, { -1, "", "", }, }; diff --git a/include/image.h b/include/image.h index bbf80f0..3b5bd51 100644 --- a/include/image.h +++ b/include/image.h @@ -164,6 +164,10 @@ #define IH_TYPE_OMAPIMAGE 12 /* TI OMAP Config Header Image */ #define IH_TYPE_AISIMAGE 13 /* TI Davinci AIS Image */ #define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any load address */ +#define IH_TYPE_UBOOTIMAGE 15 /* U-Boot image */ +#define IH_TYPE_SPLIMAGE 16 /* SPL image */ +#define IH_TYPE_DFENVIMAGE 17 /* default Environment Image */ +#define IH_TYPE_UBLHEADER 18 /* UBL Header image */ /* * Compression Types -- 1.7.7.4

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Re: [U-Boot] [PATCH V13 04/14] devkit8000/spl: init GPMC for dm9000 in SPL
by Stefano Babic 16 Jan '12

16 Jan '12

On 15/01/2012 20:47, Simon Schwarz wrote: > Jep - no one cared about the patch as far as i can see: > http://article.gmane.org/gmane.comp.boot-loaders.u-boot/119453 Bad...maybe it was woth to include it in the patchset, but it should be enough to mark it is required. > > I did a rebase - will send it on monday, setting up git send-email is > not the right thing for sunday evening.... > Ok. thanks ! Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot] Please pull u-boot-ti/master
by Tom Rini 16 Jan '12

16 Jan '12

Hi Albert, The following changes since commit 10a4fa9e22b9677819b3901a87eec05875b346ad: Aneesh V (1): omap4: fix boot issue on ES2.0 Panda are available in the git repository at: git://git.denx.de/u-boot-ti.git master Andreas Müller (7): drivers/i2c/omap24xx_i2c.c: replace printf with one argument by puts board/overo/overo.c: replace printf with one argument by puts include/configs/omap3_overo.h: several cleanups drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM OMAP SPL: call timer_init in s_init to make udelay work earlier omap_rev_string: output to stdout overo: add SPL support Chandan Nath (5): ARM:AM33XX: Replace CONFIG_AM335X with CONFIG_AM33XX ARM:AM33XX: Fix ddr and timer register offset ARM:AM33XX: Fixing AM335X config parameters ARM:AM33XX: Add mmc/sd support ARM:AM33XX: Add SPL support for AM335X EVM Nikita Kiryanov (6): cm-t35: cleanup the config file cm-t35: various cleanups cm-t35: add EEPROM module and pass Linux a serial number omap3: make get_board_rev() function weak cm-t35: pass correct revision information to Linux cm-t35: use the new EEPROM module to read the MAC address Makefile | 2 +- arch/arm/cpu/armv7/am33xx/Makefile | 2 - arch/arm/cpu/armv7/am33xx/board.c | 66 +++++++- arch/arm/cpu/armv7/am33xx/clock.c | 8 + arch/arm/cpu/armv7/am33xx/config.mk | 18 ++ arch/arm/cpu/armv7/am33xx/emif4.c | 2 +- arch/arm/cpu/armv7/am33xx/lowlevel_init.S | 72 --------- arch/arm/cpu/armv7/omap-common/Makefile | 4 + arch/arm/cpu/armv7/omap-common/boot-common.c | 49 ++++++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 38 +---- arch/arm/cpu/armv7/omap-common/spl.c | 14 +-- arch/arm/cpu/armv7/omap3/board.c | 2 + arch/arm/cpu/armv7/omap3/sys_info.c | 3 +- .../arm/include/asm/arch-am33xx}/common_def.h | 4 +- arch/arm/include/asm/arch-am33xx/cpu.h | 44 +++--- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 6 +- arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 164 ++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/omap.h | 59 +++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + arch/arm/include/asm/arch-omap3/mem.h | 26 +++ arch/arm/include/asm/arch-omap4/sys_proto.h | 2 +- arch/arm/include/asm/arch-omap5/sys_proto.h | 2 +- arch/arm/include/asm/omap_common.h | 7 +- board/cm_t35/Makefile | 4 +- board/cm_t35/cm_t35.c | 27 ++- board/cm_t35/eeprom.c | 124 +++++++++++++++ board/cm_t35/eeprom.h | 33 ++++ board/overo/config.mk | 28 ---- board/overo/overo.c | 79 +++++++++- board/overo/overo.h | 5 + board/ti/am335x/evm.c | 2 +- board/ti/am335x/mux.c | 23 +++- drivers/i2c/omap24xx_i2c.c | 25 ++-- include/configs/am335x_evm.h | 62 ++++++-- include/configs/cm_t35.h | 81 +++++----- include/configs/omap3_overo.h | 118 ++++++++++---- spl/Makefile | 13 +- 37 files changed, 909 insertions(+), 310 deletions(-) create mode 100644 arch/arm/cpu/armv7/am33xx/config.mk delete mode 100644 arch/arm/cpu/armv7/am33xx/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/omap-common/boot-common.c rename {board/ti/am335x => arch/arm/include/asm/arch-am33xx}/common_def.h (81%) create mode 100644 arch/arm/include/asm/arch-am33xx/mmc_host_def.h create mode 100644 arch/arm/include/asm/arch-am33xx/omap.h create mode 100644 board/cm_t35/eeprom.c create mode 100644 board/cm_t35/eeprom.h delete mode 100644 board/overo/config.mk Thanks! -- Tom

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[U-Boot] [PATCH] arm, davinci: add timer defines for tcr field
by Heiko Schocher 15 Jan '12

15 Jan '12

Signed-off-by: Heiko Schocher <hs(a)denx.de> Cc: Sandeep Paulraj <s-paulraj(a)ti.com> Cc: Tom Rini <tom.rini(a)gmail.com> --- arch/arm/include/asm/arch-davinci/timer_defs.h | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-davinci/timer_defs.h b/arch/arm/include/asm/arch-davinci/timer_defs.h index 49b9e24..914ae07 100644 --- a/arch/arm/include/asm/arch-davinci/timer_defs.h +++ b/arch/arm/include/asm/arch-davinci/timer_defs.h @@ -37,6 +37,19 @@ struct davinci_timer { u_int32_t wdtcr; }; +#define DV_TIMER_TCR_ENAMODE_MASK 3 + +#define DV_TIMER_TCR_ENAMODE12_SHIFT 6 +#define DV_TIMER_TCR_CLKSRC12_SHIFT 8 +#define DV_TIMER_TCR_READRSTMODE12_SHIFT 10 +#define DV_TIMER_TCR_CAPMODE12_SHIFT 11 +#define DV_TIMER_TCR_CAPVTMODE12_SHIFT 12 +#define DV_TIMER_TCR_ENAMODE34_SHIFT 22 +#define DV_TIMER_TCR_CLKSRC34_SHIFT 24 +#define DV_TIMER_TCR_READRSTMODE34_SHIFT 26 +#define DV_TIMER_TCR_CAPMODE34_SHIFT 27 +#define DV_TIMER_TCR_CAPEVTMODE12_SHIFT 28 + #define DV_WDT_ENABLE_SYS_RESET 0x00020000 #define DV_WDT_TRIGGER_SYS_RESET 0x00020002 -- 1.7.7.4

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[U-Boot] [PATCH] arm, davinci: add workaround for not resetting DMA bus and VPSS modules
by Heiko Schocher 15 Jan '12

15 Jan '12

The Buffer Logic of VPSS is Not Reset by System Reset Pin, see http://www.ti.com/lit/er/sprz316b/sprz316b.pdf chapter Advisory 1.2.1 on page 9. Add workaroundcode proposed in the errata. Signed-off-by: Heiko Schocher <hs(a)denx.de> Cc: Sandeep Paulraj <s-paulraj(a)ti.com> Cc: Tom Rini <tom.rini(a)gmail.com> --- arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c | 52 ++++++++++++++++++- arch/arm/include/asm/arch-davinci/dm365_lowlevel.h | 1 - arch/arm/include/asm/arch-davinci/hardware.h | 9 +++ arch/arm/include/asm/arch-davinci/timer_defs.h | 3 + 4 files changed, 61 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c b/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c index 6e998de..c9936fd 100644 --- a/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c +++ b/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c @@ -254,7 +254,7 @@ int dm365_ddr_setup(void) return 0; } -void dm365_vpss_sync_reset(void) +static void dm365_vpss_sync_reset(void) { unsigned int PdNum = 0; @@ -276,11 +276,52 @@ void dm365_vpss_sync_reset(void) ; } -void dm365_por_reset(void) +static void dm365_por_reset(void) { + struct davinci_timer *wdog = + (struct davinci_timer *)DAVINCI_WDOG_BASE; + if (readl(&dv_pll0_regs->rstype) & - (PLL_RSTYPE_POR | PLL_RSTYPE_XWRST)) + (PLL_RSTYPE_POR | PLL_RSTYPE_XWRST)) { + dm365_vpss_sync_reset(); + + writel(DV_TMPBUF_VAL, TMPBUF); + setbits_le32(TMPSTATUS, FLAG_PORRST); + writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1); + writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2); + + while (1); + } +} + +static void dm365_wdt_reset(void) +{ + struct davinci_timer *wdog = + (struct davinci_timer *)DAVINCI_WDOG_BASE; + + if (readl(TMPBUF) != DV_TMPBUF_VAL) { + writel(DV_TMPBUF_VAL, TMPBUF); + setbits_le32(TMPSTATUS, FLAG_PORRST); + setbits_le32(TMPSTATUS, FLAG_FLGOFF); + + dm365_waitloop(100); + dm365_vpss_sync_reset(); + + writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1); + writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2); + + while (1); + } +} + +static void dm365_wdt_flag_on(void) +{ + /* VPSS_CLKMD 1:2 */ + clrbits_le32(&dv_sys_module_regs->vpss_clkctl, + VPSS_CLK_CTL_VPSS_CLKMD); + writel(0, TMPBUF); + setbits_le32(TMPSTATUS, FLAG_FLGON); } void dm365_psc_init(void) @@ -382,6 +423,9 @@ void dm36x_lowlevel_init(ulong bootflag) writel(0xffffffff, &dv_aintc_regs->irq0); writel(0xffffffff, &dv_aintc_regs->irq1); + dm365_por_reset(); + dm365_wdt_reset(); + /* System PSC setup - enable all */ dm365_psc_init(); @@ -418,6 +462,8 @@ void dm36x_lowlevel_init(ulong bootflag) puts("emif init\n"); dm365_emif_init(); + dm365_wdt_flag_on(); + #if defined(CONFIG_POST) /* * Do memory tests, calls arch_memory_failure_handle() diff --git a/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h b/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h index 4986e82..c70930d 100644 --- a/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h +++ b/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h @@ -32,7 +32,6 @@ void dm365_waitloop(unsigned long loopcnt); int dm365_pll1_init(unsigned long pllmult, unsigned long prediv); int dm365_pll2_init(unsigned long pllm, unsigned long prediv); int dm365_ddr_setup(void); -void dm365_por_reset(void); void dm365_psc_init(void); void dm365_pinmux_ctl(unsigned long offset, unsigned long mask, unsigned long value); diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index dd89e84..4856bc1 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -587,6 +587,15 @@ static inline int get_async3_src(void) #include <asm/arch/psc_defs.h> #include <asm/arch/syscfg_defs.h> #include <asm/arch/timer_defs.h> + +#define TMPBUF 0x00017ff8 +#define TMPSTATUS 0x00017ff0 +#define DV_TMPBUF_VAL 0x591b3ed7 +#define FLAG_PORRST 0x00000001 +#define FLAG_WDTRST 0x00000002 +#define FLAG_FLGON 0x00000004 +#define FLAG_FLGOFF 0x00000010 + #endif struct davinci_rtc { diff --git a/arch/arm/include/asm/arch-davinci/timer_defs.h b/arch/arm/include/asm/arch-davinci/timer_defs.h index 53c961e..49b9e24 100644 --- a/arch/arm/include/asm/arch-davinci/timer_defs.h +++ b/arch/arm/include/asm/arch-davinci/timer_defs.h @@ -37,6 +37,9 @@ struct davinci_timer { u_int32_t wdtcr; }; +#define DV_WDT_ENABLE_SYS_RESET 0x00020000 +#define DV_WDT_TRIGGER_SYS_RESET 0x00020002 + #ifdef CONFIG_HW_WATCHDOG void davinci_hw_watchdog_enable(void); void davinci_hw_watchdog_reset(void); -- 1.7.7.4

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[U-Boot] [PATCH] omap3: board.c - Fix compile warnings
by Pali Rohár 15 Jan '12

15 Jan '12

* This patch fix compile warnings when CONFIG_SYS_L2CACHE_OFF is enabled board.c:48:13: warning: ‘omap3_invalidate_l2_cache_secure’ declared ‘static’ but never defined board.c:373:13: warning: ‘omap3_update_aux_cr’ defined but not used Signed-off-by: Pali Rohár <pali.rohar(a)gmail.com> --- arch/arm/cpu/armv7/omap3/board.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 1f33c63..52514ae 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -45,7 +45,10 @@ /* Declarations */ extern omap3_sysinfo sysinfo; static void omap3_setup_aux_cr(void); + +#ifndef CONFIG_SYS_L2CACHE_OFF static void omap3_invalidate_l2_cache_secure(void); +#endif static const struct gpio_bank gpio_bank_34xx[6] = { { (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX }, @@ -370,6 +373,7 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits) } } +#ifndef CONFIG_SYS_L2CACHE_OFF static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits) { u32 acr; @@ -382,6 +386,7 @@ static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits) /* Write ACR - affects non-secure banked bits */ asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr)); } +#endif static void omap3_setup_aux_cr(void) { -- 1.7.5.4

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[U-Boot] [PATCH v4 1/3] PXA: PXA27x Matrix keypad driver
by Vasily Khoruzhick 14 Jan '12

14 Jan '12

From: Marek Vasut <marek.vasut(a)gmail.com> Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> Signed-off-by: Vasily Khoruzhick <anarsoul(a)gmail.com> [vasily: adapted Marek's old version for newer u-boot, fixed multiple keypresses handling] --- v2: use struct-based access to regs, minor cleanup v3: fix multiple keypresses handling, minor cleanup v4: another minor cleanup arch/arm/include/asm/arch-pxa/pxa-regs.h | 52 ----- arch/arm/include/asm/arch-pxa/regs-keypad.h | 84 ++++++++ drivers/input/Makefile | 2 + drivers/input/pxa27x-mkp.c | 293 +++++++++++++++++++++++++++ 4 files changed, 379 insertions(+), 52 deletions(-) create mode 100644 arch/arm/include/asm/arch-pxa/regs-keypad.h create mode 100644 drivers/input/pxa27x-mkp.c diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h index b81b42c..d562658 100644 --- a/arch/arm/include/asm/arch-pxa/pxa-regs.h +++ b/arch/arm/include/asm/arch-pxa/pxa-regs.h @@ -2567,58 +2567,6 @@ typedef void (*ExcpHndlr) (void) ; #define OVL2C1_O2EN (1<<31) /* Enable bit for Overlay 2 */ #define CCR_CEN (1<<31) /* Enable bit for Cursor */ -/* Keypad controller */ - -#define KPC 0x41500000 /* Keypad Interface Control register */ -#define KPDK 0x41500008 /* Keypad Interface Direct Key register */ -#define KPREC 0x41500010 /* Keypad Intefcace Rotary Encoder register */ -#define KPMK 0x41500018 /* Keypad Intefcace Matrix Key register */ -#define KPAS 0x41500020 /* Keypad Interface Automatic Scan register */ -#define KPASMKP0 0x41500028 /* Keypad Interface Automatic Scan Multiple Key Presser register 0 */ -#define KPASMKP1 0x41500030 /* Keypad Interface Automatic Scan Multiple Key Presser register 1 */ -#define KPASMKP2 0x41500038 /* Keypad Interface Automatic Scan Multiple Key Presser register 2 */ -#define KPASMKP3 0x41500040 /* Keypad Interface Automatic Scan Multiple Key Presser register 3 */ -#define KPKDI 0x41500048 /* Keypad Interface Key Debounce Interval register */ - -#define KPC_AS (0x1 << 30) /* Automatic Scan bit */ -#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */ -#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */ -#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */ -#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */ -#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */ -#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */ -#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */ -#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */ -#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */ -#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */ -#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */ -#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */ -#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */ -#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Key Debounce select */ -#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */ -#define KPC_DEE0 (0x1 << 2) /* Rotary Encoder 0 Enable */ -#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */ -#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */ - -#define KPDK_DKP (0x1 << 31) -#define KPDK_DK7 (0x1 << 7) -#define KPDK_DK6 (0x1 << 6) -#define KPDK_DK5 (0x1 << 5) -#define KPDK_DK4 (0x1 << 4) -#define KPDK_DK3 (0x1 << 3) -#define KPDK_DK2 (0x1 << 2) -#define KPDK_DK1 (0x1 << 1) -#define KPDK_DK0 (0x1 << 0) - -#define KPREC_OF1 (0x1 << 31) -#define kPREC_UF1 (0x1 << 30) -#define KPREC_OF0 (0x1 << 15) -#define KPREC_UF0 (0x1 << 14) - -#define KPMK_MKP (0x1 << 31) -#define KPAS_SO (0x1 << 31) -#define KPASMKPx_SO (0x1 << 31) - #define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */ #define PSLR 0x40F00034 #define PSTR 0x40F00038 /* Power Manager Standby Configuration Reg */ diff --git a/arch/arm/include/asm/arch-pxa/regs-keypad.h b/arch/arm/include/asm/arch-pxa/regs-keypad.h new file mode 100644 index 0000000..1909417 --- /dev/null +++ b/arch/arm/include/asm/arch-pxa/regs-keypad.h @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2012 Vasily Khoruzhick <anarsoul(a)gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __REGS_KEYPAD_H__ +#define __REGS_KEYPAD_H__ + +#define KEYPAD_BASE 0x41500000 + +struct kpasmkp_regs { + uint32_t kpasmkpx; + uint32_t reserved; +}; + +struct pxa_keypad_regs { + uint32_t kpc; + uint32_t reserved_1; + uint32_t kpdk; + uint32_t reserved_2; + uint32_t kprec; + uint32_t reserved_3; + uint32_t kpmk; + uint32_t reserved_4; + uint32_t kpas; + uint32_t reserved_5; + struct kpasmkp_regs kpasmkp[4]; + uint32_t kpkdi; +}; + +#define KPC_AS (0x1 << 30) /* Automatic Scan bit */ +#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */ +#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */ +#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */ +#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */ +#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */ +#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */ +#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */ +#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */ +#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */ +#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */ +#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */ +#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */ +#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */ +#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Key Debounce select */ +#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */ +#define KPC_DEE0 (0x1 << 2) /* Rotary Encoder 0 Enable */ +#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */ +#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */ + +#define KPDK_DKP (0x1 << 31) +#define KPDK_DK7 (0x1 << 7) +#define KPDK_DK6 (0x1 << 6) +#define KPDK_DK5 (0x1 << 5) +#define KPDK_DK4 (0x1 << 4) +#define KPDK_DK3 (0x1 << 3) +#define KPDK_DK2 (0x1 << 2) +#define KPDK_DK1 (0x1 << 1) +#define KPDK_DK0 (0x1 << 0) + +#define KPREC_OF1 (0x1 << 31) +#define kPREC_UF1 (0x1 << 30) +#define KPREC_OF0 (0x1 << 15) +#define KPREC_UF0 (0x1 << 14) + +#define KPMK_MKP (0x1 << 31) +#define KPAS_SO (0x1 << 31) +#define KPASMKPx_SO (0x1 << 31) + +#endif diff --git a/drivers/input/Makefile b/drivers/input/Makefile index 1f4dad3..792d29d 100644 --- a/drivers/input/Makefile +++ b/drivers/input/Makefile @@ -31,6 +31,8 @@ COBJS-y += keyboard.o pc_keyb.o COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o endif +COBJS-$(CONFIG_PXA27X_MKP) += pxa27x-mkp.o + COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/input/pxa27x-mkp.c b/drivers/input/pxa27x-mkp.c new file mode 100644 index 0000000..5368b57 --- /dev/null +++ b/drivers/input/pxa27x-mkp.c @@ -0,0 +1,293 @@ +/* + * PXA27x matrix keypad controller driver + * + * Copyright (C) 2010 Marek Vasut <marek.vasut(a)gmail.com> + * Copyright (C) 2012 Vasily Khoruzhick <anarsoul(a)gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <stdio_dev.h> +#include <asm/arch/regs-keypad.h> +#include <asm/io.h> + +#define DEVNAME "pxa27x-mkp" + +struct { + char row; + char col; + char key; + char shift; + char alt; + char ctrl; +} keymap[] = { + CONFIG_PXA27X_MKP_KEYMAP, +}; + +static unsigned char queue[64] = {0}; +static int queue_len; +static struct pxa_keypad_regs *regs = (struct pxa_keypad_regs *)KEYPAD_BASE; + +/* autorepeat stuff */ +static int last_key_row = 0xff, last_key_col = 0xff; +static char key_counter; + +/* number of key scans before autorepeat kicks in */ +#ifndef CONFIG_PXA27X_KEY_REPEAT_FIRST +#define CONFIG_PXA27X_KEY_REPEAT_FIRST 12 +#endif +#ifndef CONFIG_PXA27X_KEY_REPEAT_NEXT +#define CONFIG_PXA27X_KEY_REPEAT_NEXT 2 +#endif + +/* 100 milliseconds (in wait cycles below it's 100 x 10uS waits) */ +#define PXA_KEYPAD_TIMEOUT 10000 + +enum { + MOD_NONE, + MOD_SHIFT, + MOD_ALT, + MOD_CTRL, +}; + +static int kbd_get_mdf(int row, int col) +{ + char mod_shift[2] = CONFIG_PXA27X_MKP_MOD_SHIFT; + char mod_alt[2] = CONFIG_PXA27X_MKP_MOD_ALT; + char mod_ctrl[2] = CONFIG_PXA27X_MKP_MOD_CTRL; + + if (mod_shift[0] == row && mod_shift[1] == col) + return MOD_SHIFT; + if (mod_alt[0] == row && mod_alt[1] == col) + return MOD_ALT; + if (mod_ctrl[0] == row && mod_ctrl[1] == col) + return MOD_CTRL; + return MOD_NONE; +} + +static int kbd_lookup(int row, int col, int mod) +{ + int i = 0; + char key = 0xff; + + while (!(keymap[i].col == 0xff && keymap[i].row == 0xff)) { + if (keymap[i].row != row || keymap[i].col != col) { + i++; + continue; + } + switch (mod) { + case MOD_NONE: + key = keymap[i].key; + break; + case MOD_SHIFT: + key = keymap[i].shift; + break; + case MOD_ALT: + key = keymap[i].alt; + break; + case MOD_CTRL: + key = keymap[i].ctrl; + break; + } + if (key == 0xff) { + i++; + continue; + } + + if (row != last_key_row || col != last_key_col) { + queue[queue_len++] = key; + last_key_row = row; + last_key_col = col; + key_counter = 0; + } else /* same key as before */ + if (key_counter < CONFIG_PXA27X_KEY_REPEAT_FIRST) { + /* ignore key press */ + key_counter++; + } else { + /* ok, autorepeat */ + queue[queue_len++] = key; + key_counter = CONFIG_PXA27X_KEY_REPEAT_FIRST + - CONFIG_PXA27X_KEY_REPEAT_NEXT; + } + i++; + } + return key; +} + +static int scan_keys(int scan_modif, uint32_t kpasmkp[4]) +{ + uint32_t reg = 0; + int col, row; + static int mod = MOD_NONE; + int key; + for (col = 0; col < 8; col += 1) { + reg = kpasmkp[col >> 1]; + reg >>= 16 * (col % 2); + for (row = 0; row < 8; row++) { + if (reg & (1 << row)) { + if (scan_modif) { + mod = kbd_get_mdf(row, col); + if (mod != MOD_NONE) + return mod; + } else { + key = kbd_lookup(row, col, mod); + if (key != 0xff) + return key; + } + } + } + } + + if (scan_modif) + return MOD_NONE; + else + return 0xff; +} + +static void kbd_read(void) +{ + uint32_t reg; + int col, row, i, have_new_key = 0; + int numkeys; + int mod = MOD_NONE; + unsigned int timeout = PXA_KEYPAD_TIMEOUT; + static uint32_t kpasmkp_old[4]; + uint32_t kpasmkp[4], kpasmkp_diff[4]; + + /* start one automatic scan */ + writel(readl(&regs->kpc) | KPC_AS, &regs->kpc); + + /* wait for scan to finish */ + while (timeout--) { + if (!(readl(&regs->kpc) & KPC_AS)) + break; + udelay(10); +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + WATCHDOG_RESET(); +#endif + } + + if (!timeout) + return; + + numkeys = (readl(&regs->kpas) >> 26) & 0x1f; + switch (numkeys) { + case 0: + /* no key pressed, clear autorepeat counter */ + key_counter = 0; + last_key_row = last_key_col = 0xff; + for (i = 0; i < ARRAY_SIZE(kpasmkp); i++) + kpasmkp[i] = 0; + break; + case 1: + reg = readl(&regs->kpas) & 0xff; + col = reg & 0x0f; + row = reg >> 4; + for (i = 0; i < ARRAY_SIZE(kpasmkp); i++) + kpasmkp[i] = 0; + kpasmkp[col >> 1] |= (1 << (row + 16 * (col % 2))); + + break; + default: + for (i = 0; i < ARRAY_SIZE(kpasmkp); i++) { + timeout = PXA_KEYPAD_TIMEOUT; + while (timeout--) { + kpasmkp[i] = readl(&regs->kpasmkp[i].kpasmkpx); + if (!(kpasmkp[i] & KPASMKPx_SO)) + break; + udelay(10); +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + WATCHDOG_RESET(); +#endif + } + if (!timeout) + kpasmkp[i] = 0; + } + break; + } + + /* Find new keypress */ + for (i = 0; i < ARRAY_SIZE(kpasmkp); i++) { + kpasmkp_diff[i] = (kpasmkp_old[i] ^ kpasmkp[i]) & + kpasmkp[i]; + if (kpasmkp_diff[i]) + have_new_key = 1; + kpasmkp_old[i] = kpasmkp[i]; + } + + if (!numkeys) + return; + + /* Scan for modifiers */ + mod = scan_keys(1, kpasmkp); + if (!have_new_key) { + /* Check if old key is still pressed */ + if (kpasmkp[last_key_col >> 1] & + (1 << (last_key_row + 16 * (last_key_col % 2)))) + kbd_lookup(last_key_row, last_key_col, mod); + + } else { + key_counter = 0; + last_key_row = last_key_col = 0xff; + scan_keys(0, kpasmkp_diff); + } +} + +static int kbd_getc(void) +{ + if (!queue_len) { + kbd_read(); + udelay(CONFIG_PXA27X_MKP_DELAY); + } + + if (queue_len) + return queue[--queue_len]; + else + return 0; +} + +static int kbd_testc(void) +{ + if (!queue_len) + kbd_read(); + return queue_len; +} + +int drv_keyboard_init(void) +{ + int error = 0; + struct stdio_dev kbddev; + + writel((CONFIG_PXA27X_MKP_MKP_ROWS << 26) | + (CONFIG_PXA27X_MKP_MKP_COLS << 23) | + (0xff << 13) | KPC_ME, &regs->kpc); + writel(CONFIG_PXA27X_MKP_DEBOUNCE, &regs->kpkdi); + + memset(&kbddev, 0, sizeof(kbddev)); + strcpy(kbddev.name, DEVNAME); + kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; + kbddev.putc = NULL; + kbddev.puts = NULL; + kbddev.getc = kbd_getc; + kbddev.tstc = kbd_testc; + + error = stdio_register(&kbddev); + return error; +} -- 1.7.8.3

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[U-Boot] Adding support to Technexion TAM3517 SOM
by Stefano Babic 14 Jan '12

14 Jan '12

This patches adds support for the Technexion's SOM TAM3517 based on a TI AM3517. In agreement with Tapani Utrianen, this patchset superseeds the recent patches sent to the ML by him with the same purpose. This patchset requires the patchset for the AM3517 and EMAC posted by Ilya Yanok, and not yet merged into mainline. Ilya's patches must be applied first before this patchset. [PATCH 1/2] ARM: omap3: added common configuration for Technexion [PATCH 2/2] ARM: omap3: add support to Technexion twister board

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[U-Boot] [PATCH 0/14] tegra: warmboot (suspend / resume) support
by Simon Glass 14 Jan '12

14 Jan '12

This series adds support for warm boot, allowing the device to suspend and resume. U-Boot sets up some 'warm boot' code in a special area such that the SOC can find it on a resume. This code is responsible for setting up memory and clocked and then allowing the OS to continue where it left off. Jimmy Zhang (4): tegra: Add EMC support for optimal memory timings tegra: Add PMU to manage power supplies tegra: Set vdd_core and vdd_cpu to high tegra: Add EMC settings for Seaboard, Harmony Simon Glass (5): tegra: Move ap20.h header into arch location tegra: Add tegra_get_chip_type() to detect SKU tegra: Set up PMU for Nvidia boards tegra: Set up warmboot code on Nvidia boards tegra: Enable LP0 on Seaboard Yen Lin (5): Add AES crypto library tegra: Add crypto library for warmboot code tegra: Add flow, gp_padctl, fuse, sdram headers tegra: Add warmboot implementation tegra: Setup PMC scratch info from ap20 setup arch/arm/cpu/armv7/tegra2/Makefile | 8 +- arch/arm/cpu/armv7/tegra2/ap20.c | 32 +- arch/arm/cpu/armv7/tegra2/board.c | 4 +- arch/arm/cpu/armv7/tegra2/crypto.c | 234 ++++++++ arch/arm/cpu/armv7/tegra2/crypto.h | 36 ++ arch/arm/cpu/armv7/tegra2/emc.c | 165 ++++++ arch/arm/cpu/armv7/tegra2/pmu.c | 355 ++++++++++++ arch/arm/cpu/armv7/tegra2/warmboot.c | 444 +++++++++++++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.c | 312 ++++++++++ arch/arm/cpu/armv7/tegra2/warmboot_avp.h | 81 +++ .../tegra2 => include/asm/arch-tegra2}/ap20.h | 7 + arch/arm/include/asm/arch-tegra2/emc.h | 107 ++++ arch/arm/include/asm/arch-tegra2/flow.h | 36 ++ arch/arm/include/asm/arch-tegra2/fuse.h | 39 ++ arch/arm/include/asm/arch-tegra2/gp_padctrl.h | 64 +++ arch/arm/include/asm/arch-tegra2/pmu.h | 63 ++ arch/arm/include/asm/arch-tegra2/sdram_param.h | 148 +++++ arch/arm/include/asm/arch-tegra2/tegra2.h | 26 + arch/arm/include/asm/arch-tegra2/warmboot.h | 81 +++ board/nvidia/common/Makefile | 1 + board/nvidia/common/board.c | 37 ++ board/nvidia/common/emc.c | 295 ++++++++++ board/nvidia/common/emc.h | 29 + include/aes.h | 70 +++ include/configs/seaboard.h | 7 + include/configs/tegra2-common.h | 17 + lib/Makefile | 1 + lib/aes.c | 599 ++++++++++++++++++++ 28 files changed, 3294 insertions(+), 4 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/crypto.c create mode 100644 arch/arm/cpu/armv7/tegra2/crypto.h create mode 100644 arch/arm/cpu/armv7/tegra2/emc.c create mode 100644 arch/arm/cpu/armv7/tegra2/pmu.c create mode 100644 arch/arm/cpu/armv7/tegra2/warmboot.c create mode 100644 arch/arm/cpu/armv7/tegra2/warmboot_avp.c create mode 100644 arch/arm/cpu/armv7/tegra2/warmboot_avp.h rename arch/arm/{cpu/armv7/tegra2 => include/asm/arch-tegra2}/ap20.h (96%) create mode 100644 arch/arm/include/asm/arch-tegra2/emc.h create mode 100644 arch/arm/include/asm/arch-tegra2/flow.h create mode 100644 arch/arm/include/asm/arch-tegra2/fuse.h create mode 100644 arch/arm/include/asm/arch-tegra2/gp_padctrl.h create mode 100644 arch/arm/include/asm/arch-tegra2/pmu.h create mode 100644 arch/arm/include/asm/arch-tegra2/sdram_param.h create mode 100644 arch/arm/include/asm/arch-tegra2/warmboot.h create mode 100644 board/nvidia/common/emc.c create mode 100644 board/nvidia/common/emc.h create mode 100644 include/aes.h create mode 100644 lib/aes.c -- 1.7.3.1

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