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September 2010
- 184 participants
- 469 discussions

22 Sep '10
This patch series add full relocation and cache support for arm
based boards. I test this for arm1136, arm_cortexa8 and arm926ejs
based boards.
Relocation support:
!! This change is not compatible to old code !!
If you want to compile in old style, you can set
CONFIG_SYS_ARM_WITHOUT_RELOC
but this possibility will be removed soon, so please
adapt your board(s)
changed arch/arm/lib/board.c to get inline with arch/powerpc/lib/board.c
maybe it is possible to snyc them to one arch/generic/lib/board.c?
This approach is similiar to powerpc, so there is a need for
an initial stack pointer addr defined through CONFIG_SYS_INIT_SP_ADDR.
Please also read doc/README.arm-relocation There is more
info what is done, and maybe should be done.
Cache support:
I used the patches from Alessandro Rubini:
http://lists.denx.de/pipermail/u-boot/2010-January/067099.html
and rebased them to actual code. Also, in case of full relocation,
the position of the TLB can not be set on compile time, instead
it is calculated in board_init_f() and stored in gd. Also added
cache support for arm_cortexa8 and arm1136.
Heiko Schocher (26):
arm: get rid of bi_env
ARM: flush cache for arm926
ARM: cp15: setup mmu and enable dcache
ARM V7 (OMAP): add data cache support, test on Beagle board
ARM (ARM11): add data cache support, test on Qong board
relocation: fixup cmdtable
common: move TOTAL_MALLOC_LEN to include/common.h
i2c: fix command usage help
disk/part.c: fix relocation fixup
i2c, omap24xx: set bus_initialized only after relocation.
nand_boot_fsl_nfc.c: make "nfc" a "static const" pointer
ARM: add relocation support
ARM: implement relocation for ARM11
ARM: implement relocation for ARM V7 (OMAP)
ARM: implement relocation for ARM926
ARM: implement relocation for ARM920
ARM: implement relocation for ARM925
ARM: implement relocation for ARM946
ARM: implement relocation for pxa
ARM: implement relocation for ixp
ARM: implement relocation for sa1100
ARM: implement relocation for s3c44b0
ARM: implement relocation for lh7a40x
ARM: implement relocation for arm_intcm
ARM: implement relocation for arm720t
ARM: implement relocation for arm1176
arch/arm/config.mk | 8 +
arch/arm/cpu/arm1136/start.S | 206 +++++++++++++++
arch/arm/cpu/arm1136/u-boot.lds | 14 +-
arch/arm/cpu/arm1176/start.S | 286 ++++++++++++++++++++
arch/arm/cpu/arm1176/u-boot.lds | 14 +-
arch/arm/cpu/arm720t/start.S | 170 ++++++++++++
arch/arm/cpu/arm720t/u-boot.lds | 14 +-
arch/arm/cpu/arm920t/start.S | 225 ++++++++++++++++-
arch/arm/cpu/arm920t/u-boot.lds | 14 +-
arch/arm/cpu/arm925t/start.S | 204 ++++++++++++++-
arch/arm/cpu/arm925t/u-boot.lds | 14 +-
arch/arm/cpu/arm926ejs/orion5x/dram.c | 24 ++-
arch/arm/cpu/arm926ejs/start.S | 172 ++++++++++++-
arch/arm/cpu/arm926ejs/u-boot.lds | 14 +-
arch/arm/cpu/arm946es/start.S | 168 ++++++++++++-
arch/arm/cpu/arm946es/u-boot.lds | 14 +-
arch/arm/cpu/arm_intcm/start.S | 166 ++++++++++++
arch/arm/cpu/arm_intcm/u-boot.lds | 14 +-
arch/arm/cpu/armv7/mx51/u-boot.lds | 14 +-
arch/arm/cpu/armv7/omap3/cache.S | 82 ++++++
arch/arm/cpu/armv7/omap3/emif4.c | 34 +++
arch/arm/cpu/armv7/omap3/sdrc.c | 38 +++
arch/arm/cpu/armv7/start.S | 191 +++++++++++++-
arch/arm/cpu/armv7/u-boot.lds | 14 +-
arch/arm/cpu/ixp/start.S | 280 ++++++++++++++++++++
arch/arm/cpu/ixp/u-boot.lds | 14 +-
arch/arm/cpu/lh7a40x/start.S | 187 +++++++++++++-
arch/arm/cpu/lh7a40x/u-boot.lds | 14 +-
arch/arm/cpu/pxa/start.S | 168 ++++++++++++
arch/arm/cpu/pxa/u-boot.lds | 14 +-
arch/arm/cpu/s3c44b0/start.S | 174 ++++++++++++
arch/arm/cpu/s3c44b0/u-boot.lds | 14 +-
arch/arm/cpu/sa1100/start.S | 162 ++++++++++++
arch/arm/cpu/sa1100/u-boot.lds | 14 +-
arch/arm/include/asm/config.h | 3 +-
arch/arm/include/asm/global_data.h | 11 +
arch/arm/include/asm/u-boot-arm.h | 14 +-
arch/arm/include/asm/u-boot.h | 4 -
arch/arm/lib/board.c | 468 ++++++++++++++++++++++++++++++++-
arch/arm/lib/cache-cp15.c | 82 ++++++
arch/arm/lib/cache.c | 13 +-
arch/arm/lib/interrupts.c | 19 ++-
arch/avr32/include/asm/u-boot.h | 1 -
arch/avr32/lib/board.c | 25 +--
arch/i386/include/asm/u-boot.h | 4 -
arch/m68k/lib/board.c | 35 +---
arch/mips/include/asm/u-boot.h | 2 -
arch/mips/lib/board.c | 36 +---
arch/powerpc/lib/board.c | 10 -
arch/sparc/lib/board.c | 28 +--
board/davedenx/qong/config.mk | 4 +-
board/davedenx/qong/qong.c | 87 ++++---
board/karo/tx25/config.mk | 4 +-
board/karo/tx25/tx25.c | 11 +-
board/keymile/km_arm/km_arm.c | 24 ++
board/logicpd/imx27lite/config.mk | 2 +-
board/logicpd/imx27lite/imx27lite.c | 15 +-
board/ti/beagle/config.mk | 2 +-
common/cmd_bdinfo.c | 12 +-
common/cmd_bmp.c | 6 +
common/cmd_i2c.c | 9 +
common/command.c | 37 +++
disk/part.c | 11 +-
doc/README.arm-relocation | 321 ++++++++++++++++++++++
drivers/i2c/omap24xx_i2c.c | 4 +-
include/command.h | 3 +
include/common.h | 9 +
include/configs/da850evm.h | 6 +-
include/configs/imx27lite-common.h | 5 +
include/configs/km_arm.h | 4 +
include/configs/omap3_beagle.h | 6 +
include/configs/qong.h | 11 +
include/configs/tx25.h | 13 +-
nand_spl/board/karo/tx25/u-boot.lds | 14 +-
nand_spl/nand_boot.c | 7 +
nand_spl/nand_boot_fsl_nfc.c | 13 +-
76 files changed, 4320 insertions(+), 230 deletions(-)
create mode 100644 doc/README.arm-relocation
- changes since previous patch set
- add CONFIG_SYS_ARM_WITHOUT_RELOC
- changed order of patches -> cache patches are independent
from relocation patches
- add missing cpu types:
arm1176 arm720t arm920t arm925t arm946es arm_intcm
ixp lh7a40x pxa s3c44b0 sa1100
- only converted boards which I had tested
- rebased againt current top of tree
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
8
59

[U-Boot] [PATCH] ARMV7: OMAP4: Fix Panda pinmux setting to enable Wifi/BT Module
by Steve Sakoman 22 Sep '10
by Steve Sakoman 22 Sep '10
22 Sep '10
This patch corrects the pinmux settings to enable proper functioning
of the wifi/bluetooth module.
Signed-off-by: Steve Sakoman <steve(a)sakoman.com>
---
board/ti/panda/panda.h | 18 +++++++++---------
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/board/ti/panda/panda.h b/board/ti/panda/panda.h
index eb1f021..e3d090e 100644
--- a/board/ti/panda/panda.h
+++ b/board/ti/panda/panda.h
@@ -53,7 +53,7 @@ const struct pad_conf_entry core_padconf_array[] = {
{GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row7 */
{GPMC_A20, (IEN | M3)}, /* gpio_44 */
{GPMC_A21, (M3)}, /* gpio_45 */
- {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col6 */
+ {GPMC_A22, (M3)}, /* gpio_46 */
{GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col7 */
{GPMC_A24, (PTD | M3)}, /* gpio_48 */
{GPMC_A25, (PTD | M3)}, /* gpio_49 */
@@ -69,9 +69,9 @@ const struct pad_conf_entry core_padconf_array[] = {
{GPMC_NBE0_CLE, (M3)}, /* gpio_59 */
{GPMC_NBE1, (PTD | M3)}, /* gpio_60 */
{GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */
- {GPMC_WAIT1, (IEN | M3)}, /* gpio_62 */
+ {GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */
{C2C_DATA11, (PTD | M3)}, /* gpio_100 */
- {C2C_DATA12, (M1)}, /* dsi1_te0 */
+ {C2C_DATA12, (PTU | IEN | M3)}, /* gpio_101 */
{C2C_DATA13, (PTD | M3)}, /* gpio_102 */
{C2C_DATA14, (M1)}, /* dsi2_te0 */
{C2C_DATA15, (PTD | M3)}, /* gpio_104 */
@@ -189,12 +189,12 @@ const struct pad_conf_entry core_padconf_array[] = {
{USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */
{USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_169 */
{USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_170 */
- {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col0 */
+ {UNIPRO_TX0, (PTD | IEN | M3)}, /* gpio_171 */
{UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */
{UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */
{UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */
- {UNIPRO_TX2, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_0 */
- {UNIPRO_TY2, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_1 */
+ {UNIPRO_TX2, (PTU | IEN | M3)}, /* gpio_0 */
+ {UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */
{UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */
{UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */
{UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */
@@ -205,7 +205,7 @@ const struct pad_conf_entry core_padconf_array[] = {
{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */
{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */
{FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */
- {FREF_CLK2_OUT, (M0)}, /* fref_clk2_out */
+ {FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */
{SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */
{SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */
{SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */
@@ -230,7 +230,7 @@ const struct pad_conf_entry core_padconf_array[] = {
{DPM_EMU13, (IEN | M5)}, /* dispc2_data6 */
{DPM_EMU14, (IEN | M5)}, /* dispc2_data5 */
{DPM_EMU15, (IEN | M5)}, /* dispc2_data4 */
- {DPM_EMU16, (IEN | M5)}, /* dispc2_data3 */
+ {DPM_EMU16, (M3)}, /* gpio_27 */
{DPM_EMU17, (IEN | M5)}, /* dispc2_data2 */
{DPM_EMU18, (IEN | M5)}, /* dispc2_data1 */
{DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */
@@ -248,7 +248,7 @@ const struct pad_conf_entry wkup_padconf_array[] = {
{PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */
{PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */
{PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */
- {PAD1_FREF_CLK3_REQ, (PTU | IEN | M0)}, /* # */
+ {PAD1_FREF_CLK3_REQ, (M3)}, /* gpio_wk30 */
{PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
{PAD1_FREF_CLK4_REQ, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* led status_1 */
{PAD0_FREF_CLK4_OUT, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* led status_2 */
--
1.7.0.4
2
1
Add support for the DIU controller. If CONFIG_VIDEO is defined, then the
console will appear on a DVI monitor instead of the serial port.
Signed-off-by: Timur Tabi <timur(a)freescale.com>
---
This patch depends on:
[v3] fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features
board/freescale/p1022ds/Makefile | 2 +
board/freescale/p1022ds/diu.c | 172 ++++++++++++++++++++++++++++++++++++++
include/configs/P1022DS.h | 7 ++-
3 files changed, 180 insertions(+), 1 deletions(-)
create mode 100644 board/freescale/p1022ds/diu.c
diff --git a/board/freescale/p1022ds/Makefile b/board/freescale/p1022ds/Makefile
index 8ede2d6..678eb2a 100644
--- a/board/freescale/p1022ds/Makefile
+++ b/board/freescale/p1022ds/Makefile
@@ -16,6 +16,8 @@ COBJS-y += ddr.o
COBJS-y += law.o
COBJS-y += tlb.o
+COBJS-$(CONFIG_FSL_DIU_FB) += diu.o
+
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c
new file mode 100644
index 0000000..be6e9a8
--- /dev/null
+++ b/board/freescale/p1022ds/diu.c
@@ -0,0 +1,172 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ * Authors: Timur Tabi <timur(a)freescale.com>
+ *
+ * FSL DIU Framebuffer driver
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_FSL_DIU_FB
+
+#include "../common/ngpixis.h"
+#include "../common/fsl_diu_fb.h"
+
+#ifdef CONFIG_VIDEO
+#include <stdio_dev.h>
+#include <video_fb.h>
+#endif
+
+#define PX_BRDCFG0_ELBC_DIU 0x02
+
+#define PX_BRDCFG1_DVIEN 0x80
+#define PX_BRDCFG1_DFPEN 0x40
+#define PX_BRDCFG1_BACKLIGHT 0x20
+#define PX_BRDCFG1_DDCEN 0x10
+
+/*
+ * DIU Area Descriptor
+ *
+ * Note that we need to byte-swap the value before it's written to the AD
+ * register. So even though the registers don't look like they're in the same
+ * bit positions as they are on the MPC8610, the same value is written to the
+ * AD register on the MPC8610 and on the P1022.
+ */
+#define AD_BYTE_F 0x10000000
+#define AD_ALPHA_C_MASK 0x0E000000
+#define AD_ALPHA_C_SHIFT 25
+#define AD_BLUE_C_MASK 0x01800000
+#define AD_BLUE_C_SHIFT 23
+#define AD_GREEN_C_MASK 0x00600000
+#define AD_GREEN_C_SHIFT 21
+#define AD_RED_C_MASK 0x00180000
+#define AD_RED_C_SHIFT 19
+#define AD_PALETTE 0x00040000
+#define AD_PIXEL_S_MASK 0x00030000
+#define AD_PIXEL_S_SHIFT 16
+#define AD_COMP_3_MASK 0x0000F000
+#define AD_COMP_3_SHIFT 12
+#define AD_COMP_2_MASK 0x00000F00
+#define AD_COMP_2_SHIFT 8
+#define AD_COMP_1_MASK 0x000000F0
+#define AD_COMP_1_SHIFT 4
+#define AD_COMP_0_MASK 0x0000000F
+#define AD_COMP_0_SHIFT 0
+
+#define AD_DEFAULT
+static int xres, yres;
+
+void diu_set_pixel_clock(unsigned int pixclock)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ unsigned long speed_ccb, temp;
+ u32 pixval;
+
+ speed_ccb = get_bus_freq(0);
+ temp = 1000000000 / pixclock;
+ temp *= 1000;
+ pixval = speed_ccb / temp;
+ debug("DIU pixval = %lu\n", pixval);
+
+ /* Modify PXCLK in GUTS CLKDVDR */
+ temp = in_be32(&gur->clkdvdr) & 0x2000FFFF;
+ out_be32(&gur->clkdvdr, temp); /* turn off clock */
+ out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16));
+}
+
+int p1022ds_diu_init(void)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ char *monitor_port;
+ u32 pixel_format;
+ u8 temp;
+
+ pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) |
+ (0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) |
+ (2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) |
+ (8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) |
+ (8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT));
+
+ temp = in_8(&pixis->brdcfg1);
+
+ monitor_port = getenv("monitor");
+ if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */
+ xres = 1024;
+ yres = 768;
+ /* Enable the DFP port, disable the DVI and the backlight */
+ temp &= ~(PX_BRDCFG1_DVIEN | PX_BRDCFG1_BACKLIGHT);
+ temp |= PX_BRDCFG1_DFPEN;
+ } else { /* DVI */
+ xres = 1280;
+ yres = 1024;
+ /* Enable the DVI port, disable the DFP and the backlight */
+ temp &= ~(PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT);
+ temp |= PX_BRDCFG1_DVIEN;
+ }
+
+ out_8(&pixis->brdcfg1, temp);
+
+ /*
+ * Route the LAD pins to the DIU. This will disable access to the eLBC,
+ * which means we won't be able to read/write any NOR flash addresses!
+ */
+ out_8(&pixis->brdcfg0, in_8(&pixis->brdcfg0) | PX_BRDCFG0_ELBC_DIU);
+ /* we must do the dummy read from eLBC to sync the write as above */
+ in_8(&pixis->brdcfg0);
+
+ /* Setting PMUXCR to switch to DVI from ELBC */
+ /* Set pmuxcr to allow both i2c1 and i2c2 */
+ clrsetbits_be32(&gur->pmuxcr, 0xc0000000, 0x40000000);
+ in_be32(&gur->pmuxcr);
+
+ return fsl_diu_init(xres, pixel_format, 0);
+}
+
+#ifdef CONFIG_VIDEO
+
+/*
+ * The Graphic Device
+ */
+static GraphicDevice ctfb;
+
+void *video_hw_init(void)
+{
+ struct fb_info *info;
+
+ if (p1022ds_diu_init() < 0)
+ return NULL;
+
+ /* fill in Graphic device struct */
+ sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", xres, yres, 32, 64, 60);
+
+ ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info);
+ ctfb.winSizeX = xres;
+ ctfb.winSizeY = yres;
+ ctfb.plnSizeX = ctfb.winSizeX;
+ ctfb.plnSizeY = ctfb.winSizeY;
+
+ ctfb.gdfBytesPP = 4;
+ ctfb.gdfIndex = GDF_32BIT_X888RGB;
+
+ ctfb.isaBase = 0;
+ ctfb.pciBase = 0;
+ ctfb.memSize = info->screen_size;
+
+ /* Cursor Start Address */
+ ctfb.dprBase = 0;
+ ctfb.vprBase = 0;
+ ctfb.cprBase = 0;
+
+ return &ctfb;
+}
+
+#endif
+
+#endif
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index dcaca2b..d518c69 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -31,6 +31,7 @@
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
#define CONFIG_SYS_HAS_SERDES /* has SERDES */
+#define CONFIG_FSL_DIU_FB /* Has a DIU video controller */
#define CONFIG_PHYS_64BIT
#define CONFIG_ENABLE_36BIT_PHYS
@@ -181,10 +182,14 @@
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000)
/* Video */
-/* #define CONFIG_VIDEO */
+#undef CONFIG_VIDEO
+
#ifdef CONFIG_VIDEO
+#define CONFIG_CMD_BMP
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
#endif
/*
--
1.7.2.1
4
11
The current documentation for the "scrub" option implies it takes no
options at all. This can be annoying when you only want to scrub a
few blocks and not an entire device. Good thing the code already
supports this though since it takes the same arguments as the "erase"
option. Inform people!
Signed-off-by: Mike Frysinger <vapier(a)gentoo.org>
---
common/cmd_nand.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 3f1d077..7c77983 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -593,6 +593,7 @@ U_BOOT_CMD(
"nand bad - show bad blocks\n"
"nand dump[.oob] off - dump page\n"
"nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n"
+ " takes the same options as erase\n"
"nand markbad off [...] - mark bad block(s) at offset (UNSAFE)\n"
"nand biterr off - make a bit error at offset (UNSAFE)"
#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
--
1.7.3
2
1
Fixes build breakage in da830evm after commit
97003756249bd790910417eb66f0039bbf06a02c "da8xx: fixup ARM
relocation support"
The da8xx fixup commit changed da830/da850 common code to make
relocation work in da850, but didn't add the required defines
to da830evm_config.h resulting in build failure in the common code.
This patch adds those defines for da830, but makes no sense without
also referring to the commit mentioned above.
Signed-off-by: Nick Thompson <nick.thompson(a)ge.com>
---
include/configs/da830evm.h | 11 +++++++++--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h
index 160ece2..b281e5f 100644
--- a/include/configs/da830evm.h
+++ b/include/configs/da830evm.h
@@ -48,8 +48,7 @@
*/
#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */
-#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
-#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
+#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest start addr */
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) /* 16MB test */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
@@ -281,4 +280,12 @@
"mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST
#endif
+#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
+
+/* additions for new relocation code, must be added to all boards */
+#undef CONFIG_SYS_ARM_WITHOUT_RELOC
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 0x1000 - CONFIG_SYS_GBL_DATA_SIZE)
+
#endif /* __CONFIG_H */
--
1.7.0.4
2
5

22 Sep '10
Fixes build breakage in da830evm after commit
97003756249bd790910417eb66f0039bbf06a02c "da8xx: fixup ARM
relocation support"
The da8xx fixup commit changed da830/da850 common code to make
relocation work in da850, but didn't add the required defines
to da830evm_config.h resulting in build failure in the common code.
This patch adds those defines for da830, but makes no sense without
also referring to the commit mentioned above.
Signed-off-by: Nick Thompson <nick.thompson(a)ge.com>
---
Changes since v1:
removed CONFIG_SKIP_RELOCATE_UBOOT
include/configs/da830evm.h | 12 +++++++++---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h
index 160ece2..ca44e09 100644
--- a/include/configs/da830evm.h
+++ b/include/configs/da830evm.h
@@ -41,15 +41,13 @@
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_HZ 1000
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
/*
* Memory Info
*/
#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */
-#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
-#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
+#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest start addr */
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) /* 16MB test */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
@@ -281,4 +279,12 @@
"mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST
#endif
+#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
+
+/* additions for new relocation code, must be added to all boards */
+#undef CONFIG_SYS_ARM_WITHOUT_RELOC
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 0x1000 - CONFIG_SYS_GBL_DATA_SIZE)
+
#endif /* __CONFIG_H */
--
1.7.0.4
2
1

[U-Boot] [PATCH 3/5 v2] ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specific
by Stefan Roese 22 Sep '10
by Stefan Roese 22 Sep '10
22 Sep '10
Signed-off-by: Stefan Roese <sr(a)denx.de>
---
v2:
- Removed all non-PPC4xx related files. Sorry for this.
arch/powerpc/cpu/ppc4xx/cpu_init.c | 2 +-
arch/powerpc/cpu/ppc4xx/gpio.c | 2 +-
arch/powerpc/include/asm/{gpio.h => ppc4xx-gpio.h} | 0
board/amcc/acadia/memory.c | 2 +-
board/amcc/bamboo/bamboo.c | 2 +-
board/amcc/canyonlands/canyonlands.c | 2 +-
board/amcc/katmai/katmai.c | 2 +-
board/amcc/makalu/makalu.c | 2 +-
board/amcc/sequoia/sequoia.c | 2 +-
board/amcc/taihu/lcd.c | 2 +-
board/amcc/taihu/taihu.c | 2 +-
board/esd/pmc405de/pmc405de.c | 2 +-
board/gdsys/dlvision/dlvision.c | 2 +-
board/gdsys/intip/intip.c | 2 +-
board/korat/korat.c | 2 +-
board/lwmon5/lwmon5.c | 2 +-
board/mosaixtech/icon/icon.c | 2 +-
board/quad100hd/nand.c | 2 +-
board/quad100hd/quad100hd.c | 2 +-
board/t3corp/t3corp.c | 2 +-
board/zeus/update.c | 2 +-
board/zeus/zeus.c | 2 +-
post/board/lwmon5/watchdog.c | 2 +-
23 files changed, 22 insertions(+), 22 deletions(-)
rename arch/powerpc/include/asm/{gpio.h => ppc4xx-gpio.h} (100%)
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index 7a7954d..6456dc7 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -25,7 +25,7 @@
#include <watchdog.h>
#include <asm/ppc4xx-emac.h>
#include <asm/processor.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/ppc4xx.h>
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
diff --git a/arch/powerpc/cpu/ppc4xx/gpio.c b/arch/powerpc/cpu/ppc4xx/gpio.c
index c0d351a..1f9f93a 100644
--- a/arch/powerpc/cpu/ppc4xx/gpio.c
+++ b/arch/powerpc/cpu/ppc4xx/gpio.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#if defined(CONFIG_SYS_4xx_GPIO_TABLE)
gpio_param_s const gpio_tab[GPIO_GROUP_MAX][GPIO_MAX] = CONFIG_SYS_4xx_GPIO_TABLE;
diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/ppc4xx-gpio.h
similarity index 100%
rename from arch/powerpc/include/asm/gpio.h
rename to arch/powerpc/include/asm/ppc4xx-gpio.h
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c
index 8c2addc..703a668 100644
--- a/board/amcc/acadia/memory.c
+++ b/board/amcc/acadia/memory.c
@@ -29,7 +29,7 @@
#include <common.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
extern void board_pll_init_f(void);
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 99497b2..41957c9 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -23,7 +23,7 @@
#include <common.h>
#include <asm/processor.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <spd_sdram.h>
#include <asm/ppc440.h>
#include "bamboo.h"
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index ccc44f4..b26cadb 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -27,7 +27,7 @@
#include <asm/io.h>
#include <asm/mmu.h>
#include <asm/4xx_pcie.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/errno.h>
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 15cf703..7301cd5 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -30,7 +30,7 @@
#include <netdev.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/4xx_pcie.h>
#include <asm/errno.h>
diff --git a/board/amcc/makalu/makalu.c b/board/amcc/makalu/makalu.c
index 3e3fccd..483df66 100644
--- a/board/amcc/makalu/makalu.c
+++ b/board/amcc/makalu/makalu.c
@@ -26,7 +26,7 @@
#include <asm/ppc405.h>
#include <libfdt.h>
#include <asm/processor.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/io.h>
#include <fdt_support.h>
#include <asm/errno.h>
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index 1a6dfc1..4338e6b 100644
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -26,7 +26,7 @@
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/ppc4xx.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/bitops.h>
diff --git a/board/amcc/taihu/lcd.c b/board/amcc/taihu/lcd.c
index 9b2afda..15cfcb0 100644
--- a/board/amcc/taihu/lcd.c
+++ b/board/amcc/taihu/lcd.c
@@ -22,7 +22,7 @@
#include <common.h>
#include <command.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#define LCD_CMD_ADDR 0x50100002
#define LCD_DATA_ADDR 0x50100003
diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c
index dd2aba5..87c9403 100644
--- a/board/amcc/taihu/taihu.c
+++ b/board/amcc/taihu/taihu.c
@@ -29,7 +29,7 @@
#include <asm/io.h>
#include <spi.h>
#include <netdev.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
extern int lcd_init(void);
diff --git a/board/esd/pmc405de/pmc405de.c b/board/esd/pmc405de/pmc405de.c
index b84e08a..c266ebe 100644
--- a/board/esd/pmc405de/pmc405de.c
+++ b/board/esd/pmc405de/pmc405de.c
@@ -26,7 +26,7 @@
#include <fdt_support.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/4xx_pci.h>
#include <command.h>
#include <malloc.h>
diff --git a/board/gdsys/dlvision/dlvision.c b/board/gdsys/dlvision/dlvision.c
index ff5f183..3499bdc 100644
--- a/board/gdsys/dlvision/dlvision.c
+++ b/board/gdsys/dlvision/dlvision.c
@@ -25,7 +25,7 @@
#include <command.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
enum {
HWTYPE_DLVISION_CPU = 0,
diff --git a/board/gdsys/intip/intip.c b/board/gdsys/intip/intip.c
index 8d83198..aa85ea4 100644
--- a/board/gdsys/intip/intip.c
+++ b/board/gdsys/intip/intip.c
@@ -31,7 +31,7 @@
#include <asm/io.h>
#include <asm/mmu.h>
#include <asm/4xx_pcie.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
diff --git a/board/korat/korat.c b/board/korat/korat.c
index cdcd8c9..afa36d6 100644
--- a/board/korat/korat.c
+++ b/board/korat/korat.c
@@ -31,7 +31,7 @@
#include <libfdt.h>
#include <asm/ppc440.h>
#include <asm/bitops.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/io.h>
#include <asm/ppc4xx-uic.h>
#include <asm/processor.h>
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index aec0263..0c6f4e5 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -22,7 +22,7 @@
#include <command.h>
#include <asm/ppc440.h>
#include <asm/processor.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/mosaixtech/icon/icon.c b/board/mosaixtech/icon/icon.c
index 70b03dc..e09dbc3 100644
--- a/board/mosaixtech/icon/icon.c
+++ b/board/mosaixtech/icon/icon.c
@@ -30,7 +30,7 @@
#include <netdev.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/4xx_pcie.h>
#include <asm/errno.h>
#include <asm/mmu.h>
diff --git a/board/quad100hd/nand.c b/board/quad100hd/nand.c
index 35525bc..a222099 100644
--- a/board/quad100hd/nand.c
+++ b/board/quad100hd/nand.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <config.h>
#if defined(CONFIG_CMD_NAND)
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/io.h>
#include <nand.h>
diff --git a/board/quad100hd/quad100hd.c b/board/quad100hd/quad100hd.c
index f878c49..2f72d2b 100644
--- a/board/quad100hd/quad100hd.c
+++ b/board/quad100hd/quad100hd.c
@@ -33,7 +33,7 @@
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/t3corp/t3corp.c b/board/t3corp/t3corp.c
index 26568e2..04d6a2e 100644
--- a/board/t3corp/t3corp.c
+++ b/board/t3corp/t3corp.c
@@ -27,7 +27,7 @@
#include <asm/io.h>
#include <asm/mmu.h>
#include <asm/4xx_pcie.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
int board_early_init_f(void)
{
diff --git a/board/zeus/update.c b/board/zeus/update.c
index 6119627..141f14b 100644
--- a/board/zeus/update.c
+++ b/board/zeus/update.c
@@ -26,7 +26,7 @@
#include <command.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <i2c.h>
#if defined(CONFIG_ZEUS)
diff --git a/board/zeus/zeus.c b/board/zeus/zeus.c
index 4e6878a..a29e518 100644
--- a/board/zeus/zeus.c
+++ b/board/zeus/zeus.c
@@ -30,7 +30,7 @@
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/post/board/lwmon5/watchdog.c b/post/board/lwmon5/watchdog.c
index 44f0488..f181506 100644
--- a/post/board/lwmon5/watchdog.c
+++ b/post/board/lwmon5/watchdog.c
@@ -34,7 +34,7 @@
#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#include <watchdog.h>
-#include <asm/gpio.h>
+#include <asm/ppc4xx-gpio.h>
#include <asm/io.h>
static uint watchdog_magic_read(void)
--
1.7.2.3
2
1

22 Sep '10
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.
Signed-off-by: Stefan Roese <sr(a)denx.de>
Acked-by: Detlev Zundel <dzu(a)denx.de>
---
v2: Rebased with patches to switch to common NS16550 UART driver
README | 12 ------------
arch/i386/lib/board.c | 7 -------
arch/m68k/lib/board.c | 4 ----
arch/powerpc/lib/board.c | 7 -------
arch/sparc/lib/board.c | 4 ----
common/stdio.c | 8 --------
doc/README.ppc440 | 6 ------
include/common.h | 8 --------
include/configs/AP1000.h | 6 ------
include/configs/ATUM8548.h | 1 -
include/configs/JSE.h | 6 ------
include/configs/KAREF.h | 1 -
include/configs/METROBOX.h | 1 -
include/configs/ML2.h | 10 ----------
include/configs/MPC8308RDB.h | 1 -
include/configs/MPC8315ERDB.h | 1 -
include/configs/MPC8323ERDB.h | 1 -
include/configs/MPC832XEMDS.h | 1 -
include/configs/MPC8349EMDS.h | 1 -
include/configs/MPC8349ITX.h | 1 -
include/configs/MPC8360EMDS.h | 1 -
include/configs/MPC8360ERDK.h | 1 -
include/configs/MPC837XEMDS.h | 1 -
include/configs/MPC837XERDB.h | 1 -
include/configs/MPC8536DS.h | 1 -
include/configs/MPC8540ADS.h | 1 -
include/configs/MPC8540EVAL.h | 1 -
include/configs/MPC8541CDS.h | 1 -
include/configs/MPC8544DS.h | 1 -
include/configs/MPC8548CDS.h | 1 -
include/configs/MPC8555CDS.h | 1 -
include/configs/MPC8568MDS.h | 1 -
include/configs/MPC8569MDS.h | 1 -
include/configs/MPC8572DS.h | 1 -
include/configs/MPC8610HPCD.h | 1 -
include/configs/MPC8641HPCN.h | 1 -
include/configs/MVBLM7.h | 1 -
include/configs/P1_P2_RDB.h | 1 -
include/configs/P2020DS.h | 1 -
include/configs/PM854.h | 1 -
include/configs/SBC8540.h | 1 -
include/configs/TQM834x.h | 1 -
include/configs/TQM85xx.h | 1 -
include/configs/aria.h | 1 -
include/configs/bubinga.h | 1 -
include/configs/dlvision.h | 1 -
include/configs/eNET.h | 1 -
include/configs/ebony.h | 1 -
include/configs/hcu5.h | 1 -
include/configs/kmeter1.h | 1 -
include/configs/mcu25.h | 7 -------
include/configs/mecp5123.h | 1 -
include/configs/mpc5121ads.h | 1 -
include/configs/neo.h | 1 -
include/configs/ocotea.h | 1 -
include/configs/sbc8349.h | 1 -
include/configs/sbc8548.h | 1 -
include/configs/sbc8560.h | 1 -
include/configs/sbc8641d.h | 1 -
include/configs/sc3.h | 8 --------
include/configs/socrates.h | 1 -
include/configs/stxssa.h | 1 -
include/configs/taihu.h | 1 -
include/configs/vme8349.h | 1 -
include/configs/walnut.h | 1 -
include/configs/yucca.h | 1 -
66 files changed, 0 insertions(+), 146 deletions(-)
diff --git a/README b/README
index c7a8e9d..feb51ab 100644
--- a/README
+++ b/README
@@ -532,18 +532,6 @@ The following options need to be configured:
must be defined, to setup the maximum idle timeout for
the SMC.
-- Interrupt driven serial port input:
- CONFIG_SERIAL_SOFTWARE_FIFO
-
- PPC405GP only.
- Use an interrupt handler for receiving data on the
- serial port. It also enables using hardware handshake
- (RTS/CTS) and UART's built-in FIFO. Set the number of
- bytes the interrupt driven input buffer should have.
-
- Leave undefined to disable this feature, including
- disable the buffer and hardware handshake.
-
- Boot Delay: CONFIG_BOOTDELAY - in seconds
Delay before automatically booting the default image;
set to -1 to disable autoboot.
diff --git a/arch/i386/lib/board.c b/arch/i386/lib/board.c
index 93f910b..5002203 100644
--- a/arch/i386/lib/board.c
+++ b/arch/i386/lib/board.c
@@ -335,13 +335,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
enable_interrupts();
show_boot_progress(0x28);
- /* Must happen after interrupts are initialized since
- * an irq handler gets installed
- */
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
- serial_buffered_init();
-#endif
-
#ifdef CONFIG_STATUS_LED
status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c
index ae9478a..c29f577 100644
--- a/arch/m68k/lib/board.c
+++ b/arch/m68k/lib/board.c
@@ -569,10 +569,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
*/
timer_init();
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
- serial_buffered_init();
-#endif
-
#ifdef CONFIG_STATUS_LED
status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 94348e6..8f6a7c9 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -901,13 +901,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
*/
interrupt_init ();
- /* Must happen after interrupts are initialized since
- * an irq handler gets installed
- */
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
- serial_buffered_init();
-#endif
-
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c
index d0890f6..09bcdb0 100644
--- a/arch/sparc/lib/board.c
+++ b/arch/sparc/lib/board.c
@@ -359,10 +359,6 @@ void board_init_f(ulong bootflag)
/* Initialize the console (after the relocation and devices init) */
console_init_r();
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
- serial_buffered_init();
-#endif
-
#ifdef CONFIG_STATUS_LED
status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
diff --git a/common/stdio.c b/common/stdio.c
index 870ddfd..2501369 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -76,18 +76,10 @@ static void drv_system_init (void)
strcpy (dev.name, "serial");
dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
- dev.putc = serial_buffered_putc;
- dev.puts = serial_buffered_puts;
- dev.getc = serial_buffered_getc;
- dev.tstc = serial_buffered_tstc;
-#else
dev.putc = serial_putc;
dev.puts = serial_puts;
dev.getc = serial_getc;
dev.tstc = serial_tstc;
-#endif
-
stdio_register (&dev);
#ifdef CONFIG_SYS_DEVICE_NULLDEV
diff --git a/doc/README.ppc440 b/doc/README.ppc440
index 1b96458..dd8ccaa 100644
--- a/doc/README.ppc440
+++ b/doc/README.ppc440
@@ -77,12 +77,6 @@ This is controlled with the CONFIG_SYS_EXT_SERIAL_CLOCK flag. When using
internal clocking, the "ideal baud rate" settings in the 440GP
user manual are automatically calculated.
-CONFIG_SERIAL_SOFTWARE_FIFO enables interrupt-driven serial operation.
-But the last time I checked, interrupts were initialized after the
-serial port causing the interrupt handler to be removed from the
-handler table. This will probably be fixed soon ... or fix it
-yourself and submit a patch :-)
-
I2C
=================
diff --git a/include/common.h b/include/common.h
index d618227..0a64c71 100644
--- a/include/common.h
+++ b/include/common.h
@@ -214,14 +214,6 @@ typedef void (interrupt_handler_t)(void *);
* Function Prototypes
*/
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-void serial_buffered_init (void);
-void serial_buffered_putc (const char);
-void serial_buffered_puts (const char *);
-int serial_buffered_getc (void);
-int serial_buffered_tstc (void);
-#endif /* CONFIG_SERIAL_SOFTWARE_FIFO */
-
void hang (void) __attribute__ ((noreturn));
/* */
diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h
index ae0a873..e707075 100644
--- a/include/configs/AP1000.h
+++ b/include/configs/AP1000.h
@@ -52,12 +52,6 @@
#define CONFIG_BOOTCOMMAND "" /* autoboot command */
-/* Size (bytes) of interrupt driven serial port buffer.
- * Set to 0 to use polling instead of interrupts.
- * Setting to 0 will also disable RTS/CTS handshaking.
- */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-
#define CONFIG_BOOTARGS "console=ttyS0,57600"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index c133033..58f0c1f 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -200,7 +200,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index c692b54..b0b1175 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -105,12 +105,6 @@
/* Set console baudrate to 9600 */
#define CONFIG_BAUDRATE 9600
-/* Size (bytes) of interrupt driven serial port buffer.
- * Set to 0 to use polling instead of interrupts.
- * Setting to 0 will also disable RTS/CTS handshaking.
- */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-
/*
* Configuration related to auto-boot.
*
diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h
index f936ae5..a44d8fa 100644
--- a/include/configs/KAREF.h
+++ b/include/configs/KAREF.h
@@ -95,7 +95,6 @@
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SERIAL_MULTI 1
#define CONFIG_BAUDRATE 9600
diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h
index 7f2542c..d805a24 100644
--- a/include/configs/METROBOX.h
+++ b/include/configs/METROBOX.h
@@ -157,7 +157,6 @@
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SERIAL_MULTI 1
#define CONFIG_BAUDRATE 9600
diff --git a/include/configs/ML2.h b/include/configs/ML2.h
index 5fcc173..2fc0119 100644
--- a/include/configs/ML2.h
+++ b/include/configs/ML2.h
@@ -52,16 +52,6 @@
#define CONFIG_PREBOOT "fsload 0x00100000 /boot/image"
-/* Size (bytes) of interrupt driven serial port buffer.
- * Set to 0 to use polling instead of interrupts.
- * Setting to 0 will also disable RTS/CTS handshaking.
- */
-#if 0
-#define CONFIG_SERIAL_SOFTWARE_FIFO 4000
-#else
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#endif
-
#if 0
#define CONFIG_BOOTARGS "root=/dev/nfs " \
"ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 6cd5da7..c6f12bd 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -279,7 +279,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index f1b110b..7007255 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -298,7 +298,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 9a296a1..590005d 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -262,7 +262,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 68ff191..9957756 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -273,7 +273,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 73dbea4..eaa8a9d 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -283,7 +283,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 9be571f..4c6c273 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -329,7 +329,6 @@ boards, we say we have two, but don't display a message if we find only one. */
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index c58e003..c8db10b 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -307,7 +307,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h
index 9fa577d..2685dee 100644
--- a/include/configs/MPC8360ERDK.h
+++ b/include/configs/MPC8360ERDK.h
@@ -237,7 +237,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 9092755..bdf8a2a 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -299,7 +299,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 79dadc4..675021c 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -316,7 +316,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 2a3c058..0a9f47b 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -400,7 +400,6 @@
* shorted - index 1
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 577c276..c133895 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -237,7 +237,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 7daf934..75227a6 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -173,7 +173,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 8797b30..c3167e9 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -263,7 +263,6 @@ extern unsigned long get_clock_freq(void);
/* Serial Port */
#define CONFIG_CONS_INDEX 2
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index d1ac32f..1804582 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -214,7 +214,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
* shorted - index 1
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 33f49f5..e1e4acf 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -282,7 +282,6 @@ extern unsigned long get_clock_freq(void);
/* Serial Port */
#define CONFIG_CONS_INDEX 2
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 0f71f11..b0dd175 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -261,7 +261,6 @@ extern unsigned long get_clock_freq(void);
/* Serial Port */
#define CONFIG_CONS_INDEX 2
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 2dc2932..a98ecde 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -244,7 +244,6 @@ extern unsigned long get_clock_freq(void);
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 8177db3..8ffd458 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -276,7 +276,6 @@ extern unsigned long get_clock_freq(void);
/* Serial Port */
#define CONFIG_CONS_INDEX 1
#define CONFIG_SERIAL_MULTI 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 081661e..34ebbdb 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -333,7 +333,6 @@
* shorted - index 1
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 4d9606e..aece1db 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -218,7 +218,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 974cb6b..3b80d14 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -275,7 +275,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h
index c28eb64..5b12b88 100644
--- a/include/configs/MVBLM7.h
+++ b/include/configs/MVBLM7.h
@@ -150,7 +150,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 7e901e1..fa45b5b 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -281,7 +281,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
* shorted - index 1
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 79ce2c0..74cff0c 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -337,7 +337,6 @@
* shorted - index 1
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index 7426bca..cf8a8cf 100644
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -174,7 +174,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index 5d424dd..d6b3cb8 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -205,7 +205,6 @@
#undef CONFIG_CONS_NONE /* define if console on something else */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 9193b51..be0fe72 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -162,7 +162,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index abbaf38..ccb339d 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -256,7 +256,6 @@
#else /* !CONFIG_TQM8560 */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/aria.h b/include/configs/aria.h
index c5f9cc1..01e347e 100644
--- a/include/configs/aria.h
+++ b/include/configs/aria.h
@@ -321,7 +321,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
/*
* Serial console configuration
diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h
index 336e69e..3e64492 100644
--- a/include/configs/bubinga.h
+++ b/include/configs/bubinga.h
@@ -124,7 +124,6 @@
* set Linux BASE_BAUD to 403200.
*/
#define CONFIG_CONS_INDEX 1 /* Use UART0 */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index 5916db6..21d2d28 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -98,7 +98,6 @@
* set Linux BASE_BAUD to 403200.
*/
#define CONFIG_CONS_INDEX 1 /* Use UART0 */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 361fe61..da2a97d 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -59,7 +59,6 @@
* Serial Configuration
*/
#define CONFIG_SERIAL_MULTI
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
diff --git a/include/configs/ebony.h b/include/configs/ebony.h
index 09357d9..8c3284a 100644
--- a/include/configs/ebony.h
+++ b/include/configs/ebony.h
@@ -81,7 +81,6 @@
* Serial Port
*----------------------------------------------------------------------*/
#define CONFIG_CONS_INDEX 1 /* Use UART0 */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
/*-----------------------------------------------------------------------
diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
index 6694f53..10b1e0f 100644
--- a/include/configs/hcu5.h
+++ b/include/configs/hcu5.h
@@ -90,7 +90,6 @@
*----------------------------------------------------------------------*/
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#define CONFIG_BAUDRATE 115200
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
/*-----------------------------------------------------------------------
* Environment
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index f7d36b1..1dcdeab 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -257,7 +257,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h
index 5f31198..6042986 100644
--- a/include/configs/mcu25.h
+++ b/include/configs/mcu25.h
@@ -86,16 +86,9 @@
* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
* set Linux BASE_BAUD to 403200.
*/
-/* needed to be able to define CONFIG_SERIAL_SOFTWARE_FIFO */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 691200
-/* Size (bytes) of interrupt driven serial port buffer.
- * Set to 0 to use polling instead of interrupts.
- * Setting to 0 will also disable RTS/CTS handshaking.
- */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-
/* Set console baudrate to 9600 */
#define CONFIG_BAUDRATE 9600
diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index 92c4f5f..539c8c1 100644
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -218,7 +218,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
/*
* Serial console configuration
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index 5281042..609156d 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -284,7 +284,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
/*
* Serial console configuration
diff --git a/include/configs/neo.h b/include/configs/neo.h
index fde814b..f8f53e8 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -104,7 +104,6 @@
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h
index b388a40..4f59cc6 100644
--- a/include/configs/ocotea.h
+++ b/include/configs/ocotea.h
@@ -81,7 +81,6 @@
* Serial Port
*----------------------------------------------------------------------*/
#define CONFIG_CONS_INDEX 1 /* Use UART0 */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
/*-----------------------------------------------------------------------
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index deaddde..e85e8f7 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -270,7 +270,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 564f661..8d047de 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -338,7 +338,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index 53d06ed..6352278 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -203,7 +203,6 @@
#undef CONFIG_CONS_NONE /* define if console on something else */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index 618513a..a7831c0 100644
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -257,7 +257,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index 094d38b..278b60e 100644
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -82,14 +82,6 @@
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_SERIAL_MULTI
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-/*
- * define CONFIG_POWER_DOWN if your cpu should power down while waiting for your input
- * Works only, if you have enabled the CONFIG_SERIAL_SOFTWARE_FIFO feature
- */
-#if CONFIG_SERIAL_SOFTWARE_FIFO
- #define CONFIG_POWER_DOWN
-#endif
/*
* define CONFIG_SYS_CLK_FREQ to your base crystal clock in Hz
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index af1e19e..88be349 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -218,7 +218,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 57bb8d1..911c906 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -176,7 +176,6 @@
/* Serial Port */
#define CONFIG_CONS_INDEX 2
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/taihu.h b/include/configs/taihu.h
index a9954e4..7e660ee 100644
--- a/include/configs/taihu.h
+++ b/include/configs/taihu.h
@@ -128,7 +128,6 @@
* set Linux BASE_BAUD to 403200.
*/
#define CONFIG_CONS_INDEX 2 /* Use UART1 */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index f493e75..ec533b8 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -184,7 +184,6 @@
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
diff --git a/include/configs/walnut.h b/include/configs/walnut.h
index 191c28f..3be489d 100644
--- a/include/configs/walnut.h
+++ b/include/configs/walnut.h
@@ -85,7 +85,6 @@
* set Linux BASE_BAUD to 403200.
*/
#define CONFIG_CONS_INDEX 1 /* Use UART0 */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index dfba508..a540355 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -107,7 +107,6 @@
*----------------------------------------------------------------------*/
#define CONFIG_CONS_INDEX 1 /* Use UART0 */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
/* #define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) */ /* Ext clk @ 11.059 MHz */
--
1.7.3
1
1

22 Sep '10
Remove some unused functionality to make U-Boot build again.
Especially PCI is not used on the board.
Signed-off-by: Matthias Fuchs <matthias.fuchs(a)esd.eu>
---
include/configs/DU405.h | 31 +++++--------------------------
1 files changed, 5 insertions(+), 26 deletions(-)
diff --git a/include/configs/DU405.h b/include/configs/DU405.h
index 8f1fc78..ff56ac3 100644
--- a/include/configs/DU405.h
+++ b/include/configs/DU405.h
@@ -73,6 +73,11 @@
#include <config_cmd_default.h>
#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_EDITENV
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_CONSOLE
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_IDE
#define CONFIG_CMD_ELF
#define CONFIG_CMD_MII
@@ -126,32 +131,6 @@
#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
/*-----------------------------------------------------------------------
- * PCI stuff
- *-----------------------------------------------------------------------
- */
-#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
-#define PCI_HOST_FORCE 1 /* configure as pci host */
-#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
-
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
- /* resource configuration */
-
-#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
-
-#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
-
-#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */
-#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0404 /* PCI Device ID: CPCI-ISER4 */
-#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
-#define CONFIG_SYS_PCI_PTM1MS 0xff000001 /* 16MB, enable hard-wired to 1 */
-#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
-#define CONFIG_SYS_PCI_PTM2LA 0xffe00000 /* point to flash */
-#define CONFIG_SYS_PCI_PTM2MS 0xffe00001 /* 2MB, enable */
-#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
-
-/*-----------------------------------------------------------------------
* IDE/ATA stuff
*-----------------------------------------------------------------------
*/
--
1.6.1
2
1

22 Sep '10
This patch removes the PPC4xx UART driver. Instead the common NS16550
driver is used, since all PPC4xx SoC's use this peripheral device.
The file 4xx_uart.c now only implements the UART clock calculation
function which also sets the SoC internal UART divisors.
All PPC4xx board config headers are changed to use this common NS16550
driver now.
Tested on these boards:
acadia, canyonlands, katmai, kilauea, sequoia, zeus
Signed-off-by: Stefan Roese <sr(a)denx.de>
---
arch/powerpc/cpu/ppc4xx/4xx_uart.c | 821 +++++-------------------------
arch/powerpc/include/asm/ppc405cr.h | 7 +-
arch/powerpc/include/asm/ppc405ep.h | 7 +-
arch/powerpc/include/asm/ppc405ex.h | 7 +-
arch/powerpc/include/asm/ppc405ez.h | 9 +-
arch/powerpc/include/asm/ppc405gp.h | 7 +-
arch/powerpc/include/asm/ppc440ep_gr.h | 14 +-
arch/powerpc/include/asm/ppc440epx_grx.h | 12 +-
arch/powerpc/include/asm/ppc440gp.h | 9 +-
arch/powerpc/include/asm/ppc440gx.h | 10 +-
arch/powerpc/include/asm/ppc440sp.h | 10 +-
arch/powerpc/include/asm/ppc440spe.h | 9 +-
arch/powerpc/include/asm/ppc460ex_gt.h | 12 +-
arch/powerpc/include/asm/ppc460sx.h | 8 +-
arch/powerpc/include/asm/ppc4xx.h | 16 +
board/amcc/ebony/init.S | 1 +
board/amcc/katmai/init.S | 1 +
board/amcc/luan/init.S | 1 +
board/amcc/ocotea/init.S | 1 +
board/amcc/redwood/init.S | 1 +
board/amcc/taishan/init.S | 1 +
board/amcc/yucca/init.S | 1 +
board/esd/pmc440/pmc440.c | 6 +-
board/mosaixtech/icon/init.S | 1 +
board/prodrive/alpr/init.S | 1 +
board/prodrive/p3p440/init.S | 1 +
board/sandburst/karef/init.S | 1 +
board/sandburst/metrobox/init.S | 1 +
board/xes/xpedite1000/init.S | 1 +
common/serial.c | 10 +-
include/common.h | 1 +
include/configs/APC405.h | 6 +
include/configs/AR405.h | 6 +
include/configs/ASH405.h | 7 +-
include/configs/CANBT.h | 6 +
include/configs/CATcenter.h | 6 +-
include/configs/CMS700.h | 7 +-
include/configs/CPCI2DP.h | 7 +-
include/configs/CPCI405.h | 6 +
include/configs/CPCI4052.h | 6 +
include/configs/CPCI405AB.h | 6 +
include/configs/CPCI405DT.h | 6 +
include/configs/CPCIISER4.h | 6 +
include/configs/CRAYL1.h | 6 +
include/configs/DP405.h | 7 +-
include/configs/DU405.h | 6 +
include/configs/DU440.h | 9 +-
include/configs/ERIC.h | 6 +
include/configs/G2000.h | 7 +-
include/configs/HH405.h | 7 +-
include/configs/HUB405.h | 7 +-
include/configs/JSE.h | 8 +-
include/configs/KAREF.h | 6 +-
include/configs/METROBOX.h | 6 +-
include/configs/MIP405.h | 6 +
include/configs/OCRTC.h | 6 +
include/configs/ORSG.h | 6 +
include/configs/PCI405.h | 6 +
include/configs/PIP405.h | 6 +
include/configs/PLU405.h | 7 +-
include/configs/PMC405.h | 6 +
include/configs/PMC405DE.h | 7 +-
include/configs/PMC440.h | 11 +-
include/configs/PPChameleonEVB.h | 6 +
include/configs/VOH405.h | 7 +-
include/configs/VOM405.h | 7 +-
include/configs/W7OLMC.h | 6 +
include/configs/W7OLMG.h | 6 +
include/configs/WUH405.h | 7 +-
include/configs/XPEDITE1000.h | 7 +-
include/configs/acadia.h | 1 +
include/configs/alpr.h | 8 +-
include/configs/amcc-common.h | 6 +-
include/configs/bamboo.h | 6 +-
include/configs/bubinga.h | 1 +
include/configs/canyonlands.h | 4 +-
include/configs/csb272.h | 6 +
include/configs/csb472.h | 6 +
include/configs/dlvision.h | 1 +
include/configs/ebony.h | 2 +-
include/configs/gdppc440etx.h | 7 +-
include/configs/hcu5.h | 4 -
include/configs/icon.h | 3 +-
include/configs/intip.h | 4 +-
include/configs/katmai.h | 3 +-
include/configs/kilauea.h | 4 +-
include/configs/korat.h | 10 +-
include/configs/luan.h | 4 +-
include/configs/lwmon5.h | 10 +-
include/configs/makalu.h | 4 +-
include/configs/neo.h | 6 +
include/configs/netstal-common.h | 5 +
include/configs/ocotea.h | 2 +-
include/configs/p3p440.h | 7 +-
include/configs/pcs440ep.h | 8 +-
include/configs/quad100hd.h | 5 +
include/configs/redwood.h | 6 +-
include/configs/sbc405.h | 6 +
include/configs/sc3.h | 5 +
include/configs/sequoia.h | 6 +-
include/configs/t3corp.h | 4 +-
include/configs/taihu.h | 2 +-
include/configs/taishan.h | 3 +-
include/configs/walnut.h | 1 +
include/configs/yosemite.h | 4 +-
include/configs/yucca.h | 3 +-
include/configs/zeus.h | 12 +-
107 files changed, 600 insertions(+), 824 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index 5eaeefe..2660aa8 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -2,6 +2,9 @@
* (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd(a)denx.de.
*
+ * (C) Copyright 2010
+ * Stefan Roese, DENX Software Engineering, sr(a)denx.de.
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -51,14 +54,6 @@
#include <watchdog.h>
#include <asm/ppc4xx.h>
-#ifdef CONFIG_SERIAL_MULTI
-#include <serial.h>
-#endif
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-#include <malloc.h>
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
@@ -66,24 +61,6 @@ DECLARE_GLOBAL_DATA_PTR;
defined(CONFIG_405EX) || defined(CONFIG_440)
#if defined(CONFIG_440)
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
- defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define UART0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000300)
-#define UART1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400)
-#else
-#define UART0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000200)
-#define UART1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000300)
-#endif
-
-#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
-#define UART2_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000600)
-#endif
-
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define UART2_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
-#define UART3_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000600)
-#endif
#if defined(CONFIG_440GP)
#define CR0_MASK 0x3fff0000
@@ -116,16 +93,14 @@ DECLARE_GLOBAL_DATA_PTR;
#define MTREG(a, d) mtsdr(a, d)
#endif /* #if defined(CONFIG_440GP) */
#elif defined(CONFIG_405EP) || defined(CONFIG_405EZ)
-#define UART0_BASE 0xef600300
-#define UART1_BASE 0xef600400
#define UCR0_MASK 0x0000007f
#define UCR1_MASK 0x00007f00
#define UCR0_UDIV_POS 0
#define UCR1_UDIV_POS 8
#define UDIV_MAX 127
#elif defined(CONFIG_405EX)
-#define UART0_BASE 0xef600200
-#define UART1_BASE 0xef600300
+#define MFREG(a, d) mfsdr(a, d)
+#define MTREG(a, d) mtsdr(a, d)
#define CR0_MASK 0x000000ff
#define CR0_EXTCLK_ENA 0x00800000
#define CR0_UDIV_POS 0
@@ -133,748 +108,198 @@ DECLARE_GLOBAL_DATA_PTR;
#define UART0_SDR SDR0_UART0
#define UART1_SDR SDR0_UART1
#else /* CONFIG_405GP || CONFIG_405CR */
-#define UART0_BASE 0xef600300
-#define UART1_BASE 0xef600400
#define CR0_MASK 0x00001fff
#define CR0_EXTCLK_ENA 0x000000c0
#define CR0_UDIV_POS 1
#define UDIV_MAX 32
#endif
-/* using serial port 0 or 1 as U-Boot console ? */
-#if defined(CONFIG_UART1_CONSOLE)
-#define ACTING_UART0_BASE UART1_BASE
-#define ACTING_UART1_BASE UART0_BASE
-#else
-#define ACTING_UART0_BASE UART0_BASE
-#define ACTING_UART1_BASE UART1_BASE
-#endif
-
#if defined(CONFIG_405EP) && defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
#error "External serial clock not supported on AMCC PPC405EP!"
#endif
-#define UART_RBR 0x00
-#define UART_THR 0x00
-#define UART_IER 0x01
-#define UART_IIR 0x02
-#define UART_FCR 0x02
-#define UART_LCR 0x03
-#define UART_MCR 0x04
-#define UART_LSR 0x05
-#define UART_MSR 0x06
-#define UART_SCR 0x07
-#define UART_DLL 0x00
-#define UART_DLM 0x01
-
-/*-----------------------------------------------------------------------------+
- | Line Status Register.
- +-----------------------------------------------------------------------------*/
-#define asyncLSRDataReady1 0x01
-#define asyncLSROverrunError1 0x02
-#define asyncLSRParityError1 0x04
-#define asyncLSRFramingError1 0x08
-#define asyncLSRBreakInterrupt1 0x10
-#define asyncLSRTxHoldEmpty1 0x20
-#define asyncLSRTxShiftEmpty1 0x40
-#define asyncLSRRxFifoError1 0x80
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-/*-----------------------------------------------------------------------------+
- | Fifo
- +-----------------------------------------------------------------------------*/
-typedef struct {
- char *rx_buffer;
- ulong rx_put;
- ulong rx_get;
-} serial_buffer_t;
-
-volatile static serial_buffer_t buf_info;
-#endif
-
-static void serial_init_common(u32 base, u32 udiv, u16 bdiv)
-{
- PPC4xx_SYS_INFO sys_info;
- u8 val;
-
- get_sys_info(&sys_info);
-
- /* Correct UART frequency in bd-info struct now that
- * the UART divisor is available
- */
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
- gd->uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
-#else
- gd->uart_clk = sys_info.freqUART / udiv;
-#endif
-
- out_8((u8 *)base + UART_LCR, 0x80); /* set DLAB bit */
- out_8((u8 *)base + UART_DLL, bdiv); /* set baudrate divisor */
- out_8((u8 *)base + UART_DLM, bdiv >> 8); /* set baudrate divisor */
- out_8((u8 *)base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
- out_8((u8 *)base + UART_FCR, 0x00); /* disable FIFO */
- out_8((u8 *)base + UART_MCR, 0x00); /* no modem control DTR RTS */
- val = in_8((u8 *)base + UART_LSR); /* clear line status */
- val = in_8((u8 *)base + UART_RBR); /* read receive buffer */
- out_8((u8 *)base + UART_SCR, 0x00); /* set scratchpad */
- out_8((u8 *)base + UART_IER, 0x00); /* set interrupt enable reg */
-}
-
-#if (defined(CONFIG_440) || defined(CONFIG_405EX)) && \
- !defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
-static void serial_divs (int baudrate, unsigned long *pudiv,
- unsigned short *pbdiv)
+#if (defined(CONFIG_405EX) || defined(CONFIG_405EZ) || \
+ defined(CONFIG_440)) && !defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
+/*
+ * For some SoC's, the cpu clock is on divider chain A, UART on
+ * divider chain B ... so cpu clock is irrelevant. Get the
+ * "optimized" values that are subject to the 1/2 opb clock
+ * constraint.
+ */
+static u16 serial_bdiv(int baudrate, u32 *udiv)
{
sys_info_t sysinfo;
- unsigned long div; /* total divisor udiv * bdiv */
- unsigned long umin; /* minimum udiv */
- unsigned short diff; /* smallest diff */
- unsigned long udiv; /* best udiv */
- unsigned short idiff; /* current diff */
- unsigned short ibdiv; /* current bdiv */
- unsigned long i;
- unsigned long est; /* current estimate */
+ u32 div; /* total divisor udiv * bdiv */
+ u32 umin; /* minimum udiv */
+ u16 diff; /* smallest diff */
+ u16 idiff; /* current diff */
+ u16 ibdiv; /* current bdiv */
+ u32 i;
+ u32 est; /* current estimate */
+ u32 max;
+#if defined(CONFIG_405EZ)
+ u32 cpr_pllc;
+ u32 plloutb;
+ u32 reg;
+#endif
get_sys_info(&sysinfo);
- udiv = 32; /* Assume lowest possible serial clk */
- div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */
- umin = sysinfo.pllOpbDiv << 1; /* 2 x OPB divisor */
- diff = 32; /* highest possible */
-
- /* i is the test udiv value -- start with the largest
- * possible (32) to minimize serial clock and constrain
- * search to umin.
- */
- for (i = 32; i > umin; i--) {
- ibdiv = div / i;
- est = i * ibdiv;
- idiff = (est > div) ? (est-div) : (div-est);
- if (idiff == 0) {
- udiv = i;
- break; /* can't do better */
- } else if (idiff < diff) {
- udiv = i; /* best so far */
- diff = idiff; /* update lowest diff*/
- }
- }
-
- *pudiv = udiv;
- *pbdiv = div / udiv;
-}
-
-#elif defined(CONFIG_405EZ)
-
-static void serial_divs (int baudrate, unsigned long *pudiv,
- unsigned short *pbdiv)
-{
- sys_info_t sysinfo;
- unsigned long div; /* total divisor udiv * bdiv */
- unsigned long umin; /* minimum udiv */
- unsigned short diff; /* smallest diff */
- unsigned long udiv; /* best udiv */
- unsigned short idiff; /* current diff */
- unsigned short ibdiv; /* current bdiv */
- unsigned long i;
- unsigned long est; /* current estimate */
- unsigned long plloutb;
- unsigned long cpr_pllc;
- u32 reg;
-
+#if defined(CONFIG_405EZ)
/* check the pll feedback source */
mfcpr(CPR0_PLLC, cpr_pllc);
-
- get_sys_info(&sysinfo);
-
plloutb = ((CONFIG_SYS_CLK_FREQ * ((cpr_pllc & PLLC_SRC_MASK) ?
sysinfo.pllFwdDivB : sysinfo.pllFwdDiv) *
sysinfo.pllFbkDiv) / sysinfo.pllFwdDivB);
- udiv = 256; /* Assume lowest possible serial clk */
div = plloutb / (16 * baudrate); /* total divisor */
umin = (plloutb / get_OPB_freq()) << 1; /* 2 x OPB divisor */
- diff = 256; /* highest possible */
+ max = 256; /* highest possible */
+#else /* 405EZ */
+ div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */
+ umin = sysinfo.pllOpbDiv << 1; /* 2 x OPB divisor */
+ max = 32; /* highest possible */
+#endif /* 405EZ */
+
+ *udiv = diff = max;
- /* i is the test udiv value -- start with the largest
- * possible (256) to minimize serial clock and constrain
+ /*
+ * i is the test udiv value -- start with the largest
+ * possible (max) to minimize serial clock and constrain
* search to umin.
*/
- for (i = 256; i > umin; i--) {
+ for (i = max; i > umin; i--) {
ibdiv = div / i;
est = i * ibdiv;
- idiff = (est > div) ? (est-div) : (div-est);
+ idiff = (est > div) ? (est - div) : (div - est);
if (idiff == 0) {
- udiv = i;
- break; /* can't do better */
+ *udiv = i;
+ break; /* can't do better */
} else if (idiff < diff) {
- udiv = i; /* best so far */
- diff = idiff; /* update lowest diff*/
+ *udiv = i; /* best so far */
+ diff = idiff; /* update lowest diff*/
}
}
- *pudiv = udiv;
+#if defined(CONFIG_405EZ)
mfcpr(CPR0_PERD0, reg);
reg &= ~0x0000ffff;
- reg |= ((udiv - 0) << 8) | (udiv - 0);
+ reg |= ((*udiv - 0) << 8) | (*udiv - 0);
mtcpr(CPR0_PERD0, reg);
- *pbdiv = div / udiv;
+#endif
+
+ return div / *udiv;
}
-#endif /* defined(CONFIG_440) && !defined(CONFIG_SYS_EXT_SERIAL_CLK) */
+#endif /* #if (defined(CONFIG_405EP) ... */
/*
- * Minimal serial functions needed to use one of the SMC ports
- * as serial console interface.
+ * This function returns the UART clock used by the common
+ * NS16550 driver. Additionally the SoC internal divisors for
+ * optimal UART baudrate are configured.
*/
-
-#if defined(CONFIG_440)
-int serial_init_dev(unsigned long base)
+int get_serial_clock(void)
{
- unsigned long reg;
- unsigned long udiv;
- unsigned short bdiv;
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
- unsigned long tmp;
-#endif
-
- MFREG(UART0_SDR, reg);
- reg &= ~CR0_MASK;
-
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
- reg |= CR0_EXTCLK_ENA;
- udiv = 1;
- tmp = gd->baudrate * 16;
- bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
-#else
- /* For 440, the cpu clock is on divider chain A, UART on divider
- * chain B ... so cpu clock is irrelevant. Get the "optimized"
- * values that are subject to the 1/2 opb clock constraint
- */
- serial_divs (gd->baudrate, &udiv, &bdiv);
+ u32 clk;
+ u32 udiv;
+#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || defined(CONFIG_405GP)
+ u32 tmp;
#endif
-
- reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS; /* set the UART divisor */
-
- /*
- * Configure input clock to baudrate generator for all
- * available serial ports here
- */
- MTREG(UART0_SDR, reg);
-#if defined(UART1_SDR)
- MTREG(UART1_SDR, reg);
-#endif
-#if defined(UART2_SDR)
- MTREG(UART2_SDR, reg);
-#endif
-#if defined(UART3_SDR)
- MTREG(UART3_SDR, reg);
+#if !defined(CONFIG_405EZ)
+ u32 reg;
#endif
-
- serial_init_common(base, udiv, bdiv);
-
- return (0);
-}
-
-#else /* !defined(CONFIG_440) */
-
-int serial_init_dev (unsigned long base)
-{
- unsigned long reg;
- unsigned long tmp;
- unsigned long clk;
- unsigned long udiv;
- unsigned short bdiv;
-
-#ifdef CONFIG_405EX
- clk = tmp = 0;
- mfsdr(UART0_SDR, reg);
- reg &= ~CR0_MASK;
-#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
- reg |= CR0_EXTCLK_ENA;
- udiv = 1;
- tmp = gd->baudrate * 16;
- bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
-#else
- serial_divs(gd->baudrate, &udiv, &bdiv);
+#if !defined(CONFIG_SYS_EXT_SERIAL_CLOCK)
+ PPC4xx_SYS_INFO sys_info;
#endif
- reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS; /* set the UART divisor */
/*
- * Configure input clock to baudrate generator for all
- * available serial ports here
+ * Programming of the internal divisors is SoC specific.
+ * Let's handle this in some #ifdef's for the SoC's.
*/
- mtsdr(UART0_SDR, reg);
-
-#if defined(UART1_SDR)
- mtsdr(UART1_SDR, reg);
-#endif
-#elif defined(CONFIG_405EZ)
- serial_divs(gd->baudrate, &udiv, &bdiv);
- clk = tmp = reg = 0;
-#else
-#ifdef CONFIG_405EP
- reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK);
- clk = gd->cpu_clk;
- tmp = CONFIG_SYS_BASE_BAUD * 16;
- udiv = (clk + tmp / 2) / tmp;
- if (udiv > UDIV_MAX) /* max. n bits for udiv */
- udiv = UDIV_MAX;
- reg |= (udiv) << UCR0_UDIV_POS; /* set the UART divisor */
- reg |= (udiv) << UCR1_UDIV_POS; /* set the UART divisor */
- mtdcr (CPC0_UCR, reg);
-#else /* CONFIG_405EP */
+#if defined(CONFIG_405CR) || defined(CONFIG_405GP)
+ tmp = 0;
reg = mfdcr(CPC0_CR0) & ~CR0_MASK;
#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
udiv = 1;
reg |= CR0_EXTCLK_ENA;
-#else
+#else /* CONFIG_SYS_EXT_SERIAL_CLOCK */
clk = gd->cpu_clk;
#ifdef CONFIG_SYS_405_UART_ERRATA_59
udiv = 31; /* Errata 59: stuck at 31 */
-#else
+#else /* CONFIG_SYS_405_UART_ERRATA_59 */
tmp = CONFIG_SYS_BASE_BAUD * 16;
udiv = (clk + tmp / 2) / tmp;
if (udiv > UDIV_MAX) /* max. n bits for udiv */
udiv = UDIV_MAX;
-#endif
-#endif
+#endif /* CONFIG_SYS_405_UART_ERRATA_59 */
+#endif /* CONFIG_SYS_EXT_SERIAL_CLOCK */
reg |= (udiv - 1) << CR0_UDIV_POS; /* set the UART divisor */
mtdcr (CPC0_CR0, reg);
-#endif /* CONFIG_405EP */
- tmp = gd->baudrate * udiv * 16;
- bdiv = (clk + tmp / 2) / tmp;
-#endif /* CONFIG_405EX */
-
- serial_init_common(base, udiv, bdiv);
-
- return (0);
-}
-
-#endif /* if defined(CONFIG_440) */
-
-void serial_setbrg_dev(unsigned long base)
-{
- serial_init_dev(base);
-}
-
-void serial_putc_dev(unsigned long base, const char c)
-{
- int i;
-
- if (c == '\n')
- serial_putc_dev(base, '\r');
-
- /* check THRE bit, wait for transmiter available */
- for (i = 1; i < 3500; i++) {
- if ((in_8((u8 *)base + UART_LSR) & 0x20) == 0x20)
- break;
- udelay (100);
- }
-
- out_8((u8 *)base + UART_THR, c); /* put character out */
-}
-
-void serial_puts_dev (unsigned long base, const char *s)
-{
- while (*s)
- serial_putc_dev (base, *s++);
-}
-
-int serial_getc_dev (unsigned long base)
-{
- unsigned char status = 0;
-
- while (1) {
-#if defined(CONFIG_HW_WATCHDOG)
- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
-#endif /* CONFIG_HW_WATCHDOG */
-
- status = in_8((u8 *)base + UART_LSR);
- if ((status & asyncLSRDataReady1) != 0x0)
- break;
-
- if ((status & ( asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1 )) != 0) {
- out_8((u8 *)base + UART_LSR,
- asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1);
- }
- }
-
- return (0x000000ff & (int) in_8((u8 *)base));
-}
-
-int serial_tstc_dev (unsigned long base)
-{
- unsigned char status;
-
- status = in_8((u8 *)base + UART_LSR);
- if ((status & asyncLSRDataReady1) != 0x0)
- return (1);
-
- if ((status & ( asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1 )) != 0) {
- out_8((u8 *)base + UART_LSR,
- asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1);
- }
-
- return 0;
-}
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-
-void serial_isr (void *arg)
-{
- int space;
- int c;
- const int rx_get = buf_info.rx_get;
- int rx_put = buf_info.rx_put;
-
- if (rx_get <= rx_put)
- space = CONFIG_SERIAL_SOFTWARE_FIFO - (rx_put - rx_get);
- else
- space = rx_get - rx_put;
-
- while (serial_tstc_dev (ACTING_UART0_BASE)) {
- c = serial_getc_dev (ACTING_UART0_BASE);
- if (space) {
- buf_info.rx_buffer[rx_put++] = c;
- space--;
- }
- if (rx_put == CONFIG_SERIAL_SOFTWARE_FIFO)
- rx_put = 0;
- if (space < CONFIG_SERIAL_SOFTWARE_FIFO / 4) {
- /* Stop flow by setting RTS inactive */
- out_8((u8 *)ACTING_UART0_BASE + UART_MCR,
- in_8((u8 *)ACTING_UART0_BASE + UART_MCR) &
- (0xFF ^ 0x02));
- }
- }
- buf_info.rx_put = rx_put;
-}
-
-void serial_buffered_init (void)
-{
- serial_puts ("Switching to interrupt driven serial input mode.\n");
- buf_info.rx_buffer = malloc (CONFIG_SERIAL_SOFTWARE_FIFO);
- buf_info.rx_put = 0;
- buf_info.rx_get = 0;
-
- if (in_8((u8 *)ACTING_UART0_BASE + UART_MSR) & 0x10)
- serial_puts ("Check CTS signal present on serial port: OK.\n");
- else
- serial_puts ("WARNING: CTS signal not present on serial port.\n");
-
- irq_install_handler ( VECNUM_U0 /*UART0 */ /*int vec */ ,
- serial_isr /*interrupt_handler_t *handler */ ,
- (void *) &buf_info /*void *arg */ );
-
- /* Enable "RX Data Available" Interrupt on UART */
- out_8(ACTING_UART0_BASE + UART_IER, 0x01);
- /* Set DTR active */
- out_8(ACTING_UART0_BASE + UART_MCR,
- in_8((u8 *)ACTING_UART0_BASE + UART_MCR) | 0x01);
- /* Start flow by setting RTS active */
- out_8(ACTING_UART0_BASE + UART_MCR,
- in_8((u8 *)ACTING_UART0_BASE + UART_MCR) | 0x02);
- /* Setup UART FIFO: RX trigger level: 4 byte, Enable FIFO */
- out_8(ACTING_UART0_BASE + UART_FCR, (1 << 6) | 1);
-}
-
-void serial_buffered_putc (const char c)
-{
- /* Wait for CTS */
-#if defined(CONFIG_HW_WATCHDOG)
- while (!(in_8((u8 *)ACTING_UART0_BASE + UART_MSR) & 0x10))
- WATCHDOG_RESET ();
-#else
- while (!(in_8((u8 *)ACTING_UART0_BASE + UART_MSR) & 0x10));
-#endif
- serial_putc (c);
-}
-
-void serial_buffered_puts (const char *s)
-{
- serial_puts (s);
-}
-
-int serial_buffered_getc (void)
-{
- int space;
- int c;
- int rx_get = buf_info.rx_get;
- int rx_put;
-
-#if defined(CONFIG_HW_WATCHDOG)
- while (rx_get == buf_info.rx_put)
- WATCHDOG_RESET ();
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
+ clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
#else
- while (rx_get == buf_info.rx_put);
+ clk = CONFIG_SYS_BASE_BAUD * 16;
#endif
- c = buf_info.rx_buffer[rx_get++];
- if (rx_get == CONFIG_SERIAL_SOFTWARE_FIFO)
- rx_get = 0;
- buf_info.rx_get = rx_get;
-
- rx_put = buf_info.rx_put;
- if (rx_get <= rx_put)
- space = CONFIG_SERIAL_SOFTWARE_FIFO - (rx_put - rx_get);
- else
- space = rx_get - rx_put;
-
- if (space > CONFIG_SERIAL_SOFTWARE_FIFO / 2) {
- /* Start flow by setting RTS active */
- out_8(ACTING_UART0_BASE + UART_MCR,
- in_8((u8 *)ACTING_UART0_BASE + UART_MCR) | 0x02);
- }
+#endif /* CONFIG_405CR */
- return c;
-}
+#if defined(CONFIG_405EP)
+ reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK);
+ clk = gd->cpu_clk;
+ tmp = CONFIG_SYS_BASE_BAUD * 16;
+ udiv = (clk + tmp / 2) / tmp;
+ if (udiv > UDIV_MAX) /* max. n bits for udiv */
+ udiv = UDIV_MAX;
+ reg |= udiv << UCR0_UDIV_POS; /* set the UART divisor */
+ reg |= udiv << UCR1_UDIV_POS; /* set the UART divisor */
+ mtdcr(CPC0_UCR, reg);
+ clk = CONFIG_SYS_BASE_BAUD * 16;
+#endif /* CONFIG_405EP */
-int serial_buffered_tstc (void)
-{
- return (buf_info.rx_get != buf_info.rx_put) ? 1 : 0;
-}
+#if defined(CONFIG_405EX) || defined(CONFIG_440)
+ MFREG(UART0_SDR, reg);
+ reg &= ~CR0_MASK;
-#endif /* CONFIG_SERIAL_SOFTWARE_FIFO */
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
+ reg |= CR0_EXTCLK_ENA;
+ udiv = 1;
+ clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
+#else /* CONFIG_SYS_EXT_SERIAL_CLOCK */
+ clk = gd->baudrate * serial_bdiv(gd->baudrate, &udiv) * 16;
+#endif /* CONFIG_SYS_EXT_SERIAL_CLOCK */
-#if defined(CONFIG_CMD_KGDB)
-/*
- AS HARNOIS : according to CONFIG_KGDB_SER_INDEX kgdb uses serial port
- number 0 or number 1
- - if CONFIG_KGDB_SER_INDEX = 1 => serial port number 0 :
- configuration has been already done
- - if CONFIG_KGDB_SER_INDEX = 2 => serial port number 1 :
- configure port 1 for serial I/O with rate = CONFIG_KGDB_BAUDRATE
-*/
-#if (CONFIG_KGDB_SER_INDEX & 2)
-void kgdb_serial_init (void)
-{
- u8 val;
- u16 br_reg;
+ reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS; /* set the UART divisor */
- get_clocks ();
- br_reg = (((((gd->cpu_clk / 16) / 18) * 10) / CONFIG_KGDB_BAUDRATE) +
- 5) / 10;
/*
- * Init onboard 16550 UART
+ * Configure input clock to baudrate generator for all
+ * available serial ports here
*/
- out_8((u8 *)ACTING_UART1_BASE + UART_LCR, 0x80); /* set DLAB bit */
- out_8((u8 *)ACTING_UART1_BASE + UART_DLL, (br_reg & 0x00ff)); /* set divisor for 9600 baud */
- out_8((u8 *)ACTING_UART1_BASE + UART_DLM, ((br_reg & 0xff00) >> 8)); /* set divisor for 9600 baud */
- out_8((u8 *)ACTING_UART1_BASE + UART_LCR, 0x03); /* line control 8 bits no parity */
- out_8((u8 *)ACTING_UART1_BASE + UART_FCR, 0x00); /* disable FIFO */
- out_8((u8 *)ACTING_UART1_BASE + UART_MCR, 0x00); /* no modem control DTR RTS */
- val = in_8((u8 *)ACTING_UART1_BASE + UART_LSR); /* clear line status */
- val = in_8((u8 *)ACTING_UART1_BASE + UART_RBR); /* read receive buffer */
- out_8((u8 *)ACTING_UART1_BASE + UART_SCR, 0x00); /* set scratchpad */
- out_8((u8 *)ACTING_UART1_BASE + UART_IER, 0x00); /* set interrupt enable reg */
-}
-
-void putDebugChar (const char c)
-{
- if (c == '\n')
- serial_putc ('\r');
-
- out_8((u8 *)ACTING_UART1_BASE + UART_THR, c); /* put character out */
-
- /* check THRE bit, wait for transfer done */
- while ((in_8((u8 *)ACTING_UART1_BASE + UART_LSR) & 0x20) != 0x20);
-}
-
-void putDebugStr (const char *s)
-{
- while (*s)
- serial_putc (*s++);
-}
-
-int getDebugChar (void)
-{
- unsigned char status = 0;
-
- while (1) {
- status = in_8((u8 *)ACTING_UART1_BASE + UART_LSR);
- if ((status & asyncLSRDataReady1) != 0x0)
- break;
-
- if ((status & (asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1 )) != 0) {
- out_8((u8 *)ACTING_UART1_BASE + UART_LSR,
- asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1);
- }
- }
-
- return (0x000000ff & (int) in_8((u8 *)ACTING_UART1_BASE));
-}
-
-void kgdb_interruptible (int yes)
-{
- return;
-}
-
-#else /* ! (CONFIG_KGDB_SER_INDEX & 2) */
-
-void kgdb_serial_init (void)
-{
- serial_printf ("[on serial] ");
-}
-
-void putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int getDebugChar (void)
-{
- return serial_getc ();
-}
-
-void kgdb_interruptible (int yes)
-{
- return;
-}
-#endif /* (CONFIG_KGDB_SER_INDEX & 2) */
+ MTREG(UART0_SDR, reg);
+#if defined(UART1_SDR)
+ MTREG(UART1_SDR, reg);
#endif
+#if defined(UART2_SDR)
+ MTREG(UART2_SDR, reg);
+#endif
+#if defined(UART3_SDR)
+ MTREG(UART3_SDR, reg);
+#endif
+#endif /* CONFIG_405EX ... */
+#if defined(CONFIG_405EZ)
+ clk = gd->baudrate * serial_bdiv(gd->baudrate, &udiv) * 16;
+#endif /* CONFIG_405EZ */
-#if defined(CONFIG_SERIAL_MULTI)
-int serial0_init(void)
-{
- return (serial_init_dev(UART0_BASE));
-}
-
-int serial1_init(void)
-{
- return (serial_init_dev(UART1_BASE));
-}
-
-void serial0_setbrg (void)
-{
- serial_setbrg_dev(UART0_BASE);
-}
-
-void serial1_setbrg (void)
-{
- serial_setbrg_dev(UART1_BASE);
-}
-
-void serial0_putc(const char c)
-{
- serial_putc_dev(UART0_BASE,c);
-}
-
-void serial1_putc(const char c)
-{
- serial_putc_dev(UART1_BASE, c);
-}
-
-void serial0_puts(const char *s)
-{
- serial_puts_dev(UART0_BASE, s);
-}
-
-void serial1_puts(const char *s)
-{
- serial_puts_dev(UART1_BASE, s);
-}
-
-int serial0_getc(void)
-{
- return(serial_getc_dev(UART0_BASE));
-}
-
-int serial1_getc(void)
-{
- return(serial_getc_dev(UART1_BASE));
-}
-
-int serial0_tstc(void)
-{
- return (serial_tstc_dev(UART0_BASE));
-}
-
-int serial1_tstc(void)
-{
- return (serial_tstc_dev(UART1_BASE));
-}
-
-struct serial_device serial0_device =
-{
- "serial0",
- "UART0",
- serial0_init,
- NULL,
- serial0_setbrg,
- serial0_getc,
- serial0_tstc,
- serial0_putc,
- serial0_puts,
-};
-
-struct serial_device serial1_device =
-{
- "serial1",
- "UART1",
- serial1_init,
- NULL,
- serial1_setbrg,
- serial1_getc,
- serial1_tstc,
- serial1_putc,
- serial1_puts,
-};
+ /*
+ * Correct UART frequency in bd-info struct now that
+ * the UART divisor is available
+ */
+#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
+ gd->uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
#else
-/*
- * Wrapper functions
- */
-int serial_init(void)
-{
- return serial_init_dev(ACTING_UART0_BASE);
-}
-
-void serial_setbrg(void)
-{
- serial_setbrg_dev(ACTING_UART0_BASE);
-}
-
-void serial_putc(const char c)
-{
- serial_putc_dev(ACTING_UART0_BASE, c);
-}
-
-void serial_puts(const char *s)
-{
- serial_puts_dev(ACTING_UART0_BASE, s);
-}
-
-int serial_getc(void)
-{
- return serial_getc_dev(ACTING_UART0_BASE);
-}
+ get_sys_info(&sys_info);
+ gd->uart_clk = sys_info.freqUART / udiv;
+#endif
-int serial_tstc(void)
-{
- return serial_tstc_dev(ACTING_UART0_BASE);
+ return clk;
}
-#endif /* CONFIG_SERIAL_MULTI */
-
#endif /* CONFIG_405GP || CONFIG_405CR */
diff --git a/arch/powerpc/include/asm/ppc405cr.h b/arch/powerpc/include/asm/ppc405cr.h
index 176c427..01078f7 100644
--- a/arch/powerpc/include/asm/ppc405cr.h
+++ b/arch/powerpc/include/asm/ppc405cr.h
@@ -24,7 +24,12 @@
#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
/* Memory mapped register */
-#define GPIO0_BASE 0xef600700
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
/* DCR's */
#define DCP0_CFGADDR 0x0014 /* Decompression controller addr reg */
diff --git a/arch/powerpc/include/asm/ppc405ep.h b/arch/powerpc/include/asm/ppc405ep.h
index e0b6a85..9691604 100644
--- a/arch/powerpc/include/asm/ppc405ep.h
+++ b/arch/powerpc/include/asm/ppc405ep.h
@@ -24,7 +24,12 @@
#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
/* Memory mapped register */
-#define GPIO0_BASE 0xef600700
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
/* DCR */
#define OCM0_ISCNTL 0x0019 /* OCM I-side control reg */
diff --git a/arch/powerpc/include/asm/ppc405ex.h b/arch/powerpc/include/asm/ppc405ex.h
index 880d53a..36d3149 100644
--- a/arch/powerpc/include/asm/ppc405ex.h
+++ b/arch/powerpc/include/asm/ppc405ex.h
@@ -26,7 +26,12 @@
#define CONFIG_NAND_NDFC
/* Memory mapped register */
-#define GPIO0_BASE 0xef600800
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0800)
/* SDR */
#define SDR0_SDCS0 0x0060
diff --git a/arch/powerpc/include/asm/ppc405ez.h b/arch/powerpc/include/asm/ppc405ez.h
index 9192c62..cb8e994 100644
--- a/arch/powerpc/include/asm/ppc405ez.h
+++ b/arch/powerpc/include/asm/ppc405ez.h
@@ -24,8 +24,13 @@
#define CONFIG_NAND_NDFC
/* Memory mapped register */
-#define GPIO0_BASE 0xef600700
-#define GPIO1_BASE 0xef600800
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
+#define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0800)
/* DCR register */
#define OCM0_PLBCR1 0x0020 /* OCM PLB3 Bank 1 Config */
diff --git a/arch/powerpc/include/asm/ppc405gp.h b/arch/powerpc/include/asm/ppc405gp.h
index 79f930b..91beeb8 100644
--- a/arch/powerpc/include/asm/ppc405gp.h
+++ b/arch/powerpc/include/asm/ppc405gp.h
@@ -24,7 +24,12 @@
#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
/* Memory mapped register */
-#define GPIO0_BASE 0xef600700
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
/* DCR's */
#define DCP0_CFGADDR 0x0014 /* Decompression controller addr reg */
diff --git a/arch/powerpc/include/asm/ppc440ep_gr.h b/arch/powerpc/include/asm/ppc440ep_gr.h
index 0fd4019..dfd1532 100644
--- a/arch/powerpc/include/asm/ppc440ep_gr.h
+++ b/arch/powerpc/include/asm/ppc440ep_gr.h
@@ -28,9 +28,19 @@
/*
* Some SoC specific registers (not common for all 440 SoC's)
*/
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000B00)
-#define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000C00)
+/* Memory mapped registers */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_PERIPHERAL_BASE + 0x0500)
+#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_PERIPHERAL_BASE + 0x0600)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0b00)
+#define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0c00)
+
+/* SDR's */
#define SDR0_PCI0 0x0300
#define SDR0_SDSTP2 0x4001
#define SDR0_SDSTP3 0x4003
diff --git a/arch/powerpc/include/asm/ppc440epx_grx.h b/arch/powerpc/include/asm/ppc440epx_grx.h
index e0d7e3f..252f35b 100644
--- a/arch/powerpc/include/asm/ppc440epx_grx.h
+++ b/arch/powerpc/include/asm/ppc440epx_grx.h
@@ -30,9 +30,15 @@
*/
/* Memory mapped registers */
-#define SPI0_MODE 0xef600090
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000B00)
-#define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000C00)
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define SPI0_MODE (CONFIG_SYS_PERIPHERAL_BASE + 0x0090)
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0b00)
+#define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0c00)
/* DCR */
#define CPM0_ER 0x00b0
diff --git a/arch/powerpc/include/asm/ppc440gp.h b/arch/powerpc/include/asm/ppc440gp.h
index 0c95e91..3ebe2a1 100644
--- a/arch/powerpc/include/asm/ppc440gp.h
+++ b/arch/powerpc/include/asm/ppc440gp.h
@@ -26,7 +26,14 @@
/*
* Some SoC specific registers (not common for all 440 SoC's)
*/
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
#define SDR0_PCI0 0x0300
diff --git a/arch/powerpc/include/asm/ppc440gx.h b/arch/powerpc/include/asm/ppc440gx.h
index 157e467..6f8581b 100644
--- a/arch/powerpc/include/asm/ppc440gx.h
+++ b/arch/powerpc/include/asm/ppc440gx.h
@@ -26,8 +26,16 @@
/*
* Some SoC specific registers (not common for all 440 SoC's)
*/
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
+
+/* SDR's */
#define SDR0_PCI0 0x0300
#define SDR0_SDSTP2 0x4001
diff --git a/arch/powerpc/include/asm/ppc440sp.h b/arch/powerpc/include/asm/ppc440sp.h
index eb7e1d9..4387495 100644
--- a/arch/powerpc/include/asm/ppc440sp.h
+++ b/arch/powerpc/include/asm/ppc440sp.h
@@ -26,8 +26,16 @@
/*
* Some SoC specific registers (not common for all 440 SoC's)
*/
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xf0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
+
+/* SDR's */
#define SDR0_PCI0 0x0300
#define SDR0_SDSTP2 0x0022
#define SDR0_SDSTP3 0x0023
diff --git a/arch/powerpc/include/asm/ppc440spe.h b/arch/powerpc/include/asm/ppc440spe.h
index 05fe104..bad9a40 100644
--- a/arch/powerpc/include/asm/ppc440spe.h
+++ b/arch/powerpc/include/asm/ppc440spe.h
@@ -27,8 +27,15 @@
* Some SoC specific registers (not common for all 440 SoC's)
*/
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+/* Memory mapped register */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000 /* Internal Peripherals */
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
+
+/* SDR's */
#define SDR0_PCI0 0x0300
#define SDR0_SDSTP2 0x0022
#define SDR0_SDSTP3 0x0023
diff --git a/arch/powerpc/include/asm/ppc460ex_gt.h b/arch/powerpc/include/asm/ppc460ex_gt.h
index 04c3fbe..732fcac 100644
--- a/arch/powerpc/include/asm/ppc460ex_gt.h
+++ b/arch/powerpc/include/asm/ppc460ex_gt.h
@@ -29,8 +29,16 @@
* Some SoC specific registers
*/
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000B00)
-#define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000C00)
+/* Memory mapped registers */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0400)
+#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_PERIPHERAL_BASE + 0x0500)
+#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_PERIPHERAL_BASE + 0x0600)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0b00)
+#define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0c00)
/* DCR */
#define AHB_TOP 0x00a4
diff --git a/arch/powerpc/include/asm/ppc460sx.h b/arch/powerpc/include/asm/ppc460sx.h
index cb72e28..f93ef0e 100644
--- a/arch/powerpc/include/asm/ppc460sx.h
+++ b/arch/powerpc/include/asm/ppc460sx.h
@@ -23,7 +23,13 @@
#define CONFIG_SDRAM_PPC4xx_IBM_DDR2 /* IBM DDR(2) controller */
-#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+/* Memory mapped registers */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000 /* Internal Peripherals */
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_PERIPHERAL_BASE + 0x0200)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_PERIPHERAL_BASE + 0x0300)
+
+#define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x0700)
#define SDR0_SRST0_DMC 0x00200000
diff --git a/arch/powerpc/include/asm/ppc4xx.h b/arch/powerpc/include/asm/ppc4xx.h
index 15be343..87a16ec 100644
--- a/arch/powerpc/include/asm/ppc4xx.h
+++ b/arch/powerpc/include/asm/ppc4xx.h
@@ -202,6 +202,22 @@
#define GPT0_DCT0 0x00000110
#define GPT0_DCIS 0x0000011C
+#if 0 // test-only
+/*
+ * All PPC4xx share the same NS16550 UART(s). Only base addresses
+ * may differ. We define here the integration of the common NS16550
+ * driver for all PPC4xx SoC's. The board config header must specify
+ * on which UART the console should be located via CONFIG_CONS_INDEX.
+ */
+#if 0 /* test-only */
+#define CONFIG_SERIAL_MULTI
+#endif
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+#endif
+
#if defined(CONFIG_440)
#include <asm/ppc440.h>
#else
diff --git a/board/amcc/ebony/init.S b/board/amcc/ebony/init.S
index c911763..08a0d11 100644
--- a/board/amcc/ebony/init.S
+++ b/board/amcc/ebony/init.S
@@ -23,6 +23,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S
index 59ccf2b..4a42f1f 100644
--- a/board/amcc/katmai/init.S
+++ b/board/amcc/katmai/init.S
@@ -26,6 +26,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/amcc/luan/init.S b/board/amcc/luan/init.S
index 06428d2..7cca319 100644
--- a/board/amcc/luan/init.S
+++ b/board/amcc/luan/init.S
@@ -26,6 +26,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/amcc/ocotea/init.S b/board/amcc/ocotea/init.S
index 2ef11cc..39f5a02 100644
--- a/board/amcc/ocotea/init.S
+++ b/board/amcc/ocotea/init.S
@@ -23,6 +23,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/amcc/redwood/init.S b/board/amcc/redwood/init.S
index fb10520..47f700b 100644
--- a/board/amcc/redwood/init.S
+++ b/board/amcc/redwood/init.S
@@ -24,6 +24,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/amcc/taishan/init.S b/board/amcc/taishan/init.S
index ac4e95d..6d47851 100644
--- a/board/amcc/taishan/init.S
+++ b/board/amcc/taishan/init.S
@@ -24,6 +24,7 @@
#include <ppc_asm.tmpl>
#include <asm/mmu.h>
#include <config.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/amcc/yucca/init.S b/board/amcc/yucca/init.S
index b2ac3ca..c63002b 100644
--- a/board/amcc/yucca/init.S
+++ b/board/amcc/yucca/init.S
@@ -26,6 +26,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index 8238c33..5236f44 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -68,7 +68,7 @@ struct serial_device *default_serial_console(void)
*/
mfsdr(SDR0_PINSTP, val);
if (((val & 0xf0000000) >> 29) != 7)
- return &serial1_device;
+ return &eserial2_device;
ulong scratchreg = in_be32((void*)GPIO0_ISR3L);
if (!(scratchreg & 0x80)) {
@@ -90,9 +90,9 @@ struct serial_device *default_serial_console(void)
}
if (scratchreg & 0x01)
- return &serial1_device;
+ return &eserial2_device;
else
- return &serial0_device;
+ return &eserial1_device;
}
int board_early_init_f(void)
diff --git a/board/mosaixtech/icon/init.S b/board/mosaixtech/icon/init.S
index 70ed6ce..a0168b5 100644
--- a/board/mosaixtech/icon/init.S
+++ b/board/mosaixtech/icon/init.S
@@ -24,6 +24,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc4xx.h>
/*
* TLB TABLE
diff --git a/board/prodrive/alpr/init.S b/board/prodrive/alpr/init.S
index 9f9812a..119bc53 100644
--- a/board/prodrive/alpr/init.S
+++ b/board/prodrive/alpr/init.S
@@ -24,6 +24,7 @@
#include <ppc_asm.tmpl>
#include <asm/mmu.h>
#include <config.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/prodrive/p3p440/init.S b/board/prodrive/p3p440/init.S
index 66acaf2..6230695 100644
--- a/board/prodrive/p3p440/init.S
+++ b/board/prodrive/p3p440/init.S
@@ -26,6 +26,7 @@
#include <ppc_asm.tmpl>
#include <asm/mmu.h>
#include <config.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/sandburst/karef/init.S b/board/sandburst/karef/init.S
index 2bdae06..11ab5af 100644
--- a/board/sandburst/karef/init.S
+++ b/board/sandburst/karef/init.S
@@ -26,6 +26,7 @@
#include <ppc_asm.tmpl>
#include <asm/mmu.h>
#include <config.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/sandburst/metrobox/init.S b/board/sandburst/metrobox/init.S
index fa78a3f..be3f885 100644
--- a/board/sandburst/metrobox/init.S
+++ b/board/sandburst/metrobox/init.S
@@ -24,6 +24,7 @@
#include <ppc_asm.tmpl>
#include <asm/mmu.h>
#include <config.h>
+#include <asm/ppc4xx.h>
/**************************************************************************
* TLB TABLE
diff --git a/board/xes/xpedite1000/init.S b/board/xes/xpedite1000/init.S
index fa50c8e..27769cc 100644
--- a/board/xes/xpedite1000/init.S
+++ b/board/xes/xpedite1000/init.S
@@ -23,6 +23,7 @@
#include <ppc_asm.tmpl>
#include <asm/mmu.h>
#include <config.h>
+#include <asm/ppc4xx.h>
/*
* TLB TABLE
diff --git a/common/serial.c b/common/serial.c
index 1345c08..dbc74bd 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -38,8 +38,7 @@ struct serial_device *__default_serial_console (void)
#elif defined(CONFIG_8xx_CONS_SCC1) || defined(CONFIG_8xx_CONS_SCC2) \
|| defined(CONFIG_8xx_CONS_SCC3) || defined(CONFIG_8xx_CONS_SCC4)
return &serial_scc_device;
-#elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
- || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \
+#elif defined(CONFIG_4xx) \
|| defined(CONFIG_MB86R0x) || defined(CONFIG_MPC5xxx) \
|| defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) \
|| defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520)
@@ -127,13 +126,6 @@ void serial_initialize (void)
serial_register (&serial_scc_device);
#endif
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
- || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \
- || defined(CONFIG_MPC5xxx)
- serial_register(&serial0_device);
- serial_register(&serial1_device);
-#endif
-
#if defined(CONFIG_SYS_NS16550_SERIAL)
#if defined(CONFIG_SYS_NS16550_COM1)
serial_register(&eserial1_device);
diff --git a/include/common.h b/include/common.h
index 2151597..d618227 100644
--- a/include/common.h
+++ b/include/common.h
@@ -535,6 +535,7 @@ ulong get_PERCLK2(void);
ulong get_PERCLK3(void);
#endif
ulong get_bus_freq (ulong);
+int get_serial_clock(void);
#if defined(CONFIG_MPC85xx)
typedef MPC85xx_SYS_INFO sys_info_t;
diff --git a/include/configs/APC405.h b/include/configs/APC405.h
index a7724ad..07a77ee 100644
--- a/include/configs/APC405.h
+++ b/include/configs/APC405.h
@@ -176,6 +176,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_EXT_SERIAL_CLOCK 14745600 /* use external serial clock */
/* The following table includes the supported baudrates */
diff --git a/include/configs/AR405.h b/include/configs/AR405.h
index 45c64c2..568ce15 100644
--- a/include/configs/AR405.h
+++ b/include/configs/AR405.h
@@ -127,6 +127,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_EXT_SERIAL_CLOCK 14745600 /* use external serial clock */
/* The following table includes the supported baudrates */
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index 98bd6f3..789f750 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -124,9 +124,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#undef CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h
index 115a6f9..ad075b8 100644
--- a/include/configs/CANBT.h
+++ b/include/configs/CANBT.h
@@ -100,6 +100,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_EXT_SERIAL_CLOCK 14745600 /* use external serial clock */
/* The following table includes the supported baudrates */
diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index da85442..550c462 100644
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -86,7 +86,11 @@
# error "* External frequency (SysClk) not defined! *"
#endif
-#define CONFIG_UART1_CONSOLE 1 /* Use second UART */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index ede9970..9c57acb 100644
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -122,9 +122,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#define CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index 9221211..c6882fd 100644
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -111,9 +111,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#define CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index 3e7020d..da57b04 100644
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -125,6 +125,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index d3000f6..d682d37 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -134,6 +134,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index d376344..1c521f2 100644
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -133,6 +133,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h
index 07acab0..c7b7931 100644
--- a/include/configs/CPCI405DT.h
+++ b/include/configs/CPCI405DT.h
@@ -135,6 +135,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h
index 5b50bcf..f114290 100644
--- a/include/configs/CPCIISER4.h
+++ b/include/configs/CPCIISER4.h
@@ -110,6 +110,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_EXT_SERIAL_CLOCK 1843200 /* use external serial clock */
/* The following table includes the supported baudrates */
diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 9ab30ec..f6cd760 100644
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -47,6 +47,12 @@
#define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */
#define CONFIG_NET_MULTI
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
/* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
* keep possible initrd ramdisk decompression out. This is in k (1024 bytes)
#define CONFIG_PRAM 16
diff --git a/include/configs/DP405.h b/include/configs/DP405.h
index 0ee456b..5311dfb 100644
--- a/include/configs/DP405.h
+++ b/include/configs/DP405.h
@@ -97,9 +97,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#undef CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/DU405.h b/include/configs/DU405.h
index 8f1fc78..0907c3a 100644
--- a/include/configs/DU405.h
+++ b/include/configs/DU405.h
@@ -109,6 +109,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* use external serial clock */
/* The following table includes the supported baudrates */
diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index 830466f..9c34994 100644
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -64,9 +64,6 @@
#define CONFIG_SYS_PCI_SUBSYS_VENDORID PCI_VENDOR_ID_ESDGMBH
#define CONFIG_SYS_PCI_SUBSYS_ID 0x0444 /* device ID for DU440 */
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
-
#define CONFIG_SYS_USB2D0_BASE 0xe0000100
#define CONFIG_SYS_USB_DEVICE 0xe0000000
#define CONFIG_SYS_USB_HOST 0xe0000400
@@ -86,10 +83,14 @@
/*
* Serial Port
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
#define CONFIG_BAUDRATE 115200
#define CONFIG_SERIAL_MULTI 1
-#undef CONFIG_UART1_CONSOLE
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h
index e07f9a1..da3b4ae 100644
--- a/include/configs/ERIC.h
+++ b/include/configs/ERIC.h
@@ -139,6 +139,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_EXT_SERIAL_CLOCK 14318180
/* The following table includes the supported baudrates */
diff --git a/include/configs/G2000.h b/include/configs/G2000.h
index 4d29f21..e2e6cb2 100644
--- a/include/configs/G2000.h
+++ b/include/configs/G2000.h
@@ -151,9 +151,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#undef CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index d940a88..0db9298 100644
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -176,9 +176,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#define CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index 72e907b..5dea96e 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -118,9 +118,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#undef CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index 98f5661..c692b54 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -95,9 +95,13 @@
#define CONFIG_ENV_OFFSET 0x00
#define CONFIG_ENV_SIZE 512
-
/* The JSE connects UART1 to the console tap connector. */
-#define CONFIG_UART1_CONSOLE 1
+#define CONFIG_CONS_INDEX 2
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
/* Set console baudrate to 9600 */
#define CONFIG_BAUDRATE 9600
diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h
index 49a7378..f936ae5 100644
--- a/include/configs/KAREF.h
+++ b/include/configs/KAREF.h
@@ -59,7 +59,6 @@
#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
#define CONFIG_SYS_MONITOR_BASE 0xfff80000 /* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
@@ -91,6 +90,11 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SERIAL_MULTI 1
#define CONFIG_BAUDRATE 9600
diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h
index e7429dd..7f2542c 100644
--- a/include/configs/METROBOX.h
+++ b/include/configs/METROBOX.h
@@ -125,7 +125,6 @@
#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
#define CONFIG_SYS_MONITOR_BASE 0xfff80000 /* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
@@ -153,6 +152,11 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SERIAL_MULTI 1
#define CONFIG_BAUDRATE 9600
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 7e6484e..e833e6d 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -176,6 +176,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 916667
diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h
index 55471af..ad2e4da 100644
--- a/include/configs/OCRTC.h
+++ b/include/configs/OCRTC.h
@@ -105,6 +105,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h
index 1424713..3d35362 100644
--- a/include/configs/ORSG.h
+++ b/include/configs/ORSG.h
@@ -105,6 +105,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h
index 0d443ea..244d6fe 100644
--- a/include/configs/PCI405.h
+++ b/include/configs/PCI405.h
@@ -110,6 +110,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 3e57c0b..2901cfd 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -167,6 +167,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index a308782..928ed8e 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -135,9 +135,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#undef CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index 00a12fb..c420efe 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -130,6 +130,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock */
#define CONFIG_SYS_BASE_BAUD 806400
diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h
index 2c048dd..5b1048e 100644
--- a/include/configs/PMC405DE.h
+++ b/include/configs/PMC405DE.h
@@ -107,9 +107,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x3000000 /* 1 ... 48 MB in DRAM */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
#define CONFIG_SYS_BASE_BAUD 691200
-#define CONFIG_UART1_CONSOLE
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 3c19f52..fd2e9a9 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -72,9 +72,6 @@
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
#define CONFIG_SYS_PCI_MEMSIZE 0x80000000 /* 2GB! */
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
-
#define CONFIG_SYS_USB2D0_BASE 0xe0000100
#define CONFIG_SYS_USB_DEVICE 0xe0000000
#define CONFIG_SYS_USB_HOST 0xe0000400
@@ -95,10 +92,14 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
#define CONFIG_BAUDRATE 115200
-#define CONFIG_SERIAL_MULTI 1
-#undef CONFIG_UART1_CONSOLE /* console on front panel */
+#define CONFIG_SERIAL_MULTI 1
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index e9cae85..f9b2014 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -191,6 +191,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index 21bb5b6..b9ea610 100644
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -133,9 +133,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#define CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h
index 747d6a0..a88b41a 100644
--- a/include/configs/VOM405.h
+++ b/include/configs/VOM405.h
@@ -120,9 +120,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#undef CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h
index f06bfe5..0fbe80c 100644
--- a/include/configs/W7OLMC.h
+++ b/include/configs/W7OLMC.h
@@ -125,6 +125,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#define CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 384000
diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h
index be8c9f8..f12fa55 100644
--- a/include/configs/W7OLMG.h
+++ b/include/configs/W7OLMG.h
@@ -133,6 +133,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#define CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 384000
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index 7756d3a..34a5fff 100644
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -122,9 +122,14 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
-#define CONFIG_UART1_CONSOLE /* define for uart1 as console */
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h
index cf39aea..f76ede3 100644
--- a/include/configs/XPEDITE1000.h
+++ b/include/configs/XPEDITE1000.h
@@ -54,7 +54,6 @@
#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
@@ -112,6 +111,12 @@ extern void out32(unsigned int, unsigned long);
/*
* Serial Port
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/acadia.h b/include/configs/acadia.h
index bd3388f..b6f909c 100644
--- a/include/configs/acadia.h
+++ b/include/configs/acadia.h
@@ -89,6 +89,7 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index ee0c14d..75106b4 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -45,7 +45,6 @@
#define CONFIG_SYS_MONITOR_BASE 0xfffc0000 /* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
#define CONFIG_SYS_PCI_MEMSIZE 0x40000000 /* size of mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000
@@ -75,9 +74,14 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
#define CONFIG_BAUDRATE 115200
-#define CONFIG_UART1_CONSOLE /* define for uart1 as console */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 23a859f..9c53d37 100644
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -31,8 +31,12 @@
/*
* UART
*/
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index 8c4127d..18276c5 100644
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -62,8 +62,7 @@
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
/*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
-#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/
+#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/
/*Don't change either of these*/
#define CONFIG_SYS_USB_DEVICE 0x50000000
@@ -85,9 +84,8 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
/*-----------------------------------------------------------------------
* NVRAM/RTC
diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h
index 05c4766..336e69e 100644
--- a/include/configs/bubinga.h
+++ b/include/configs/bubinga.h
@@ -123,6 +123,7 @@
* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
* set Linux BASE_BAUD to 403200.
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index e2c58a5..51087f7 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -114,8 +114,6 @@
#define CONFIG_SYS_SRAM_SIZE (256 << 10)
#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
-#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal peripherals */
-
#define CONFIG_SYS_AHB_BASE 0xE2000000 /* internal AHB peripherals */
/*-----------------------------------------------------------------------
@@ -130,7 +128,7 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
-#undef CONFIG_UART1_CONSOLE /* define this if you want console on UART1 */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
/*-----------------------------------------------------------------------
* Environment
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index 9ded330..7108210 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -160,6 +160,12 @@
* UART configuration
*
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#define CONFIG_SYS_EXT_SERIAL_CLOCK 3868400 /* use external serial clock */
#undef CONFIG_SYS_BASE_BAUD
#define CONFIG_BAUDRATE 38400 /* Default baud rate */
diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index 71eb083..7b9f29a 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -159,6 +159,12 @@
* UART configuration
*
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* use internal serial clock */
#define CONFIG_SYS_BASE_BAUD 691200
#define CONFIG_BAUDRATE 38400 /* Default baud rate */
diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index 4533799..5916db6 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -97,6 +97,7 @@
* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
* set Linux BASE_BAUD to 403200.
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/ebony.h b/include/configs/ebony.h
index 10f425d..09357d9 100644
--- a/include/configs/ebony.h
+++ b/include/configs/ebony.h
@@ -61,7 +61,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
@@ -81,6 +80,7 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h
index d193919..d6db7bf 100644
--- a/include/configs/gdppc440etx.h
+++ b/include/configs/gdppc440etx.h
@@ -59,7 +59,6 @@
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
/*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripheral*/
#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs */
/*Don't change either of these*/
@@ -80,8 +79,12 @@
/*
* Serial Port
*/
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
-#define CONFIG_UART1_CONSOLE
/*
* Environment
diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
index 26d2d0c..6694f53 100644
--- a/include/configs/hcu5.h
+++ b/include/configs/hcu5.h
@@ -70,9 +70,6 @@
#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
-
#define CONFIG_SYS_USB2D0_BASE 0xe0000100
#define CONFIG_SYS_USB_DEVICE 0xe0000000
#define CONFIG_SYS_USB_HOST 0xe0000400
@@ -94,7 +91,6 @@
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#define CONFIG_BAUDRATE 115200
#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#undef CONFIG_UART1_CONSOLE
/*-----------------------------------------------------------------------
* Environment
diff --git a/include/configs/icon.h b/include/configs/icon.h
index 7a4e60c..779af25 100644
--- a/include/configs/icon.h
+++ b/include/configs/icon.h
@@ -52,7 +52,6 @@
* actual resources get mapped (not physical addresses)
*/
#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* later mapped to this addr */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0x90000000 /* internal SRAM */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped PCI memory */
@@ -106,7 +105,7 @@
/*
* Serial Port
*/
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
/*
diff --git a/include/configs/intip.h b/include/configs/intip.h
index 0c0bb37..82c8282 100644
--- a/include/configs/intip.h
+++ b/include/configs/intip.h
@@ -96,8 +96,6 @@
#define CONFIG_SYS_SRAM_SIZE (256 << 10)
#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
-#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */
-
#define CONFIG_SYS_AHB_BASE 0xE2000000 /* int. AHB periph. */
/*
@@ -113,7 +111,7 @@
/*
* Serial Port
*/
-#undef CONFIG_UART1_CONSOLE /* define this if you want console on UART1 */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
/*
* Environment
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 2a7ab8d..884dd74 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -61,7 +61,6 @@
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0x90000000 /* internal SRAM */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped PCI memory */
@@ -105,7 +104,7 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
/*-----------------------------------------------------------------------
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 48dc946..937d7c5 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -57,7 +57,6 @@
#define CONFIG_SYS_FLASH_BASE 0xFC000000
#define CONFIG_SYS_NAND_ADDR 0xF8000000
#define CONFIG_SYS_FPGA_BASE 0xF0000000
-#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal peripherals*/
/*-----------------------------------------------------------------------
* Initial RAM & Stack Pointer Configuration Options
@@ -115,8 +114,7 @@
* Serial Port
*----------------------------------------------------------------------*/
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
/*-----------------------------------------------------------------------
* Environment
diff --git a/include/configs/korat.h b/include/configs/korat.h
index f95df68..0107a7b 100644
--- a/include/configs/korat.h
+++ b/include/configs/korat.h
@@ -71,9 +71,6 @@
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
#define CONFIG_SYS_PCI_MEMBASE2 (CONFIG_SYS_PCI_MEMBASE + 0x20000000)
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
-
#define CONFIG_SYS_USB2D0_BASE 0xe0000100
#define CONFIG_SYS_USB_DEVICE 0xe0000000
#define CONFIG_SYS_USB_HOST 0xe0000400
@@ -93,11 +90,14 @@
/*
* Serial Port
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SERIAL_MULTI 1
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/luan.h b/include/configs/luan.h
index ccd9397..6b1a41f 100644
--- a/include/configs/luan.h
+++ b/include/configs/luan.h
@@ -58,8 +58,6 @@
#define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xf0000000 /* internal peripherals */
-
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
@@ -88,8 +86,8 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */
-#undef CONFIG_UART1_CONSOLE /* define if you want console on UART1 */
/*-----------------------------------------------------------------------
* Environment
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 6461124..9df6fc7 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -62,9 +62,6 @@
#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
-
#define CONFIG_SYS_USB2D0_BASE 0xe0000100
#define CONFIG_SYS_USB_DEVICE 0xe0000000
#define CONFIG_SYS_USB_HOST 0xe0000400
@@ -106,11 +103,14 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external clock provided */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SERIAL_MULTI 1
-/* define this if you want console on UART1 */
-#define CONFIG_UART1_CONSOLE 1 /* use UART1 as console */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/makalu.h b/include/configs/makalu.h
index 52339f9..83a2d4a 100644
--- a/include/configs/makalu.h
+++ b/include/configs/makalu.h
@@ -55,7 +55,6 @@
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_BASE 0xFC000000
#define CONFIG_SYS_FPGA_BASE 0xF0000000
-#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal peripherals*/
/*-----------------------------------------------------------------------
* Initial RAM & Stack Pointer Configuration Options
@@ -112,9 +111,8 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no ext. clk */
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
/*-----------------------------------------------------------------------
* Environment
diff --git a/include/configs/neo.h b/include/configs/neo.h
index f275c7b..fde814b 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -98,6 +98,12 @@
* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
* set Linux BASE_BAUD to 403200.
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h
index cb7efe7..8f42b6c 100644
--- a/include/configs/netstal-common.h
+++ b/include/configs/netstal-common.h
@@ -34,7 +34,12 @@
/*
* UART
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h
index 2e809b0..b388a40 100644
--- a/include/configs/ocotea.h
+++ b/include/configs/ocotea.h
@@ -58,7 +58,6 @@
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
@@ -81,6 +80,7 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h
index d6b9207..6edf91e 100644
--- a/include/configs/p3p440.h
+++ b/include/configs/p3p440.h
@@ -49,7 +49,6 @@
#define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */
#define CONFIG_SYS_MONITOR_BASE 0xfffc0000 /* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
@@ -80,6 +79,12 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index 1f744b8..85152d1 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -60,7 +60,6 @@
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
/*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/
/*Don't change either of these*/
@@ -80,11 +79,14 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external clk used */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SERIAL_MULTI 1
-/*define this if you want console on UART1*/
-#undef CONFIG_UART1_CONSOLE
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h
index b778187..0764cc8 100644
--- a/include/configs/quad100hd.h
+++ b/include/configs/quad100hd.h
@@ -105,6 +105,11 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#define CONFIG_SYS_BASE_BAUD 691200
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/redwood.h b/include/configs/redwood.h
index 4b744a7..913db94 100644
--- a/include/configs/redwood.h
+++ b/include/configs/redwood.h
@@ -47,7 +47,6 @@
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_BASE 0xfff00000 /* start of FLASH */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0x90000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
@@ -77,6 +76,11 @@
#define CONFIG_SYS_FPGA_BASE 0xe2000000 /* epld */
#define CONFIG_SYS_OPER_FLASH 0xe7000000 /* SRAM - OPER Flash */
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+
/*-----------------------------------------------------------------------
* Initial RAM & stack pointer (placed in internal SRAM)
*----------------------------------------------------------------------*/
diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h
index 429b11c..187002c 100644
--- a/include/configs/sbc405.h
+++ b/include/configs/sbc405.h
@@ -147,6 +147,12 @@
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
#define CONFIG_SYS_BASE_BAUD 691200
diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index 19084ce..094d38b 100644
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -76,6 +76,11 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#define CONFIG_SERIAL_MULTI
#undef CONFIG_SERIAL_SOFTWARE_FIFO
/*
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 568d9fc..900d1db 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -84,9 +84,6 @@
#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
-
#define CONFIG_SYS_USB2D0_BASE 0xe0000100
#define CONFIG_SYS_USB_DEVICE 0xe0000000
#define CONFIG_SYS_USB_HOST 0xe0000400
@@ -105,9 +102,8 @@
/*
* Serial Port
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
-/* define this if you want console on UART1 */
-#undef CONFIG_UART1_CONSOLE
/*
* Environment
diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h
index 41ee15b..39ca793 100644
--- a/include/configs/t3corp.h
+++ b/include/configs/t3corp.h
@@ -89,8 +89,6 @@
#define CONFIG_SYS_SRAM_SIZE (256 << 10)
#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
-#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */
-
/*
* Initial RAM & stack pointer (placed in OCM)
*/
@@ -104,7 +102,7 @@
/*
* Serial Port
*/
-#undef CONFIG_UART1_CONSOLE /* define this if you want console on UART1 */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
/*
* Environment
diff --git a/include/configs/taihu.h b/include/configs/taihu.h
index 836081d..a9954e4 100644
--- a/include/configs/taihu.h
+++ b/include/configs/taihu.h
@@ -127,11 +127,11 @@
* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
* set Linux BASE_BAUD to 403200.
*/
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 691200
-#define CONFIG_UART1_CONSOLE 1
/*-----------------------------------------------------------------------
* I2C stuff
diff --git a/include/configs/taishan.h b/include/configs/taishan.h
index 6423fd7..ce4a612 100644
--- a/include/configs/taishan.h
+++ b/include/configs/taishan.h
@@ -50,7 +50,6 @@
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
@@ -77,7 +76,7 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
-#define CONFIG_UART1_CONSOLE 1 /* use of UART1 as console */
+#define CONFIG_CONS_INDEX 2 /* Use UART1 */
#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
/*-----------------------------------------------------------------------
diff --git a/include/configs/walnut.h b/include/configs/walnut.h
index 630c0d3..191c28f 100644
--- a/include/configs/walnut.h
+++ b/include/configs/walnut.h
@@ -84,6 +84,7 @@
* If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
* set Linux BASE_BAUD to 403200.
*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index b66ab58..ed0560a 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -62,7 +62,6 @@
#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
/*Don't change either of these*/
-#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs*/
/*Don't change either of these*/
@@ -84,9 +83,8 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
-/*define this if you want console on UART1*/
-#undef CONFIG_UART1_CONSOLE
/*-----------------------------------------------------------------------
* Environment
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 0b4dfb8..dfba508 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -60,7 +60,6 @@
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_BASE 0xfff00000 /* start of FLASH */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0x90000000 /* internal SRAM */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped PCI memory */
@@ -106,7 +105,7 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
-#undef CONFIG_UART1_CONSOLE
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#undef CONFIG_SYS_EXT_SERIAL_CLOCK
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 1ae990f..6fbf38a 100644
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -122,14 +122,18 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
-#define CONFIG_SYS_BASE_BAUD 691200
+#define CONFIG_SYS_BASE_BAUD 691200
#define CONFIG_BAUDRATE 115200
#define CONFIG_SERIAL_MULTI
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
--
1.7.3
1
1