September 2010 - U-Boot

[U-Boot] [PATCH] ppc4xx: Disable trace broadcast for 44x non debug mode
by Victor Gallardo 22 Sep '10

22 Sep '10

By default the trace broadcast is enabled on 44x systems. To reduce power consumption when instruction tracing is not needed, disable trace broadcast. Check External Debug Mode (EDM) bit to detect if it should be disabled or not. Resetting system via a debugger will set the DBCR0[EDM] bit. Resetting via u-boot or OS will not. Signed-off-by: Victor Gallardo <vgallardo(a)apm.com> --- arch/powerpc/cpu/ppc4xx/start.S | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 4bad32f..bac8681 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -340,6 +340,9 @@ _start_440: mfspr r1,SPRN_DBCR0 andis. r1, r1, 0x8000 /* test DBCR0[EDM] bit */ bne skip_debug_init /* if set, don't clear debug register */ + mfspr r1,SPRN_CCR0 + ori r1,r1,CCR0_DTB@l /* Disable Trace Broadcast */ + mtspr SPRN_CCR0,r1 mtspr SPRN_DBCR0,r0 mtspr SPRN_DBCR1,r0 mtspr SPRN_DBCR2,r0 -- 1.6.1.rc3

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[U-Boot] variable substitution not working with cp.b
by André Schwarz 22 Sep '10

22 Sep '10

I'm running on MVBLM7 board using CONFIG_SYS_HUSH_PARSER. While working on some scripts using env-variables holding some physical address values I stumbled over this : my env-variables used : loadaddr=0x400000 kernel_addr=0xff81000 kernel_len=0x200000 mvBL-M7> erase $kernel_addr +$kernel_len ................................ done Erased 32 sectors ################# -> using variable as source doesn't work. mvBL-M7> cp.b $load_addr $kernel_addr $kernel_len cp - memory copy Usage: cp [.b, .w, .l] source target count ################# -> using addr as source works fine. mvBL-M7> cp.b 0x400000 $kernel_addr $kernel_len Copy to Flash... done mvBL-M7> Why does $load_addr not get expanded ? Any ideas ? Regards, André MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

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[U-Boot] [PATCH 0/5] ppc4xx: Big header cleanup
by Stefan Roese 22 Sep '10

22 Sep '10

This patchset tries to cleanup and the PPC4xx headers. To do this the following things are done: - Move headers from include/* to arch/powerpc/include/asm/* to not clutter the toplevel include directory that much - Create header files for each PPC4xx SoC variant and move SoC specific defines into these headers - Removal of unreferenced defines - Coding style cleanups The result of this cleanup is the removal of the #ifdef mess from the ppc405.h and ppc440.h headers. This patchset is already based on the "next" branch and should be used (if nobody objects) as bases for further PPC4xx (APM) SoC additions like the APM812xx support. If needed I could also push a branch with these patches online. Just let me know. Here the status info: Stefan Roese (5): ppc4xx: Remove unreferenced file include/405_dimm.h ppc4xx: Move ppc4xx headers to powerpc include directory ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specific ppc4xx: Big header cleanup, mostly PPC440 related ppc4xx: Big header cleanup part 2, mostly PPC405 related arch/blackfin/cpu/cmd_gpio.c | 2 +- arch/blackfin/cpu/gpio.c | 2 +- arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c | 2 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c | 2 +- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 4 +- arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c | 2 +- arch/powerpc/cpu/ppc4xx/4xx_pci.c | 36 +- arch/powerpc/cpu/ppc4xx/4xx_pcie.c | 2 +- arch/powerpc/cpu/ppc4xx/4xx_uart.c | 6 +- arch/powerpc/cpu/ppc4xx/cache.S | 2 +- arch/powerpc/cpu/ppc4xx/cmd_ecctest.c | 2 +- arch/powerpc/cpu/ppc4xx/cpu.c | 14 +- arch/powerpc/cpu/ppc4xx/cpu_init.c | 16 +- arch/powerpc/cpu/ppc4xx/dcr.S | 2 +- arch/powerpc/cpu/ppc4xx/denali_data_eye.c | 2 +- arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c | 2 +- arch/powerpc/cpu/ppc4xx/ecc.c | 2 +- arch/powerpc/cpu/ppc4xx/fdt.c | 2 +- arch/powerpc/cpu/ppc4xx/gpio.c | 7 +- arch/powerpc/cpu/ppc4xx/interrupts.c | 2 +- arch/powerpc/cpu/ppc4xx/kgdb.S | 2 +- arch/powerpc/cpu/ppc4xx/miiphy.c | 4 +- arch/powerpc/cpu/ppc4xx/reginfo.c | 8 +- arch/powerpc/cpu/ppc4xx/sdram.c | 2 +- arch/powerpc/cpu/ppc4xx/speed.c | 4 +- arch/powerpc/cpu/ppc4xx/start.S | 2 +- arch/powerpc/cpu/ppc4xx/tlb.c | 2 +- arch/powerpc/cpu/ppc4xx/uic.c | 2 +- arch/powerpc/cpu/ppc4xx/xilinx_irq.c | 2 +- arch/powerpc/include/asm/4xx_pcie.h | 2 +- arch/powerpc/include/asm/ppc405.h | 80 + arch/powerpc/include/asm/ppc405cr.h | 100 + arch/powerpc/include/asm/ppc405ep.h | 247 +++ arch/powerpc/include/asm/ppc405ex.h | 85 + arch/powerpc/include/asm/ppc405ez.h | 97 + arch/powerpc/include/asm/ppc405gp.h | 103 + arch/powerpc/include/asm/ppc440.h | 193 ++ arch/powerpc/include/asm/ppc440ep_gr.h | 234 +++ arch/powerpc/include/asm/ppc440epx_grx.h | 458 +++++ arch/powerpc/include/asm/ppc440gp.h | 62 + arch/powerpc/include/asm/ppc440gx.h | 91 + arch/powerpc/include/asm/ppc440sp.h | 87 + arch/powerpc/include/asm/ppc440spe.h | 104 ++ arch/powerpc/include/asm/ppc460ex_gt.h | 211 +++ arch/powerpc/include/asm/ppc460sx.h | 38 + .../powerpc/include/asm/ppc4xx-emac.h | 8 +- arch/powerpc/include/asm/{gpio.h => ppc4xx-gpio.h} | 0 .../powerpc/include/asm/ppc4xx-i2c.h | 0 arch/powerpc/include/asm/ppc4xx-mal.h | 168 ++ arch/powerpc/include/asm/ppc4xx-sdram.h | 2 - arch/powerpc/include/asm/ppc4xx.h | 328 ++++ board/amcc/acadia/memory.c | 2 +- board/amcc/acadia/pll.c | 30 +- board/amcc/bamboo/bamboo.c | 6 +- board/amcc/bamboo/bamboo.h | 11 - board/amcc/bamboo/flash.c | 6 +- board/amcc/bubinga/flash.c | 2 +- board/amcc/canyonlands/canyonlands.c | 4 +- board/amcc/common/flash.c | 2 +- board/amcc/ebony/flash.c | 2 +- board/amcc/katmai/katmai.c | 4 +- board/amcc/kilauea/kilauea.c | 4 +- board/amcc/luan/flash.c | 2 +- board/amcc/luan/luan.c | 2 +- board/amcc/makalu/makalu.c | 6 +- board/amcc/ocotea/flash.c | 2 +- board/amcc/ocotea/ocotea.c | 2 +- board/amcc/redwood/redwood.c | 2 +- board/amcc/sequoia/sdram.c | 2 +- board/amcc/sequoia/sequoia.c | 8 +- board/amcc/taihu/flash.c | 2 +- board/amcc/taihu/lcd.c | 2 +- board/amcc/taihu/taihu.c | 2 +- board/amcc/taishan/taishan.c | 2 +- board/amcc/walnut/flash.c | 2 +- board/amcc/yosemite/yosemite.c | 2 +- board/amcc/yucca/flash.c | 4 +- board/amcc/yucca/yucca.c | 2 +- board/amirix/ap1000/init.S | 2 +- board/amirix/ap1000/pci.c | 2 +- board/bf527-ezkit/bf527-ezkit.c | 2 +- board/bf533-stamp/bf533-stamp.c | 2 +- board/bf548-ezkit/bf548-ezkit.c | 2 +- board/bf548-ezkit/video.c | 2 +- board/blackstamp/blackstamp.c | 2 +- board/cm-bf527/gpio_cfi_flash.c | 2 +- board/cm-bf537e/gpio_cfi_flash.c | 2 +- board/cm-bf537u/gpio_cfi_flash.c | 2 +- board/cm-bf548/video.c | 2 +- board/cray/L1/L1.c | 2 +- board/cray/L1/flash.c | 2 +- board/cray/L1/init.S | 2 +- board/csb272/csb272.c | 2 +- board/csb272/init.S | 2 +- board/csb472/csb472.c | 2 +- board/csb472/init.S | 2 +- board/dave/PPChameleonEVB/flash.c | 2 +- board/dave/common/pci.c | 2 +- board/eric/flash.c | 2 +- board/eric/init.S | 2 +- board/esd/adciop/flash.c | 2 +- board/esd/ar405/flash.c | 2 +- board/esd/ash405/flash.c | 2 +- board/esd/canbt/flash.c | 2 +- board/esd/cms700/flash.c | 2 +- board/esd/common/flash.c | 2 +- board/esd/common/pci.c | 2 +- board/esd/cpci2dp/flash.c | 2 +- board/esd/cpci405/flash.c | 2 +- board/esd/cpciiser4/flash.c | 2 +- board/esd/dasa_sim/flash.c | 2 +- board/esd/dp405/flash.c | 2 +- board/esd/du405/du405.c | 4 +- board/esd/du405/flash.c | 2 +- board/esd/du440/du440.c | 6 +- board/esd/hh405/flash.c | 2 +- board/esd/hub405/flash.c | 2 +- board/esd/ocrtc/flash.c | 2 +- board/esd/pci405/flash.c | 2 +- board/esd/pci405/pci405.c | 1 - board/esd/pci405/writeibm.S | 2 +- board/esd/plu405/flash.c | 2 +- board/esd/pmc405de/pmc405de.c | 2 +- board/esd/pmc440/pmc440.c | 6 +- board/esd/pmc440/sdram.c | 2 +- board/esd/tasreg/flash.c | 2 +- board/esd/voh405/flash.c | 2 +- board/esd/vom405/flash.c | 2 +- board/esd/wuh405/flash.c | 2 +- board/gdsys/dlvision/dlvision.c | 2 +- board/gdsys/gdppc440etx/gdppc440etx.c | 2 +- board/gdsys/intip/intip.c | 4 +- board/jse/flash.c | 2 +- board/jse/init.S | 2 +- board/jse/jse.c | 2 +- board/jse/sdram.c | 2 +- board/korat/korat.c | 8 +- board/lwmon5/lwmon5.c | 12 +- board/lwmon5/sdram.c | 2 +- board/ml2/init.S | 2 +- board/mosaixtech/icon/icon.c | 4 +- board/mpl/common/flash.c | 2 +- board/mpl/common/memtst.c | 2 +- board/mpl/mip405/init.S | 3 +- board/mpl/mip405/mip405.c | 3 +- board/mpl/pip405/init.S | 3 +- board/netstal/common/fixed_sdram.c | 2 +- board/netstal/hcu4/hcu4.c | 2 +- board/netstal/hcu5/hcu5.c | 26 +- board/netstal/hcu5/sdram.c | 2 +- board/netstal/mcu25/mcu25.c | 2 +- board/pcs440ep/pcs440ep.c | 2 +- board/prodrive/alpr/alpr.c | 2 +- board/prodrive/alpr/fpga.c | 2 +- board/quad100hd/nand.c | 2 +- board/quad100hd/quad100hd.c | 2 +- board/sandburst/common/flash.c | 2 +- board/sandburst/common/ppc440gx_i2c.c | 4 +- board/sandburst/common/ppc440gx_i2c.h | 4 +- board/sc3/init.S | 2 +- board/sc3/sc3.c | 10 +- board/snmc/qs850/flash.c | 2 +- board/snmc/qs860t/flash.c | 2 +- board/t3corp/t3corp.c | 4 +- board/tb0229/flash.c | 2 +- board/tcm-bf537/gpio_cfi_flash.c | 2 +- board/w7o/flash.c | 2 +- board/w7o/init.S | 2 +- board/w7o/post1.S | 2 +- board/zeus/update.c | 2 +- board/zeus/zeus.c | 2 +- drivers/i2c/ppc4xx_i2c.c | 4 +- drivers/i2c/soft_i2c.c | 2 +- drivers/misc/gpio_led.c | 2 +- drivers/mtd/nand/nand_plat.c | 2 +- drivers/mtd/nand/ndfc.c | 2 +- drivers/net/4xx_enet.c | 9 +- drivers/spi/bfin_spi.c | 2 +- include/405_dimm.h | 4 - include/405_mal.h | 129 -- include/common.h | 2 +- include/configs/ASH405.h | 10 +- include/configs/CATcenter.h | 12 +- include/configs/CMS700.h | 12 +- include/configs/DP405.h | 12 +- include/configs/G2000.h | 10 +- include/configs/HH405.h | 10 +- include/configs/HUB405.h | 10 +- include/configs/PLU405.h | 10 +- include/configs/PPChameleonEVB.h | 23 +- include/configs/VOH405.h | 10 +- include/configs/VOM405.h | 12 +- include/configs/WUH405.h | 10 +- include/configs/bubinga.h | 10 +- include/configs/quad100hd.h | 10 +- include/configs/zeus.h | 10 +- include/ppc405.h | 832 --------- include/ppc440.h | 1958 -------------------- include/ppc4xx.h | 225 --- nand_spl/board/amcc/bamboo/sdram.c | 2 +- nand_spl/board/amcc/canyonlands/ddr2_fixed.c | 4 +- post/board/lwmon5/watchdog.c | 2 +- post/cpu/ppc4xx/denali_ecc.c | 2 +- post/cpu/ppc4xx/ether.c | 4 +- post/cpu/ppc4xx/fpu.c | 2 +- 205 files changed, 3041 insertions(+), 3529 deletions(-) create mode 100644 arch/powerpc/include/asm/ppc405.h create mode 100644 arch/powerpc/include/asm/ppc405cr.h create mode 100644 arch/powerpc/include/asm/ppc405ep.h create mode 100644 arch/powerpc/include/asm/ppc405ex.h create mode 100644 arch/powerpc/include/asm/ppc405ez.h create mode 100644 arch/powerpc/include/asm/ppc405gp.h create mode 100644 arch/powerpc/include/asm/ppc440.h create mode 100644 arch/powerpc/include/asm/ppc440ep_gr.h create mode 100644 arch/powerpc/include/asm/ppc440epx_grx.h create mode 100644 arch/powerpc/include/asm/ppc440gp.h create mode 100644 arch/powerpc/include/asm/ppc440gx.h create mode 100644 arch/powerpc/include/asm/ppc440sp.h create mode 100644 arch/powerpc/include/asm/ppc440spe.h create mode 100644 arch/powerpc/include/asm/ppc460ex_gt.h create mode 100644 arch/powerpc/include/asm/ppc460sx.h rename include/ppc4xx_enet.h => arch/powerpc/include/asm/ppc4xx-emac.h (98%) rename arch/powerpc/include/asm/{gpio.h => ppc4xx-gpio.h} (100%) rename include/4xx_i2c.h => arch/powerpc/include/asm/ppc4xx-i2c.h (100%) create mode 100644 arch/powerpc/include/asm/ppc4xx-mal.h create mode 100644 arch/powerpc/include/asm/ppc4xx.h delete mode 100644 include/405_dimm.h delete mode 100644 include/405_mal.h delete mode 100644 include/ppc405.h delete mode 100644 include/ppc440.h delete mode 100644 include/ppc4xx.h

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[U-Boot] [PATCH] ppc4xx: Cleanup of PVR detection code in cpu.c
by Stefan Roese 22 Sep '10

22 Sep '10

This patch cleans the PVR detection code in check_cpu() up a bit. Basically the strings are better seperated, resulting in an easier to understand and maintain code version. The #ifdef's couldn't be removed easily because of two reasons: - Some SoC revisions have the same PVR, so need a way to differentiate between those two SoC's. - In some case statements registers only available in this SoC variant are referenced. Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't add this 440 detection code and vice versa. Resulting in this U-Boot image size change: 405EX (Kilauea): 408 bytes less 440EPx (Sequoia): 604 bytes less 460EX (Canyonlands): 564 bytes less Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Wolfgang Denk <wd(a)denx.de> --- arch/powerpc/cpu/ppc4xx/cpu.c | 132 +++++++++++++++++++---------------------- 1 files changed, 61 insertions(+), 71 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c index 851065c..e390a1c 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu.c +++ b/arch/powerpc/cpu/ppc4xx/cpu.c @@ -303,122 +303,112 @@ int checkcpu (void) get_sys_info(&sys_info); #if defined(CONFIG_XILINX_440) - puts("IBM PowerPC 4"); + puts("IBM PowerPC "); #else - puts("AMCC PowerPC 4"); -#endif - -#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \ - defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \ - defined(CONFIG_405EX) - puts("05"); -#endif -#if defined(CONFIG_440) -#if defined(CONFIG_460EX) || defined(CONFIG_460GT) - puts("60"); -#else - puts("40"); -#endif + puts("AMCC PowerPC "); #endif switch (pvr) { + +#if !defined(CONFIG_440) case PVR_405GP_RB: - puts("GP Rev. B"); + puts("405GP Rev. B"); break; case PVR_405GP_RC: - puts("GP Rev. C"); + puts("405GP Rev. C"); break; case PVR_405GP_RD: - puts("GP Rev. D"); + puts("405GP Rev. D"); break; #ifdef CONFIG_405GP case PVR_405GP_RE: /* 405GP rev E and 405CR rev C have same PVR */ - puts("GP Rev. E"); + puts("405GP Rev. E"); break; #endif case PVR_405CR_RA: - puts("CR Rev. A"); + puts("405CR Rev. A"); break; case PVR_405CR_RB: - puts("CR Rev. B"); + puts("405CR Rev. B"); break; #ifdef CONFIG_405CR case PVR_405CR_RC: /* 405GP rev E and 405CR rev C have same PVR */ - puts("CR Rev. C"); + puts("405CR Rev. C"); break; #endif case PVR_405GPR_RB: - puts("GPr Rev. B"); + puts("405GPr Rev. B"); break; case PVR_405EP_RB: - puts("EP Rev. B"); + puts("405EP Rev. B"); break; case PVR_405EZ_RA: - puts("EZ Rev. A"); + puts("405EZ Rev. A"); break; case PVR_405EX1_RA: - puts("EX Rev. A"); + puts("405EX Rev. A"); strcpy(addstr, "Security support"); break; case PVR_405EXR2_RA: - puts("EXr Rev. A"); + puts("405EXr Rev. A"); strcpy(addstr, "No Security support"); break; case PVR_405EX1_RC: - puts("EX Rev. C"); + puts("405EX Rev. C"); strcpy(addstr, "Security support"); break; case PVR_405EX2_RC: - puts("EX Rev. C"); + puts("405EX Rev. C"); strcpy(addstr, "No Security support"); break; case PVR_405EXR1_RC: - puts("EXr Rev. C"); + puts("405EXr Rev. C"); strcpy(addstr, "Security support"); break; case PVR_405EXR2_RC: - puts("EXr Rev. C"); + puts("405EXr Rev. C"); strcpy(addstr, "No Security support"); break; case PVR_405EX1_RD: - puts("EX Rev. D"); + puts("405EX Rev. D"); strcpy(addstr, "Security support"); break; case PVR_405EX2_RD: - puts("EX Rev. D"); + puts("405EX Rev. D"); strcpy(addstr, "No Security support"); break; case PVR_405EXR1_RD: - puts("EXr Rev. D"); + puts("405EXr Rev. D"); strcpy(addstr, "Security support"); break; case PVR_405EXR2_RD: - puts("EXr Rev. D"); + puts("405EXr Rev. D"); strcpy(addstr, "No Security support"); break; -#if defined(CONFIG_440) +#else /* CONFIG_440 */ + case PVR_440GP_RB: - puts("GP Rev. B"); + puts("440GP Rev. B"); /* See errata 1.12: CHIP_4 */ if ((mfdcr(CPC0_SYS0) != mfdcr(CPC0_STRP0)) || (mfdcr(CPC0_SYS1) != mfdcr(CPC0_STRP1)) ){ @@ -431,127 +421,126 @@ int checkcpu (void) break; case PVR_440GP_RC: - puts("GP Rev. C"); + puts("440GP Rev. C"); break; case PVR_440GX_RA: - puts("GX Rev. A"); + puts("440GX Rev. A"); break; case PVR_440GX_RB: - puts("GX Rev. B"); + puts("440GX Rev. B"); break; case PVR_440GX_RC: - puts("GX Rev. C"); + puts("440GX Rev. C"); break; case PVR_440GX_RF: - puts("GX Rev. F"); + puts("440GX Rev. F"); break; case PVR_440EP_RA: - puts("EP Rev. A"); + puts("440EP Rev. A"); break; #ifdef CONFIG_440EP case PVR_440EP_RB: /* 440EP rev B and 440GR rev A have same PVR */ - puts("EP Rev. B"); + puts("440EP Rev. B"); break; case PVR_440EP_RC: /* 440EP rev C and 440GR rev B have same PVR */ - puts("EP Rev. C"); + puts("440EP Rev. C"); break; #endif /* CONFIG_440EP */ #ifdef CONFIG_440GR case PVR_440GR_RA: /* 440EP rev B and 440GR rev A have same PVR */ - puts("GR Rev. A"); + puts("440GR Rev. A"); break; case PVR_440GR_RB: /* 440EP rev C and 440GR rev B have same PVR */ - puts("GR Rev. B"); + puts("440GR Rev. B"); break; #endif /* CONFIG_440GR */ -#endif /* CONFIG_440 */ #ifdef CONFIG_440EPX case PVR_440EPX1_RA: /* 440EPx rev A and 440GRx rev A have same PVR */ - puts("EPx Rev. A"); + puts("440EPx Rev. A"); strcpy(addstr, "Security/Kasumi support"); break; case PVR_440EPX2_RA: /* 440EPx rev A and 440GRx rev A have same PVR */ - puts("EPx Rev. A"); + puts("440EPx Rev. A"); strcpy(addstr, "No Security/Kasumi support"); break; #endif /* CONFIG_440EPX */ #ifdef CONFIG_440GRX case PVR_440GRX1_RA: /* 440EPx rev A and 440GRx rev A have same PVR */ - puts("GRx Rev. A"); + puts("440GRx Rev. A"); strcpy(addstr, "Security/Kasumi support"); break; case PVR_440GRX2_RA: /* 440EPx rev A and 440GRx rev A have same PVR */ - puts("GRx Rev. A"); + puts("440GRx Rev. A"); strcpy(addstr, "No Security/Kasumi support"); break; #endif /* CONFIG_440GRX */ case PVR_440SP_6_RAB: - puts("SP Rev. A/B"); + puts("440SP Rev. A/B"); strcpy(addstr, "RAID 6 support"); break; case PVR_440SP_RAB: - puts("SP Rev. A/B"); + puts("440SP Rev. A/B"); strcpy(addstr, "No RAID 6 support"); break; case PVR_440SP_6_RC: - puts("SP Rev. C"); + puts("440SP Rev. C"); strcpy(addstr, "RAID 6 support"); break; case PVR_440SP_RC: - puts("SP Rev. C"); + puts("440SP Rev. C"); strcpy(addstr, "No RAID 6 support"); break; case PVR_440SPe_6_RA: - puts("SPe Rev. A"); + puts("440SPe Rev. A"); strcpy(addstr, "RAID 6 support"); break; case PVR_440SPe_RA: - puts("SPe Rev. A"); + puts("440SPe Rev. A"); strcpy(addstr, "No RAID 6 support"); break; case PVR_440SPe_6_RB: - puts("SPe Rev. B"); + puts("440SPe Rev. B"); strcpy(addstr, "RAID 6 support"); break; case PVR_440SPe_RB: - puts("SPe Rev. B"); + puts("440SPe Rev. B"); strcpy(addstr, "No RAID 6 support"); break; #if defined(CONFIG_460EX) || defined(CONFIG_460GT) case PVR_460EX_RA: - puts("EX Rev. A"); + puts("460EX Rev. A"); strcpy(addstr, "No Security/Kasumi support"); break; case PVR_460EX_SE_RA: - puts("EX Rev. A"); + puts("460EX Rev. A"); strcpy(addstr, "Security/Kasumi support"); break; case PVR_460EX_RB: - puts("EX Rev. B"); + puts("460EX Rev. B"); mfsdr(SDR0_ECID3, reg); if (reg & 0x00100000) strcpy(addstr, "No Security/Kasumi support"); @@ -560,17 +549,17 @@ int checkcpu (void) break; case PVR_460GT_RA: - puts("GT Rev. A"); + puts("460GT Rev. A"); strcpy(addstr, "No Security/Kasumi support"); break; case PVR_460GT_SE_RA: - puts("GT Rev. A"); + puts("460GT Rev. A"); strcpy(addstr, "Security/Kasumi support"); break; case PVR_460GT_RB: - puts("GT Rev. B"); + puts("460GT Rev. B"); mfsdr(SDR0_ECID3, reg); if (reg & 0x00100000) strcpy(addstr, "No Security/Kasumi support"); @@ -580,28 +569,29 @@ int checkcpu (void) #endif case PVR_460SX_RA: - puts("SX Rev. A"); + puts("460SX Rev. A"); strcpy(addstr, "Security support"); break; case PVR_460SX_RA_V1: - puts("SX Rev. A"); + puts("460SX Rev. A"); strcpy(addstr, "No Security support"); break; case PVR_460GX_RA: - puts("GX Rev. A"); + puts("460GX Rev. A"); strcpy(addstr, "Security support"); break; case PVR_460GX_RA_V1: - puts("GX Rev. A"); + puts("460GX Rev. A"); strcpy(addstr, "No Security support"); break; case PVR_VIRTEX5: - puts("x5 VIRTEX5"); + puts("440x5 VIRTEX5"); break; +#endif /* CONFIG_440 */ default: printf (" UNKNOWN (PVR=%08x)", pvr); -- 1.7.2.3

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[U-Boot] [PATCH] ppc4xx: POST UART: Use in/out_8() io-accessor functions
by Stefan Roese 22 Sep '10

22 Sep '10

This patch fixes a problem in the PPC4xx POST UART driver. This driver incorrectly used the in/out8() io-accessor functions. This could lead to problems since these functions don't guarantee execution ordering. This patch now replaces these functions with the correct ones. Additionally the driver is converted to using the NS16550 struct instead of macros for the register offsets. And some common code is factored out for better maintainability. Signed-off-by: Stefan Roese <sr(a)denx.de> --- include/ppc4xx.h | 10 +++++ post/cpu/ppc4xx/uart.c | 105 +++++++++++++++++++----------------------------- 2 files changed, 51 insertions(+), 64 deletions(-) diff --git a/include/ppc4xx.h b/include/ppc4xx.h index ee30a4c..5238d04 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -99,6 +99,16 @@ #endif /* 440EP/EPX 440GR/GRX 440SP/SPE 460EX/GT/SX 405EX*/ +/* + * Define ns16550 register offset for all PPC4xx SoC's. Some + * mostly FPGA based PPC4xx implementations use a different + * offset. So let's give them a chance to define their offset + * in the board config header. + */ +#if !defined(CONFIG_SYS_NS16550_REG_SIZE) +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#endif + #if defined(CONFIG_440) #include <ppc440.h> #else diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index be217fc..6b61cc1 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -4,6 +4,8 @@ * * Author: Igor Lisitsin <igor(a)emcraft.com> * + * Copyright 2010, Stefan Roese, DENX Software Engineering, sr(a)denx.de + * * See file CREDITS for list of people who contributed to this * project. * @@ -24,6 +26,9 @@ */ #include <common.h> +#include <ppc4xx.h> +#include <ns16550.h> +#include <asm/io.h> /* * UART test @@ -119,32 +124,23 @@ #define UDIV_MAX 32 #endif -#define UART_RBR 0x00 -#define UART_THR 0x00 -#define UART_IER 0x01 -#define UART_IIR 0x02 -#define UART_FCR 0x02 -#define UART_LCR 0x03 -#define UART_MCR 0x04 -#define UART_LSR 0x05 -#define UART_MSR 0x06 -#define UART_SCR 0x07 -#define UART_DLL 0x00 -#define UART_DLM 0x01 +DECLARE_GLOBAL_DATA_PTR; -/* - * Line Status Register. - */ -#define asyncLSRDataReady1 0x01 -#define asyncLSROverrunError1 0x02 -#define asyncLSRParityError1 0x04 -#define asyncLSRFramingError1 0x08 -#define asyncLSRBreakInterrupt1 0x10 -#define asyncLSRTxHoldEmpty1 0x20 -#define asyncLSRTxShiftEmpty1 0x40 -#define asyncLSRRxFifoError1 0x80 +static void uart_post_init_common(struct NS16550 *com_port, unsigned short bdiv) +{ + volatile char val; -DECLARE_GLOBAL_DATA_PTR; + out_8(&com_port->lcr, 0x80); /* set DLAB bit */ + out_8(&com_port->dll, bdiv); /* set baudrate divisor */ + out_8(&com_port->dlm, bdiv >> 8); /* set baudrate divisor */ + out_8(&com_port->lcr, 0x03); /* clear DLAB; set 8 bits, no parity */ + out_8(&com_port->fcr, 0x00); /* disable FIFO */ + out_8(&com_port->mcr, 0x10); /* enable loopback mode */ + val = in_8(&com_port->lsr); /* clear line status */ + val = in_8(&com_port->rbr); /* read receive buffer */ + out_8(&com_port->scr, 0x00); /* set scratchpad */ + out_8(&com_port->ier, 0x00); /* set interrupt enable reg */ +} #if defined(CONFIG_440) || defined(CONFIG_405EX) #if !defined(CONFIG_SYS_EXT_SERIAL_CLOCK) @@ -190,19 +186,18 @@ static void serial_divs (int baudrate, unsigned long *pudiv, } #endif -static int uart_post_init (unsigned long dev_base) +static int uart_post_init (struct NS16550 *com_port) { unsigned long reg = 0; unsigned long udiv; unsigned short bdiv; - volatile char val; #ifdef CONFIG_SYS_EXT_SERIAL_CLOCK unsigned long tmp; #endif int i; for (i = 0; i < 3500; i++) { - if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1) + if (in_8(&com_port->lsr) & UART_LSR_THRE) break; udelay (100); } @@ -239,34 +234,24 @@ static int uart_post_init (unsigned long dev_base) MTREG(UART3_SDR, reg); #endif - out8(dev_base + UART_LCR, 0x80); /* set DLAB bit */ - out8(dev_base + UART_DLL, bdiv); /* set baudrate divisor */ - out8(dev_base + UART_DLM, bdiv >> 8); /* set baudrate divisor */ - out8(dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */ - out8(dev_base + UART_FCR, 0x00); /* disable FIFO */ - out8(dev_base + UART_MCR, 0x10); /* enable loopback mode */ - val = in8(dev_base + UART_LSR); /* clear line status */ - val = in8(dev_base + UART_RBR); /* read receive buffer */ - out8(dev_base + UART_SCR, 0x00); /* set scratchpad */ - out8(dev_base + UART_IER, 0x00); /* set interrupt enable reg */ + uart_post_init_common(com_port, bdiv); return 0; } #else /* CONFIG_440 */ -static int uart_post_init (unsigned long dev_base) +static int uart_post_init (struct NS16550 *com_port) { unsigned long reg; unsigned long tmp; unsigned long clk; unsigned long udiv; unsigned short bdiv; - volatile char val; int i; for (i = 0; i < 3500; i++) { - if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1) + if (in_8(&com_port->lsr) & UART_LSR_THRE) break; udelay (100); } @@ -309,59 +294,51 @@ static int uart_post_init (unsigned long dev_base) bdiv = (clk + tmp / 2) / tmp; #endif /* CONFIG_405EZ */ - out8(dev_base + UART_LCR, 0x80); /* set DLAB bit */ - out8(dev_base + UART_DLL, bdiv); /* set baudrate divisor */ - out8(dev_base + UART_DLM, bdiv >> 8); /* set baudrate divisor */ - out8(dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */ - out8(dev_base + UART_FCR, 0x00); /* disable FIFO */ - out8(dev_base + UART_MCR, 0x10); /* enable loopback mode */ - val = in8(dev_base + UART_LSR); /* clear line status */ - val = in8(dev_base + UART_RBR); /* read receive buffer */ - out8(dev_base + UART_SCR, 0x00); /* set scratchpad */ - out8(dev_base + UART_IER, 0x00); /* set interrupt enable reg */ - - return (0); + uart_post_init_common(com_port, bdiv); + + return 0; } #endif /* CONFIG_440 */ -static void uart_post_putc (unsigned long dev_base, char c) +static void uart_post_putc (struct NS16550 *com_port, char c) { int i; - out8 (dev_base + UART_THR, c); /* put character out */ + out_8(&com_port->thr, c); /* put character out */ /* Wait for transfer completion */ for (i = 0; i < 3500; i++) { - if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1) + if (in_8(&com_port->lsr) & UART_LSR_THRE) break; udelay (100); } } -static int uart_post_getc (unsigned long dev_base) +static int uart_post_getc (struct NS16550 *com_port) { int i; /* Wait for character available */ for (i = 0; i < 3500; i++) { - if (in8 (dev_base + UART_LSR) & asyncLSRDataReady1) + if (in_8(&com_port->lsr) & UART_LSR_DR) break; udelay (100); } - return 0xff & in8 (dev_base + UART_RBR); + + return 0xff & in_8(&com_port->rbr); } -static int test_ctlr (unsigned long dev_base, int index) +static int test_ctlr (struct NS16550 *com_port, int index) { int res = -1; char test_str[] = "*** UART Test String ***\r\n"; int i; - uart_post_init (dev_base); + uart_post_init (com_port); for (i = 0; i < sizeof (test_str) - 1; i++) { - uart_post_putc (dev_base, test_str[i]); - if (uart_post_getc (dev_base) != test_str[i]) + uart_post_putc (com_port, test_str[i]); + if (uart_post_getc (com_port) != test_str[i]) goto done; } res = 0; @@ -377,8 +354,8 @@ int uart_post_test (int flags) int i, res = 0; static unsigned long base[] = CONFIG_SYS_POST_UART_TABLE; - for (i = 0; i < sizeof (base) / sizeof (base[0]); i++) { - if (test_ctlr (base[i], i)) + for (i = 0; i < ARRAY_SIZE(base); i++) { + if (test_ctlr((struct NS16550 *)base[i], i)) res = -1; } serial_reinit_all (); -- 1.7.2.3

1 1

[U-Boot] AT91: problems master vs. next
by Reinhard Meyer 22 Sep '10

22 Sep '10

Just to report on preliminary findings I had: Rebasing my current TOP9000 port on u-boot/master compiles and works fine. Code size increased moderately from 223592 to 223976. Rebasing my current TOP9000 port on u-boot/next compiles after defining CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR. Code size increased heavyly from 223592 to 245544. And U-Boot crashes instantly (I know there is more to be done than just defining those two macros). What bothers me really here is the huge increase in code size. And, on almost all AT91 systems booting will be through a first boot loader, which sets up SDRAM, loads u-boot to the "correct" address and jumps to it. All low level init and relocation is not required in such cases. It should be always possible to #define relocation off! With Best Regards Reinhard

4 9

[U-Boot] Hello Dear
by Precious Boko 22 Sep '10

22 Sep '10

Hello My Dear, How are you? Hope you are fine? Well, I don't know how to start... well, am Miss Precious Boko, I am single and never been married. i will like to know you more and we can exchange photo and know each other more thanks and hoping to hear from you soon

1 0

[U-Boot] [PATCH] [v3] fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features
by Timur Tabi 21 Sep '10

21 Sep '10

The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO). So delete the 8610-specific code and use the built-in features instead. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- This patch depends on the patch, "logos: add Freescale logo" This patch supersedes these two patches: [v2] mpc8610: refactor DIU initialization code to use existing bitmap and logo features mpc8610: refactor DIU initialization code to use existing bitmap function arch/powerpc/cpu/mpc512x/Makefile | 1 - arch/powerpc/cpu/mpc512x/diu.c | 68 +-- board/freescale/common/Makefile | 2 +- board/freescale/common/fsl_diu_fb.c | 132 +---- board/freescale/common/fsl_diu_fb.h | 12 +- board/freescale/common/fsl_logo_bmp.c | 878 ------------------------- board/freescale/mpc5121ads/mpc5121ads.c | 5 - board/freescale/mpc8610hpcd/mpc8610hpcd.c | 6 +- board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c | 78 +-- include/configs/MPC8610HPCD.h | 5 +- include/configs/mpc5121ads.h | 6 +- 11 files changed, 37 insertions(+), 1156 deletions(-) delete mode 100644 board/freescale/common/fsl_logo_bmp.c diff --git a/arch/powerpc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile index 28926e0..d1b6946 100644 --- a/arch/powerpc/cpu/mpc512x/Makefile +++ b/arch/powerpc/cpu/mpc512x/Makefile @@ -39,7 +39,6 @@ COBJS-y += serial.o COBJS-y += speed.o COBJS-$(CONFIG_FSL_DIU_FB) += diu.o COBJS-$(CONFIG_FSL_DIU_FB) += ../../../../board/freescale/common/fsl_diu_fb.o -COBJS-$(CONFIG_FSL_DIU_FB) += ../../../../board/freescale/common/fsl_logo_bmp.o COBJS-$(CONFIG_CMD_IDE) += ide.o COBJS-$(CONFIG_IIM) += iim.o COBJS-$(CONFIG_PCI) += pci.o diff --git a/arch/powerpc/cpu/mpc512x/diu.c b/arch/powerpc/cpu/mpc512x/diu.c index 9ef5609..fa4a0bc 100644 --- a/arch/powerpc/cpu/mpc512x/diu.c +++ b/arch/powerpc/cpu/mpc512x/diu.c @@ -36,12 +36,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_FSL_DIU_LOGO_BMP -extern unsigned int FSL_Logo_BMP[]; -#else -#define FSL_Logo_BMP NULL -#endif - static int xres, yres; void diu_set_pixel_clock(unsigned int pixclock) @@ -64,28 +58,9 @@ void diu_set_pixel_clock(unsigned int pixclock) debug("DIU: Modified value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr)); } -char *valid_bmp(char *addr) -{ - unsigned long h_addr; - bd_t *bd = gd->bd; - - h_addr = simple_strtoul(addr, NULL, 16); - if (h_addr < bd->bi_flashstart || - h_addr >= (bd->bi_flashstart + bd->bi_flashsize - 1)) { - printf("bmp addr %lx is not a valid flash address\n", h_addr); - return 0; - } else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) { - printf("bmp addr is not a bmp\n"); - return 0; - } else - return (char *)h_addr; -} - int mpc5121_diu_init(void) { unsigned int pixel_format; - char *bmp = NULL; - char *bmp_env; #if defined(CONFIG_VIDEO_XRES) & defined(CONFIG_VIDEO_YRES) xres = CONFIG_VIDEO_XRES; @@ -97,47 +72,10 @@ int mpc5121_diu_init(void) pixel_format = 0x88883316; debug("mpc5121_diu_init\n"); - bmp_env = getenv("diu_bmp_addr"); - if (bmp_env) { - bmp = valid_bmp(bmp_env); - } - if (!bmp) - bmp = (char *)FSL_Logo_BMP; - return fsl_diu_init(xres, pixel_format, 0, (unsigned char *)bmp); -} - -int mpc5121diu_init_show_bmp(cmd_tbl_t *cmdtp, - int flag, int argc, char * const argv[]) -{ - unsigned int addr; - - if (argc < 2) - return cmd_usage(cmdtp); - - if (!strncmp(argv[1], "init", 4)) { -#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) - fsl_diu_clear_screen(); - drv_video_init(); -#else - return mpc5121_diu_init(); -#endif - } else { - addr = simple_strtoul(argv[1], NULL, 16); - fsl_diu_clear_screen(); - fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0); - } - return 0; + return fsl_diu_init(xres, pixel_format, 0); } -U_BOOT_CMD( - diufb, CONFIG_SYS_MAXARGS, 1, mpc5121diu_init_show_bmp, - "Init or Display BMP file", - "init\n - initialize DIU\n" - "addr\n - display bmp at address 'addr'" - ); - - #if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) /* @@ -158,7 +96,7 @@ void *video_hw_init(void) pGD->frameAdrs = (unsigned int)fsl_fb_open(&info); pGD->winSizeX = xres; - pGD->winSizeY = yres - info->logo_height; + pGD->winSizeY = yres; pGD->plnSizeX = pGD->winSizeX; pGD->plnSizeY = pGD->winSizeY; @@ -167,7 +105,7 @@ void *video_hw_init(void) pGD->isaBase = 0; pGD->pciBase = 0; - pGD->memSize = info->screen_size - info->logo_size; + pGD->memSize = info->screen_size; /* Cursor Start Address */ pGD->dprBase = 0; diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index f93045f..dca3ac0 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -31,7 +31,7 @@ LIB = $(obj)lib$(VENDOR).a COBJS-$(CONFIG_FSL_CADMUS) += cadmus.o COBJS-$(CONFIG_FSL_VIA) += cds_via.o -COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o fsl_logo_bmp.o +COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o COBJS-$(CONFIG_FSL_PIXIS) += pixis.o COBJS-$(CONFIG_FSL_NGPIXIS) += ngpixis.o COBJS-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index e740ad8..394b71f 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -208,10 +208,7 @@ static int fsl_diu_disable_panel(struct fb_info *info); static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align); void diu_set_pixel_clock(unsigned int pixclock); -int fsl_diu_init(int xres, - unsigned int pixel_format, - int gamma_fix, - unsigned char *splash_bmp) +int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix) { struct fb_videomode *fsl_diu_mode_db; struct diu_ad *ad = &fsl_diu_fb_ad; @@ -288,8 +285,6 @@ int fsl_diu_init(int xres, var->sync = fsl_diu_mode_db->sync; var->vmode = fsl_diu_mode_db->vmode; info->line_length = var->xres * var->bits_per_pixel / 8; - info->logo_size = 0; - info->logo_height = 0; ad->pix_fmt = pixel_format; ad->addr = cpu_to_le32((unsigned int)info->screen_base); @@ -358,13 +353,6 @@ int fsl_diu_init(int xres, fb_initialized = 1; - if (splash_bmp) { - info->logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0); - info->logo_size = info->logo_height * info->line_length; - debug("logo height %d, logo_size 0x%x\n", - info->logo_height,info->logo_size); - } - /* Enable the DIU */ fsl_diu_enable_panel(info); enable_lcdc(); @@ -375,8 +363,7 @@ int fsl_diu_init(int xres, char *fsl_fb_open(struct fb_info **info) { *info = &fsl_fb_info; - return (char *) ((unsigned int)(*info)->screen_base - + (*info)->logo_size); + return fsl_fb_info.screen_base; } void fsl_diu_close(void) @@ -485,118 +472,3 @@ static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) buf->offset = 0; return 0; } - -int fsl_diu_display_bmp(unsigned char *bmp, - int xoffset, - int yoffset, - int transpar) -{ - struct fb_info *info = &fsl_fb_info; - unsigned char r, g, b; - unsigned int *fb_t, val; - unsigned char *bitmap; - unsigned int palette[256]; - int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp; - - if (!bmp) { - printf("Must supply a bitmap address\n"); - return 0; - } - - raster = bmp[10] + (bmp[11] << 8) + (bmp[12] << 16) + (bmp[13] << 24); - width = (bmp[21] << 24) | (bmp[20] << 16) | (bmp[19] << 8) | bmp[18]; - height = (bmp[25] << 24) | (bmp[24] << 16) | (bmp[23] << 8) | bmp[22]; - bpp = (bmp[29] << 8) | (bmp[28]); - ncolors = bmp[46] + (bmp[47] << 8) + (bmp[48] << 16) + (bmp[49] << 24); - bitmap = bmp + raster; - cpp = info->var.bits_per_pixel / 8; - - debug("bmp = 0x%08x\n", (unsigned int)bmp); - debug("bitmap = 0x%08x\n", (unsigned int)bitmap); - debug("width = %d\n", width); - debug("height = %d\n", height); - debug("bpp = %d\n", bpp); - debug("ncolors = %d\n", ncolors); - - debug("xres = %d\n", info->var.xres); - debug("yres = %d\n", info->var.yres); - debug("Screen_base = 0x%x\n", (unsigned int)info->screen_base); - - if (((width+xoffset) > info->var.xres) || - ((height+yoffset) > info->var.yres)) { - printf("bitmap is out of range, image too large or too much offset\n"); - return 0; - } - if (bpp < 24) { - for (i = 0, offset = 54; i < ncolors; i++, offset += 4) - palette[i] = (bmp[offset+2] << 16) - + (bmp[offset+1] << 8) + bmp[offset]; - } - - switch (bpp) { - case 1: - for (y = height - 1; y >= 0; y--) { - fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp); - for (x = 0; x < width; x += 8) { - b = *bitmap++; - for (k = 0; k < 8; k++) { - if (b & 0x80) - *fb_t++ = palette[1]; - else - *fb_t++ = palette[0]; - b = b << 1; - } - } - for (i = (width / 2) % 4; i > 0; i--) - bitmap++; - } - break; - case 4: - for (y = height - 1; y >= 0; y--) { - fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp); - for (x = 0; x < width; x += 2) { - b = *bitmap++; - r = (b >> 4) & 0x0F; - g = b & 0x0F; - *fb_t++ = palette[r]; - *fb_t++ = palette[g]; - } - for (i = (width / 2) % 4; i > 0; i--) - bitmap++; - } - break; - case 8: - for (y = height - 1; y >= 0; y--) { - fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp); - for (x = 0; x < width; x++) { - *fb_t++ = palette[ *bitmap++ ]; - } - for (i = (width / 2) % 4; i > 0; i--) - bitmap++; - } - break; - case 24: - for (y = height - 1; y >= 0; y--) { - fb_t = (unsigned int *) ((unsigned int)info->screen_base + (((y+yoffset) * info->var.xres) + xoffset)*cpp); - for (x = 0; x < width; x++) { - b = *bitmap++; - g = *bitmap++; - r = *bitmap++; - val = (r << 16) + (g << 8) + b; - *fb_t++ = val; - } - for (; (x % 4) != 0; x++) /* 4-byte alignment */ - bitmap++; - } - break; - } - - return height; -} - -void fsl_diu_clear_screen(void) -{ - struct fb_info *info = &fsl_fb_info; - - memset(info->screen_base, 0, info->smem_len); -} diff --git a/board/freescale/common/fsl_diu_fb.h b/board/freescale/common/fsl_diu_fb.h index 6deba32..3a5fc9f 100644 --- a/board/freescale/common/fsl_diu_fb.h +++ b/board/freescale/common/fsl_diu_fb.h @@ -52,18 +52,8 @@ struct fb_info { char *screen_base; unsigned long screen_size; - int logo_height; - unsigned int logo_size; }; extern char *fsl_fb_open(struct fb_info **info); -extern int fsl_diu_init(int xres, - unsigned int pixel_format, - int gamma_fix, - unsigned char *splash_bmp); -extern void fsl_diu_clear_screen(void); -extern int fsl_diu_display_bmp(unsigned char *bmp, - int xoffset, - int yoffset, - int transpar); +int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix); diff --git a/board/freescale/common/fsl_logo_bmp.c b/board/freescale/common/fsl_logo_bmp.c deleted file mode 100644 index 956dbee..0000000 --- a/board/freescale/common/fsl_logo_bmp.c +++ /dev/null @@ -1,878 +0,0 @@ -/* - * Copyright 2007 Freescale Semiconductor, Inc. - * York Sun <yorksun(a)freescale.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/*--------------------------------------------------------------------------- - * FSL_Logo_BMP -- - * - * A 340x128x4bpp BMP logo. - *--------------------------------------------------------------------------- - */ -unsigned int FSL_Logo_BMP[] = { -0x424d765c, -0x00000000,0x00007600,0x00002800,0x00006c01,0x00008000,0x00000100,0x04000000, -0x0000005c,0x0000130b,0x0000130b,0x00001000,0x00000000,0x00000402,0x04000d91, -0xbc000b51,0x67001536,0x9a000f2a,0x4b005050,0x50009090,0x90000c70,0x92002e2f, -0x2e00cfcf,0xcf007c82,0x7c00fbfd,0xfb006f70,0x6f00b0b0,0xb00004bd,0xfa000542, -0xf9000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, 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-0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, -0x00000000,0x0000babe -}; diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index 2e13ea8..a84644d 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -260,11 +260,6 @@ int misc_init_r(void) i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); debug("DVI Encoder Read: 0x%02lx\n", tmp_val); -#ifdef CONFIG_FSL_DIU_FB -# if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)) - mpc5121_diu_init(); -# endif -#endif return 0; } diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 6578f58..f67f3e3 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -36,7 +36,7 @@ void sdram_init(void); phys_size_t fixed_sdram(void); -void mpc8610hpcd_diu_init(void); +int mpc8610hpcd_diu_init(void); /* called before any console output */ @@ -84,10 +84,6 @@ int misc_init_r(void) i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); debug("DVI Encoder Read: 0x%02lx\n",tmp_val); -#ifdef CONFIG_FSL_DIU_FB - mpc8610hpcd_diu_init(); -#endif - return 0; } diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c index 781a7c8..960c8ed 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c @@ -36,8 +36,6 @@ #include <video_fb.h> #endif -extern unsigned int FSL_Logo_BMP[]; - static int xres, yres; void diu_set_pixel_clock(unsigned int pixclock) @@ -61,7 +59,7 @@ void diu_set_pixel_clock(unsigned int pixclock) debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr); } -void mpc8610hpcd_diu_init(void) +int mpc8610hpcd_diu_init(void) { char *monitor_port; int gamma_fix; @@ -106,79 +104,45 @@ void mpc8610hpcd_diu_init(void) out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08); } - fsl_diu_init(xres, pixel_format, gamma_fix, - (unsigned char *)FSL_Logo_BMP); + return fsl_diu_init(xres, pixel_format, gamma_fix); } -int mpc8610diu_init_show_bmp(cmd_tbl_t *cmdtp, - int flag, int argc, char * const argv[]) -{ - unsigned int addr; - - if (argc < 2) - return cmd_usage(cmdtp); - - if (!strncmp(argv[1],"init",4)) { -#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) - fsl_diu_clear_screen(); - drv_video_init(); -#else - mpc8610hpcd_diu_init(); -#endif - } else { - addr = simple_strtoul(argv[1], NULL, 16); - fsl_diu_clear_screen(); - fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0); - } - - return 0; -} - -U_BOOT_CMD( - diufb, CONFIG_SYS_MAXARGS, 1, mpc8610diu_init_show_bmp, - "Init or Display BMP file", - "init\n - initialize DIU\n" - "addr\n - display bmp at address 'addr'" -); - - #if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) /* * The Graphic Device */ -GraphicDevice ctfb; +static GraphicDevice ctfb; + void *video_hw_init(void) { - GraphicDevice *pGD = (GraphicDevice *) &ctfb; struct fb_info *info; - mpc8610hpcd_diu_init(); + if (mpc8610hpcd_diu_init() < 0) + return NULL; /* fill in Graphic device struct */ - sprintf(pGD->modeIdent, - "%dx%dx%d %ldkHz %ldHz", - xres, yres, 32, 64, 60); + sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", xres, yres, 32, 64, 60); - pGD->frameAdrs = (unsigned int)fsl_fb_open(&info); - pGD->winSizeX = xres; - pGD->winSizeY = yres - info->logo_height; - pGD->plnSizeX = pGD->winSizeX; - pGD->plnSizeY = pGD->winSizeY; + ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info); + ctfb.winSizeX = xres; + ctfb.winSizeY = yres; + ctfb.plnSizeX = ctfb.winSizeX; + ctfb.plnSizeY = ctfb.winSizeY; - pGD->gdfBytesPP = 4; - pGD->gdfIndex = GDF_32BIT_X888RGB; + ctfb.gdfBytesPP = 4; + ctfb.gdfIndex = GDF_32BIT_X888RGB; - pGD->isaBase = 0; - pGD->pciBase = 0; - pGD->memSize = info->screen_size - info->logo_size; + ctfb.isaBase = 0; + ctfb.pciBase = 0; + ctfb.memSize = info->screen_size; /* Cursor Start Address */ - pGD->dprBase = 0; - pGD->vprBase = 0; - pGD->cprBase = 0; + ctfb.dprBase = 0; + ctfb.vprBase = 0; + ctfb.cprBase = 0; - return (void *)pGD; + return &ctfb; } #endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 4d9606e..58d3d99 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -24,9 +24,12 @@ /* video */ #undef CONFIG_VIDEO -#if defined(CONFIG_VIDEO) +#ifdef CONFIG_VIDEO +#define CONFIG_CMD_BMP #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO #endif #ifdef RUN_DIAG diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 5281042..272502a 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -47,14 +47,16 @@ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC512X 1 /* MPC512X family */ #define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ -#undef CONFIG_FSL_DIU_LOGO_BMP /* Don't include FSL DIU binary bmp */ /* video */ #undef CONFIG_VIDEO -#if defined(CONFIG_VIDEO) +#ifdef CONFIG_VIDEO +#define CONFIG_CMD_BMP #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO #endif /* CONFIG_PCI is defined at config time */ -- 1.7.2.1

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[U-Boot] [PATCH next] silence awk command display during build
by Kim Phillips 21 Sep '10

21 Sep '10

[u-boot next]$ ./MAKEALL 83xx awk '(NF && $1 !~ /^#/) { print $1 ": " $1 "_config; $(MAKE)" }' boards.cfg > .boards.depend Configuring for ve8313 board... Signed-off-by: Kim Phillips <kim.phillips(a)freescale.com> --- applies to u-boot.git's next branch. Makefile | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/Makefile b/Makefile index 36f2e1e..50bbe08 100644 --- a/Makefile +++ b/Makefile @@ -495,7 +495,7 @@ unconfig: sinclude .boards.depend .boards.depend: boards.cfg - awk '(NF && $$1 !~ /^#/) { print $$1 ": " $$1 "_config; $$(MAKE)" }' $< > $@ + @awk '(NF && $$1 !~ /^#/) { print $$1 ": " $$1 "_config; $$(MAKE)" }' $< > $@ # # Functions to generate common board directory names -- 1.7.2.1

3 14

[U-Boot] [STATUS] v2010.09-rc2 is out / "next" branch available
by Michael Zaidman 21 Sep '10

21 Sep '10

Dear Wolfgang, > check if all your relevant patches have been included. I rebased against the "master" and resubmitted the POST Cleanup patch (http://lists.denx.de/pipermail/u-boot/2010-September/077467.html) as was promised in http://lists.denx.de/pipermail/u-boot/2010-August/075227.html. Should I resubmit it into the "next" branch or it can go into the current release? Best regards, Michael Zaidman

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