September 2010 - U-Boot

[U-Boot] [PATCH] [v3] p1022ds: use weak CFI flash accessors when DIU is enabled
by Timur Tabi 25 Sep '10

25 Sep '10

On the Freescale P1022, the DIU and the LBC share address pins, which means that when the DIU is active (e.g. the console is on the DVI display), NOR flash cannot be accessed. So we use the weak accessor function feature of the CFI flash code to temporarily switch the pin mux from DIU to LBC whenever we want to read or write flash. This has a significant performance penalty, but it's the only way to make it work. This change allows the 'saveenv' command to work when the video display is enabled. Erasing flash and writing to flash (with the 'cp' command) works, but reading from flash (with the 'md' and 'cp' commands) does not. Also, while flash is being written, the video display will be blank. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- v3: changes as requested board/freescale/p1022ds/diu.c | 208 +++++++++++++++++++++++++++++++++++++++-- include/configs/P1022DS.h | 6 + 2 files changed, 205 insertions(+), 9 deletions(-) diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c index be6e9a8..c8bfdf0 100644 --- a/board/freescale/p1022ds/diu.c +++ b/board/freescale/p1022ds/diu.c @@ -14,8 +14,6 @@ #include <command.h> #include <asm/io.h> -#ifdef CONFIG_FSL_DIU_FB - #include "../common/ngpixis.h" #include "../common/fsl_diu_fb.h" @@ -24,13 +22,22 @@ #include <video_fb.h> #endif -#define PX_BRDCFG0_ELBC_DIU 0x02 +/* The CTL register is called 'csr' in the ngpixis_t structure */ +#define PX_CTL_ALTACC 0x80 + +#define PX_BRDCFG0_ELBC_SPI_MASK 0xc0 +#define PX_BRDCFG0_ELBC_SPI_ELBC 0x00 +#define PX_BRDCFG0_ELBC_SPI_NULL 0xc0 +#define PX_BRDCFG0_ELBC_DIU 0x02 #define PX_BRDCFG1_DVIEN 0x80 #define PX_BRDCFG1_DFPEN 0x40 #define PX_BRDCFG1_BACKLIGHT 0x20 #define PX_BRDCFG1_DDCEN 0x10 +#define PMUXCR_ELBCDIU_MASK 0xc0000000 +#define PMUXCR_ELBCDIU_NOR16 0x80000000 + /* * DIU Area Descriptor * @@ -63,6 +70,16 @@ #define AD_DEFAULT static int xres, yres; +/* + * Variables used by the DIU/LBC switching code. It's safe to makes these + * global, because the DIU requires DDR, so we'll only run this code after + * relocation. + */ +static u8 px_brdcfg0; +static u32 pmuxcr; +static void *lbc_lcs0_ba; +static void *lbc_lcs1_ba; + void diu_set_pixel_clock(unsigned int pixclock) { ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -88,6 +105,10 @@ int p1022ds_diu_init(void) u32 pixel_format; u8 temp; + /* Save the LBC LCS0 and LCS1 addresses for the DIU mux functions */ + lbc_lcs0_ba = (void *)(get_lbc_br(0) & get_lbc_or(0) & 0xFFFF8000); + lbc_lcs1_ba = (void *)(get_lbc_br(1) & get_lbc_or(1) & 0xFFFF8000); + pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) | (0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) | (2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) | @@ -114,17 +135,24 @@ int p1022ds_diu_init(void) out_8(&pixis->brdcfg1, temp); /* + * Enable PIXIS indirect access mode. This is a hack that allows us to + * access PIXIS registers even when the LBC pins have been muxed to the + * DIU. + */ + setbits_8(&pixis->csr, PX_CTL_ALTACC); + + /* * Route the LAD pins to the DIU. This will disable access to the eLBC, * which means we won't be able to read/write any NOR flash addresses! */ - out_8(&pixis->brdcfg0, in_8(&pixis->brdcfg0) | PX_BRDCFG0_ELBC_DIU); - /* we must do the dummy read from eLBC to sync the write as above */ - in_8(&pixis->brdcfg0); + out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); + px_brdcfg0 = in_8(lbc_lcs1_ba); + out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU); /* Setting PMUXCR to switch to DVI from ELBC */ - /* Set pmuxcr to allow both i2c1 and i2c2 */ - clrsetbits_be32(&gur->pmuxcr, 0xc0000000, 0x40000000); - in_be32(&gur->pmuxcr); + clrsetbits_be32(&gur->pmuxcr, + PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_NOR16); + pmuxcr = in_be32(&gur->pmuxcr); return fsl_diu_init(xres, pixel_format, 0); } @@ -169,4 +197,166 @@ void *video_hw_init(void) #endif +#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS + +/* + * set_mux_to_lbc - disable the DIU so that we can read/write to elbc + * + * On the Freescale P1022, the DIU video signal and the LBC address/data lines + * share the same pins, which means that when the DIU is active (e.g. the + * console is on the DVI display), NOR flash cannot be accessed. So we use the + * weak accessor feature of the CFI flash code to temporarily switch the pin + * mux from DIU to LBC whenever we want to read or write flash. This has a + * significant performance penalty, but it's the only way to make it work. + * + * There are two muxes: one on the chip, and one on the board. The chip mux + * controls whether the pins are used for the DIU or the LBC, and it is + * set via PMUXCR. The board mux controls whether those signals go to + * the video connector or the NOR flash chips, and it is set via the ngPIXIS. + */ +static int set_mux_to_lbc(void) +{ + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + /* Switch the muxes only if they're currently set to DIU mode */ + if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) == + PMUXCR_ELBCDIU_NOR16) { + /* + * In DIU mode, the PIXIS can only be accessed indirectly + * since we can't read/write the LBC directly. + */ + + /* Set the board mux to LBC. This will disable the display. */ + out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); + px_brdcfg0 = in_8(lbc_lcs1_ba); + out_8(lbc_lcs1_ba, (px_brdcfg0 & ~(PX_BRDCFG0_ELBC_SPI_MASK + | PX_BRDCFG0_ELBC_DIU)) | PX_BRDCFG0_ELBC_SPI_ELBC); + + /* Disable indirect PIXIS mode */ + out_8(lbc_lcs0_ba, offsetof(ngpixis_t, csr)); + clrbits_8(lbc_lcs1_ba, PX_CTL_ALTACC); + + /* Set the chip mux to LBC mode, so that writes go to flash. */ + out_be32(&gur->pmuxcr, (pmuxcr & ~PMUXCR_ELBCDIU_MASK) | + PMUXCR_ELBCDIU_NOR16); + in_be32(&gur->pmuxcr); + + return 1; + } + + return 0; +} + +/* + * set_mux_to_diu - re-enable the DIU muxing + * + * This function restores the chip and board muxing to point to the DIU. + */ +static void set_mux_to_diu(void) +{ + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + /* Enable indirect PIXIS mode */ + setbits_8(&pixis->csr, PX_CTL_ALTACC); + + /* Set the board mux to DIU. This will enable the display. */ + out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); + out_8(lbc_lcs1_ba, px_brdcfg0); + in_8(lbc_lcs1_ba); + + /* Set the chip mux to DIU mode. */ + out_be32(&gur->pmuxcr, pmuxcr); + in_be32(&gur->pmuxcr); +} + +void flash_write8(u8 value, void *addr) +{ + int sw = set_mux_to_lbc(); + + __raw_writeb(value, addr); + if (sw) + set_mux_to_diu(); +} + +void flash_write16(u16 value, void *addr) +{ + int sw = set_mux_to_lbc(); + + __raw_writew(value, addr); + if (sw) + set_mux_to_diu(); +} + +void flash_write32(u32 value, void *addr) +{ + int sw = set_mux_to_lbc(); + + __raw_writel(value, addr); + if (sw) + set_mux_to_diu(); +} + +void flash_write64(u64 value, void *addr) +{ + int sw = set_mux_to_lbc(); + + /* There is no __raw_writeq(), so do the write manually */ + *(volatile u64 *)addr = value; + if (sw) + set_mux_to_diu(); +} + +u8 flash_read8(void *addr) +{ + u8 ret; + + int sw = set_mux_to_lbc(); + + ret = __raw_readb(addr); + if (sw) + set_mux_to_diu(); + + return ret; +} + +u16 flash_read16(void *addr) +{ + u16 ret; + + int sw = set_mux_to_lbc(); + + ret = __raw_readw(addr); + if (sw) + set_mux_to_diu(); + + return ret; +} + +u32 flash_read32(void *addr) +{ + u32 ret; + + int sw = set_mux_to_lbc(); + + ret = __raw_readl(addr); + if (sw) + set_mux_to_diu(); + + return ret; +} + +u64 flash_read64(void *addr) +{ + u64 ret; + + int sw = set_mux_to_lbc(); + + /* There is no __raw_readq(), so do the read manually */ + ret = *(volatile u64 *)addr; + if (sw) + set_mux_to_diu(); + + return ret; +} + #endif diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index d518c69..a4910a6 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -190,6 +190,12 @@ #define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +/* + * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so + * disable empty flash sector detection, which is I/O-intensive. + */ +#undef CONFIG_SYS_FLASH_EMPTY_INFO #endif /* -- 1.7.2.3

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[U-Boot] [PATCH] [v2] p1022ds: add video support
by Timur Tabi 25 Sep '10

25 Sep '10

Add support for the DIU controller. If CONFIG_VIDEO is defined, then the console will appear on a DVI monitor instead of the serial port. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- board/freescale/p1022ds/Makefile | 2 + board/freescale/p1022ds/diu.c | 148 ++++++++++++++++++++++++++++++++++++++ include/configs/P1022DS.h | 13 ++-- 3 files changed, 158 insertions(+), 5 deletions(-) create mode 100644 board/freescale/p1022ds/diu.c diff --git a/board/freescale/p1022ds/Makefile b/board/freescale/p1022ds/Makefile index 8ede2d6..678eb2a 100644 --- a/board/freescale/p1022ds/Makefile +++ b/board/freescale/p1022ds/Makefile @@ -16,6 +16,8 @@ COBJS-y += ddr.o COBJS-y += law.o COBJS-y += tlb.o +COBJS-$(CONFIG_FSL_DIU_FB) += diu.o + SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c new file mode 100644 index 0000000..5cf74ba --- /dev/null +++ b/board/freescale/p1022ds/diu.c @@ -0,0 +1,148 @@ +/* + * Copyright 2010 Freescale Semiconductor, Inc. + * Authors: Timur Tabi <timur(a)freescale.com> + * + * FSL DIU Framebuffer driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +#include <common.h> +#include <command.h> +#include <asm/io.h> +#include <stdio_dev.h> +#include <video_fb.h> +#include "../common/ngpixis.h" +#include "../common/fsl_diu_fb.h" + +#define PX_BRDCFG0_ELBC_DIU 0x02 + +#define PX_BRDCFG1_DVIEN 0x80 +#define PX_BRDCFG1_DFPEN 0x40 +#define PX_BRDCFG1_BACKLIGHT 0x20 + +/* + * DIU Area Descriptor + * + * Note that we need to byte-swap the value before it's written to the AD + * register. So even though the registers don't look like they're in the same + * bit positions as they are on the MPC8610, the same value is written to the + * AD register on the MPC8610 and on the P1022. + */ +#define AD_BYTE_F 0x10000000 +#define AD_ALPHA_C_SHIFT 25 +#define AD_BLUE_C_SHIFT 23 +#define AD_GREEN_C_SHIFT 21 +#define AD_RED_C_SHIFT 19 +#define AD_PIXEL_S_SHIFT 16 +#define AD_COMP_3_SHIFT 12 +#define AD_COMP_2_SHIFT 8 +#define AD_COMP_1_SHIFT 4 +#define AD_COMP_0_SHIFT 0 + +static int xres, yres; + +void diu_set_pixel_clock(unsigned int pixclock) +{ + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + unsigned long speed_ccb, temp; + u32 pixval; + + speed_ccb = get_bus_freq(0); + temp = 1000000000 / pixclock; + temp *= 1000; + pixval = speed_ccb / temp; + debug("DIU pixval = %lu\n", pixval); + + /* Modify PXCLK in GUTS CLKDVDR */ + temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; + out_be32(&gur->clkdvdr, temp); /* turn off clock */ + out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); +} + +static int p1022ds_diu_init(void) +{ + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + char *monitor_port; + u32 pixel_format; + u8 temp; + + pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) | + (0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) | + (2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) | + (8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) | + (8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT)); + + temp = in_8(&pixis->brdcfg1); + + monitor_port = getenv("monitor"); + if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */ + xres = 1024; + yres = 768; + /* Enable the DFP port, disable the DVI and the backlight */ + temp &= ~(PX_BRDCFG1_DVIEN | PX_BRDCFG1_BACKLIGHT); + temp |= PX_BRDCFG1_DFPEN; + } else { /* DVI */ + xres = 1280; + yres = 1024; + /* Enable the DVI port, disable the DFP and the backlight */ + temp &= ~(PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT); + temp |= PX_BRDCFG1_DVIEN; + } + + out_8(&pixis->brdcfg1, temp); + + /* + * Route the LAD pins to the DIU. This will disable access to the eLBC, + * which means we won't be able to read/write any NOR flash addresses! + */ + out_8(&pixis->brdcfg0, in_8(&pixis->brdcfg0) | PX_BRDCFG0_ELBC_DIU); + /* we must do the dummy read from eLBC to sync the write as above */ + in_8(&pixis->brdcfg0); + + /* Setting PMUXCR to switch to DVI from ELBC */ + /* Set pmuxcr to allow both i2c1 and i2c2 */ + clrsetbits_be32(&gur->pmuxcr, 0xc0000000, 0x40000000); + in_be32(&gur->pmuxcr); + + return fsl_diu_init(xres, pixel_format, 0); +} + +/* + * The Graphic Device + */ +static GraphicDevice ctfb; + +void *video_hw_init(void) +{ + struct fb_info *info; + + if (p1022ds_diu_init() < 0) + return NULL; + + /* fill in Graphic device struct */ + sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", xres, yres, 32, 64, 60); + + ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info); + ctfb.winSizeX = xres; + ctfb.winSizeY = yres; + ctfb.plnSizeX = ctfb.winSizeX; + ctfb.plnSizeY = ctfb.winSizeY; + + ctfb.gdfBytesPP = 4; + ctfb.gdfIndex = GDF_32BIT_X888RGB; + + ctfb.isaBase = 0; + ctfb.pciBase = 0; + ctfb.memSize = info->screen_size; + + /* Cursor Start Address */ + ctfb.dprBase = 0; + ctfb.vprBase = 0; + ctfb.cprBase = 0; + + return &ctfb; +} diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index dcaca2b..8e0117f 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -177,14 +177,17 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_FSL_DIU_FB -#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000) - /* Video */ -/* #define CONFIG_VIDEO */ -#ifdef CONFIG_VIDEO +#undef CONFIG_FSL_DIU_FB + +#ifdef CONFIG_FSL_DIU_FB +#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000) +#define CONFIG_VIDEO +#define CONFIG_CMD_BMP #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO #endif /* -- 1.7.2.3

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[U-Boot] Gregory J Kelsey is out of the office.
by gjkelsey＠rockwellcollins.com 25 Sep '10

25 Sep '10

I will be out of the office starting 09/24/2010 and will not return until 09/28/2010. I will respond to your message when I return. Please contact my manager Colleen Becker 319-295-1567 if you require immediate attention.

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[U-Boot] [PATCH v4 0/2] Add support for new SoC APM821XX
by tmarri＠apm.com 25 Sep '10

25 Sep '10

From: Tirumala Marri <tmarri(a)apm.com> APM821XX is Applied Micro Circuits Corporations naming convention for new line of SoCs. V3: * Missing TLB entry for CONFIG_SYS_BOOT_BASE_ADDR. * Move CONFIG_SYS_EBC_PB0AP etc to EBC area in the config file. * remove unused CONFIG_RTL8211CL_PHY. * Replace hard coded valued for CONFIG_SYS_EBC_CFG with macro definitions. * Change APM82XXX to APM821XX * Modify the way cpu id is printed. * Correct inadvertent change. * Sort define list. * Remove comment for get_sys_info(). * Define a symbolic constat CONFIG_SYS_OCM_SIZE. * Create apm821xx.h instead of using ppc440.h * board.cfg add the entry in sorted. * use puts() if there is no formating needed. * Correct multiline comment. V4: * Rebasing with Stefan Roese tree Tirumala Marri (2): APM821xx: Add CPU support APM821xx: Add bluestone board support MAINTAINERS | 4 + MAKEALL | 1 + arch/powerpc/cpu/ppc4xx/cpu.c | 19 ++++ arch/powerpc/cpu/ppc4xx/cpu_init.c | 5 +- arch/powerpc/cpu/ppc4xx/speed.c | 75 +++++++++++++- arch/powerpc/cpu/ppc4xx/start.S | 11 ++- arch/powerpc/include/asm/apm821xx.h | 69 ++++++++++++ arch/powerpc/include/asm/ppc4xx-ebc.h | 3 +- arch/powerpc/include/asm/ppc4xx-isram.h | 14 ++- arch/powerpc/include/asm/ppc4xx-sdram.h | 12 +- arch/powerpc/include/asm/ppc4xx-uic.h | 5 +- arch/powerpc/include/asm/ppc4xx.h | 4 + arch/powerpc/include/asm/processor.h | 1 + board/amcc/bluestone/Makefile | 52 +++++++++ board/amcc/bluestone/bluestone.c | 111 +++++++++++++++++++ board/amcc/bluestone/config.mk | 40 +++++++ board/amcc/bluestone/init.S | 59 ++++++++++ boards.cfg | 1 + include/configs/bluestone.h | 176 +++++++++++++++++++++++++++++++ 19 files changed, 643 insertions(+), 19 deletions(-) create mode 100644 arch/powerpc/include/asm/apm821xx.h create mode 100644 board/amcc/bluestone/Makefile create mode 100644 board/amcc/bluestone/bluestone.c create mode 100644 board/amcc/bluestone/config.mk create mode 100644 board/amcc/bluestone/init.S create mode 100644 include/configs/bluestone.h

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[U-Boot] [RFC] Driver model
by Marek Vasut 24 Sep '10

24 Sep '10

Hi, most of the readers here probably noticed, there are various forks of U-Boot bootloader floating around the net. The development model there is quite closed and certainly not community driven, on the other hand, they have neat driver model. As for U-Boot, there currently is no driver model. Therefore I'd like to start a discussing on this topic so we can converge towards a reasonable result. My few points: * Start with ethernet subsystem It seems to be quite ready for conversion of this scale. Besides it'd be easy to prove multiple instances of ethernet device work with the driver model. * Create an universal driver model: The driver will have usual .probe function, which will have some argument of type "void *" to it's driver data. This way we can pass it's base address for example instead of #defining it. Very similar to linux kernel. * We need some "device tree" To know, what driver is where and where are it's driver data etc. * Get rid of static data in drivers, switch to dynamic allocation So these wont interfere with multiple instances of the same driver. Cheers

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[U-Boot] u-boot USB status
by Marcel 24 Sep '10

24 Sep '10

Hi, I've been away for some time and I wonder if there has been any progress on the u-boot USB branch. What I want to do is upgrade my kernel and rootfs via USB. I'm using an Atmel SAM9. I wonder about the status and if any additional work is needed I'm willing to help with the project of course. I'm very familiar with USB as I've written many bootloaders with USB support before (all proprietary) but I'm just a little familiar with the u-boot USB structure. My intentions are to contribute to the project because I think USB upgrading is a must to make things a bit more user friendly. Any pointers to get me going again are highly appreciated. The first thing I need is USB support in u-boot for my SAM9, from there I think it's a fairly easy job. Thanks, Marcel

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[U-Boot] [PATCH 1/2] [NEXT] arm: change relocation flag from -fPIC to -fPIE
by Albert Aribaud 24 Sep '10

24 Sep '10

Replace GOT indirect addressing with more efficient pic-base relative addressing for initialized data (uninitialized data still use GOTi indirect addressing). This also reduces code size by 0.4% compared to -fPIC. Signed-off-by: Albert Aribaud <albert.aribaud(a)free.fr> --- arch/arm/config.mk | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 6923f6d..138c43a 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -35,7 +35,7 @@ endif ifndef CONFIG_SYS_ARM_WITHOUT_RELOC # needed for relocation -PLATFORM_RELFLAGS += -fPIC +PLATFORM_RELFLAGS += -fPIE endif ifdef CONFIG_SYS_ARM_WITHOUT_RELOC -- 1.7.0.4

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[U-Boot] [PATCH V2 1/2] [NEXT] arm: change relocation flag from -fPIC to -fPIE
by Albert Aribaud 24 Sep '10

24 Sep '10

Replace GOT indirect addressing with more efficient pic-base relative addressing for initialized data (uninitialized data still use GOTi indirect addressing). This also reduces code size by 0.4% compared to -fPIC. Signed-off-by: Albert Aribaud <albert.aribaud(a)free.fr> --- SUMMARY This patch aims at optimizing relocatable code both in size and speed. The first patch switches from '-fPIC' to '-fPIE', which makes initialized data accesses pc-relative rather than GOT-indirect, and the second adds '-msingle-pic-base' which factors out GOT addressing by computing it once and for all. PATCHSET HISTORY V1 Initial submission V2 Compute RAM pic base only if actually relocating Fixed RAM pic base computation and copy loop arch/arm/config.mk | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 6923f6d..138c43a 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -35,7 +35,7 @@ endif ifndef CONFIG_SYS_ARM_WITHOUT_RELOC # needed for relocation -PLATFORM_RELFLAGS += -fPIC +PLATFORM_RELFLAGS += -fPIE endif ifdef CONFIG_SYS_ARM_WITHOUT_RELOC -- 1.7.0.4

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[U-Boot] [PATCH] mmc: fix capacity calculation with high capacity mmc
by Lei Wen 24 Sep '10

24 Sep '10

According spec, high capacity mmc should be calculated by sector number multiply by sector size. Signed-off-by: Lei Wen <leiwen(a)marvell.com> --- drivers/mmc/mmc.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index ea398a5..bb97171 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -441,6 +441,11 @@ int mmc_change_freq(struct mmc *mmc) if (!ext_csd[185]) return 0; + if (!IS_SD(mmc) && mmc->high_capacity) { + mmc->capacity = ext_csd[212] | (ext_csd[213] << 8) + | (ext_csd[214] << 16) | (ext_csd[215] << 24); + mmc->capacity *= mmc->read_bl_len; + } /* High Speed is set, there are two types: 52MHz and 26MHz */ if (cardtype & MMC_HS_52MHZ) mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; -- 1.7.0.4

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[U-Boot] [RFC PATCH] ppc4xx: Use gc-sections to reduce image size
by Stefan Roese 24 Sep '10

24 Sep '10

This patch enables gc-sections for PPC4xx. This is done to generate smaller U-Boot images. For this the linker script also needs some tweaking: - For example change *(text) to *(text*) - Add KEEP to some of the symbols, especially "resetvec" This patch is tested on the following boards and reduces the image size by the these values: Canyonlands: 11,642 Katmai: 9,170 Kilauea: 10,742 Sequoia: 11,398 Additionally this patch integrates a bit of cleanup to the PPC4xx default linker script. Please note that this patch only enables gc-sections for PPC4xx. Other PowerPC's may enable it as well but also need to change the linker scripts accordingly. I didn't do this in this patch since I can't test all those platforms/boards. Once all PowerPC platforms have gc-sections enabled, the changes to arch/powerpc/cpu/ppc4xx/config.mk should be moved to arch/powerpc/config.mk Signed-off-by: Stefan Roese <sr(a)denx.de> --- arch/powerpc/cpu/ppc4xx/config.mk | 6 ++++ arch/powerpc/cpu/ppc4xx/u-boot.lds | 53 +++++++----------------------------- 2 files changed, 16 insertions(+), 43 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/config.mk b/arch/powerpc/cpu/ppc4xx/config.mk index 5bda710..b0d346a 100644 --- a/arch/powerpc/cpu/ppc4xx/config.mk +++ b/arch/powerpc/cpu/ppc4xx/config.mk @@ -33,5 +33,11 @@ else PLATFORM_CPPFLAGS += -Wa,-m405 -mcpu=405 endif +# Enable gc-sections to enable generation of smaller images. +# Please note that the linker scripts may need some tweaking with this +# change as well. +PLATFORM_LDFLAGS += --gc-sections +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections + # Use default linker script. Board port can override in board/*/config.mk LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/ppc4xx/u-boot.lds diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds index eca1f9d..c3e0e16 100644 --- a/arch/powerpc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -27,8 +27,7 @@ #endif OUTPUT_ARCH(powerpc) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ + PHDRS { text PT_LOAD; @@ -39,43 +38,16 @@ SECTIONS { /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } .text : { - *(.text) - *(.got1) + *(.text*) } :text _etext = .; PROVIDE (etext = .); .rodata : { - *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } :text - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } /* Read-write section, merged into data segment: */ . = (. + 0x00FF) & 0xFFFFFF00; @@ -83,23 +55,19 @@ SECTIONS PROVIDE (erotext = .); .reloc : { - *(.got) + KEEP(*(.got)) _GOT2_TABLE_ = .; - *(.got2) + KEEP(*(.got2)) _FIXUP_TABLE_ = .; - *(.fixup) + KEEP(*(.fixup)) } __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; __fixup_entries = (. - _FIXUP_TABLE_) >> 2; .data : { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS + *(.data*) + *(.sdata*) } _edata = .; PROVIDE (edata = .); @@ -138,7 +106,7 @@ SECTIONS .resetvec RESET_VECTOR_ADDRESS : { - *(.resetvec) + KEEP(*(.resetvec)) } :text = 0xffff . = RESET_VECTOR_ADDRESS + 0x4; @@ -157,9 +125,8 @@ SECTIONS __bss_start = .; .bss (NOLOAD) : { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) + *(.sbss*) + *(.bss*) *(COMMON) } :bss -- 1.7.3

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