July 2010 - U-Boot

[U-Boot] [PATCH] ppc4xx: Add CONFIG_DDR_RFDC_FIXED to allow board specific RFDC values
by Stefan Roese 20 Jul '10

20 Jul '10

Using this define, a board can define an opimized RFDC value and use the auto calibration code to "tune" the remaining DDR2 controller calibration register. Signed-off-by: Stefan Roese <sr(a)denx.de> --- arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c index 0f69ef9..5e35c61 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c @@ -767,6 +767,13 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal) debug("\n\n"); +#if defined(CONFIG_DDR_RFDC_FIXED) + mtsdram(SDRAM_RFDC, CONFIG_DDR_RFDC_FIXED); + size = 512; + rffd_average = CONFIG_DDR_RFDC_FIXED & SDRAM_RFDC_RFFD_MASK; + mfsdram(SDRAM_RDCC, rdcc); /* record this value */ + cal->rdcc = rdcc; +#else in_window = 0; rdcc = 0; @@ -830,6 +837,7 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal) rffd_average = SDRAM_RFDC_RFFD_MAX; mtsdram(SDRAM_RFDC, rfdc_reg | SDRAM_RFDC_RFFD_ENCODE(rffd_average)); +#endif rffd = rffd_average; in_window = 0; @@ -1211,10 +1219,14 @@ u32 DQS_autocalibration(void) debug("*** best_result: read value SDRAM_RQDC 0x%08x\n", rqdc_reg); +#if defined(CONFIG_DDR_RFDC_FIXED) + mtsdram(SDRAM_RFDC, CONFIG_DDR_RFDC_FIXED); +#else mfsdram(SDRAM_RFDC, rfdc_reg); rfdc_reg &= ~(SDRAM_RFDC_RFFD_MASK); mtsdram(SDRAM_RFDC, rfdc_reg | SDRAM_RFDC_RFFD_ENCODE(tcal.autocal.rffd)); +#endif mfsdram(SDRAM_RFDC, rfdc_reg); debug("*** best_result: read value SDRAM_RFDC 0x%08x\n", -- 1.7.1.1

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[U-Boot] [PATCH] move the flash setup to "#ifndef CONFIG_SYS_NO_FLASH"
by xiangfu 20 Jul '10

20 Jul '10

From: Xiangfu Liu <xiangfu(a)sharism.cc> Hi Wolfgang Denk in my Ben Nanonote board. there is no flash. I got a error about no "CONFIG_SYS_FLASH_BASE" define. so I move this line to "#ifndef CONFIG_SYS_NO_FLASH" I have tested with "MAKEALL". no warning or error relate this patch. this patch is base on [master] branch commit: 1f82ff4777f360e92aa37bbbed647f7b9d9d2044 Signed-off-by: Xiangfu Liu <xiangfu(a)sharism.cc> --- arch/mips/lib/board.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index b2d113e..0af09c6 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -349,9 +349,9 @@ void board_init_r (gd_t *id, ulong dest_addr) size = flash_init(); display_flash_config (size); bd->bi_flashsize = size; + bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; #endif - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; #if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */ #else -- 1.7.1

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[U-Boot] [PATCH] move the flash setup to "#ifndef CONFIG_SYS_NO_FLASH"
by xiangfu 20 Jul '10

20 Jul '10

From: Xiangfu Liu <xiangfu(a)sharism.cc> Hi Wolfgang Denk in my Ben Nanonote board. there is no flash. I got a error about no "CONFIG_SYS_FLASH_BASE" define. so I move this line to "#ifndef CONFIG_SYS_NO_FLASH" I have tested with "MAKEALL". no warning or error relate this patch. this patch is base on [master] branch commit: 1f82ff4777f360e92aa37bbbed647f7b9d9d2044 Signed-off-by: Xiangfu Liu <xiangfu(a)sharism.cc> --- arch/mips/lib/board.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index b2d113e..0af09c6 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -349,9 +349,9 @@ void board_init_r (gd_t *id, ulong dest_addr) size = flash_init(); display_flash_config (size); bd->bi_flashsize = size; + bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; #endif - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; #if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */ #else -- 1.7.1

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[U-Boot] [PATCH] net, fec: fix "Warning: eth device name has a space!" for FEC devices
by Heiko Schocher 19 Jul '10

19 Jul '10

since commit 1384f3bb8a4f9066805b70c1418eda78ecb73fdd ethernet names with spaces drop a Warning: eth device name has a space! message. This patch fix it for "FEC ETHERNET" devices found on mpc512x, mpc5xxx, mpc8xx and mpc8220 boards. Tested on the kup4k board. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- arch/powerpc/cpu/mpc8220/fec.c | 2 +- arch/powerpc/cpu/mpc8xx/fec.c | 4 ++-- board/motionpro/motionpro.c | 4 ++-- board/stx/stxxtc/stxxtc.c | 6 +++--- board/tqc/tqm8xx/tqm8xx.c | 4 ++-- drivers/net/mpc512x_fec.c | 2 +- drivers/net/mpc5xxx_fec.c | 2 +- include/configs/NSCU.h | 1 - include/configs/TK885D.h | 6 +++--- include/configs/idmr.h | 2 +- include/configs/v38b.h | 2 +- 11 files changed, 17 insertions(+), 18 deletions(-) diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c index 5df9735..cf0ce4a 100644 --- a/arch/powerpc/cpu/mpc8220/fec.c +++ b/arch/powerpc/cpu/mpc8220/fec.c @@ -840,7 +840,7 @@ int mpc8220_fec_initialize (bd_t * bis) dev->send = mpc8220_fec_send; dev->recv = mpc8220_fec_recv; - sprintf (dev->name, "FEC ETHERNET"); + sprintf (dev->name, "FEC_ETHERNET"); eth_register (dev); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c index 89c1ff9..73f1f98 100644 --- a/arch/powerpc/cpu/mpc8xx/fec.c +++ b/arch/powerpc/cpu/mpc8xx/fec.c @@ -164,9 +164,9 @@ int fec_initialize(bd_t *bis) /* for FEC1 make sure that the name of the interface is the same as the old one for compatibility reasons */ if (i == 0) { - sprintf (dev->name, "FEC ETHERNET"); + sprintf (dev->name, "FEC_ETHERNET"); } else { - sprintf (dev->name, "FEC%d ETHERNET", + sprintf (dev->name, "FEC%d_ETHERNET", ether_fcc_info[i].ether_index + 1); } diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index b369219..3616791 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -90,8 +90,8 @@ void reset_phy(void) { unsigned short mode_control; - miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control); - miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, + miiphy_read("FEC_ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control); + miiphy_write("FEC_ETHERNET", CONFIG_PHY_ADDR, 0x15, mode_control & 0xfffe); return; } diff --git a/board/stx/stxxtc/stxxtc.c b/board/stx/stxxtc/stxxtc.c index 717dbe2..d9f7a2d 100644 --- a/board/stx/stxxtc/stxxtc.c +++ b/board/stx/stxxtc/stxxtc.c @@ -481,12 +481,12 @@ void reset_phys(void) mii_init(); for (phyno = 0; phyno < 32; ++phyno) { - miiphy_read("FEC ETHERNET", phyno, PHY_PHYIDR1, &v); + miiphy_read("FECETHERNET", phyno, PHY_PHYIDR1, &v); if (v == 0xFFFF) continue; - miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_POWD); + miiphy_write("FEC_ETHERNET", phyno, PHY_BMCR, PHY_BMCR_POWD); udelay(10000); - miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON); + miiphy_write("FEC_ETHERNET", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON); udelay(10000); } } diff --git a/board/tqc/tqm8xx/tqm8xx.c b/board/tqc/tqm8xx/tqm8xx.c index 53f79e8..3ca2ee7 100644 --- a/board/tqc/tqm8xx/tqm8xx.c +++ b/board/tqc/tqm8xx/tqm8xx.c @@ -745,13 +745,13 @@ int last_stage_init(void) return 0; for (i = 0; i < 2; i++) { - ret = miiphy_read("FEC ETHERNET", phy[i], PHY_BMCR, &reg); + ret = miiphy_read("FEC_ETHERNET", phy[i], PHY_BMCR, &reg); if (ret) { printf("Cannot read BMCR on PHY %d\n", phy[i]); return 0; } /* Auto-negotiation off, hard set full duplex, 100Mbps */ - ret = miiphy_write("FEC ETHERNET", phy[i], + ret = miiphy_write("FEC_ETHERNET", phy[i], PHY_BMCR, (reg | PHY_BMCR_100MB | PHY_BMCR_DPLX) & ~PHY_BMCR_AUTON); if (ret) { diff --git a/drivers/net/mpc512x_fec.c b/drivers/net/mpc512x_fec.c index c580c82..1f7392e 100644 --- a/drivers/net/mpc512x_fec.c +++ b/drivers/net/mpc512x_fec.c @@ -637,7 +637,7 @@ int mpc512x_fec_initialize (bd_t * bis) dev->send = mpc512x_fec_send; dev->recv = mpc512x_fec_recv; - sprintf (dev->name, "FEC ETHERNET"); + sprintf (dev->name, "FEC_ETHERNET"); eth_register (dev); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) diff --git a/drivers/net/mpc5xxx_fec.c b/drivers/net/mpc5xxx_fec.c index 1681e26..94c9277 100644 --- a/drivers/net/mpc5xxx_fec.c +++ b/drivers/net/mpc5xxx_fec.c @@ -913,7 +913,7 @@ int mpc5xxx_fec_initialize(bd_t * bis) dev->send = mpc5xxx_fec_send; dev->recv = mpc5xxx_fec_recv; - sprintf(dev->name, "FEC ETHERNET"); + sprintf(dev->name, "FEC_ETHERNET"); eth_register(dev); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) diff --git a/include/configs/NSCU.h b/include/configs/NSCU.h index 5724f45..6a4c47d 100644 --- a/include/configs/NSCU.h +++ b/include/configs/NSCU.h @@ -485,7 +485,6 @@ #undef CONFIG_SCC1_ENET #define CONFIG_FEC_ENET -/* #define CONFIG_ETHPRIME "FEC ETHERNET" */ /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 diff --git a/include/configs/TK885D.h b/include/configs/TK885D.h index 0df1b6e..f34039c 100644 --- a/include/configs/TK885D.h +++ b/include/configs/TK885D.h @@ -65,8 +65,8 @@ #undef CONFIG_BOOTARGS #define CONFIG_EXTRA_ENV_SETTINGS \ - "ethprime=FEC ETHERNET\0" \ - "ethact=FEC ETHERNET\0" \ + "ethprime=FEC_ETHERNET\0" \ + "ethact=FEC_ETHERNET\0" \ "netdev=eth0\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ @@ -514,7 +514,7 @@ #define CONFIG_MII_INIT 1 #define CONFIG_NET_RETRY_COUNT 3 -#define CONFIG_ETHPRIME "FEC ETHERNET" +#define CONFIG_ETHPRIME "FEC_ETHERNET" /* pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 diff --git a/include/configs/idmr.h b/include/configs/idmr.h index 61e3bad..d3017e2 100644 --- a/include/configs/idmr.h +++ b/include/configs/idmr.h @@ -74,7 +74,7 @@ "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=$(serverip):$(rootpath)\0" \ - "ethact=FEC ETHERNET\0" \ + "ethact=FEC_ETHERNET\0" \ "update=prot off ff800000 ff81ffff; era ff800000 ff81ffff; " \ "cp.b 200000 ff800000 $(filesize);" \ "prot on ff800000 ff81ffff\0" \ diff --git a/include/configs/v38b.h b/include/configs/v38b.h index d462ed0..4d19d98 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -154,7 +154,7 @@ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=$(serverip):$(rootpath) wdt=off\0" \ "hostname=v38b\0" \ - "ethact=FEC ETHERNET\0" \ + "ethact=FEC_ETHERNET\0" \ "rootpath=/opt/eldk-3.1.1/ppc_6xx\0" \ "update=prot off ff000000 ff03ffff; era ff000000 ff03ffff; " \ "cp.b 200000 ff000000 $(filesize);" \ -- 1.6.2.5 -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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[U-Boot] Hope Your Having A Great Summer
by Couture Brands Inc. 19 Jul '10

19 Jul '10

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[U-Boot] [PATCH 2/2 v2] 8xx, kup4: add FDT support
by Heiko Schocher 19 Jul '10

19 Jul '10

Signed-off-by: Heiko Schocher <hs(a)denx.de> --- - changes since v1 - rebased against current mainline - fix printf output board/kup/kup4k/kup4k.c | 58 +++++++++++++++++++++++++++++++++++++++++++++++ include/configs/KUP4K.h | 4 +++ 2 files changed, 62 insertions(+), 0 deletions(-) diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c index 7eb36ab..637fe3d 100644 --- a/board/kup/kup4k/kup4k.c +++ b/board/kup/kup4k/kup4k.c @@ -24,6 +24,7 @@ #include <common.h> #include <command.h> +#include <libfdt.h> #include <mpc8xx.h> #include <hwconfig.h> #include <i2c.h> @@ -291,3 +292,60 @@ static unsigned char swapbyte(unsigned char c) } return result; } + +/* + * Device Tree Support + */ +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +int fdt_set_node_and_value(void *blob, + char *nodename, + char *regname, + void *var, + int size) +{ + int ret = 0; + int nodeoffset = 0; + + nodeoffset = fdt_path_offset(blob, nodename); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, regname, var, + size); + if (ret < 0) { + printf("%s: cannot set %s/%s property; err: %s\n", + __func__, nodename, regname, fdt_strerror(ret)); + } + } else { + printf("%s: cannot find %s node err:%s\n", __func__, + nodename, fdt_strerror(nodeoffset)); + } + return ret; +} + +/* + * update "brg" property in the blob + */ +void ft_blob_update(void *blob, bd_t *bd) +{ + uchar enetaddr[6]; + ulong brg_data = 0; + + /* BRG */ + brg_data = cpu_to_be32(bd->bi_busfreq); + fdt_set_node_and_value(blob, + "/soc/cpm", "brg-frequency", + &brg_data, sizeof(brg_data)); + + /* MAC addr */ + if (eth_getenv_enetaddr("ethaddr", enetaddr)) { + fdt_set_node_and_value(blob, + "ethernet0", "local-mac-address", + enetaddr, sizeof(u8) * 6); + } +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); + ft_blob_update(blob, bd); +} +#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h index ab708ae..14d412d 100644 --- a/include/configs/KUP4K.h +++ b/include/configs/KUP4K.h @@ -510,5 +510,9 @@ #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enble null device */ #define CONFIG_VERSION_VARIABLE 1 +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + #endif /* __CONFIG_H */ -- 1.6.2.5 -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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Re: [U-Boot] FW: Need Your Help
by Marek Vasut 19 Jul '10

19 Jul '10

Dne Po 19. července 2010 17:29:48 StephenPaulraj Chinnadurai-ERS,HCLTech napsal(a): > Hello Marek, > > Hope you are doing well. > > I registered with U-Boot(a)lists.denx.de list last week and came to know > about activities of the group. You should possibly CC this mail into u-boot mailing list too. > > I understand that your work is very tightly scheduled. > > > I have made the FFUART and CFI to work in my board. ok > > But LAN91C1111 connect to the PXA270 in the static chip select 4 (nCS4) is > not working. Do you have correct GPIO mux settings ? In this case GPIO80 as to be AF2, check your GAFRx registers. > > In /include/configs/hcl_pxa270.h file I have defined the following macro: > #define CONFIG_SMC91111 > #define CONFIG_SMC91111_BASE 0x10000300 Are you sure about the 0x300 offset? That's actually toggling MA<10:9> pins on. Do you have these connected at all? Try this: +/* + * Networking Configuration + * SMC91C111 chip + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_NET_MULTI + +#define CONFIG_SMC91111 +#define CONFIG_SMC91111_BASE 0x10000300 + +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.1.52 +#define CONFIG_SERVERIP 192.168.1.51 +#endif > > In board/hcl_pxa270/lowlevel_init.S file, I have assigned > MSC0 = 0x23F2B8F2 > MSC1 = 0x0000CCD1 > MSC2 = 0x0000B884 You don't need these ... see arch/arm/include/asm/arch-pxa/macro.h, everything you need is already configured there. Check for example vpac270 board. > > Then in the board_init() function which is in /board/hcl_pxa270/hclpxa270.c > file, I assigned: MSC0 = 0x7FF07FF0 > MSC1 = 0x7FF07FF0 > MSC2 = 0x7FF07FF0 You don't need that. The macros above do it for you. Again, check vpac270 board, it's lowlevel_init.S, it's configs/vpac270.h etc. You'll see that these are configured much earlier and you're only duplicating work. All you need in your hclpxa270.c is this: +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif > > But still the Ethernet is not initialized and working(Ethernet LED is not > blinking): > > Apart from the above modification, whether I need to do any other changes. > > I am sending this mail personally, because you understand my problem (that > I am working in hcl customized board and not in the reference/development > board). You should CC the mailing list anyway, because the knowledge I share with you can help other people who will search the mailing list in future. Also, could you share your patch for the hcl board? It might be easier to check for grave bugs then. Cheers > > Thanks and Regards > Stephen Paulraj C > > HCL Technologies Ltd. > D-12, Sidco Industrial Estate, > Ambattur, Chennai -58 > Tel: +91 44 42004800 Extn: 2319 > Mob:+91 9962583934 > www.hcl.in >

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Re: [U-Boot] Nor Flash SST39VF6402B cfi compliant support
by Stefan Roese 19 Jul '10

19 Jul '10

Hi Fabio, (please keep the list on Cc). On Monday 19 July 2010 11:27:50 Fabio Giovagnini wrote: > I do not think so about teh different regons. > I attach the datasheet I found on the net and I cannot find anythink about > two different regions for > SST39VF6402B > > Maybe I'm wrong. Yes, you are wrong. ;) The manual mentions block-erase (32k) and sector-erase (2k). Please check which one is used by the CFi commands right now. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office(a)denx.de

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[U-Boot] Need Help : OMAP3530 Mistral EVM
by Sudipta Basu 19 Jul '10

19 Jul '10

Hi All, I have downloaded u-boot-2010.06.tar.bz2 from Denx website, then tried to configure it, it didn't work, i used # make omap3530_config It says : make: *** No rule to make target `omap3530_config'. Stop. Then it did : cd /board/ti It says : beagle omap1510inn omap2420h4 omap730p2 tnetv107xevm evm omap1610inn omap5912osk sdp3430 But no OMAP3530 My question is : Does u-boot support OMAP3530 board ??? Please let me know. Regards, Sudipta

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[U-Boot] [PATCH-V3] at91: Update meesc board to new SoC access
by Daniel Gorsulowski 19 Jul '10

19 Jul '10

* convert meesc board to use c stucture SoC access * change gpio access to at91_gpio syntax * moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic) Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski(a)esd.eu> --- v2: fixed copyright changing error according to Wolfgangs hint v3: removed some whitespace, indentation and coding style errors board/esd/meesc/meesc.c | 112 ++++++++++++++++++++++++---------------------- include/configs/meesc.h | 9 ++-- 2 files changed, 62 insertions(+), 59 deletions(-) diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index a1b66cb..eb87cfc 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -3,7 +3,7 @@ * Stelian Pop <stelian.pop(a)leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * - * (C) Copyright 2009 + * (C) Copyright 2009-2010 * Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> * esd electronic system design gmbh <www.esd.eu> * @@ -28,13 +28,13 @@ #include <common.h> #include <asm/arch/at91sam9263.h> -#include <asm/arch/at91sam9_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> +#include <asm/arch/at91_matrix.h> +#include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> -#include <asm/arch/gpio.h> #include <asm/arch/hardware.h> #include <asm/arch/io.h> #include <netdev.h> @@ -52,10 +52,10 @@ int get_hw_rev(void) if (hw_rev >= 0) return hw_rev; - hw_rev = at91_get_gpio_value(AT91_PIN_PB19); - hw_rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1; - hw_rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2; - hw_rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3; + hw_rev = at91_get_pio_value(AT91_PIO_PORTB, 19); + hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 20) << 1; + hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 21) << 2; + hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 22) << 3; if (hw_rev == 15) hw_rev = 0; @@ -67,44 +67,44 @@ int get_hw_rev(void) static void meesc_nand_hw_init(void) { unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE; + at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; /* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBI0CSA); - at91_sys_write(AT91_MATRIX_EBI0CSA, - csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa[0]); /* Configure SMC CS3 for NAND/SmartMedia */ - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | -#ifdef CONFIG_SYS_NAND_DBW_16 - AT91_SMC_DBW_16 | -#else /* CONFIG_SYS_NAND_DBW_8 */ - AT91_SMC_DBW_8 | -#endif - AT91_SMC_TDF_(2)); + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_DBW_8 | + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); /* Configure RDY/BSY */ - at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1); /* Enable NandFlash */ - at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); } #endif /* CONFIG_CMD_NAND */ #ifdef CONFIG_MACB static void meesc_macb_hw_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); + writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer); at91_macb_hw_init(); } #endif @@ -117,26 +117,27 @@ static void meesc_macb_hw_init(void) */ static void meesc_ethercat_hw_init(void) { + at91_smc_t *smc1 = (at91_smc_t *) AT91_SMC1_BASE; + /* Configure SMC EBI1_CS0 for EtherCAT */ - at91_sys_write(AT91_SMC1_SETUP(0), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC1_PULSE(0), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) | - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9)); - at91_sys_write(AT91_SMC1_CYCLE(0), - AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5)); + writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(0) | AT91_SMC_SETUP_NCS_RD(0), + &smc1->cs[0].setup); + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(9) | + AT91_SMC_PULSE_NRD(5) | AT91_SMC_PULSE_NCS_RD(9), + &smc1->cs[0].pulse); + writel(AT91_SMC_CYCLE_NWE(10) | AT91_SMC_CYCLE_NRD(6), + &smc1->cs[0].cycle); /* * Configure behavior at external wait signal, byte-select mode, 16 bit * data bus width, none data float wait states and TDF optimization */ - at91_sys_write(AT91_SMC1_MODE(0), - AT91_SMC_READMODE | AT91_SMC_EXNWMODE_READY | - AT91_SMC_BAT_SELECT | AT91_SMC_DBW_16 | AT91_SMC_TDF_(0) | - AT91_SMC_TDFMODE); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_EXNW_READY | + AT91_SMC_MODE_DBW_16 | AT91_SMC_MODE_TDF_CYCLE(0) | + AT91_SMC_MODE_TDF, &smc1->cs[0].mode); /* Configure RDY/BSY */ - at91_set_B_periph(AT91_PIN_PE20, 0); /* EBI1_NWAIT */ + at91_set_b_periph(AT91_PIO_PORTE, 20, 0); /* EBI1_NWAIT */ } int dram_init(void) @@ -150,7 +151,7 @@ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00); + rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00); #endif return rc; } @@ -175,7 +176,7 @@ int checkboard(void) gd->bd->bi_arch_number = MACH_TYPE_ETHERCAN2; puts("Board: EtherCAN/2 Gateway"); /* switch on LED1D */ - at91_set_gpio_output(AT91_PIN_PB12, 1); + at91_set_pio_output(AT91_PIO_PORTB, 12, 1); break; default: /* assume, no ET1100 present, arch number of EtherCAN/2-Board */ @@ -222,8 +223,9 @@ u32 get_board_rev(void) #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { - char *str; - char buf[32]; + char *str; + char buf[32]; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; /* * Normally the processor clock has a divisor of 2. @@ -231,10 +233,9 @@ int misc_init_r(void) * Check the user has set environment mdiv to 4 to change the divisor. */ if ((str = getenv("mdiv")) && (strcmp(str, "4") == 0)) { - at91_sys_write(AT91_PMC_MCKR, - (at91_sys_read(AT91_PMC_MCKR) & ~AT91_PMC_MDIV) | - AT91SAM9_PMC_MDIV_4); - at91_clock_init(0); + writel((readl(&pmc->mckr) & ~AT91_PMC_MDIV) | + AT91SAM9_PMC_MDIV_4, &pmc->mckr); + at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); serial_setbrg(); /* Notify the user that the clock is not default */ printf("Setting master clock to %s MHz\n", @@ -247,10 +248,13 @@ int misc_init_r(void) int board_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Peripheral Clock Enable Register */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | - 1 << AT91SAM9263_ID_PIOB | - 1 << AT91SAM9263_ID_PIOCDE); + writel(1 << AT91SAM9263_ID_PIOA | + 1 << AT91SAM9263_ID_PIOB | + 1 << AT91SAM9263_ID_PIOCDE, + &pmc->pcer); /* initialize ET1100 Controller */ meesc_ethercat_hw_init(); diff --git a/include/configs/meesc.h b/include/configs/meesc.h index dad0bef..bd51ff4 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -31,14 +31,12 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_AT91_LEGACY - /* Common stuff */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq */ #define CONFIG_MEESC 1 /* Board is esd MEESC */ #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq */ #define CONFIG_DISPLAY_BOARDINFO 1 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ #define CONFIG_PREBOOT /* enable preboot variable */ @@ -58,6 +56,7 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 /* Console output */ #define CONFIG_AT91_GPIO 1 @@ -122,8 +121,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 +#define CONFIG_SYS_NAND_ENABLE_PIN (AT91_PIO_PORTD, 15) +#define CONFIG_SYS_NAND_READY_PIN (AT91_PIO_PORTA, 22) #endif -- 1.5.3

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